fond
Model Checking Contest 2018
8th edition, Bratislava, Slovakia, June 26, 2018
Execution of r260-csrt-152732585400149
Last Updated
June 26, 2018

About the Execution of ITS-Tools for Peterson-COL-3

Execution Summary
Max Memory
Used (MB)
Time wait (ms) CPU Usage (ms) I/O Wait (ms) Computed Result Execution
Status
15755.860 108470.00 240553.00 178.20 FTFTFFFTFFFFFTFF normal

Execution Chart

We display below the execution chart for this examination (boot time has been removed).

Trace from the execution

Waiting for the VM to be ready (probing ssh)
..................
/home/mcc/execution
total 212K
-rw-r--r-- 1 mcc users 3.9K May 15 18:54 CTLCardinality.txt
-rw-r--r-- 1 mcc users 21K May 15 18:54 CTLCardinality.xml
-rw-r--r-- 1 mcc users 2.6K May 15 18:54 CTLFireability.txt
-rw-r--r-- 1 mcc users 16K May 15 18:54 CTLFireability.xml
-rw-r--r-- 1 mcc users 4.0K May 15 18:50 GenericPropertiesDefinition.xml
-rw-r--r-- 1 mcc users 6.0K May 15 18:50 GenericPropertiesVerdict.xml
-rw-r--r-- 1 mcc users 2.4K May 26 09:26 LTLCardinality.txt
-rw-r--r-- 1 mcc users 11K May 26 09:26 LTLCardinality.xml
-rw-r--r-- 1 mcc users 1.9K May 26 09:26 LTLFireability.txt
-rw-r--r-- 1 mcc users 9.2K May 26 09:26 LTLFireability.xml
-rw-r--r-- 1 mcc users 3.6K May 15 18:54 ReachabilityCardinality.txt
-rw-r--r-- 1 mcc users 17K May 15 18:54 ReachabilityCardinality.xml
-rw-r--r-- 1 mcc users 105 May 15 18:54 ReachabilityDeadlock.txt
-rw-r--r-- 1 mcc users 343 May 15 18:54 ReachabilityDeadlock.xml
-rw-r--r-- 1 mcc users 3.3K May 15 18:54 ReachabilityFireability.txt
-rw-r--r-- 1 mcc users 20K May 15 18:54 ReachabilityFireability.xml
-rw-r--r-- 1 mcc users 1.6K May 15 18:54 UpperBounds.txt
-rw-r--r-- 1 mcc users 3.7K May 15 18:54 UpperBounds.xml
-rw-r--r-- 1 mcc users 5 May 15 18:50 equiv_pt
-rw-r--r-- 1 mcc users 2 May 15 18:50 instance
-rw-r--r-- 1 mcc users 5 May 15 18:50 iscolored
-rw-r--r-- 1 mcc users 43K May 15 18:50 model.pnml
=====================================================================
Generated by BenchKit 2-3637
Executing tool itstools
Input is Peterson-COL-3, examination is LTLCardinality
Time confinement is 3600 seconds
Memory confinement is 16384 MBytes
Number of cores is 4
Run identifier is r260-csrt-152732585400149
=====================================================================


--------------------
content from stdout:

=== Data for post analysis generated by BenchKit (invocation template)

The expected result is a vector of booleans
BOOL_VECTOR

here is the order used to build the result vector(from text file)
FORMULA_NAME Peterson-COL-3-LTLCardinality-00
FORMULA_NAME Peterson-COL-3-LTLCardinality-01
FORMULA_NAME Peterson-COL-3-LTLCardinality-02
FORMULA_NAME Peterson-COL-3-LTLCardinality-03
FORMULA_NAME Peterson-COL-3-LTLCardinality-04
FORMULA_NAME Peterson-COL-3-LTLCardinality-05
FORMULA_NAME Peterson-COL-3-LTLCardinality-06
FORMULA_NAME Peterson-COL-3-LTLCardinality-07
FORMULA_NAME Peterson-COL-3-LTLCardinality-08
FORMULA_NAME Peterson-COL-3-LTLCardinality-09
FORMULA_NAME Peterson-COL-3-LTLCardinality-10
FORMULA_NAME Peterson-COL-3-LTLCardinality-11
FORMULA_NAME Peterson-COL-3-LTLCardinality-12
FORMULA_NAME Peterson-COL-3-LTLCardinality-13
FORMULA_NAME Peterson-COL-3-LTLCardinality-14
FORMULA_NAME Peterson-COL-3-LTLCardinality-15

=== Now, execution of the tool begins

BK_START 1527489043886

06:30:45.969 [main] ERROR PNML validation - The rng grammar file can't be accessed : www.pnml.org
06:30:45.972 [main] ERROR import - Grammar file errors have been raised, the validation can't be done, process will continue without Grammar validation
Using solver Z3 to compute partial order matrices.
Built C files in :
/home/mcc/execution
Invoking ITS tools like this :CommandLine [args=[/home/mcc/BenchKit/itstools/plugins/fr.lip6.move.gal.itstools.binaries_1.0.0.201805151631/bin/its-ltl-linux64, --gc-threshold, 2000000, -i, /home/mcc/execution/LTLCardinality.pnml.gal, -t, CGAL, -LTL, /home/mcc/execution/LTLCardinality.ltl, -c, -stutter-deadlock], workingDir=/home/mcc/execution]

its-ltl command run as :

/home/mcc/BenchKit/itstools/plugins/fr.lip6.move.gal.itstools.binaries_1.0.0.201805151631/bin/its-ltl-linux64 --gc-threshold 2000000 -i /home/mcc/execution/LTLCardinality.pnml.gal -t CGAL -LTL /home/mcc/execution/LTLCardinality.ltl -c -stutter-deadlock
Read 16 LTL properties
Checking formula 0 : !((G(G(("((((((((((((turn_0+turn_1)+turn_2)+turn_3)+turn_4)+turn_5)+turn_6)+turn_7)+turn_8)+turn_9)+turn_10)+turn_11)>=2)")U("((((((((((((endTurn_0+endTurn_1)+endTurn_2)+endTurn_3)+endTurn_4)+endTurn_5)+endTurn_6)+endTurn_7)+endTurn_8)+endTurn_9)+endTurn_10)+endTurn_11)<=(((((((((((((((((((((((((((((((((((((((((((((((testIdentity_0+testIdentity_1)+testIdentity_2)+testIdentity_3)+testIdentity_4)+testIdentity_5)+testIdentity_6)+testIdentity_7)+testIdentity_8)+testIdentity_9)+testIdentity_10)+testIdentity_11)+testIdentity_12)+testIdentity_13)+testIdentity_14)+testIdentity_15)+testIdentity_16)+testIdentity_17)+testIdentity_18)+testIdentity_19)+testIdentity_20)+testIdentity_21)+testIdentity_22)+testIdentity_23)+testIdentity_24)+testIdentity_25)+testIdentity_26)+testIdentity_27)+testIdentity_28)+testIdentity_29)+testIdentity_30)+testIdentity_31)+testIdentity_32)+testIdentity_33)+testIdentity_34)+testIdentity_35)+testIdentity_36)+testIdentity_37)+testIdentity_38)+testIdentity_39)+testIdentity_40)+testIdentity_41)+testIdentity_42)+testIdentity_43)+testIdentity_44)+testIdentity_45)+testIdentity_46)+testIdentity_47))")))))
Formula 0 simplified : !G("((((((((((((turn_0+turn_1)+turn_2)+turn_3)+turn_4)+turn_5)+turn_6)+turn_7)+turn_8)+turn_9)+turn_10)+turn_11)>=2)" U "((((((((((((endTurn_0+endTurn_1)+endTurn_2)+endTurn_3)+endTurn_4)+endTurn_5)+endTurn_6)+endTurn_7)+endTurn_8)+endTurn_9)+endTurn_10)+endTurn_11)<=(((((((((((((((((((((((((((((((((((((((((((((((testIdentity_0+testIdentity_1)+testIdentity_2)+testIdentity_3)+testIdentity_4)+testIdentity_5)+testIdentity_6)+testIdentity_7)+testIdentity_8)+testIdentity_9)+testIdentity_10)+testIdentity_11)+testIdentity_12)+testIdentity_13)+testIdentity_14)+testIdentity_15)+testIdentity_16)+testIdentity_17)+testIdentity_18)+testIdentity_19)+testIdentity_20)+testIdentity_21)+testIdentity_22)+testIdentity_23)+testIdentity_24)+testIdentity_25)+testIdentity_26)+testIdentity_27)+testIdentity_28)+testIdentity_29)+testIdentity_30)+testIdentity_31)+testIdentity_32)+testIdentity_33)+testIdentity_34)+testIdentity_35)+testIdentity_36)+testIdentity_37)+testIdentity_38)+testIdentity_39)+testIdentity_40)+testIdentity_41)+testIdentity_42)+testIdentity_43)+testIdentity_44)+testIdentity_45)+testIdentity_46)+testIdentity_47))")
Presburger conditions satisfied. Using coverability to approximate state space in K-Induction.
Normalized transition count is 332
// Phase 1: matrix 332 rows 256 cols
invariant :wantSection_6 + wantSection_7 = 1
invariant :-1'wantSection_1 + askForSection_0 + askForSection_1 + askForSection_2 + testTurn_0 + testTurn_1 + testTurn_2 + beginLoop_0 + beginLoop_1 + beginLoop_2 + beginLoop_3 + beginLoop_4 + beginLoop_5 + beginLoop_6 + beginLoop_7 + beginLoop_8 + beginLoop_9 + beginLoop_10 + beginLoop_11 + endTurn_0 + endTurn_1 + endTurn_2 + CS_0 + testIdentity_0 + testIdentity_1 + testIdentity_2 + testIdentity_3 + testIdentity_4 + testIdentity_5 + testIdentity_6 + testIdentity_7 + testIdentity_8 + testIdentity_9 + testIdentity_10 + testIdentity_11 + testAlone_0 + testAlone_1 + testAlone_2 + testAlone_3 + testAlone_4 + testAlone_5 + testAlone_6 + testAlone_7 + testAlone_8 + testAlone_9 + testAlone_10 + testAlone_11 + isEndLoop_0 + isEndLoop_1 + isEndLoop_2 + isEndLoop_3 + isEndLoop_4 + isEndLoop_5 + isEndLoop_6 + isEndLoop_7 + isEndLoop_8 + isEndLoop_9 + isEndLoop_10 + isEndLoop_11 = 0
invariant :-1'wantSection_3 + askForSection_3 + askForSection_4 + askForSection_5 + testTurn_3 + testTurn_4 + testTurn_5 + beginLoop_12 + beginLoop_13 + beginLoop_14 + beginLoop_15 + beginLoop_16 + beginLoop_17 + beginLoop_18 + beginLoop_19 + beginLoop_20 + beginLoop_21 + beginLoop_22 + beginLoop_23 + endTurn_3 + endTurn_4 + endTurn_5 + CS_1 + testIdentity_12 + testIdentity_13 + testIdentity_14 + testIdentity_15 + testIdentity_16 + testIdentity_17 + testIdentity_18 + testIdentity_19 + testIdentity_20 + testIdentity_21 + testIdentity_22 + testIdentity_23 + testAlone_12 + testAlone_13 + testAlone_14 + testAlone_15 + testAlone_16 + testAlone_17 + testAlone_18 + testAlone_19 + testAlone_20 + testAlone_21 + testAlone_22 + testAlone_23 + isEndLoop_12 + isEndLoop_13 + isEndLoop_14 + isEndLoop_15 + isEndLoop_16 + isEndLoop_17 + isEndLoop_18 + isEndLoop_19 + isEndLoop_20 + isEndLoop_21 + isEndLoop_22 + isEndLoop_23 = 0
invariant :idle_1 + wantSection_3 = 1
invariant :wantSection_0 + wantSection_1 = 1
invariant :turn_4 + turn_5 + turn_6 + turn_7 = 1
invariant :idle_2 + wantSection_5 = 1
invariant :turn_8 + turn_9 + turn_10 + turn_11 = 1
invariant :wantSection_2 + wantSection_3 = 1
invariant :-1'wantSection_7 + askForSection_9 + askForSection_10 + askForSection_11 + testTurn_9 + testTurn_10 + testTurn_11 + beginLoop_36 + beginLoop_37 + beginLoop_38 + beginLoop_39 + beginLoop_40 + beginLoop_41 + beginLoop_42 + beginLoop_43 + beginLoop_44 + beginLoop_45 + beginLoop_46 + beginLoop_47 + endTurn_9 + endTurn_10 + endTurn_11 + CS_3 + testIdentity_36 + testIdentity_37 + testIdentity_38 + testIdentity_39 + testIdentity_40 + testIdentity_41 + testIdentity_42 + testIdentity_43 + testIdentity_44 + testIdentity_45 + testIdentity_46 + testIdentity_47 + testAlone_36 + testAlone_37 + testAlone_38 + testAlone_39 + testAlone_40 + testAlone_41 + testAlone_42 + testAlone_43 + testAlone_44 + testAlone_45 + testAlone_46 + testAlone_47 + isEndLoop_36 + isEndLoop_37 + isEndLoop_38 + isEndLoop_39 + isEndLoop_40 + isEndLoop_41 + isEndLoop_42 + isEndLoop_43 + isEndLoop_44 + isEndLoop_45 + isEndLoop_46 + isEndLoop_47 = 0
invariant :turn_0 + turn_1 + turn_2 + turn_3 = 1
invariant :idle_0 + wantSection_1 = 1
invariant :wantSection_4 + wantSection_5 = 1
invariant :-1'wantSection_5 + askForSection_6 + askForSection_7 + askForSection_8 + testTurn_6 + testTurn_7 + testTurn_8 + beginLoop_24 + beginLoop_25 + beginLoop_26 + beginLoop_27 + beginLoop_28 + beginLoop_29 + beginLoop_30 + beginLoop_31 + beginLoop_32 + beginLoop_33 + beginLoop_34 + beginLoop_35 + endTurn_6 + endTurn_7 + endTurn_8 + CS_2 + testIdentity_24 + testIdentity_25 + testIdentity_26 + testIdentity_27 + testIdentity_28 + testIdentity_29 + testIdentity_30 + testIdentity_31 + testIdentity_32 + testIdentity_33 + testIdentity_34 + testIdentity_35 + testAlone_24 + testAlone_25 + testAlone_26 + testAlone_27 + testAlone_28 + testAlone_29 + testAlone_30 + testAlone_31 + testAlone_32 + testAlone_33 + testAlone_34 + testAlone_35 + isEndLoop_24 + isEndLoop_25 + isEndLoop_26 + isEndLoop_27 + isEndLoop_28 + isEndLoop_29 + isEndLoop_30 + isEndLoop_31 + isEndLoop_32 + isEndLoop_33 + isEndLoop_34 + isEndLoop_35 = 0
invariant :idle_3 + wantSection_7 = 1
Reverse transition relation is NOT exact ! Due to transitions updateTurn_0_0_0, updateTurn_0_0_1, updateTurn_0_0_2, updateTurn_0_0_3, updateTurn_0_1_0, updateTurn_0_1_1, updateTurn_0_1_2, updateTurn_0_1_3, updateTurn_0_2_0, updateTurn_0_2_1, updateTurn_0_2_2, updateTurn_0_2_3, updateTurn_0_3_0, updateTurn_0_3_1, updateTurn_0_3_2, updateTurn_0_3_3, updateTurn_1_0_0, updateTurn_1_0_1, updateTurn_1_0_2, updateTurn_1_0_3, updateTurn_1_1_0, updateTurn_1_1_1, updateTurn_1_1_2, updateTurn_1_1_3, updateTurn_1_2_0, updateTurn_1_2_1, updateTurn_1_2_2, updateTurn_1_2_3, updateTurn_1_3_0, updateTurn_1_3_1, updateTurn_1_3_2, updateTurn_1_3_3, updateTurn_2_0_0, updateTurn_2_0_1, updateTurn_2_0_2, updateTurn_2_0_3, updateTurn_2_1_0, updateTurn_2_1_1, updateTurn_2_1_2, updateTurn_2_1_3, updateTurn_2_2_0, updateTurn_2_2_1, updateTurn_2_2_2, updateTurn_2_2_3, updateTurn_2_3_0, updateTurn_2_3_1, updateTurn_2_3_2, updateTurn_2_3_3, becomeIdle_0, becomeIdle_1, becomeIdle_2, becomeIdle_3, notAlone_0_1_2, notAlone_0_1_3, notAlone_0_2_0, notAlone_0_2_1, notAlone_0_2_3, notAlone_0_3_0, notAlone_0_3_1, notAlone_0_3_2, notAlone_1_1_2, notAlone_1_1_3, notAlone_1_2_0, notAlone_1_2_1, notAlone_1_2_3, notAlone_1_3_0, notAlone_1_3_1, notAlone_1_3_2, notAlone_2_1_2, notAlone_2_1_3, notAlone_2_2_0, notAlone_2_2_1, notAlone_2_2_3, notAlone_2_3_0, notAlone_2_3_1, notAlone_2_3_2, endLoop_0_0, endLoop_0_1, endLoop_0_2, endLoop_0_3, endLoop_1_0, endLoop_1_1, endLoop_1_2, endLoop_1_3, Intersection with reachable at each step enabled. (destroyed/reverse/intersect/total) :24/244/84/352
Running compilation step : CommandLine [args=[gcc, -c, -I/home/mcc/BenchKit//lts_install_dir//include, -I., -std=c99, -fPIC, -O3, model.c], workingDir=/home/mcc/execution]
Compilation finished in 5063 ms.
Running link step : CommandLine [args=[gcc, -shared, -o, gal.so, model.o], workingDir=/home/mcc/execution]
Link finished in 74 ms.
Running LTSmin : CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=1, -p, --pins-guards, --when, --ltl, []([](((LTLAP0==true))U((LTLAP1==true)))), --buchi-type=spotba], workingDir=/home/mcc/execution]
LTSmin run took 4949 ms.
FORMULA Peterson-COL-3-LTLCardinality-00 FALSE TECHNIQUES PARTIAL_ORDER EXPLICIT LTSMIN SAT_SMT
Running LTSmin : CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=1, --when, --ltl, X((LTLAP2==true)), --buchi-type=spotba], workingDir=/home/mcc/execution]
LTSmin run took 32 ms.
FORMULA Peterson-COL-3-LTLCardinality-01 TRUE TECHNIQUES PARTIAL_ORDER EXPLICIT LTSMIN SAT_SMT
Running LTSmin : CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=1, -p, --pins-guards, --when, --ltl, (LTLAP3==true), --buchi-type=spotba], workingDir=/home/mcc/execution]
LTSmin run took 225 ms.
FORMULA Peterson-COL-3-LTLCardinality-02 FALSE TECHNIQUES PARTIAL_ORDER EXPLICIT LTSMIN SAT_SMT
Running LTSmin : CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=1, --when, --ltl, (((LTLAP4==true))U((LTLAP5==true)))U(X(<>((LTLAP6==true)))), --buchi-type=spotba], workingDir=/home/mcc/execution]
LTSmin run took 36 ms.
FORMULA Peterson-COL-3-LTLCardinality-03 TRUE TECHNIQUES PARTIAL_ORDER EXPLICIT LTSMIN SAT_SMT
Running LTSmin : CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=1, -p, --pins-guards, --when, --ltl, []((LTLAP7==true)), --buchi-type=spotba], workingDir=/home/mcc/execution]
LTSmin run took 250 ms.
FORMULA Peterson-COL-3-LTLCardinality-04 FALSE TECHNIQUES PARTIAL_ORDER EXPLICIT LTSMIN SAT_SMT
Running LTSmin : CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=1, --when, --ltl, (X(X((LTLAP8==true))))U([](X((LTLAP9==true)))), --buchi-type=spotba], workingDir=/home/mcc/execution]
LTSmin run took 29 ms.
FORMULA Peterson-COL-3-LTLCardinality-05 FALSE TECHNIQUES PARTIAL_ORDER EXPLICIT LTSMIN SAT_SMT
Running LTSmin : CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=1, -p, --pins-guards, --when, --ltl, (LTLAP10==true), --buchi-type=spotba], workingDir=/home/mcc/execution]
LTSmin run took 186 ms.
FORMULA Peterson-COL-3-LTLCardinality-06 FALSE TECHNIQUES PARTIAL_ORDER EXPLICIT LTSMIN SAT_SMT
Running LTSmin : CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=1, --when, --ltl, (X(<>((LTLAP11==true))))U((LTLAP12==true)), --buchi-type=spotba], workingDir=/home/mcc/execution]
LTSmin run took 20 ms.
FORMULA Peterson-COL-3-LTLCardinality-07 TRUE TECHNIQUES PARTIAL_ORDER EXPLICIT LTSMIN SAT_SMT
Running LTSmin : CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=1, --when, --ltl, X([](X((LTLAP7==true)))), --buchi-type=spotba], workingDir=/home/mcc/execution]
LTSmin run took 30 ms.
FORMULA Peterson-COL-3-LTLCardinality-08 FALSE TECHNIQUES PARTIAL_ORDER EXPLICIT LTSMIN SAT_SMT
Running LTSmin : CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=1, --when, --ltl, <>(X([]([]((LTLAP13==true))))), --buchi-type=spotba], workingDir=/home/mcc/execution]
LTSmin run took 36 ms.
FORMULA Peterson-COL-3-LTLCardinality-09 FALSE TECHNIQUES PARTIAL_ORDER EXPLICIT LTSMIN SAT_SMT
Running LTSmin : CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=1, -p, --pins-guards, --when, --ltl, <>(<>([](<>((LTLAP3==true))))), --buchi-type=spotba], workingDir=/home/mcc/execution]
LTSmin run took 244 ms.
FORMULA Peterson-COL-3-LTLCardinality-10 FALSE TECHNIQUES PARTIAL_ORDER EXPLICIT LTSMIN SAT_SMT
Running LTSmin : CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=1, --when, --ltl, <>([](X(X((LTLAP14==true))))), --buchi-type=spotba], workingDir=/home/mcc/execution]
LTSmin run took 23 ms.
FORMULA Peterson-COL-3-LTLCardinality-11 FALSE TECHNIQUES PARTIAL_ORDER EXPLICIT LTSMIN SAT_SMT
Running LTSmin : CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=1, -p, --pins-guards, --when, --ltl, []((LTLAP15==true)), --buchi-type=spotba], workingDir=/home/mcc/execution]
LTSmin run took 196 ms.
FORMULA Peterson-COL-3-LTLCardinality-12 FALSE TECHNIQUES PARTIAL_ORDER EXPLICIT LTSMIN SAT_SMT
Running LTSmin : CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=1, -p, --pins-guards, --when, --ltl, (LTLAP16==true), --buchi-type=spotba], workingDir=/home/mcc/execution]
LTSmin run took 196 ms.
FORMULA Peterson-COL-3-LTLCardinality-13 TRUE TECHNIQUES PARTIAL_ORDER EXPLICIT LTSMIN SAT_SMT
Running LTSmin : CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=1, --when, --ltl, X([]((LTLAP17==true))), --buchi-type=spotba], workingDir=/home/mcc/execution]
LTSmin run took 10068 ms.
FORMULA Peterson-COL-3-LTLCardinality-14 FALSE TECHNIQUES PARTIAL_ORDER EXPLICIT LTSMIN SAT_SMT
Running LTSmin : CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=1, --when, --ltl, X([](<>(<>((LTLAP18==true))))), --buchi-type=spotba], workingDir=/home/mcc/execution]
LTSmin run took 34 ms.
FORMULA Peterson-COL-3-LTLCardinality-15 FALSE TECHNIQUES PARTIAL_ORDER EXPLICIT LTSMIN SAT_SMT
ITS tools runner thread asked to quit. Dying gracefully.

BK_STOP 1527489152356

--------------------
content from stderr:

+ export BINDIR=/home/mcc/BenchKit/
+ BINDIR=/home/mcc/BenchKit/
++ pwd
+ export MODEL=/home/mcc/execution
+ MODEL=/home/mcc/execution
+ /home/mcc/BenchKit//runeclipse.sh /home/mcc/execution LTLCardinality -its -ltsminpath /home/mcc/BenchKit//lts_install_dir/ -smt
+ ulimit -s 65536
+ [[ -z '' ]]
+ export LTSMIN_MEM_SIZE=8589934592
+ LTSMIN_MEM_SIZE=8589934592
+ /home/mcc/BenchKit//itstools/its-tools -consoleLog -data /home/mcc/execution/workspace -pnfolder /home/mcc/execution -examination LTLCardinality -z3path /home/mcc/BenchKit//z3/bin/z3 -yices2path /home/mcc/BenchKit//yices/bin/yices -its -ltsminpath /home/mcc/BenchKit//lts_install_dir/ -smt -vmargs -Dosgi.locking=none -Declipse.stateSaveDelayInterval=-1 -Dosgi.configuration.area=/tmp/.eclipse -Xss8m -Xms40m -Xmx8192m -Dfile.encoding=UTF-8 -Dosgi.requiredJavaVersion=1.6
May 28, 2018 6:30:45 AM fr.lip6.move.gal.application.Application start
INFO: Running its-tools with arguments : [-pnfolder, /home/mcc/execution, -examination, LTLCardinality, -z3path, /home/mcc/BenchKit//z3/bin/z3, -yices2path, /home/mcc/BenchKit//yices/bin/yices, -its, -ltsminpath, /home/mcc/BenchKit//lts_install_dir/, -smt]
May 28, 2018 6:30:45 AM fr.lip6.move.gal.application.MccTranslator transformPNML
INFO: Parsing pnml file : /home/mcc/execution/model.pnml
May 28, 2018 6:30:45 AM fr.lip6.move.gal.pnml.togal.PnmlToGalTransformer transform
INFO: Detected file is not PT type :http://www.pnml.org/version-2009/grammar/symmetricnet
May 28, 2018 6:30:46 AM fr.lip6.move.gal.pnml.togal.PnmlToGalTransformer transform
INFO: Load time of PNML (colored model parsed with PNMLFW) : 825 ms
May 28, 2018 6:30:46 AM fr.lip6.move.gal.pnml.togal.HLGALTransformer handlePage
INFO: Transformed 11 places.
May 28, 2018 6:30:46 AM fr.lip6.move.gal.pnml.togal.HLGALTransformer handlePage
INFO: Computed order using colors.
May 28, 2018 6:30:46 AM fr.lip6.move.gal.pnml.togal.HLGALTransformer handlePage
INFO: sort/places :ProcTourProc->beginLoop,testIdentity,testAlone,isEndLoop,
ProcBool->wantSection,
ProcTour->askForSection,testTurn,endTurn,
TourProc->turn,
Process->idle,CS,

May 28, 2018 6:30:46 AM fr.lip6.move.gal.pnml.togal.HLGALTransformer handlePage
INFO: Transformed 14 transitions.
May 28, 2018 6:30:46 AM fr.lip6.move.gal.pnml.togal.PnmlToGalTransformer transform
INFO: Computed order based on color domains.
May 28, 2018 6:30:46 AM fr.lip6.move.serialization.SerializationUtil systemToFile
INFO: Time to serialize gal into /home/mcc/execution/model.pnml.img.gal : 6 ms
May 28, 2018 6:30:46 AM fr.lip6.move.gal.instantiate.Instantiator instantiateParameters
INFO: On-the-fly reduction of False transitions avoided exploring 40.0 instantiations of transitions. Total transitions/syncs built is 360
May 28, 2018 6:30:46 AM fr.lip6.move.gal.instantiate.GALRewriter flatten
INFO: Flatten gal took : 145 ms
May 28, 2018 6:30:47 AM fr.lip6.move.serialization.SerializationUtil systemToFile
INFO: Time to serialize gal into /home/mcc/execution/LTLCardinality.pnml.gal : 7 ms
May 28, 2018 6:30:47 AM fr.lip6.move.serialization.SerializationUtil serializePropertiesForITSLTLTools
INFO: Time to serialize properties into /home/mcc/execution/LTLCardinality.ltl : 3 ms
May 28, 2018 6:30:47 AM fr.lip6.move.gal.semantics.DeterministicNextBuilder getDeterministicNext
INFO: Input system was not deterministic with 352 transitions. Expanding to a total of 360 deterministic transitions.
May 28, 2018 6:30:47 AM fr.lip6.move.gal.semantics.DeterministicNextBuilder getDeterministicNext
INFO: Determinization took 5 ms.
May 28, 2018 6:30:47 AM fr.lip6.move.gal.gal2smt.bmc.KInductionSolver computeAndDeclareInvariants
INFO: Computed 15 place invariants in 105 ms
May 28, 2018 6:30:48 AM fr.lip6.move.gal.gal2smt.bmc.KInductionSolver init
INFO: Proved 256 variables to be positive in 600 ms
May 28, 2018 6:30:48 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver computeAblingMatrix
INFO: Computing symmetric may disable matrix : 356 transitions.
May 28, 2018 6:30:48 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of disable matrix completed :0/356 took 0 ms. Total solver calls (SAT/UNSAT): 0(0/0)
May 28, 2018 6:30:48 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of Complete disable matrix. took 40 ms. Total solver calls (SAT/UNSAT): 0(0/0)
May 28, 2018 6:30:48 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver computeAblingMatrix
INFO: Computing symmetric may enable matrix : 356 transitions.
May 28, 2018 6:30:48 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of Complete enable matrix. took 18 ms. Total solver calls (SAT/UNSAT): 0(0/0)
May 28, 2018 6:31:00 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver computeCoEnablingMatrix
INFO: Computing symmetric co enabling matrix : 356 transitions.
May 28, 2018 6:31:00 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(0/356) took 31 ms. Total solver calls (SAT/UNSAT): 25(12/13)
May 28, 2018 6:31:03 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(24/356) took 3125 ms. Total solver calls (SAT/UNSAT): 2470(2014/456)
May 28, 2018 6:31:06 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(47/356) took 6199 ms. Total solver calls (SAT/UNSAT): 4914(4046/868)
May 28, 2018 6:31:09 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(73/356) took 9251 ms. Total solver calls (SAT/UNSAT): 7285(6189/1096)
May 28, 2018 6:31:12 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(91/356) took 12264 ms. Total solver calls (SAT/UNSAT): 8752(7569/1183)
May 28, 2018 6:31:16 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(114/356) took 15950 ms. Total solver calls (SAT/UNSAT): 10450(9039/1411)
May 28, 2018 6:31:19 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(134/356) took 19022 ms. Total solver calls (SAT/UNSAT): 11784(10304/1480)
May 28, 2018 6:31:22 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(164/356) took 22074 ms. Total solver calls (SAT/UNSAT): 13584(12104/1480)
May 28, 2018 6:31:25 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(194/356) took 25102 ms. Total solver calls (SAT/UNSAT): 15159(13679/1480)
May 28, 2018 6:31:28 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(229/356) took 28103 ms. Total solver calls (SAT/UNSAT): 16712(15232/1480)
May 28, 2018 6:31:31 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(250/356) took 31154 ms. Total solver calls (SAT/UNSAT): 17575(16036/1539)
May 28, 2018 6:31:35 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(255/356) took 35114 ms. Total solver calls (SAT/UNSAT): 17885(16264/1621)
May 28, 2018 6:31:38 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(257/356) took 38620 ms. Total solver calls (SAT/UNSAT): 18014(16369/1645)
May 28, 2018 6:31:42 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(260/356) took 41877 ms. Total solver calls (SAT/UNSAT): 18181(16479/1702)
May 28, 2018 6:31:45 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(265/356) took 45372 ms. Total solver calls (SAT/UNSAT): 18437(16636/1801)
May 28, 2018 6:31:48 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(270/356) took 48503 ms. Total solver calls (SAT/UNSAT): 18695(16816/1879)
May 28, 2018 6:31:52 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(274/356) took 52351 ms. Total solver calls (SAT/UNSAT): 18887(16943/1944)
May 28, 2018 6:31:55 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(277/356) took 55691 ms. Total solver calls (SAT/UNSAT): 19040(17060/1980)
May 28, 2018 6:31:59 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(283/356) took 59148 ms. Total solver calls (SAT/UNSAT): 19285(17202/2083)
May 28, 2018 6:32:03 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(289/356) took 63619 ms. Total solver calls (SAT/UNSAT): 19522(17353/2169)
May 28, 2018 6:32:06 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(293/356) took 66647 ms. Total solver calls (SAT/UNSAT): 19665(17435/2230)
May 28, 2018 6:32:09 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of Finished co-enabling matrix. took 69024 ms. Total solver calls (SAT/UNSAT): 20362(17940/2422)
May 28, 2018 6:32:09 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver computeDoNotAccord
INFO: Computing Do-Not-Accords matrix : 356 transitions.
May 28, 2018 6:32:10 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of Completed DNA matrix. took 855 ms. Total solver calls (SAT/UNSAT): 823(0/823)
May 28, 2018 6:32:10 AM fr.lip6.move.gal.gal2pins.Gal2PinsTransformerNext transform
INFO: Built C files in 82793ms conformant to PINS in folder :/home/mcc/execution

Sequence of Actions to be Executed by the VM

This is useful if one wants to reexecute the tool in the VM from the submitted image disk.

set -x
# this is for BenchKit: configuration of major elements for the test
export BK_INPUT="Peterson-COL-3"
export BK_EXAMINATION="LTLCardinality"
export BK_TOOL="itstools"
export BK_RESULT_DIR="/tmp/BK_RESULTS/OUTPUTS"
export BK_TIME_CONFINEMENT="3600"
export BK_MEMORY_CONFINEMENT="16384"

# this is specific to your benchmark or test

export BIN_DIR="$HOME/BenchKit/bin"

# remove the execution directoty if it exists (to avoid increse of .vmdk images)
if [ -d execution ] ; then
rm -rf execution
fi

tar xzf /home/mcc/BenchKit/INPUTS/Peterson-COL-3.tgz
mv Peterson-COL-3 execution
cd execution
pwd
ls -lh

# this is for BenchKit: explicit launching of the test
echo "====================================================================="
echo " Generated by BenchKit 2-3637"
echo " Executing tool itstools"
echo " Input is Peterson-COL-3, examination is LTLCardinality"
echo " Time confinement is $BK_TIME_CONFINEMENT seconds"
echo " Memory confinement is 16384 MBytes"
echo " Number of cores is 4"
echo " Run identifier is r260-csrt-152732585400149"
echo "====================================================================="
echo
echo "--------------------"
echo "content from stdout:"
echo
echo "=== Data for post analysis generated by BenchKit (invocation template)"
echo
if [ "LTLCardinality" = "UpperBounds" ] ; then
echo "The expected result is a vector of positive values"
echo NUM_VECTOR
elif [ "LTLCardinality" != "StateSpace" ] ; then
echo "The expected result is a vector of booleans"
echo BOOL_VECTOR
else
echo "no data necessary for post analysis"
fi
echo
if [ -f "LTLCardinality.txt" ] ; then
echo "here is the order used to build the result vector(from text file)"
for x in $(grep Property LTLCardinality.txt | cut -d ' ' -f 2 | sort -u) ; do
echo "FORMULA_NAME $x"
done
elif [ -f "LTLCardinality.xml" ] ; then # for cunf (txt files deleted;-)
echo echo "here is the order used to build the result vector(from xml file)"
for x in $(grep '' LTLCardinality.xml | cut -d '>' -f 2 | cut -d '<' -f 1 | sort -u) ; do
echo "FORMULA_NAME $x"
done
fi
echo
echo "=== Now, execution of the tool begins"
echo
echo -n "BK_START "
date -u +%s%3N
echo
timeout -s 9 $BK_TIME_CONFINEMENT bash -c "/home/mcc/BenchKit/BenchKit_head.sh 2> STDERR ; echo ; echo -n \"BK_STOP \" ; date -u +%s%3N"
if [ $? -eq 137 ] ; then
echo
echo "BK_TIME_CONFINEMENT_REACHED"
fi
echo
echo "--------------------"
echo "content from stderr:"
echo
cat STDERR ;