Execution Chart

We display below the execution chart for this examination (boot time has been removed).

Trace from the execution

Waiting for the VM to be ready (probing ssh)
.................
/home/mcc/execution
total 316K
-rw-r--r-- 1 mcc users 3.4K May 15 18:54 CTLCardinality.txt
-rw-r--r-- 1 mcc users 18K May 15 18:54 CTLCardinality.xml
-rw-r--r-- 1 mcc users 3.2K May 15 18:54 CTLFireability.txt
-rw-r--r-- 1 mcc users 16K May 15 18:54 CTLFireability.xml
-rw-r--r-- 1 mcc users 4.0K May 15 18:50 GenericPropertiesDefinition.xml
-rw-r--r-- 1 mcc users 5.5K May 15 18:50 GenericPropertiesVerdict.xml
-rw-r--r-- 1 mcc users 2.6K May 26 09:26 LTLCardinality.txt
-rw-r--r-- 1 mcc users 12K May 26 09:26 LTLCardinality.xml
-rw-r--r-- 1 mcc users 2.1K May 26 09:26 LTLFireability.txt
-rw-r--r-- 1 mcc users 8.5K May 26 09:26 LTLFireability.xml
-rw-r--r-- 1 mcc users 3.5K May 15 18:54 ReachabilityCardinality.txt
-rw-r--r-- 1 mcc users 15K May 15 18:54 ReachabilityCardinality.xml
-rw-r--r-- 1 mcc users 108 May 15 18:54 ReachabilityDeadlock.txt
-rw-r--r-- 1 mcc users 346 May 15 18:54 ReachabilityDeadlock.xml
-rw-r--r-- 1 mcc users 3.3K May 15 18:54 ReachabilityFireability.txt
-rw-r--r-- 1 mcc users 14K May 15 18:54 ReachabilityFireability.xml
-rw-r--r-- 1 mcc users 1.7K May 15 18:54 UpperBounds.txt
-rw-r--r-- 1 mcc users 3.7K May 15 18:54 UpperBounds.xml
-rw-r--r-- 1 mcc users 6 May 15 18:50 equiv_col
-rw-r--r-- 1 mcc users 5 May 15 18:50 instance
-rw-r--r-- 1 mcc users 6 May 15 18:50 iscolored
-rw-r--r-- 1 mcc users 158K May 15 18:50 model.pnml
=====================================================================
Generated by BenchKit 2-3637
Executing tool itstools
Input is PaceMaker-PT-none, examination is LTLFireability
Time confinement is 3600 seconds
Memory confinement is 16384 MBytes
Number of cores is 4
Run identifier is r260-csrt-152732585300098
=====================================================================

--------------------
content from stdout:

=== Data for post analysis generated by BenchKit (invocation template)

The expected result is a vector of booleans
BOOL_VECTOR

here is the order used to build the result vector(from text file)
FORMULA_NAME PaceMaker-PT-none-LTLFireability-00
FORMULA_NAME PaceMaker-PT-none-LTLFireability-01
FORMULA_NAME PaceMaker-PT-none-LTLFireability-02
FORMULA_NAME PaceMaker-PT-none-LTLFireability-03
FORMULA_NAME PaceMaker-PT-none-LTLFireability-04
FORMULA_NAME PaceMaker-PT-none-LTLFireability-05
FORMULA_NAME PaceMaker-PT-none-LTLFireability-06
FORMULA_NAME PaceMaker-PT-none-LTLFireability-07
FORMULA_NAME PaceMaker-PT-none-LTLFireability-08
FORMULA_NAME PaceMaker-PT-none-LTLFireability-09
FORMULA_NAME PaceMaker-PT-none-LTLFireability-10
FORMULA_NAME PaceMaker-PT-none-LTLFireability-11
FORMULA_NAME PaceMaker-PT-none-LTLFireability-12
FORMULA_NAME PaceMaker-PT-none-LTLFireability-13
FORMULA_NAME PaceMaker-PT-none-LTLFireability-14
FORMULA_NAME PaceMaker-PT-none-LTLFireability-15

=== Now, execution of the tool begins

BK_START 1527486900835

Using solver Z3 to compute partial order matrices.
Built C files in :
/home/mcc/execution
Invoking ITS tools like this :CommandLine [args=[/home/mcc/BenchKit/itstools/plugins/fr.lip6.move.gal.itstools.binaries_1.0.0.201805151631/bin/its-ltl-linux64, --gc-threshold, 2000000, -i, /home/mcc/execution/LTLFireability.pnml.gal, -t, CGAL, -LTL, /home/mcc/execution/LTLFireability.ltl, -c, -stutter-deadlock], workingDir=/home/mcc/execution]

its-ltl command run as :

/home/mcc/BenchKit/itstools/plugins/fr.lip6.move.gal.itstools.binaries_1.0.0.201805151631/bin/its-ltl-linux64 --gc-threshold 2000000 -i /home/mcc/execution/LTLFireability.pnml.gal -t CGAL -LTL /home/mcc/execution/LTLFireability.ltl -c -stutter-deadlock
Read 16 LTL properties
Checking formula 0 : !(((("((URI>=681)&&(A_URI>=270))")U(X("((Ventricle>=897)&&(A_Ventricle>=54))")))U(G(X("(((VRGEctopic>=715)&&(A_SIG_Vbeat>=1))&&(A_VRGEctopic>=236))")))))
Formula 0 simplified : !(("((URI>=681)&&(A_URI>=270))" U X"((Ventricle>=897)&&(A_Ventricle>=54))") U GX"(((VRGEctopic>=715)&&(A_SIG_Vbeat>=1))&&(A_VRGEctopic>=236))")
Presburger conditions satisfied. Using coverability to approximate state space in K-Induction.
Normalized transition count is 93
// Phase 1: matrix 93 rows 70 cols
invariant :SIG_VPOut + A_SIG_VPOut = 1
invariant :Ventricle + A_Ventricle = 951
invariant :AVJ + A_AVJ = 951
invariant :RAConductor + A_RAConductor = 951
invariant :SIG_NextVtrBeat + A_SIG_NextVtrBeat = 1
invariant :SIG_State + A_SIG_State = 1
invariant :SIG_Vbeat + A_SIG_Vbeat = 1
invariant :SANode + A_SANode = 951
invariant :AVJOut + A_AVJOut = 951
invariant :PVARP + A_PVARP = 951
invariant :VRGEctopic + A_VRGEctopic = 951
invariant :SANodeEctopic + A_SANodeEctopic = 951
invariant :SIG_VgetOut + A_SIG_VgetOut = 1
invariant :SIG_AP + A_SIG_AP = 1
invariant :AtrNoiseGenerator + A_AtrNoiseGenerator = 951
invariant :VRG + A_VRG = 951
invariant :SIG_AS + A_SIG_AS = 1
invariant :Atrium + A_Atrium = 951
invariant :AVI + A_AVI = 951
invariant :RVConductor + A_RVConductor = 951
invariant :SIG_Vget + A_SIG_Vget = 1
invariant :VtrNoiseGenerator + A_VtrNoiseGenerator = 951
invariant :VRP + A_VRP = 951
invariant :SIG_AgetOut + A_SIG_AgetOut = 1
invariant :SIG_VS + A_SIG_VS = 1
invariant :SIG_IncrClk + A_SIG_IncrClk = 1
invariant :A_dV + A_A_dV = 951
invariant :URIState + A_URIState = 951
invariant :SIG_Clk0 + A_SIG_Clk0 = 1
invariant :LRI + A_LRI = 951
invariant :SIG_APOut + A_SIG_APOut = 1
invariant :SIG_Aget + A_SIG_Aget = 1
invariant :SIG_Clk1 + A_SIG_Clk1 = 1
invariant :URI + A_URI = 951
invariant :SIG_VP + A_SIG_VP = 1
Reverse transition relation is NOT exact ! Due to transitions EMPTY_APOut, EMPTY_NextVtrBeat, EMPTY_VPOut, I950_L_Wait4VSynch, I702_L_Wait4VBeat, I881_S_retroAVJ_L_Retro, I880_S_retroAVJ_L_Ante_L_Retro, I879_S_retroAVJ_L_Empty_L_Retro, I878_S_tr_AVJ_L_Ante_S_AVJAnteReachedHigh_L_a_dvHigh, I877_S_tr_AVJ_L_Ante_S_AVJAnteReached_L_a_dVLow, I876_S_tr_AVJ_L_Ante_S_AVJAnteReached_L_Recovery_L_a_dVLow, I875_S_tr_AVJ_L_Ante_S_AVJAnteReachedHigh_L_Recovery_L_a_dvHigh, I874_S_tr_AVJ_L_Ante_S_AVJAnteReachedHigh_AVJAnteReachedHigh_L_a_dvHigh, I873_S_tr_AVJ_L_Ante_S_AVJAnteReached_AVJAnteReached_L_a_dVLow, I872_S_Abeat_S_a_dVSetLow_L_Wait4ABeat, I869_S_Abeat_S_a_dVSetHigh_L_a_dVLow_L_q0, I868_S_Abeat_L_Excitable_S_a_dVSetLow_L_Wait4ABeat, I865_S_Abeat_L_Excitable_S_a_dVSetHigh_L_a_dVLow_L_q0, I864_S_NextAtrBeat_L_ASynch_NextAtrBeat, I863_S_NextAtrBeat_L_ASynch_L_Wait4ASynch, I706_L_Wait4ABeat, I855_S_VtrAnteReached_L_Ante, I852_S_vrg_L_GenerateRetroWave_L_Empty, I851_S_vrg_L_GenerateRetroWave_L_Ante, I843_S_AVJRetroReached_L_Retro, I842_S_AVJRetroReached_L_Recovery_L_Retro, I841_S_AVJRetroReached_AVJRetroReached_L_Retro, I840_S_anteAVJ_L_Ante, I839_S_anteAVJ_L_Ante_L_Empty, I838_S_anteAVJ_L_Ante_L_Retro, I829_S_AVJRetroExit_L_Retro, I828_S_AVJAnteExit_L_Ante, I827_S_AVJRetroExit_L_Retro, I826_S_AVJAnteExit_L_Ante, I700_init, I696_L_Refractory, I694_L_Refractory, I692_L_Refractory, I311_L_VsenseAnte, I309_L_Vsense, I849_S_AtrRetroReached_L_Retro, I846_S_arg_L_GenerateAnteWave_L_Empty, I845_S_arg_L_GenerateAnteWave_L_Retro, I307_L_AsenseRetro, I616_L_Asense, Intersection with reachable at each step enabled. (destroyed/reverse/intersect/total) :0/119/45/164
4 unique states visited
4 strongly connected components in search stack
5 transitions explored
4 items max in DFS search stack
256 ticks for the emptiness check
Model ,|S| ,Time ,Mem(kb) ,fin. SDD ,fin. DDD ,peak SDD ,peak DDD ,SDD Hom ,SDD cache peak ,DDD Hom ,DDD cachepeak ,SHom cache
STATS,0,2.59873,70536,1,0,364,343748,368,167,5896,270056,369
an accepting run exists (use option '-e' to print it)
Formula 0 is FALSE accepting run found.
FORMULA PaceMaker-PT-none-LTLFireability-00 FALSE TECHNIQUES DECISION_DIAGRAMS TOPOLOGICAL
Checking formula 1 : !(("((PVARP>=549)&&(A_PVARP>=402))"))
Formula 1 simplified : !"((PVARP>=549)&&(A_PVARP>=402))"
3 unique states visited
3 strongly connected components in search stack
3 transitions explored
3 items max in DFS search stack
1 ticks for the emptiness check
Model ,|S| ,Time ,Mem(kb) ,fin. SDD ,fin. DDD ,peak SDD ,peak DDD ,SDD Hom ,SDD cache peak ,DDD Hom ,DDD cachepeak ,SHom cache
STATS,0,2.60938,70860,1,0,365,344074,371,167,5899,270533,376
an accepting run exists (use option '-e' to print it)
Formula 1 is FALSE accepting run found.
FORMULA PaceMaker-PT-none-LTLFireability-01 FALSE TECHNIQUES DECISION_DIAGRAMS TOPOLOGICAL
Checking formula 2 : !((X("(SIG_Aget>=1)")))
Formula 2 simplified : !X"(SIG_Aget>=1)"
4 unique states visited
4 strongly connected components in search stack
4 transitions explored
4 items max in DFS search stack
7 ticks for the emptiness check
Model ,|S| ,Time ,Mem(kb) ,fin. SDD ,fin. DDD ,peak SDD ,peak DDD ,SDD Hom ,SDD cache peak ,DDD Hom ,DDD cachepeak ,SHom cache
STATS,0,2.67255,71916,1,0,366,347875,374,167,5900,276251,383
an accepting run exists (use option '-e' to print it)
Formula 2 is FALSE accepting run found.
FORMULA PaceMaker-PT-none-LTLFireability-02 FALSE TECHNIQUES DECISION_DIAGRAMS TOPOLOGICAL
Checking formula 3 : !((X(X(F(F("((AVJ>=699)&&(A_AVJ>=252))"))))))
Formula 3 simplified : !XXF"((AVJ>=699)&&(A_AVJ>=252))"
Running compilation step : CommandLine [args=[gcc, -c, -I/home/mcc/BenchKit//lts_install_dir//include, -I., -std=c99, -fPIC, -O3, model.c], workingDir=/home/mcc/execution]
Compilation finished in 2705 ms.
Running link step : CommandLine [args=[gcc, -shared, -o, gal.so, model.o], workingDir=/home/mcc/execution]
Link finished in 79 ms.
Running LTSmin : CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=1, --when, --ltl, X(X(<>(<>((LTLAP5==true))))), --buchi-type=spotba], workingDir=/home/mcc/execution]
LTSmin run took 57 ms.
FORMULA PaceMaker-PT-none-LTLFireability-03 FALSE TECHNIQUES PARTIAL_ORDER EXPLICIT LTSMIN SAT_SMT
Running LTSmin : CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=1, --when, --ltl, X(<>(<>((LTLAP6==true)))), --buchi-type=spotba], workingDir=/home/mcc/execution]
LTSmin run took 18 ms.
FORMULA PaceMaker-PT-none-LTLFireability-04 FALSE TECHNIQUES PARTIAL_ORDER EXPLICIT LTSMIN SAT_SMT
Running LTSmin : CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=1, --when, --ltl, <>(<>(X(((LTLAP7==true))U((LTLAP8==true))))), --buchi-type=spotba], workingDir=/home/mcc/execution]
LTSmin run took 17 ms.
FORMULA PaceMaker-PT-none-LTLFireability-05 FALSE TECHNIQUES PARTIAL_ORDER EXPLICIT LTSMIN SAT_SMT
Running LTSmin : CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=1, --when, --ltl, X([](X((LTLAP9==true)))), --buchi-type=spotba], workingDir=/home/mcc/execution]
LTSmin run took 18 ms.
FORMULA PaceMaker-PT-none-LTLFireability-06 FALSE TECHNIQUES PARTIAL_ORDER EXPLICIT LTSMIN SAT_SMT
Running LTSmin : CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=1, --when, --ltl, X([](X((LTLAP10==true)))), --buchi-type=spotba], workingDir=/home/mcc/execution]
LTSmin run took 18 ms.
FORMULA PaceMaker-PT-none-LTLFireability-07 FALSE TECHNIQUES PARTIAL_ORDER EXPLICIT LTSMIN SAT_SMT
Running LTSmin : CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=1, --when, --ltl, X(X(X([](<>((LTLAP11==true)))))), --buchi-type=spotba], workingDir=/home/mcc/execution]
LTSmin run took 24 ms.
FORMULA PaceMaker-PT-none-LTLFireability-08 FALSE TECHNIQUES PARTIAL_ORDER EXPLICIT LTSMIN SAT_SMT
Running LTSmin : CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=1, -p, --pins-guards, --when, --ltl, [](<>([]((LTLAP12==true)))), --buchi-type=spotba], workingDir=/home/mcc/execution]
LTSmin run took 29 ms.
FORMULA PaceMaker-PT-none-LTLFireability-09 FALSE TECHNIQUES PARTIAL_ORDER EXPLICIT LTSMIN SAT_SMT
Running LTSmin : CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=1, --when, --ltl, X(<>(([]((LTLAP13==true)))U([]((LTLAP14==true))))), --buchi-type=spotba], workingDir=/home/mcc/execution]
LTSmin run took 15 ms.
FORMULA PaceMaker-PT-none-LTLFireability-10 FALSE TECHNIQUES PARTIAL_ORDER EXPLICIT LTSMIN SAT_SMT
Running LTSmin : CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=1, --when, --ltl, X((LTLAP15==true)), --buchi-type=spotba], workingDir=/home/mcc/execution]
LTSmin run took 17 ms.
FORMULA PaceMaker-PT-none-LTLFireability-11 FALSE TECHNIQUES PARTIAL_ORDER EXPLICIT LTSMIN SAT_SMT
Running LTSmin : CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=1, -p, --pins-guards, --when, --ltl, (LTLAP16==true), --buchi-type=spotba], workingDir=/home/mcc/execution]
LTSmin run took 41 ms.
FORMULA PaceMaker-PT-none-LTLFireability-12 FALSE TECHNIQUES PARTIAL_ORDER EXPLICIT LTSMIN SAT_SMT
Running LTSmin : CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=1, --when, --ltl, <>(X(<>((LTLAP17==true)))), --buchi-type=spotba], workingDir=/home/mcc/execution]
LTSmin run took 20 ms.
FORMULA PaceMaker-PT-none-LTLFireability-13 FALSE TECHNIQUES PARTIAL_ORDER EXPLICIT LTSMIN SAT_SMT
Running LTSmin : CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=1, --when, --ltl, []((X(X((LTLAP3==true))))U(((LTLAP18==true))U((LTLAP19==true)))), --buchi-type=spotba], workingDir=/home/mcc/execution]
LTSmin run took 24 ms.
FORMULA PaceMaker-PT-none-LTLFireability-14 FALSE TECHNIQUES PARTIAL_ORDER EXPLICIT LTSMIN SAT_SMT
Running LTSmin : CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=1, --when, --ltl, <>(<>((X((LTLAP3==true)))U(<>((LTLAP14==true))))), --buchi-type=spotba], workingDir=/home/mcc/execution]
LTSmin run took 22 ms.
FORMULA PaceMaker-PT-none-LTLFireability-15 FALSE TECHNIQUES PARTIAL_ORDER EXPLICIT LTSMIN SAT_SMT
ITS tools runner thread asked to quit. Dying gracefully.

BK_STOP 1527486912087

--------------------
content from stderr:

+ export BINDIR=/home/mcc/BenchKit/
+ BINDIR=/home/mcc/BenchKit/
++ pwd
+ export MODEL=/home/mcc/execution
+ MODEL=/home/mcc/execution
+ /home/mcc/BenchKit//runeclipse.sh /home/mcc/execution LTLFireability -its -ltsminpath /home/mcc/BenchKit//lts_install_dir/ -smt
+ ulimit -s 65536
+ [[ -z '' ]]
+ export LTSMIN_MEM_SIZE=8589934592
+ LTSMIN_MEM_SIZE=8589934592
+ /home/mcc/BenchKit//itstools/its-tools -consoleLog -data /home/mcc/execution/workspace -pnfolder /home/mcc/execution -examination LTLFireability -z3path /home/mcc/BenchKit//z3/bin/z3 -yices2path /home/mcc/BenchKit//yices/bin/yices -its -ltsminpath /home/mcc/BenchKit//lts_install_dir/ -smt -vmargs -Dosgi.locking=none -Declipse.stateSaveDelayInterval=-1 -Dosgi.configuration.area=/tmp/.eclipse -Xss8m -Xms40m -Xmx8192m -Dfile.encoding=UTF-8 -Dosgi.requiredJavaVersion=1.6
May 28, 2018 5:55:03 AM fr.lip6.move.gal.application.Application start
INFO: Running its-tools with arguments : [-pnfolder, /home/mcc/execution, -examination, LTLFireability, -z3path, /home/mcc/BenchKit//z3/bin/z3, -yices2path, /home/mcc/BenchKit//yices/bin/yices, -its, -ltsminpath, /home/mcc/BenchKit//lts_install_dir/, -smt]
May 28, 2018 5:55:03 AM fr.lip6.move.gal.application.MccTranslator transformPNML
INFO: Parsing pnml file : /home/mcc/execution/model.pnml
May 28, 2018 5:55:03 AM fr.lip6.move.gal.nupn.PTNetReader loadFromXML
INFO: Load time of PNML (sax parser for PT used): 99 ms
May 28, 2018 5:55:03 AM fr.lip6.move.gal.pnml.togal.PTGALTransformer handlePage
INFO: Transformed 70 places.
May 28, 2018 5:55:03 AM fr.lip6.move.gal.pnml.togal.PTGALTransformer handlePage
INFO: Transformed 164 transitions.
May 28, 2018 5:55:03 AM fr.lip6.move.serialization.SerializationUtil systemToFile
INFO: Time to serialize gal into /home/mcc/execution/model.pnml.img.gal : 17 ms
May 28, 2018 5:55:03 AM fr.lip6.move.gal.instantiate.GALRewriter flatten
INFO: Flatten gal took : 135 ms
May 28, 2018 5:55:03 AM fr.lip6.move.serialization.SerializationUtil systemToFile
INFO: Time to serialize gal into /home/mcc/execution/LTLFireability.pnml.gal : 4 ms
May 28, 2018 5:55:03 AM fr.lip6.move.serialization.SerializationUtil serializePropertiesForITSLTLTools
INFO: Time to serialize properties into /home/mcc/execution/LTLFireability.ltl : 1 ms
May 28, 2018 5:55:04 AM fr.lip6.move.gal.semantics.DeterministicNextBuilder getDeterministicNext
INFO: Input system was already deterministic with 164 transitions.
May 28, 2018 5:55:04 AM fr.lip6.move.gal.gal2smt.bmc.KInductionSolver computeAndDeclareInvariants
INFO: Computed 35 place invariants in 19 ms
May 28, 2018 5:55:04 AM fr.lip6.move.gal.gal2smt.bmc.KInductionSolver init
INFO: Proved 70 variables to be positive in 204 ms
May 28, 2018 5:55:04 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver computeAblingMatrix
INFO: Computing symmetric may disable matrix : 164 transitions.
May 28, 2018 5:55:04 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of disable matrix completed :0/164 took 0 ms. Total solver calls (SAT/UNSAT): 0(0/0)
May 28, 2018 5:55:04 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of Complete disable matrix. took 25 ms. Total solver calls (SAT/UNSAT): 0(0/0)
May 28, 2018 5:55:04 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver computeAblingMatrix
INFO: Computing symmetric may enable matrix : 164 transitions.
May 28, 2018 5:55:04 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of Complete enable matrix. took 10 ms. Total solver calls (SAT/UNSAT): 0(0/0)
May 28, 2018 5:55:05 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver computeCoEnablingMatrix
INFO: Computing symmetric co enabling matrix : 164 transitions.
May 28, 2018 5:55:07 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(99/164) took 1730 ms. Total solver calls (SAT/UNSAT): 703(122/581)
May 28, 2018 5:55:08 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of Finished co-enabling matrix. took 2634 ms. Total solver calls (SAT/UNSAT): 1317(183/1134)
May 28, 2018 5:55:08 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver computeDoNotAccord
INFO: Computing Do-Not-Accords matrix : 164 transitions.
May 28, 2018 5:55:08 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of Completed DNA matrix. took 7 ms. Total solver calls (SAT/UNSAT): 0(0/0)
May 28, 2018 5:55:08 AM fr.lip6.move.gal.gal2pins.Gal2PinsTransformerNext transform
INFO: Built C files in 4542ms conformant to PINS in folder :/home/mcc/execution

Sequence of Actions to be Executed by the VM

This is useful if one wants to reexecute the tool in the VM from the submitted image disk.

set -x
# this is for BenchKit: configuration of major elements for the test
export BK_INPUT="PaceMaker-PT-none"
export BK_EXAMINATION="LTLFireability"
export BK_TOOL="itstools"
export BK_RESULT_DIR="/tmp/BK_RESULTS/OUTPUTS"
export BK_TIME_CONFINEMENT="3600"
export BK_MEMORY_CONFINEMENT="16384"

# this is specific to your benchmark or test

export BIN_DIR="$HOME/BenchKit/bin"

# remove the execution directoty if it exists (to avoid increse of .vmdk images)
if [ -d execution ] ; then
rm -rf execution
fi

tar xzf /home/mcc/BenchKit/INPUTS/PaceMaker-PT-none.tgz
mv PaceMaker-PT-none execution
cd execution
pwd
ls -lh

# this is for BenchKit: explicit launching of the test
echo "====================================================================="
echo " Generated by BenchKit 2-3637"
echo " Executing tool itstools"
echo " Input is PaceMaker-PT-none, examination is LTLFireability"
echo " Time confinement is $BK_TIME_CONFINEMENT seconds"
echo " Memory confinement is 16384 MBytes"
echo " Number of cores is 4"
echo " Run identifier is r260-csrt-152732585300098"
echo "====================================================================="
echo
echo "--------------------"
echo "content from stdout:"
echo
echo "=== Data for post analysis generated by BenchKit (invocation template)"
echo
if [ "LTLFireability" = "UpperBounds" ] ; then
echo "The expected result is a vector of positive values"
echo NUM_VECTOR
elif [ "LTLFireability" != "StateSpace" ] ; then
echo "The expected result is a vector of booleans"
echo BOOL_VECTOR
else
echo "no data necessary for post analysis"
fi
echo
if [ -f "LTLFireability.txt" ] ; then
echo "here is the order used to build the result vector(from text file)"
for x in $(grep Property LTLFireability.txt | cut -d ' ' -f 2 | sort -u) ; do
echo "FORMULA_NAME $x"
done
elif [ -f "LTLFireability.xml" ] ; then # for cunf (txt files deleted;-)
echo echo "here is the order used to build the result vector(from xml file)"
for x in $(grep '' LTLFireability.xml | cut -d '>' -f 2 | cut -d '<' -f 1 | sort -u) ; do
echo "FORMULA_NAME $x"
done
fi
echo
echo "=== Now, execution of the tool begins"
echo
echo -n "BK_START "
date -u +%s%3N
echo
timeout -s 9 $BK_TIME_CONFINEMENT bash -c "/home/mcc/BenchKit/BenchKit_head.sh 2> STDERR ; echo ; echo -n \"BK_STOP \" ; date -u +%s%3N"
if [ $? -eq 137 ] ; then
echo
echo "BK_TIME_CONFINEMENT_REACHED"
fi
echo
echo "--------------------"
echo "content from stderr:"
echo
cat STDERR ;