About the Execution of ITS-Tools for PaceMaker-PT-none
Execution Summary | |||||
Max Memory Used (MB) |
Time wait (ms) | CPU Usage (ms) | I/O Wait (ms) | Computed Result | Execution Status |
15741.850 | 3600000.00 | 4407169.00 | 882.50 | FTFFFTTTTTFF?FTF | normal |
Execution Chart
We display below the execution chart for this examination (boot time has been removed).
Trace from the execution
Waiting for the VM to be ready (probing ssh)
....................
/home/mcc/execution
total 316K
-rw-r--r-- 1 mcc users 3.4K May 15 18:54 CTLCardinality.txt
-rw-r--r-- 1 mcc users 18K May 15 18:54 CTLCardinality.xml
-rw-r--r-- 1 mcc users 3.2K May 15 18:54 CTLFireability.txt
-rw-r--r-- 1 mcc users 16K May 15 18:54 CTLFireability.xml
-rw-r--r-- 1 mcc users 4.0K May 15 18:50 GenericPropertiesDefinition.xml
-rw-r--r-- 1 mcc users 5.5K May 15 18:50 GenericPropertiesVerdict.xml
-rw-r--r-- 1 mcc users 2.6K May 26 09:26 LTLCardinality.txt
-rw-r--r-- 1 mcc users 12K May 26 09:26 LTLCardinality.xml
-rw-r--r-- 1 mcc users 2.1K May 26 09:26 LTLFireability.txt
-rw-r--r-- 1 mcc users 8.5K May 26 09:26 LTLFireability.xml
-rw-r--r-- 1 mcc users 3.5K May 15 18:54 ReachabilityCardinality.txt
-rw-r--r-- 1 mcc users 15K May 15 18:54 ReachabilityCardinality.xml
-rw-r--r-- 1 mcc users 108 May 15 18:54 ReachabilityDeadlock.txt
-rw-r--r-- 1 mcc users 346 May 15 18:54 ReachabilityDeadlock.xml
-rw-r--r-- 1 mcc users 3.3K May 15 18:54 ReachabilityFireability.txt
-rw-r--r-- 1 mcc users 14K May 15 18:54 ReachabilityFireability.xml
-rw-r--r-- 1 mcc users 1.7K May 15 18:54 UpperBounds.txt
-rw-r--r-- 1 mcc users 3.7K May 15 18:54 UpperBounds.xml
-rw-r--r-- 1 mcc users 6 May 15 18:50 equiv_col
-rw-r--r-- 1 mcc users 5 May 15 18:50 instance
-rw-r--r-- 1 mcc users 6 May 15 18:50 iscolored
-rw-r--r-- 1 mcc users 158K May 15 18:50 model.pnml
=====================================================================
Generated by BenchKit 2-3637
Executing tool itstools
Input is PaceMaker-PT-none, examination is LTLCardinality
Time confinement is 3600 seconds
Memory confinement is 16384 MBytes
Number of cores is 4
Run identifier is r260-csrt-152732585300097
=====================================================================
--------------------
content from stdout:
=== Data for post analysis generated by BenchKit (invocation template)
The expected result is a vector of booleans
BOOL_VECTOR
here is the order used to build the result vector(from text file)
FORMULA_NAME PaceMaker-PT-none-LTLCardinality-00
FORMULA_NAME PaceMaker-PT-none-LTLCardinality-01
FORMULA_NAME PaceMaker-PT-none-LTLCardinality-02
FORMULA_NAME PaceMaker-PT-none-LTLCardinality-03
FORMULA_NAME PaceMaker-PT-none-LTLCardinality-04
FORMULA_NAME PaceMaker-PT-none-LTLCardinality-05
FORMULA_NAME PaceMaker-PT-none-LTLCardinality-06
FORMULA_NAME PaceMaker-PT-none-LTLCardinality-07
FORMULA_NAME PaceMaker-PT-none-LTLCardinality-08
FORMULA_NAME PaceMaker-PT-none-LTLCardinality-09
FORMULA_NAME PaceMaker-PT-none-LTLCardinality-10
FORMULA_NAME PaceMaker-PT-none-LTLCardinality-11
FORMULA_NAME PaceMaker-PT-none-LTLCardinality-12
FORMULA_NAME PaceMaker-PT-none-LTLCardinality-13
FORMULA_NAME PaceMaker-PT-none-LTLCardinality-14
FORMULA_NAME PaceMaker-PT-none-LTLCardinality-15
=== Now, execution of the tool begins
BK_START 1527486877027
Using solver Z3 to compute partial order matrices.
Built C files in :
/home/mcc/execution
Invoking ITS tools like this :CommandLine [args=[/home/mcc/BenchKit/itstools/plugins/fr.lip6.move.gal.itstools.binaries_1.0.0.201805151631/bin/its-ltl-linux64, --gc-threshold, 2000000, -i, /home/mcc/execution/LTLCardinality.pnml.gal, -t, CGAL, -LTL, /home/mcc/execution/LTLCardinality.ltl, -c, -stutter-deadlock], workingDir=/home/mcc/execution]
its-ltl command run as :
/home/mcc/BenchKit/itstools/plugins/fr.lip6.move.gal.itstools.binaries_1.0.0.201805151631/bin/its-ltl-linux64 --gc-threshold 2000000 -i /home/mcc/execution/LTLCardinality.pnml.gal -t CGAL -LTL /home/mcc/execution/LTLCardinality.ltl -c -stutter-deadlock
Read 16 LTL properties
Checking formula 0 : !(((G(X("(AtrNoiseGenerator>=1)")))U(G("(A_VRGEctopic<=A_AtrNoiseGenerator)"))))
Formula 0 simplified : !(GX"(AtrNoiseGenerator>=1)" U G"(A_VRGEctopic<=A_AtrNoiseGenerator)")
Presburger conditions satisfied. Using coverability to approximate state space in K-Induction.
Normalized transition count is 93
// Phase 1: matrix 93 rows 70 cols
invariant :SIG_VPOut + A_SIG_VPOut = 1
invariant :Ventricle + A_Ventricle = 951
invariant :AVJ + A_AVJ = 951
invariant :RAConductor + A_RAConductor = 951
invariant :SIG_NextVtrBeat + A_SIG_NextVtrBeat = 1
invariant :SIG_State + A_SIG_State = 1
invariant :SIG_Vbeat + A_SIG_Vbeat = 1
invariant :SANode + A_SANode = 951
invariant :AVJOut + A_AVJOut = 951
invariant :PVARP + A_PVARP = 951
invariant :VRGEctopic + A_VRGEctopic = 951
invariant :SANodeEctopic + A_SANodeEctopic = 951
invariant :SIG_VgetOut + A_SIG_VgetOut = 1
invariant :SIG_AP + A_SIG_AP = 1
invariant :AtrNoiseGenerator + A_AtrNoiseGenerator = 951
invariant :VRG + A_VRG = 951
invariant :SIG_AS + A_SIG_AS = 1
invariant :Atrium + A_Atrium = 951
invariant :AVI + A_AVI = 951
invariant :RVConductor + A_RVConductor = 951
invariant :SIG_Vget + A_SIG_Vget = 1
invariant :VtrNoiseGenerator + A_VtrNoiseGenerator = 951
invariant :VRP + A_VRP = 951
invariant :SIG_AgetOut + A_SIG_AgetOut = 1
invariant :SIG_VS + A_SIG_VS = 1
invariant :SIG_IncrClk + A_SIG_IncrClk = 1
invariant :A_dV + A_A_dV = 951
invariant :URIState + A_URIState = 951
invariant :SIG_Clk0 + A_SIG_Clk0 = 1
invariant :LRI + A_LRI = 951
invariant :SIG_APOut + A_SIG_APOut = 1
invariant :SIG_Aget + A_SIG_Aget = 1
invariant :SIG_Clk1 + A_SIG_Clk1 = 1
invariant :URI + A_URI = 951
invariant :SIG_VP + A_SIG_VP = 1
Reverse transition relation is NOT exact ! Due to transitions EMPTY_APOut, EMPTY_NextVtrBeat, EMPTY_VPOut, I950_L_Wait4VSynch, I702_L_Wait4VBeat, I881_S_retroAVJ_L_Retro, I880_S_retroAVJ_L_Ante_L_Retro, I879_S_retroAVJ_L_Empty_L_Retro, I878_S_tr_AVJ_L_Ante_S_AVJAnteReachedHigh_L_a_dvHigh, I877_S_tr_AVJ_L_Ante_S_AVJAnteReached_L_a_dVLow, I876_S_tr_AVJ_L_Ante_S_AVJAnteReached_L_Recovery_L_a_dVLow, I875_S_tr_AVJ_L_Ante_S_AVJAnteReachedHigh_L_Recovery_L_a_dvHigh, I874_S_tr_AVJ_L_Ante_S_AVJAnteReachedHigh_AVJAnteReachedHigh_L_a_dvHigh, I873_S_tr_AVJ_L_Ante_S_AVJAnteReached_AVJAnteReached_L_a_dVLow, I872_S_Abeat_S_a_dVSetLow_L_Wait4ABeat, I869_S_Abeat_S_a_dVSetHigh_L_a_dVLow_L_q0, I868_S_Abeat_L_Excitable_S_a_dVSetLow_L_Wait4ABeat, I865_S_Abeat_L_Excitable_S_a_dVSetHigh_L_a_dVLow_L_q0, I864_S_NextAtrBeat_L_ASynch_NextAtrBeat, I863_S_NextAtrBeat_L_ASynch_L_Wait4ASynch, I706_L_Wait4ABeat, I855_S_VtrAnteReached_L_Ante, I852_S_vrg_L_GenerateRetroWave_L_Empty, I851_S_vrg_L_GenerateRetroWave_L_Ante, I843_S_AVJRetroReached_L_Retro, I842_S_AVJRetroReached_L_Recovery_L_Retro, I841_S_AVJRetroReached_AVJRetroReached_L_Retro, I840_S_anteAVJ_L_Ante, I839_S_anteAVJ_L_Ante_L_Empty, I838_S_anteAVJ_L_Ante_L_Retro, I829_S_AVJRetroExit_L_Retro, I828_S_AVJAnteExit_L_Ante, I827_S_AVJRetroExit_L_Retro, I826_S_AVJAnteExit_L_Ante, I700_init, I696_L_Refractory, I694_L_Refractory, I692_L_Refractory, I311_L_VsenseAnte, I309_L_Vsense, I849_S_AtrRetroReached_L_Retro, I846_S_arg_L_GenerateAnteWave_L_Empty, I845_S_arg_L_GenerateAnteWave_L_Retro, I307_L_AsenseRetro, I616_L_Asense, Intersection with reachable at each step enabled. (destroyed/reverse/intersect/total) :0/119/45/164
Running compilation step : CommandLine [args=[gcc, -c, -I/home/mcc/BenchKit//lts_install_dir//include, -I., -std=c99, -fPIC, -O3, model.c], workingDir=/home/mcc/execution]
Compilation finished in 2474 ms.
Running link step : CommandLine [args=[gcc, -shared, -o, gal.so, model.o], workingDir=/home/mcc/execution]
Link finished in 85 ms.
Running LTSmin : CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=1, --when, --ltl, ([](X((LTLAP0==true))))U([]((LTLAP1==true))), --buchi-type=spotba], workingDir=/home/mcc/execution]
LTSmin run took 62 ms.
FORMULA PaceMaker-PT-none-LTLCardinality-00 FALSE TECHNIQUES PARTIAL_ORDER EXPLICIT LTSMIN SAT_SMT
Running LTSmin : CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=1, --when, --ltl, (<>(<>((LTLAP2==true))))U(X(<>((LTLAP3==true)))), --buchi-type=spotba], workingDir=/home/mcc/execution]
LTSmin run took 20 ms.
FORMULA PaceMaker-PT-none-LTLCardinality-01 TRUE TECHNIQUES PARTIAL_ORDER EXPLICIT LTSMIN SAT_SMT
Running LTSmin : CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=1, -p, --pins-guards, --when, --ltl, (LTLAP4==true), --buchi-type=spotba], workingDir=/home/mcc/execution]
LTSmin run took 37 ms.
FORMULA PaceMaker-PT-none-LTLCardinality-02 FALSE TECHNIQUES PARTIAL_ORDER EXPLICIT LTSMIN SAT_SMT
Running LTSmin : CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=1, -p, --pins-guards, --when, --ltl, []([](<>([]((LTLAP5==true))))), --buchi-type=spotba], workingDir=/home/mcc/execution]
LTSmin run took 31 ms.
FORMULA PaceMaker-PT-none-LTLCardinality-03 FALSE TECHNIQUES PARTIAL_ORDER EXPLICIT LTSMIN SAT_SMT
Running LTSmin : CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=1, -p, --pins-guards, --when, --ltl, [](<>((LTLAP6==true))), --buchi-type=spotba], workingDir=/home/mcc/execution]
LTSmin run took 31 ms.
FORMULA PaceMaker-PT-none-LTLCardinality-04 FALSE TECHNIQUES PARTIAL_ORDER EXPLICIT LTSMIN SAT_SMT
Running LTSmin : CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=1, -p, --pins-guards, --when, --ltl, (LTLAP7==true), --buchi-type=spotba], workingDir=/home/mcc/execution]
LTSmin run took 29 ms.
FORMULA PaceMaker-PT-none-LTLCardinality-05 TRUE TECHNIQUES PARTIAL_ORDER EXPLICIT LTSMIN SAT_SMT
Running LTSmin : CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=1, --when, --ltl, X(X(<>((LTLAP8==true)))), --buchi-type=spotba], workingDir=/home/mcc/execution]
LTSmin run took 23 ms.
FORMULA PaceMaker-PT-none-LTLCardinality-06 TRUE TECHNIQUES PARTIAL_ORDER EXPLICIT LTSMIN SAT_SMT
Running LTSmin : CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=1, -p, --pins-guards, --when, --ltl, (((LTLAP9==true))U((LTLAP10==true)))U(((LTLAP11==true))U((LTLAP12==true))), --buchi-type=spotba], workingDir=/home/mcc/execution]
LTSmin run took 69 ms.
FORMULA PaceMaker-PT-none-LTLCardinality-07 TRUE TECHNIQUES PARTIAL_ORDER EXPLICIT LTSMIN SAT_SMT
Running LTSmin : CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=1, --when, --ltl, <>(<>(X((LTLAP13==true)))), --buchi-type=spotba], workingDir=/home/mcc/execution]
LTSmin run took 21 ms.
FORMULA PaceMaker-PT-none-LTLCardinality-08 TRUE TECHNIQUES PARTIAL_ORDER EXPLICIT LTSMIN SAT_SMT
Running LTSmin : CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=1, -p, --pins-guards, --when, --ltl, (LTLAP14==true), --buchi-type=spotba], workingDir=/home/mcc/execution]
LTSmin run took 39 ms.
FORMULA PaceMaker-PT-none-LTLCardinality-09 TRUE TECHNIQUES PARTIAL_ORDER EXPLICIT LTSMIN SAT_SMT
Running LTSmin : CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=1, -p, --pins-guards, --when, --ltl, <>((LTLAP15==true)), --buchi-type=spotba], workingDir=/home/mcc/execution]
LTSmin run took 53 ms.
FORMULA PaceMaker-PT-none-LTLCardinality-10 FALSE TECHNIQUES PARTIAL_ORDER EXPLICIT LTSMIN SAT_SMT
Running LTSmin : CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=1, -p, --pins-guards, --when, --ltl, (<>(<>((LTLAP16==true))))U(((LTLAP17==true))U((LTLAP18==true))), --buchi-type=spotba], workingDir=/home/mcc/execution]
LTSmin run took 46 ms.
FORMULA PaceMaker-PT-none-LTLCardinality-11 FALSE TECHNIQUES PARTIAL_ORDER EXPLICIT LTSMIN SAT_SMT
Running LTSmin : CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=1, --when, --ltl, X([]([](X((LTLAP19==true))))), --buchi-type=spotba], workingDir=/home/mcc/execution]
WARNING : LTSmin timed out (>225 s) on command CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=1, --when, --ltl, X([]([](X((LTLAP19==true))))), --buchi-type=spotba], workingDir=/home/mcc/execution]
Running LTSmin : CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=1, --when, --ltl, [](X([]((LTLAP20==true)))), --buchi-type=spotba], workingDir=/home/mcc/execution]
LTSmin run took 36 ms.
FORMULA PaceMaker-PT-none-LTLCardinality-13 FALSE TECHNIQUES PARTIAL_ORDER EXPLICIT LTSMIN SAT_SMT
Running LTSmin : CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=1, -p, --pins-guards, --when, --ltl, (LTLAP21==true), --buchi-type=spotba], workingDir=/home/mcc/execution]
LTSmin run took 48 ms.
FORMULA PaceMaker-PT-none-LTLCardinality-14 TRUE TECHNIQUES PARTIAL_ORDER EXPLICIT LTSMIN SAT_SMT
Running LTSmin : CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=1, --when, --ltl, [](([]((LTLAP22==true)))U(X((LTLAP23==true)))), --buchi-type=spotba], workingDir=/home/mcc/execution]
LTSmin run took 34 ms.
FORMULA PaceMaker-PT-none-LTLCardinality-15 FALSE TECHNIQUES PARTIAL_ORDER EXPLICIT LTSMIN SAT_SMT
Retrying LTSmin with larger timeout 1800 s
Running LTSmin : CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=1, --when, --ltl, X([]([](X((LTLAP19==true))))), --buchi-type=spotba], workingDir=/home/mcc/execution]
WARNING : LTS min runner thread failed on error :java.lang.RuntimeException: Unexpected exception when executing ltsmin :CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=1, --when, --ltl, X([]([](X((LTLAP19==true))))), --buchi-type=spotba], workingDir=/home/mcc/execution]
255
BK_TIME_CONFINEMENT_REACHED
--------------------
content from stderr:
+ export BINDIR=/home/mcc/BenchKit/
+ BINDIR=/home/mcc/BenchKit/
++ pwd
+ export MODEL=/home/mcc/execution
+ MODEL=/home/mcc/execution
+ /home/mcc/BenchKit//runeclipse.sh /home/mcc/execution LTLCardinality -its -ltsminpath /home/mcc/BenchKit//lts_install_dir/ -smt
+ ulimit -s 65536
+ [[ -z '' ]]
+ export LTSMIN_MEM_SIZE=8589934592
+ LTSMIN_MEM_SIZE=8589934592
+ /home/mcc/BenchKit//itstools/its-tools -consoleLog -data /home/mcc/execution/workspace -pnfolder /home/mcc/execution -examination LTLCardinality -z3path /home/mcc/BenchKit//z3/bin/z3 -yices2path /home/mcc/BenchKit//yices/bin/yices -its -ltsminpath /home/mcc/BenchKit//lts_install_dir/ -smt -vmargs -Dosgi.locking=none -Declipse.stateSaveDelayInterval=-1 -Dosgi.configuration.area=/tmp/.eclipse -Xss8m -Xms40m -Xmx8192m -Dfile.encoding=UTF-8 -Dosgi.requiredJavaVersion=1.6
May 28, 2018 5:54:39 AM fr.lip6.move.gal.application.Application start
INFO: Running its-tools with arguments : [-pnfolder, /home/mcc/execution, -examination, LTLCardinality, -z3path, /home/mcc/BenchKit//z3/bin/z3, -yices2path, /home/mcc/BenchKit//yices/bin/yices, -its, -ltsminpath, /home/mcc/BenchKit//lts_install_dir/, -smt]
May 28, 2018 5:54:39 AM fr.lip6.move.gal.application.MccTranslator transformPNML
INFO: Parsing pnml file : /home/mcc/execution/model.pnml
May 28, 2018 5:54:39 AM fr.lip6.move.gal.nupn.PTNetReader loadFromXML
INFO: Load time of PNML (sax parser for PT used): 87 ms
May 28, 2018 5:54:39 AM fr.lip6.move.gal.pnml.togal.PTGALTransformer handlePage
INFO: Transformed 70 places.
May 28, 2018 5:54:39 AM fr.lip6.move.gal.pnml.togal.PTGALTransformer handlePage
INFO: Transformed 164 transitions.
May 28, 2018 5:54:39 AM fr.lip6.move.serialization.SerializationUtil systemToFile
INFO: Time to serialize gal into /home/mcc/execution/model.pnml.img.gal : 27 ms
May 28, 2018 5:54:39 AM fr.lip6.move.gal.instantiate.GALRewriter flatten
INFO: Flatten gal took : 130 ms
May 28, 2018 5:54:39 AM fr.lip6.move.serialization.SerializationUtil systemToFile
INFO: Time to serialize gal into /home/mcc/execution/LTLCardinality.pnml.gal : 9 ms
May 28, 2018 5:54:39 AM fr.lip6.move.serialization.SerializationUtil serializePropertiesForITSLTLTools
INFO: Time to serialize properties into /home/mcc/execution/LTLCardinality.ltl : 1 ms
May 28, 2018 5:54:40 AM fr.lip6.move.gal.semantics.DeterministicNextBuilder getDeterministicNext
INFO: Input system was already deterministic with 164 transitions.
May 28, 2018 5:54:40 AM fr.lip6.move.gal.gal2smt.bmc.KInductionSolver computeAndDeclareInvariants
INFO: Computed 35 place invariants in 18 ms
May 28, 2018 5:54:40 AM fr.lip6.move.gal.gal2smt.bmc.KInductionSolver init
INFO: Proved 70 variables to be positive in 185 ms
May 28, 2018 5:54:40 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver computeAblingMatrix
INFO: Computing symmetric may disable matrix : 164 transitions.
May 28, 2018 5:54:40 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of disable matrix completed :0/164 took 0 ms. Total solver calls (SAT/UNSAT): 0(0/0)
May 28, 2018 5:54:40 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of Complete disable matrix. took 10 ms. Total solver calls (SAT/UNSAT): 0(0/0)
May 28, 2018 5:54:40 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver computeAblingMatrix
INFO: Computing symmetric may enable matrix : 164 transitions.
May 28, 2018 5:54:40 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of Complete enable matrix. took 10 ms. Total solver calls (SAT/UNSAT): 0(0/0)
May 28, 2018 5:54:41 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver computeCoEnablingMatrix
INFO: Computing symmetric co enabling matrix : 164 transitions.
May 28, 2018 5:54:43 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(98/164) took 1776 ms. Total solver calls (SAT/UNSAT): 669(116/553)
May 28, 2018 5:54:46 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of Finished co-enabling matrix. took 4561 ms. Total solver calls (SAT/UNSAT): 1317(183/1134)
May 28, 2018 5:54:46 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver computeDoNotAccord
INFO: Computing Do-Not-Accords matrix : 164 transitions.
May 28, 2018 5:54:46 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of Completed DNA matrix. took 6 ms. Total solver calls (SAT/UNSAT): 0(0/0)
May 28, 2018 5:54:46 AM fr.lip6.move.gal.gal2pins.Gal2PinsTransformerNext transform
INFO: Built C files in 6358ms conformant to PINS in folder :/home/mcc/execution
pins2lts-mc, 0.000: Registering PINS so language module
pins2lts-mc, 0.000: Loading model from ./gal.so
pins2lts-mc, 0.000: library has no initializer
pins2lts-mc, 0.000: loading model GAL
pins2lts-mc, 0.001: completed loading model GAL
pins2lts-mc, 0.001: LTL layer: formula: X([]([](X((LTLAP19==true)))))
pins2lts-mc, 0.001: "X([]([](X((LTLAP19==true)))))" is not a file, parsing as formula...
pins2lts-mc, 0.001: Using Spin LTL semantics
pins2lts-mc, 0.009: buchi has 4 states
pins2lts-mc, 0.009: Weak Buchi automaton detected, adding non-accepting as progress label.
pins2lts-mc, 0.011: DFS-FIFO for weak LTL, using special progress label 189
pins2lts-mc, 0.011: There are 190 state labels and 1 edge labels
pins2lts-mc, 0.011: State length is 71, there are 169 groups
pins2lts-mc, 0.011: Running dfsfifo using 1 core (sequential)
pins2lts-mc, 0.011: Using a tree table with 2^27 elements
pins2lts-mc, 0.011: Successor permutation: rr
pins2lts-mc, 0.011: Global bits: 2, count bits: 0, local bits: 0
pins2lts-mc, 0.083: 1 levels 1000 states 11268 transitions
pins2lts-mc, 0.147: 1 levels 2000 states 22905 transitions
pins2lts-mc, 0.258: 1 levels 4000 states 45820 transitions
pins2lts-mc, 0.483: 1 levels 8000 states 92914 transitions
pins2lts-mc, 0.911: 1 levels 16000 states 190629 transitions
pins2lts-mc, 1.726: 1 levels 32000 states 388717 transitions
pins2lts-mc, 3.290: 1 levels 64000 states 792422 transitions
pins2lts-mc, 6.344: 1 levels 128000 states 1613321 transitions
pins2lts-mc, 12.461: 1 levels 256000 states 3331091 transitions
pins2lts-mc, 24.485: 1 levels 512000 states 6754144 transitions
pins2lts-mc, 48.895: 1 levels 1024000 states 13787791 transitions
pins2lts-mc, 98.328: 1 levels 2048000 states 28149199 transitions
pins2lts-mc, 198.147: 1 levels 4096000 states 56881726 transitions
pins2lts-mc, 416.863: 1 levels 8192000 states 116652991 transitions
pins2lts-mc, 509.417: Error: tree leafs table full! Change -s/--ratio.
pins2lts-mc, 509.464:
pins2lts-mc, 509.464:
pins2lts-mc, 509.464: Explored 9585286 states 137369788 transitions, fanout: 14.331
pins2lts-mc, 509.464: Total exploration time 509.460 sec (509.460 sec minimum, 509.460 sec on average)
pins2lts-mc, 509.464: States per second: 18815, Transitions per second: 269638
pins2lts-mc, 509.464:
pins2lts-mc, 509.464: Progress states detected: 20929851
pins2lts-mc, 509.464: Redundant explorations: -54.2028
pins2lts-mc, 509.464:
pins2lts-mc, 509.464: Queue width: 8B, total height: 18347972, memory: 139.98MB
pins2lts-mc, 509.464: Tree memory: 415.7MB, 20.8 B/state, compr.: 7.3%
pins2lts-mc, 509.464: Tree fill ratio (roots/leafs): 15.0%/99.0%
pins2lts-mc, 509.464: Stored 164 string chucks using 0MB
pins2lts-mc, 509.464: Total memory used for chunk indexing: 0MB
pins2lts-mc, 509.464: Est. total memory use: 555.7MB (~1164.0MB paged-in)
java.lang.RuntimeException: Unexpected exception when executing ltsmin :CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=1, --when, --ltl, X([]([](X((LTLAP19==true))))), --buchi-type=spotba], workingDir=/home/mcc/execution]
255
at fr.lip6.move.gal.application.LTSminRunner.checkProperty(LTSminRunner.java:167)
at fr.lip6.move.gal.application.LTSminRunner.access$9(LTSminRunner.java:122)
at fr.lip6.move.gal.application.LTSminRunner$1.run(LTSminRunner.java:98)
at java.lang.Thread.run(Thread.java:748)
Sequence of Actions to be Executed by the VM
This is useful if one wants to reexecute the tool in the VM from the submitted image disk.
set -x
# this is for BenchKit: configuration of major elements for the test
export BK_INPUT="PaceMaker-PT-none"
export BK_EXAMINATION="LTLCardinality"
export BK_TOOL="itstools"
export BK_RESULT_DIR="/tmp/BK_RESULTS/OUTPUTS"
export BK_TIME_CONFINEMENT="3600"
export BK_MEMORY_CONFINEMENT="16384"
# this is specific to your benchmark or test
export BIN_DIR="$HOME/BenchKit/bin"
# remove the execution directoty if it exists (to avoid increse of .vmdk images)
if [ -d execution ] ; then
rm -rf execution
fi
tar xzf /home/mcc/BenchKit/INPUTS/PaceMaker-PT-none.tgz
mv PaceMaker-PT-none execution
cd execution
pwd
ls -lh
# this is for BenchKit: explicit launching of the test
echo "====================================================================="
echo " Generated by BenchKit 2-3637"
echo " Executing tool itstools"
echo " Input is PaceMaker-PT-none, examination is LTLCardinality"
echo " Time confinement is $BK_TIME_CONFINEMENT seconds"
echo " Memory confinement is 16384 MBytes"
echo " Number of cores is 4"
echo " Run identifier is r260-csrt-152732585300097"
echo "====================================================================="
echo
echo "--------------------"
echo "content from stdout:"
echo
echo "=== Data for post analysis generated by BenchKit (invocation template)"
echo
if [ "LTLCardinality" = "UpperBounds" ] ; then
echo "The expected result is a vector of positive values"
echo NUM_VECTOR
elif [ "LTLCardinality" != "StateSpace" ] ; then
echo "The expected result is a vector of booleans"
echo BOOL_VECTOR
else
echo "no data necessary for post analysis"
fi
echo
if [ -f "LTLCardinality.txt" ] ; then
echo "here is the order used to build the result vector(from text file)"
for x in $(grep Property LTLCardinality.txt | cut -d ' ' -f 2 | sort -u) ; do
echo "FORMULA_NAME $x"
done
elif [ -f "LTLCardinality.xml" ] ; then # for cunf (txt files deleted;-)
echo echo "here is the order used to build the result vector(from xml file)"
for x in $(grep '
echo "FORMULA_NAME $x"
done
fi
echo
echo "=== Now, execution of the tool begins"
echo
echo -n "BK_START "
date -u +%s%3N
echo
timeout -s 9 $BK_TIME_CONFINEMENT bash -c "/home/mcc/BenchKit/BenchKit_head.sh 2> STDERR ; echo ; echo -n \"BK_STOP \" ; date -u +%s%3N"
if [ $? -eq 137 ] ; then
echo
echo "BK_TIME_CONFINEMENT_REACHED"
fi
echo
echo "--------------------"
echo "content from stderr:"
echo
cat STDERR ;