Execution Chart

We display below the execution chart for this examination (boot time has been removed).

Trace from the execution

Waiting for the VM to be ready (probing ssh)
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/home/mcc/execution
total 620K
-rw-r--r-- 1 mcc users 9.6K May 15 18:54 CTLCardinality.txt
-rw-r--r-- 1 mcc users 42K May 15 18:54 CTLCardinality.xml
-rw-r--r-- 1 mcc users 11K May 15 18:54 CTLFireability.txt
-rw-r--r-- 1 mcc users 49K May 15 18:54 CTLFireability.xml
-rw-r--r-- 1 mcc users 4.0K May 15 18:50 GenericPropertiesDefinition.xml
-rw-r--r-- 1 mcc users 6.3K May 15 18:50 GenericPropertiesVerdict.xml
-rw-r--r-- 1 mcc users 7.1K May 26 09:26 LTLCardinality.txt
-rw-r--r-- 1 mcc users 28K May 26 09:26 LTLCardinality.xml
-rw-r--r-- 1 mcc users 6.7K May 26 09:26 LTLFireability.txt
-rw-r--r-- 1 mcc users 30K May 26 09:26 LTLFireability.xml
-rw-r--r-- 1 mcc users 8.8K May 15 18:54 ReachabilityCardinality.txt
-rw-r--r-- 1 mcc users 37K May 15 18:54 ReachabilityCardinality.xml
-rw-r--r-- 1 mcc users 112 May 15 18:54 ReachabilityDeadlock.txt
-rw-r--r-- 1 mcc users 350 May 15 18:54 ReachabilityDeadlock.xml
-rw-r--r-- 1 mcc users 13K May 15 18:54 ReachabilityFireability.txt
-rw-r--r-- 1 mcc users 53K May 15 18:54 ReachabilityFireability.xml
-rw-r--r-- 1 mcc users 2.4K May 15 18:54 UpperBounds.txt
-rw-r--r-- 1 mcc users 5.7K May 15 18:54 UpperBounds.xml
-rw-r--r-- 1 mcc users 5 May 15 18:50 equiv_col
-rw-r--r-- 1 mcc users 2 May 15 18:50 instance
-rw-r--r-- 1 mcc users 6 May 15 18:50 iscolored
-rw-r--r-- 1 mcc users 255K May 15 18:50 model.pnml
=====================================================================
Generated by BenchKit 2-3637
Executing tool itstools
Input is LamportFastMutEx-PT-7, examination is LTLFireability
Time confinement is 3600 seconds
Memory confinement is 16384 MBytes
Number of cores is 4
Run identifier is r260-csrt-152732585200042
=====================================================================

--------------------
content from stdout:

=== Data for post analysis generated by BenchKit (invocation template)

The expected result is a vector of booleans
BOOL_VECTOR

here is the order used to build the result vector(from text file)
FORMULA_NAME LamportFastMutEx-PT-7-LTLFireability-00
FORMULA_NAME LamportFastMutEx-PT-7-LTLFireability-01
FORMULA_NAME LamportFastMutEx-PT-7-LTLFireability-02
FORMULA_NAME LamportFastMutEx-PT-7-LTLFireability-03
FORMULA_NAME LamportFastMutEx-PT-7-LTLFireability-04
FORMULA_NAME LamportFastMutEx-PT-7-LTLFireability-05
FORMULA_NAME LamportFastMutEx-PT-7-LTLFireability-06
FORMULA_NAME LamportFastMutEx-PT-7-LTLFireability-07
FORMULA_NAME LamportFastMutEx-PT-7-LTLFireability-08
FORMULA_NAME LamportFastMutEx-PT-7-LTLFireability-09
FORMULA_NAME LamportFastMutEx-PT-7-LTLFireability-10
FORMULA_NAME LamportFastMutEx-PT-7-LTLFireability-11
FORMULA_NAME LamportFastMutEx-PT-7-LTLFireability-12
FORMULA_NAME LamportFastMutEx-PT-7-LTLFireability-13
FORMULA_NAME LamportFastMutEx-PT-7-LTLFireability-14
FORMULA_NAME LamportFastMutEx-PT-7-LTLFireability-15

=== Now, execution of the tool begins

BK_START 1527484395644

Using solver Z3 to compute partial order matrices.
Built C files in :
/home/mcc/execution
Invoking ITS tools like this :CommandLine [args=[/home/mcc/BenchKit/itstools/plugins/fr.lip6.move.gal.itstools.binaries_1.0.0.201805151631/bin/its-ltl-linux64, --gc-threshold, 2000000, -i, /home/mcc/execution/LTLFireability.pnml.gal, -t, CGAL, -LTL, /home/mcc/execution/LTLFireability.ltl, -c, -stutter-deadlock], workingDir=/home/mcc/execution]

its-ltl command run as :

/home/mcc/BenchKit/itstools/plugins/fr.lip6.move.gal.itstools.binaries_1.0.0.201805151631/bin/its-ltl-linux64 --gc-threshold 2000000 -i /home/mcc/execution/LTLFireability.pnml.gal -t CGAL -LTL /home/mcc/execution/LTLFireability.ltl -c -stutter-deadlock
Read 16 LTL properties
Checking formula 0 : !((G(F(G(F(X("(((((((((((((((((P_b_0_false>=1)&&(P_setbi_24_0>=1))||((P_b_0_true>=1)&&(P_setbi_24_0>=1)))||((P_b_1_false>=1)&&(P_setbi_24_1>=1)))||((P_b_1_true>=1)&&(P_setbi_24_1>=1)))||((P_b_2_false>=1)&&(P_setbi_24_2>=1)))||((P_b_2_true>=1)&&(P_setbi_24_2>=1)))||((P_b_3_false>=1)&&(P_setbi_24_3>=1)))||((P_b_3_true>=1)&&(P_setbi_24_3>=1)))||((P_b_4_false>=1)&&(P_setbi_24_4>=1)))||((P_b_4_true>=1)&&(P_setbi_24_4>=1)))||((P_b_5_false>=1)&&(P_setbi_24_5>=1)))||((P_b_5_true>=1)&&(P_setbi_24_5>=1)))||((P_b_6_false>=1)&&(P_setbi_24_6>=1)))||((P_b_6_true>=1)&&(P_setbi_24_6>=1)))||((P_b_7_false>=1)&&(P_setbi_24_7>=1)))||((P_b_7_true>=1)&&(P_setbi_24_7>=1)))")))))))
Formula 0 simplified : !GFGFX"(((((((((((((((((P_b_0_false>=1)&&(P_setbi_24_0>=1))||((P_b_0_true>=1)&&(P_setbi_24_0>=1)))||((P_b_1_false>=1)&&(P_setbi_24_1>=1)))||((P_b_1_true>=1)&&(P_setbi_24_1>=1)))||((P_b_2_false>=1)&&(P_setbi_24_2>=1)))||((P_b_2_true>=1)&&(P_setbi_24_2>=1)))||((P_b_3_false>=1)&&(P_setbi_24_3>=1)))||((P_b_3_true>=1)&&(P_setbi_24_3>=1)))||((P_b_4_false>=1)&&(P_setbi_24_4>=1)))||((P_b_4_true>=1)&&(P_setbi_24_4>=1)))||((P_b_5_false>=1)&&(P_setbi_24_5>=1)))||((P_b_5_true>=1)&&(P_setbi_24_5>=1)))||((P_b_6_false>=1)&&(P_setbi_24_6>=1)))||((P_b_6_true>=1)&&(P_setbi_24_6>=1)))||((P_b_7_false>=1)&&(P_setbi_24_7>=1)))||((P_b_7_true>=1)&&(P_setbi_24_7>=1)))"
Presburger conditions satisfied. Using coverability to approximate state space in K-Induction.
Normalized transition count is 392
// Phase 1: matrix 392 rows 264 cols
invariant :P_wait_3_3 + -1'P_await_13_3 + P_done_3_3 = 0
invariant :P_wait_0_2 + -1'P_await_13_0 + P_done_0_2 = 0
invariant :P_wait_4_3 + -1'P_await_13_4 + P_done_4_3 = 0
invariant :P_b_5_false + P_b_5_true = 1
invariant :P_start_1_6 + P_setx_3_6 + P_setbi_5_6 + P_ify0_4_6 + P_sety_9_6 + P_ifxi_10_6 + P_setbi_11_6 + P_fordo_12_6 + P_await_13_6 + P_ifyi_15_6 + P_awaity_6 + P_CS_21_6 + P_setbi_24_6 = 1
invariant :P_wait_4_0 + P_done_4_0 = 0
invariant :P_wait_0_6 + -1'P_await_13_0 + P_done_0_6 = 0
invariant :P_start_1_2 + P_setx_3_2 + P_setbi_5_2 + P_ify0_4_2 + P_sety_9_2 + P_ifxi_10_2 + P_setbi_11_2 + P_fordo_12_2 + P_await_13_2 + P_ifyi_15_2 + P_awaity_2 + P_CS_21_2 + P_setbi_24_2 = 1
invariant :P_wait_1_6 + -1'P_await_13_1 + P_done_1_6 = 0
invariant :P_wait_5_2 + -1'P_await_13_5 + P_done_5_2 = 0
invariant :P_wait_4_7 + -1'P_await_13_4 + P_done_4_7 = 0
invariant :P_wait_5_3 + -1'P_await_13_5 + P_done_5_3 = 0
invariant :P_wait_5_0 + P_done_5_0 = 0
invariant :P_b_0_false + P_b_0_true = 0
invariant :P_wait_6_4 + -1'P_await_13_6 + P_done_6_4 = 0
invariant :P_wait_6_5 + -1'P_await_13_6 + P_done_6_5 = 0
invariant :P_wait_3_2 + -1'P_await_13_3 + P_done_3_2 = 0
invariant :P_wait_7_4 + -1'P_await_13_7 + P_done_7_4 = 0
invariant :P_wait_0_5 + -1'P_await_13_0 + P_done_0_5 = 0
invariant :P_wait_2_6 + -1'P_await_13_2 + P_done_2_6 = 0
invariant :P_wait_6_7 + -1'P_await_13_6 + P_done_6_7 = 0
invariant :P_wait_3_7 + -1'P_await_13_3 + P_done_3_7 = 0
invariant :P_wait_2_1 + -1'P_await_13_2 + P_done_2_1 = 0
invariant :P_b_4_false + P_b_4_true = 1
invariant :P_start_1_4 + P_setx_3_4 + P_setbi_5_4 + P_ify0_4_4 + P_sety_9_4 + P_ifxi_10_4 + P_setbi_11_4 + P_fordo_12_4 + P_await_13_4 + P_ifyi_15_4 + P_awaity_4 + P_CS_21_4 + P_setbi_24_4 = 1
invariant :P_wait_5_1 + -1'P_await_13_5 + P_done_5_1 = 0
invariant :P_wait_1_2 + -1'P_await_13_1 + P_done_1_2 = 0
invariant :P_wait_3_5 + -1'P_await_13_3 + P_done_3_5 = 0
invariant :P_wait_2_5 + -1'P_await_13_2 + P_done_2_5 = 0
invariant :P_wait_6_2 + -1'P_await_13_6 + P_done_6_2 = 0
invariant :P_start_1_1 + P_setx_3_1 + P_setbi_5_1 + P_ify0_4_1 + P_sety_9_1 + P_ifxi_10_1 + P_setbi_11_1 + P_fordo_12_1 + P_await_13_1 + P_ifyi_15_1 + P_awaity_1 + P_CS_21_1 + P_setbi_24_1 = 1
invariant :P_b_1_false + P_b_1_true = 1
invariant :P_wait_0_1 + -1'P_await_13_0 + P_done_0_1 = 0
invariant :P_wait_0_0 + P_done_0_0 = 0
invariant :P_wait_1_3 + -1'P_await_13_1 + P_done_1_3 = 0
invariant :P_wait_1_0 + P_done_1_0 = 0
invariant :P_start_1_3 + P_setx_3_3 + P_setbi_5_3 + P_ify0_4_3 + P_sety_9_3 + P_ifxi_10_3 + P_setbi_11_3 + P_fordo_12_3 + P_await_13_3 + P_ifyi_15_3 + P_awaity_3 + P_CS_21_3 + P_setbi_24_3 = 1
invariant :P_wait_1_5 + -1'P_await_13_1 + P_done_1_5 = 0
invariant :P_wait_2_7 + -1'P_await_13_2 + P_done_2_7 = 0
invariant :P_wait_0_7 + -1'P_await_13_0 + P_done_0_7 = 0
invariant :P_wait_5_7 + -1'P_await_13_5 + P_done_5_7 = 0
invariant :P_wait_4_6 + -1'P_await_13_4 + P_done_4_6 = 0
invariant :P_b_7_false + P_b_7_true = 1
invariant :P_wait_7_7 + -1'P_await_13_7 + P_done_7_7 = 0
invariant :P_wait_7_6 + -1'P_await_13_7 + P_done_7_6 = 0
invariant :y_0 + y_1 + y_2 + y_3 + y_4 + y_5 + y_6 + y_7 = 1
invariant :P_wait_7_1 + -1'P_await_13_7 + P_done_7_1 = 0
invariant :P_wait_6_1 + -1'P_await_13_6 + P_done_6_1 = 0
invariant :P_wait_4_4 + -1'P_await_13_4 + P_done_4_4 = 0
invariant :P_b_3_false + P_b_3_true = 1
invariant :P_wait_2_4 + -1'P_await_13_2 + P_done_2_4 = 0
invariant :P_wait_5_5 + -1'P_await_13_5 + P_done_5_5 = 0
invariant :P_start_1_5 + P_setx_3_5 + P_setbi_5_5 + P_ify0_4_5 + P_sety_9_5 + P_ifxi_10_5 + P_setbi_11_5 + P_fordo_12_5 + P_await_13_5 + P_ifyi_15_5 + P_awaity_5 + P_CS_21_5 + P_setbi_24_5 = 1
invariant :P_wait_2_2 + -1'P_await_13_2 + P_done_2_2 = 0
invariant :P_wait_6_0 + P_done_6_0 = 0
invariant :P_wait_1_1 + -1'P_await_13_1 + P_done_1_1 = 0
invariant :P_b_6_false + P_b_6_true = 1
invariant :P_wait_7_5 + -1'P_await_13_7 + P_done_7_5 = 0
invariant :P_start_1_0 + P_setx_3_0 + P_setbi_5_0 + P_ify0_4_0 + P_sety_9_0 + P_ifxi_10_0 + P_setbi_11_0 + P_fordo_12_0 + P_await_13_0 + P_ifyi_15_0 + P_awaity_0 + P_CS_21_0 + P_setbi_24_0 = 0
invariant :P_wait_4_1 + -1'P_await_13_4 + P_done_4_1 = 0
invariant :P_wait_7_0 + P_done_7_0 = 0
invariant :P_wait_2_3 + -1'P_await_13_2 + P_done_2_3 = 0
invariant :P_wait_3_1 + -1'P_await_13_3 + P_done_3_1 = 0
invariant :P_b_2_false + P_b_2_true = 1
invariant :P_wait_3_4 + -1'P_await_13_3 + P_done_3_4 = 0
invariant :P_wait_4_2 + -1'P_await_13_4 + P_done_4_2 = 0
invariant :P_wait_5_4 + -1'P_await_13_5 + P_done_5_4 = 0
invariant :P_wait_7_2 + -1'P_await_13_7 + P_done_7_2 = 0
invariant :P_wait_5_6 + -1'P_await_13_5 + P_done_5_6 = 0
invariant :P_wait_1_4 + -1'P_await_13_1 + P_done_1_4 = 0
invariant :P_wait_1_7 + -1'P_await_13_1 + P_done_1_7 = 0
invariant :P_wait_0_4 + -1'P_await_13_0 + P_done_0_4 = 0
invariant :P_wait_7_3 + -1'P_await_13_7 + P_done_7_3 = 0
invariant :P_wait_3_6 + -1'P_await_13_3 + P_done_3_6 = 0
invariant :P_wait_6_6 + -1'P_await_13_6 + P_done_6_6 = 0
invariant :P_wait_6_3 + -1'P_await_13_6 + P_done_6_3 = 0
invariant :P_wait_4_5 + -1'P_await_13_4 + P_done_4_5 = 0
invariant :P_wait_0_3 + -1'P_await_13_0 + P_done_0_3 = 0
invariant :x_0 + x_1 + x_2 + x_3 + x_4 + x_5 + x_6 + x_7 = 1
invariant :P_wait_2_0 + P_done_2_0 = 0
invariant :P_start_1_7 + P_setx_3_7 + P_setbi_5_7 + P_ify0_4_7 + P_sety_9_7 + P_ifxi_10_7 + P_setbi_11_7 + P_fordo_12_7 + P_await_13_7 + P_ifyi_15_7 + P_awaity_7 + P_CS_21_7 + P_setbi_24_7 = 1
invariant :P_wait_3_0 + P_done_3_0 = 0
Running compilation step : CommandLine [args=[gcc, -c, -I/home/mcc/BenchKit//lts_install_dir//include, -I., -std=c99, -fPIC, -O3, model.c], workingDir=/home/mcc/execution]
Compilation finished in 9701 ms.
Running link step : CommandLine [args=[gcc, -shared, -o, gal.so, model.o], workingDir=/home/mcc/execution]
Link finished in 125 ms.
Running LTSmin : CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=1, --when, --ltl, [](<>([](<>(X((LTLAP0==true)))))), --buchi-type=spotba], workingDir=/home/mcc/execution]
WARNING : LTSmin timed out (>225 s) on command CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=1, --when, --ltl, [](<>([](<>(X((LTLAP0==true)))))), --buchi-type=spotba], workingDir=/home/mcc/execution]
Running LTSmin : CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=1, --when, --ltl, <>([](X(((LTLAP1==true))U((LTLAP2==true))))), --buchi-type=spotba], workingDir=/home/mcc/execution]
LTSmin run took 85 ms.
FORMULA LamportFastMutEx-PT-7-LTLFireability-01 FALSE TECHNIQUES PARTIAL_ORDER EXPLICIT LTSMIN SAT_SMT
Running LTSmin : CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=1, --when, --ltl, X(<>(<>(<>(X((LTLAP2==true)))))), --buchi-type=spotba], workingDir=/home/mcc/execution]
LTSmin run took 1838 ms.
FORMULA LamportFastMutEx-PT-7-LTLFireability-02 TRUE TECHNIQUES PARTIAL_ORDER EXPLICIT LTSMIN SAT_SMT
Running LTSmin : CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=1, --when, --ltl, <>(<>((X((LTLAP0==true)))U(<>((LTLAP3==true))))), --buchi-type=spotba], workingDir=/home/mcc/execution]
LTSmin run took 203 ms.
FORMULA LamportFastMutEx-PT-7-LTLFireability-03 FALSE TECHNIQUES PARTIAL_ORDER EXPLICIT LTSMIN SAT_SMT
Running LTSmin : CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=1, -p, --pins-guards, --when, --ltl, (LTLAP4==true), --buchi-type=spotba], workingDir=/home/mcc/execution]
LTSmin run took 531 ms.
FORMULA LamportFastMutEx-PT-7-LTLFireability-04 FALSE TECHNIQUES PARTIAL_ORDER EXPLICIT LTSMIN SAT_SMT
Running LTSmin : CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=1, -p, --pins-guards, --when, --ltl, (LTLAP5==true), --buchi-type=spotba], workingDir=/home/mcc/execution]
LTSmin run took 460 ms.
FORMULA LamportFastMutEx-PT-7-LTLFireability-05 FALSE TECHNIQUES PARTIAL_ORDER EXPLICIT LTSMIN SAT_SMT
Running LTSmin : CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=1, -p, --pins-guards, --when, --ltl, (LTLAP6==true), --buchi-type=spotba], workingDir=/home/mcc/execution]
LTSmin run took 483 ms.
FORMULA LamportFastMutEx-PT-7-LTLFireability-06 FALSE TECHNIQUES PARTIAL_ORDER EXPLICIT LTSMIN SAT_SMT
Running LTSmin : CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=1, --when, --ltl, X((((LTLAP3==true))U((LTLAP4==true)))U(<>(X((LTLAP7==true))))), --buchi-type=spotba], workingDir=/home/mcc/execution]
LTSmin run took 630 ms.
FORMULA LamportFastMutEx-PT-7-LTLFireability-07 FALSE TECHNIQUES PARTIAL_ORDER EXPLICIT LTSMIN SAT_SMT
Running LTSmin : CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=1, --when, --ltl, []((<>((LTLAP8==true)))U(X([]((LTLAP9==true))))), --buchi-type=spotba], workingDir=/home/mcc/execution]
LTSmin run took 59 ms.
FORMULA LamportFastMutEx-PT-7-LTLFireability-08 FALSE TECHNIQUES PARTIAL_ORDER EXPLICIT LTSMIN SAT_SMT
Running LTSmin : CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=1, --when, --ltl, <>(<>([](X(<>((LTLAP10==true)))))), --buchi-type=spotba], workingDir=/home/mcc/execution]
LTSmin run took 117 ms.
FORMULA LamportFastMutEx-PT-7-LTLFireability-09 FALSE TECHNIQUES PARTIAL_ORDER EXPLICIT LTSMIN SAT_SMT
Running LTSmin : CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=1, --when, --ltl, [](X([]((LTLAP11==true)))), --buchi-type=spotba], workingDir=/home/mcc/execution]
LTSmin run took 302 ms.
FORMULA LamportFastMutEx-PT-7-LTLFireability-10 FALSE TECHNIQUES PARTIAL_ORDER EXPLICIT LTSMIN SAT_SMT
Running LTSmin : CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=1, --when, --ltl, X((((LTLAP12==true))U((LTLAP13==true)))U(<>(X((LTLAP14==true))))), --buchi-type=spotba], workingDir=/home/mcc/execution]
LTSmin run took 226 ms.
FORMULA LamportFastMutEx-PT-7-LTLFireability-11 FALSE TECHNIQUES PARTIAL_ORDER EXPLICIT LTSMIN SAT_SMT
Running LTSmin : CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=1, --when, --ltl, (X(<>((LTLAP15==true))))U((LTLAP16==true)), --buchi-type=spotba], workingDir=/home/mcc/execution]
LTSmin run took 112 ms.
FORMULA LamportFastMutEx-PT-7-LTLFireability-12 FALSE TECHNIQUES PARTIAL_ORDER EXPLICIT LTSMIN SAT_SMT
Running LTSmin : CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=1, -p, --pins-guards, --when, --ltl, <>((LTLAP17==true)), --buchi-type=spotba], workingDir=/home/mcc/execution]
LTSmin run took 461 ms.
FORMULA LamportFastMutEx-PT-7-LTLFireability-13 FALSE TECHNIQUES PARTIAL_ORDER EXPLICIT LTSMIN SAT_SMT
Running LTSmin : CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=1, -p, --pins-guards, --when, --ltl, []((<>(<>((LTLAP18==true))))U(((LTLAP19==true))U((LTLAP20==true)))), --buchi-type=spotba], workingDir=/home/mcc/execution]
LTSmin run took 486 ms.
FORMULA LamportFastMutEx-PT-7-LTLFireability-14 FALSE TECHNIQUES PARTIAL_ORDER EXPLICIT LTSMIN SAT_SMT
Running LTSmin : CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=1, -p, --pins-guards, --when, --ltl, <>([]((<>((LTLAP16==true)))U([]((LTLAP21==true))))), --buchi-type=spotba], workingDir=/home/mcc/execution]
LTSmin run took 453 ms.
FORMULA LamportFastMutEx-PT-7-LTLFireability-15 FALSE TECHNIQUES PARTIAL_ORDER EXPLICIT LTSMIN SAT_SMT
Retrying LTSmin with larger timeout 1800 s
Running LTSmin : CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=1, --when, --ltl, [](<>([](<>(X((LTLAP0==true)))))), --buchi-type=spotba], workingDir=/home/mcc/execution]
sparsehash FATAL ERROR: failed to allocate 43 groups
WARNING : LTSmin timed out (>1800 s) on command CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=1, --when, --ltl, [](<>([](<>(X((LTLAP0==true)))))), --buchi-type=spotba], workingDir=/home/mcc/execution]

BK_STOP 1527486843252

--------------------
content from stderr:

+ export BINDIR=/home/mcc/BenchKit/
+ BINDIR=/home/mcc/BenchKit/
++ pwd
+ export MODEL=/home/mcc/execution
+ MODEL=/home/mcc/execution
+ /home/mcc/BenchKit//runeclipse.sh /home/mcc/execution LTLFireability -its -ltsminpath /home/mcc/BenchKit//lts_install_dir/ -smt
+ ulimit -s 65536
+ [[ -z '' ]]
+ export LTSMIN_MEM_SIZE=8589934592
+ LTSMIN_MEM_SIZE=8589934592
+ /home/mcc/BenchKit//itstools/its-tools -consoleLog -data /home/mcc/execution/workspace -pnfolder /home/mcc/execution -examination LTLFireability -z3path /home/mcc/BenchKit//z3/bin/z3 -yices2path /home/mcc/BenchKit//yices/bin/yices -its -ltsminpath /home/mcc/BenchKit//lts_install_dir/ -smt -vmargs -Dosgi.locking=none -Declipse.stateSaveDelayInterval=-1 -Dosgi.configuration.area=/tmp/.eclipse -Xss8m -Xms40m -Xmx8192m -Dfile.encoding=UTF-8 -Dosgi.requiredJavaVersion=1.6
May 28, 2018 5:13:20 AM fr.lip6.move.gal.application.Application start
INFO: Running its-tools with arguments : [-pnfolder, /home/mcc/execution, -examination, LTLFireability, -z3path, /home/mcc/BenchKit//z3/bin/z3, -yices2path, /home/mcc/BenchKit//yices/bin/yices, -its, -ltsminpath, /home/mcc/BenchKit//lts_install_dir/, -smt]
May 28, 2018 5:13:20 AM fr.lip6.move.gal.application.MccTranslator transformPNML
INFO: Parsing pnml file : /home/mcc/execution/model.pnml
May 28, 2018 5:13:20 AM fr.lip6.move.gal.nupn.PTNetReader loadFromXML
INFO: Load time of PNML (sax parser for PT used): 148 ms
May 28, 2018 5:13:20 AM fr.lip6.move.gal.pnml.togal.PTGALTransformer handlePage
INFO: Transformed 264 places.
May 28, 2018 5:13:21 AM fr.lip6.move.gal.pnml.togal.PTGALTransformer handlePage
INFO: Transformed 536 transitions.
May 28, 2018 5:13:21 AM fr.lip6.move.serialization.SerializationUtil systemToFile
INFO: Time to serialize gal into /home/mcc/execution/model.pnml.img.gal : 62 ms
May 28, 2018 5:13:21 AM fr.lip6.move.gal.instantiate.GALRewriter flatten
INFO: Flatten gal took : 201 ms
May 28, 2018 5:13:21 AM fr.lip6.move.serialization.SerializationUtil systemToFile
INFO: Time to serialize gal into /home/mcc/execution/LTLFireability.pnml.gal : 5 ms
May 28, 2018 5:13:21 AM fr.lip6.move.serialization.SerializationUtil serializePropertiesForITSLTLTools
INFO: Time to serialize properties into /home/mcc/execution/LTLFireability.ltl : 5 ms
May 28, 2018 5:13:22 AM fr.lip6.move.gal.semantics.DeterministicNextBuilder getDeterministicNext
INFO: Input system was already deterministic with 536 transitions.
May 28, 2018 5:13:23 AM fr.lip6.move.gal.gal2smt.bmc.KInductionSolver computeAndDeclareInvariants
INFO: Computed 82 place invariants in 105 ms
May 28, 2018 5:13:23 AM fr.lip6.move.gal.gal2smt.bmc.KInductionSolver init
INFO: Proved 264 variables to be positive in 646 ms
May 28, 2018 5:13:23 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver computeAblingMatrix
INFO: Computing symmetric may disable matrix : 536 transitions.
May 28, 2018 5:13:23 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of disable matrix completed :0/536 took 0 ms. Total solver calls (SAT/UNSAT): 0(0/0)
May 28, 2018 5:13:23 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of Complete disable matrix. took 54 ms. Total solver calls (SAT/UNSAT): 0(0/0)
May 28, 2018 5:13:23 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver computeAblingMatrix
INFO: Computing symmetric may enable matrix : 536 transitions.
May 28, 2018 5:13:23 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of Complete enable matrix. took 43 ms. Total solver calls (SAT/UNSAT): 0(0/0)
May 28, 2018 5:13:59 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver computeCoEnablingMatrix
INFO: Computing symmetric co enabling matrix : 536 transitions.
May 28, 2018 5:13:59 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(0/536) took 130 ms. Total solver calls (SAT/UNSAT): 73(0/73)
May 28, 2018 5:14:03 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(7/536) took 4205 ms. Total solver calls (SAT/UNSAT): 580(21/559)
May 28, 2018 5:14:08 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(14/536) took 9187 ms. Total solver calls (SAT/UNSAT): 1088(49/1039)
May 28, 2018 5:14:11 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(21/536) took 12294 ms. Total solver calls (SAT/UNSAT): 2201(49/2152)
May 28, 2018 5:14:15 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(22/536) took 16381 ms. Total solver calls (SAT/UNSAT): 2371(49/2322)
May 28, 2018 5:14:20 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(26/536) took 20727 ms. Total solver calls (SAT/UNSAT): 3041(88/2953)
May 28, 2018 5:14:23 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(28/536) took 24006 ms. Total solver calls (SAT/UNSAT): 3370(114/3256)
May 28, 2018 5:14:27 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(32/536) took 27674 ms. Total solver calls (SAT/UNSAT): 4016(165/3851)
May 28, 2018 5:14:33 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(36/536) took 34518 ms. Total solver calls (SAT/UNSAT): 4646(213/4433)
May 28, 2018 5:14:37 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(39/536) took 37765 ms. Total solver calls (SAT/UNSAT): 5108(249/4859)
May 28, 2018 5:14:40 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(42/536) took 41050 ms. Total solver calls (SAT/UNSAT): 5561(282/5279)
May 28, 2018 5:14:44 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(45/536) took 45364 ms. Total solver calls (SAT/UNSAT): 6005(315/5690)
May 28, 2018 5:14:48 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(50/536) took 49228 ms. Total solver calls (SAT/UNSAT): 6725(367/6358)
May 28, 2018 5:14:52 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(51/536) took 53311 ms. Total solver calls (SAT/UNSAT): 6866(377/6489)
May 28, 2018 5:14:56 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(52/536) took 56633 ms. Total solver calls (SAT/UNSAT): 7006(387/6619)
May 28, 2018 5:14:59 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(58/536) took 59945 ms. Total solver calls (SAT/UNSAT): 7825(444/7381)
May 28, 2018 5:15:03 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(64/536) took 64519 ms. Total solver calls (SAT/UNSAT): 8608(497/8111)
May 28, 2018 5:15:07 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(71/536) took 67701 ms. Total solver calls (SAT/UNSAT): 9476(553/8923)
May 28, 2018 5:15:10 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(80/536) took 71475 ms. Total solver calls (SAT/UNSAT): 10695(609/10086)
May 28, 2018 5:15:13 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(83/536) took 74552 ms. Total solver calls (SAT/UNSAT): 11550(609/10941)
May 28, 2018 5:15:18 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(86/536) took 78624 ms. Total solver calls (SAT/UNSAT): 12396(609/11787)
May 28, 2018 5:15:22 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(88/536) took 83134 ms. Total solver calls (SAT/UNSAT): 12955(663/12292)
May 28, 2018 5:15:27 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(93/536) took 87635 ms. Total solver calls (SAT/UNSAT): 14335(798/13537)
May 28, 2018 5:15:30 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(95/536) took 90690 ms. Total solver calls (SAT/UNSAT): 14880(850/14030)
May 28, 2018 5:15:34 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(97/536) took 95274 ms. Total solver calls (SAT/UNSAT): 15421(902/14519)
May 28, 2018 5:15:40 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(99/536) took 101050 ms. Total solver calls (SAT/UNSAT): 15958(954/15004)
May 28, 2018 5:15:46 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(102/536) took 106620 ms. Total solver calls (SAT/UNSAT): 16756(1030/15726)
May 28, 2018 5:15:49 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(105/536) took 109645 ms. Total solver calls (SAT/UNSAT): 17545(1105/16440)
May 28, 2018 5:15:52 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(114/536) took 112920 ms. Total solver calls (SAT/UNSAT): 19858(1323/18535)
May 28, 2018 5:15:57 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(117/536) took 118196 ms. Total solver calls (SAT/UNSAT): 20611(1392/19219)
May 28, 2018 5:16:01 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(119/536) took 122533 ms. Total solver calls (SAT/UNSAT): 21108(1438/19670)
May 28, 2018 5:16:06 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(120/536) took 127116 ms. Total solver calls (SAT/UNSAT): 21355(1461/19894)
May 28, 2018 5:16:09 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(122/536) took 130526 ms. Total solver calls (SAT/UNSAT): 21846(1506/20340)
May 28, 2018 5:16:14 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(124/536) took 134659 ms. Total solver calls (SAT/UNSAT): 22333(1550/20783)
May 28, 2018 5:16:18 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(126/536) took 139375 ms. Total solver calls (SAT/UNSAT): 22816(1594/21222)
May 28, 2018 5:16:21 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(127/536) took 142388 ms. Total solver calls (SAT/UNSAT): 23056(1616/21440)
May 28, 2018 5:16:27 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(130/536) took 147694 ms. Total solver calls (SAT/UNSAT): 23770(1680/22090)
May 28, 2018 5:16:32 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(131/536) took 152589 ms. Total solver calls (SAT/UNSAT): 24006(1701/22305)
May 28, 2018 5:16:36 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(132/536) took 157008 ms. Total solver calls (SAT/UNSAT): 24241(1722/22519)
May 28, 2018 5:16:41 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(133/536) took 161857 ms. Total solver calls (SAT/UNSAT): 24475(1743/22732)
May 28, 2018 5:16:45 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(134/536) took 166501 ms. Total solver calls (SAT/UNSAT): 24708(1764/22944)
May 28, 2018 5:16:50 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(135/536) took 171171 ms. Total solver calls (SAT/UNSAT): 24940(1785/23155)
May 28, 2018 5:16:54 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(143/536) took 174591 ms. Total solver calls (SAT/UNSAT): 25384(1806/23578)
May 28, 2018 5:16:57 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(145/536) took 178047 ms. Total solver calls (SAT/UNSAT): 25495(1813/23682)
May 28, 2018 5:17:01 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(153/536) took 181622 ms. Total solver calls (SAT/UNSAT): 26285(1868/24417)
May 28, 2018 5:17:04 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(155/536) took 185136 ms. Total solver calls (SAT/UNSAT): 26738(1933/24805)
May 28, 2018 5:17:08 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(156/536) took 188620 ms. Total solver calls (SAT/UNSAT): 26963(1964/24999)
May 28, 2018 5:17:11 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(164/536) took 192254 ms. Total solver calls (SAT/UNSAT): 28727(2153/26574)
May 28, 2018 5:17:14 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(169/536) took 195328 ms. Total solver calls (SAT/UNSAT): 29797(2219/27578)
May 28, 2018 5:17:17 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(177/536) took 198562 ms. Total solver calls (SAT/UNSAT): 31457(2259/29198)
May 28, 2018 5:17:21 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(182/536) took 202433 ms. Total solver calls (SAT/UNSAT): 32462(2359/30103)
May 28, 2018 5:17:25 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(184/536) took 206542 ms. Total solver calls (SAT/UNSAT): 32857(2398/30459)
May 28, 2018 5:17:30 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(185/536) took 210762 ms. Total solver calls (SAT/UNSAT): 33053(2417/30636)
May 28, 2018 5:17:34 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(189/536) took 214686 ms. Total solver calls (SAT/UNSAT): 33827(2493/31334)
May 28, 2018 5:17:39 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(190/536) took 220299 ms. Total solver calls (SAT/UNSAT): 34018(2512/31506)
May 28, 2018 5:17:43 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(194/536) took 224406 ms. Total solver calls (SAT/UNSAT): 34772(2585/32187)
May 28, 2018 5:17:50 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(198/536) took 230837 ms. Total solver calls (SAT/UNSAT): 35510(2657/32853)
May 28, 2018 5:17:54 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(206/536) took 234601 ms. Total solver calls (SAT/UNSAT): 36938(2794/34144)
May 28, 2018 5:17:57 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(217/536) took 238278 ms. Total solver calls (SAT/UNSAT): 38797(2969/35828)
May 28, 2018 5:18:02 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(221/536) took 242653 ms. Total solver calls (SAT/UNSAT): 39443(3029/36414)
May 28, 2018 5:18:08 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(223/536) took 248926 ms. Total solver calls (SAT/UNSAT): 39760(3059/36701)
May 28, 2018 5:18:13 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(224/536) took 254449 ms. Total solver calls (SAT/UNSAT): 39917(3073/36844)
May 28, 2018 5:18:17 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(227/536) took 258497 ms. Total solver calls (SAT/UNSAT): 40382(3115/37267)
May 28, 2018 5:18:22 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(242/536) took 262939 ms. Total solver calls (SAT/UNSAT): 41956(3196/38760)
May 28, 2018 5:18:26 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(246/536) took 266690 ms. Total solver calls (SAT/UNSAT): 42278(3220/39058)
May 28, 2018 5:18:29 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(250/536) took 270440 ms. Total solver calls (SAT/UNSAT): 42584(3241/39343)
May 28, 2018 5:18:33 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(257/536) took 273770 ms. Total solver calls (SAT/UNSAT): 43081(3274/39807)
May 28, 2018 5:18:36 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(263/536) took 276799 ms. Total solver calls (SAT/UNSAT): 43468(3298/40170)
May 28, 2018 5:18:39 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(267/536) took 280350 ms. Total solver calls (SAT/UNSAT): 43706(3310/40396)
May 28, 2018 5:18:44 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(271/536) took 284752 ms. Total solver calls (SAT/UNSAT): 43928(3322/40606)
May 28, 2018 5:18:48 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(275/536) took 288789 ms. Total solver calls (SAT/UNSAT): 44134(3330/40804)
May 28, 2018 5:18:51 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(278/536) took 291946 ms. Total solver calls (SAT/UNSAT): 44278(3336/40942)
May 28, 2018 5:18:54 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(298/536) took 295000 ms. Total solver calls (SAT/UNSAT): 45058(3381/41677)
May 28, 2018 5:18:57 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(335/536) took 298106 ms. Total solver calls (SAT/UNSAT): 46214(3526/42688)
May 28, 2018 5:19:00 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(350/536) took 301170 ms. Total solver calls (SAT/UNSAT): 46649(3625/43024)
May 28, 2018 5:19:04 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(360/536) took 304762 ms. Total solver calls (SAT/UNSAT): 46922(3670/43252)
May 28, 2018 5:19:07 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(382/536) took 307799 ms. Total solver calls (SAT/UNSAT): 47437(3731/43706)
May 28, 2018 5:19:10 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(387/536) took 311136 ms. Total solver calls (SAT/UNSAT): 47970(3731/44239)
May 28, 2018 5:19:13 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(392/536) took 314219 ms. Total solver calls (SAT/UNSAT): 48590(3758/44832)
May 28, 2018 5:19:17 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(395/536) took 317749 ms. Total solver calls (SAT/UNSAT): 48950(3797/45153)
May 28, 2018 5:19:20 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(401/536) took 321145 ms. Total solver calls (SAT/UNSAT): 49643(3873/45770)
May 28, 2018 5:19:24 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(408/536) took 324689 ms. Total solver calls (SAT/UNSAT): 50406(3956/46450)
May 28, 2018 5:19:27 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(417/536) took 328158 ms. Total solver calls (SAT/UNSAT): 51315(4053/47262)
May 28, 2018 5:19:32 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(420/536) took 333394 ms. Total solver calls (SAT/UNSAT): 51600(4083/47517)
May 28, 2018 5:19:36 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(427/536) took 336639 ms. Total solver calls (SAT/UNSAT): 52230(4149/48081)
May 28, 2018 5:19:39 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(432/536) took 340436 ms. Total solver calls (SAT/UNSAT): 52650(4193/48457)
May 28, 2018 5:19:42 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(441/536) took 343506 ms. Total solver calls (SAT/UNSAT): 53343(4256/49087)
May 28, 2018 5:19:46 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(443/536) took 346608 ms. Total solver calls (SAT/UNSAT): 53486(4270/49216)
May 28, 2018 5:19:49 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(463/536) took 350067 ms. Total solver calls (SAT/UNSAT): 54360(4298/50062)
May 28, 2018 5:19:52 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(477/536) took 353191 ms. Total solver calls (SAT/UNSAT): 55067(4376/50691)
May 28, 2018 5:19:55 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(499/536) took 356197 ms. Total solver calls (SAT/UNSAT): 55782(4450/51332)
May 28, 2018 5:19:58 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(512/536) took 359334 ms. Total solver calls (SAT/UNSAT): 55977(4466/51511)
May 28, 2018 5:19:59 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of Finished co-enabling matrix. took 360291 ms. Total solver calls (SAT/UNSAT): 56020(4466/51554)
May 28, 2018 5:19:59 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver computeDoNotAccord
INFO: Computing Do-Not-Accords matrix : 536 transitions.
May 28, 2018 5:19:59 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of Completed DNA matrix. took 57 ms. Total solver calls (SAT/UNSAT): 0(0/0)
May 28, 2018 5:19:59 AM fr.lip6.move.gal.gal2pins.Gal2PinsTransformerNext transform
INFO: Built C files in 397770ms conformant to PINS in folder :/home/mcc/execution
ITS-tools command line returned an error code 1

Sequence of Actions to be Executed by the VM

This is useful if one wants to reexecute the tool in the VM from the submitted image disk.

set -x
# this is for BenchKit: configuration of major elements for the test
export BK_INPUT="LamportFastMutEx-PT-7"
export BK_EXAMINATION="LTLFireability"
export BK_TOOL="itstools"
export BK_RESULT_DIR="/tmp/BK_RESULTS/OUTPUTS"
export BK_TIME_CONFINEMENT="3600"
export BK_MEMORY_CONFINEMENT="16384"

# this is specific to your benchmark or test

export BIN_DIR="$HOME/BenchKit/bin"

# remove the execution directoty if it exists (to avoid increse of .vmdk images)
if [ -d execution ] ; then
rm -rf execution
fi

tar xzf /home/mcc/BenchKit/INPUTS/LamportFastMutEx-PT-7.tgz
mv LamportFastMutEx-PT-7 execution
cd execution
pwd
ls -lh

# this is for BenchKit: explicit launching of the test
echo "====================================================================="
echo " Generated by BenchKit 2-3637"
echo " Executing tool itstools"
echo " Input is LamportFastMutEx-PT-7, examination is LTLFireability"
echo " Time confinement is $BK_TIME_CONFINEMENT seconds"
echo " Memory confinement is 16384 MBytes"
echo " Number of cores is 4"
echo " Run identifier is r260-csrt-152732585200042"
echo "====================================================================="
echo
echo "--------------------"
echo "content from stdout:"
echo
echo "=== Data for post analysis generated by BenchKit (invocation template)"
echo
if [ "LTLFireability" = "UpperBounds" ] ; then
echo "The expected result is a vector of positive values"
echo NUM_VECTOR
elif [ "LTLFireability" != "StateSpace" ] ; then
echo "The expected result is a vector of booleans"
echo BOOL_VECTOR
else
echo "no data necessary for post analysis"
fi
echo
if [ -f "LTLFireability.txt" ] ; then
echo "here is the order used to build the result vector(from text file)"
for x in $(grep Property LTLFireability.txt | cut -d ' ' -f 2 | sort -u) ; do
echo "FORMULA_NAME $x"
done
elif [ -f "LTLFireability.xml" ] ; then # for cunf (txt files deleted;-)
echo echo "here is the order used to build the result vector(from xml file)"
for x in $(grep '' LTLFireability.xml | cut -d '>' -f 2 | cut -d '<' -f 1 | sort -u) ; do
echo "FORMULA_NAME $x"
done
fi
echo
echo "=== Now, execution of the tool begins"
echo
echo -n "BK_START "
date -u +%s%3N
echo
timeout -s 9 $BK_TIME_CONFINEMENT bash -c "/home/mcc/BenchKit/BenchKit_head.sh 2> STDERR ; echo ; echo -n \"BK_STOP \" ; date -u +%s%3N"
if [ $? -eq 137 ] ; then
echo
echo "BK_TIME_CONFINEMENT_REACHED"
fi
echo
echo "--------------------"
echo "content from stderr:"
echo
cat STDERR ;