Execution Chart

We display below the execution chart for this examination (boot time has been removed).

Trace from the execution

Waiting for the VM to be ready (probing ssh)
..........................................................
/home/mcc/execution
total 568K
-rw-r--r-- 1 mcc users 8.8K May 15 18:54 CTLCardinality.txt
-rw-r--r-- 1 mcc users 39K May 15 18:54 CTLCardinality.xml
-rw-r--r-- 1 mcc users 15K May 15 18:54 CTLFireability.txt
-rw-r--r-- 1 mcc users 64K May 15 18:54 CTLFireability.xml
-rw-r--r-- 1 mcc users 4.0K May 15 18:50 GenericPropertiesDefinition.xml
-rw-r--r-- 1 mcc users 6.3K May 15 18:50 GenericPropertiesVerdict.xml
-rw-r--r-- 1 mcc users 4.5K May 26 09:26 LTLCardinality.txt
-rw-r--r-- 1 mcc users 17K May 26 09:26 LTLCardinality.xml
-rw-r--r-- 1 mcc users 6.4K May 26 09:26 LTLFireability.txt
-rw-r--r-- 1 mcc users 26K May 26 09:26 LTLFireability.xml
-rw-r--r-- 1 mcc users 8.5K May 15 18:54 ReachabilityCardinality.txt
-rw-r--r-- 1 mcc users 36K May 15 18:54 ReachabilityCardinality.xml
-rw-r--r-- 1 mcc users 112 May 15 18:54 ReachabilityDeadlock.txt
-rw-r--r-- 1 mcc users 350 May 15 18:54 ReachabilityDeadlock.xml
-rw-r--r-- 1 mcc users 15K May 15 18:54 ReachabilityFireability.txt
-rw-r--r-- 1 mcc users 63K May 15 18:54 ReachabilityFireability.xml
-rw-r--r-- 1 mcc users 2.4K May 15 18:54 UpperBounds.txt
-rw-r--r-- 1 mcc users 5.6K May 15 18:54 UpperBounds.xml
-rw-r--r-- 1 mcc users 5 May 15 18:50 equiv_col
-rw-r--r-- 1 mcc users 2 May 15 18:50 instance
-rw-r--r-- 1 mcc users 6 May 15 18:50 iscolored
-rw-r--r-- 1 mcc users 200K May 15 18:50 model.pnml
=====================================================================
Generated by BenchKit 2-3637
Executing tool itstools
Input is LamportFastMutEx-PT-6, examination is LTLFireability
Time confinement is 3600 seconds
Memory confinement is 16384 MBytes
Number of cores is 4
Run identifier is r260-csrt-152732585200040
=====================================================================

--------------------
content from stdout:

=== Data for post analysis generated by BenchKit (invocation template)

The expected result is a vector of booleans
BOOL_VECTOR

here is the order used to build the result vector(from text file)
FORMULA_NAME LamportFastMutEx-PT-6-LTLFireability-00
FORMULA_NAME LamportFastMutEx-PT-6-LTLFireability-01
FORMULA_NAME LamportFastMutEx-PT-6-LTLFireability-02
FORMULA_NAME LamportFastMutEx-PT-6-LTLFireability-03
FORMULA_NAME LamportFastMutEx-PT-6-LTLFireability-04
FORMULA_NAME LamportFastMutEx-PT-6-LTLFireability-05
FORMULA_NAME LamportFastMutEx-PT-6-LTLFireability-06
FORMULA_NAME LamportFastMutEx-PT-6-LTLFireability-07
FORMULA_NAME LamportFastMutEx-PT-6-LTLFireability-08
FORMULA_NAME LamportFastMutEx-PT-6-LTLFireability-09
FORMULA_NAME LamportFastMutEx-PT-6-LTLFireability-10
FORMULA_NAME LamportFastMutEx-PT-6-LTLFireability-11
FORMULA_NAME LamportFastMutEx-PT-6-LTLFireability-12
FORMULA_NAME LamportFastMutEx-PT-6-LTLFireability-13
FORMULA_NAME LamportFastMutEx-PT-6-LTLFireability-14
FORMULA_NAME LamportFastMutEx-PT-6-LTLFireability-15

=== Now, execution of the tool begins

BK_START 1527484384001

Using solver Z3 to compute partial order matrices.
Built C files in :
/home/mcc/execution
Invoking ITS tools like this :CommandLine [args=[/home/mcc/BenchKit/itstools/plugins/fr.lip6.move.gal.itstools.binaries_1.0.0.201805151631/bin/its-ltl-linux64, --gc-threshold, 2000000, -i, /home/mcc/execution/LTLFireability.pnml.gal, -t, CGAL, -LTL, /home/mcc/execution/LTLFireability.ltl, -c, -stutter-deadlock], workingDir=/home/mcc/execution]

its-ltl command run as :

/home/mcc/BenchKit/itstools/plugins/fr.lip6.move.gal.itstools.binaries_1.0.0.201805151631/bin/its-ltl-linux64 --gc-threshold 2000000 -i /home/mcc/execution/LTLFireability.pnml.gal -t CGAL -LTL /home/mcc/execution/LTLFireability.ltl -c -stutter-deadlock
Read 16 LTL properties
Checking formula 0 : !((("(((((((((((((((((((((((((((((((((((((((((((y_1>=1)&&(P_ifyi_15_0>=1))||((y_2>=1)&&(P_ifyi_15_0>=1)))||((y_3>=1)&&(P_ifyi_15_0>=1)))||((y_4>=1)&&(P_ifyi_15_0>=1)))||((y_5>=1)&&(P_ifyi_15_0>=1)))||((y_6>=1)&&(P_ifyi_15_0>=1)))||((y_0>=1)&&(P_ifyi_15_1>=1)))||((y_2>=1)&&(P_ifyi_15_1>=1)))||((y_3>=1)&&(P_ifyi_15_1>=1)))||((y_4>=1)&&(P_ifyi_15_1>=1)))||((y_5>=1)&&(P_ifyi_15_1>=1)))||((y_6>=1)&&(P_ifyi_15_1>=1)))||((y_0>=1)&&(P_ifyi_15_2>=1)))||((y_1>=1)&&(P_ifyi_15_2>=1)))||((y_3>=1)&&(P_ifyi_15_2>=1)))||((y_4>=1)&&(P_ifyi_15_2>=1)))||((y_5>=1)&&(P_ifyi_15_2>=1)))||((y_6>=1)&&(P_ifyi_15_2>=1)))||((y_0>=1)&&(P_ifyi_15_3>=1)))||((y_1>=1)&&(P_ifyi_15_3>=1)))||((y_2>=1)&&(P_ifyi_15_3>=1)))||((y_4>=1)&&(P_ifyi_15_3>=1)))||((y_5>=1)&&(P_ifyi_15_3>=1)))||((y_6>=1)&&(P_ifyi_15_3>=1)))||((y_0>=1)&&(P_ifyi_15_4>=1)))||((y_1>=1)&&(P_ifyi_15_4>=1)))||((y_2>=1)&&(P_ifyi_15_4>=1)))||((y_3>=1)&&(P_ifyi_15_4>=1)))||((y_5>=1)&&(P_ifyi_15_4>=1)))||((y_6>=1)&&(P_ifyi_15_4>=1)))||((y_0>=1)&&(P_ifyi_15_5>=1)))||((y_1>=1)&&(P_ifyi_15_5>=1)))||((y_2>=1)&&(P_ifyi_15_5>=1)))||((y_3>=1)&&(P_ifyi_15_5>=1)))||((y_4>=1)&&(P_ifyi_15_5>=1)))||((y_6>=1)&&(P_ifyi_15_5>=1)))||((y_0>=1)&&(P_ifyi_15_6>=1)))||((y_1>=1)&&(P_ifyi_15_6>=1)))||((y_2>=1)&&(P_ifyi_15_6>=1)))||((y_3>=1)&&(P_ifyi_15_6>=1)))||((y_4>=1)&&(P_ifyi_15_6>=1)))||((y_5>=1)&&(P_ifyi_15_6>=1)))")U(X(X(F("(((((((((((((((((((((((((((((((((((((((((((y_1>=1)&&(P_ifyi_15_0>=1))||((y_2>=1)&&(P_ifyi_15_0>=1)))||((y_3>=1)&&(P_ifyi_15_0>=1)))||((y_4>=1)&&(P_ifyi_15_0>=1)))||((y_5>=1)&&(P_ifyi_15_0>=1)))||((y_6>=1)&&(P_ifyi_15_0>=1)))||((y_0>=1)&&(P_ifyi_15_1>=1)))||((y_2>=1)&&(P_ifyi_15_1>=1)))||((y_3>=1)&&(P_ifyi_15_1>=1)))||((y_4>=1)&&(P_ifyi_15_1>=1)))||((y_5>=1)&&(P_ifyi_15_1>=1)))||((y_6>=1)&&(P_ifyi_15_1>=1)))||((y_0>=1)&&(P_ifyi_15_2>=1)))||((y_1>=1)&&(P_ifyi_15_2>=1)))||((y_3>=1)&&(P_ifyi_15_2>=1)))||((y_4>=1)&&(P_ifyi_15_2>=1)))||((y_5>=1)&&(P_ifyi_15_2>=1)))||((y_6>=1)&&(P_ifyi_15_2>=1)))||((y_0>=1)&&(P_ifyi_15_3>=1)))||((y_1>=1)&&(P_ifyi_15_3>=1)))||((y_2>=1)&&(P_ifyi_15_3>=1)))||((y_4>=1)&&(P_ifyi_15_3>=1)))||((y_5>=1)&&(P_ifyi_15_3>=1)))||((y_6>=1)&&(P_ifyi_15_3>=1)))||((y_0>=1)&&(P_ifyi_15_4>=1)))||((y_1>=1)&&(P_ifyi_15_4>=1)))||((y_2>=1)&&(P_ifyi_15_4>=1)))||((y_3>=1)&&(P_ifyi_15_4>=1)))||((y_5>=1)&&(P_ifyi_15_4>=1)))||((y_6>=1)&&(P_ifyi_15_4>=1)))||((y_0>=1)&&(P_ifyi_15_5>=1)))||((y_1>=1)&&(P_ifyi_15_5>=1)))||((y_2>=1)&&(P_ifyi_15_5>=1)))||((y_3>=1)&&(P_ifyi_15_5>=1)))||((y_4>=1)&&(P_ifyi_15_5>=1)))||((y_6>=1)&&(P_ifyi_15_5>=1)))||((y_0>=1)&&(P_ifyi_15_6>=1)))||((y_1>=1)&&(P_ifyi_15_6>=1)))||((y_2>=1)&&(P_ifyi_15_6>=1)))||((y_3>=1)&&(P_ifyi_15_6>=1)))||((y_4>=1)&&(P_ifyi_15_6>=1)))||((y_5>=1)&&(P_ifyi_15_6>=1)))"))))))
Formula 0 simplified : !("(((((((((((((((((((((((((((((((((((((((((((y_1>=1)&&(P_ifyi_15_0>=1))||((y_2>=1)&&(P_ifyi_15_0>=1)))||((y_3>=1)&&(P_ifyi_15_0>=1)))||((y_4>=1)&&(P_ifyi_15_0>=1)))||((y_5>=1)&&(P_ifyi_15_0>=1)))||((y_6>=1)&&(P_ifyi_15_0>=1)))||((y_0>=1)&&(P_ifyi_15_1>=1)))||((y_2>=1)&&(P_ifyi_15_1>=1)))||((y_3>=1)&&(P_ifyi_15_1>=1)))||((y_4>=1)&&(P_ifyi_15_1>=1)))||((y_5>=1)&&(P_ifyi_15_1>=1)))||((y_6>=1)&&(P_ifyi_15_1>=1)))||((y_0>=1)&&(P_ifyi_15_2>=1)))||((y_1>=1)&&(P_ifyi_15_2>=1)))||((y_3>=1)&&(P_ifyi_15_2>=1)))||((y_4>=1)&&(P_ifyi_15_2>=1)))||((y_5>=1)&&(P_ifyi_15_2>=1)))||((y_6>=1)&&(P_ifyi_15_2>=1)))||((y_0>=1)&&(P_ifyi_15_3>=1)))||((y_1>=1)&&(P_ifyi_15_3>=1)))||((y_2>=1)&&(P_ifyi_15_3>=1)))||((y_4>=1)&&(P_ifyi_15_3>=1)))||((y_5>=1)&&(P_ifyi_15_3>=1)))||((y_6>=1)&&(P_ifyi_15_3>=1)))||((y_0>=1)&&(P_ifyi_15_4>=1)))||((y_1>=1)&&(P_ifyi_15_4>=1)))||((y_2>=1)&&(P_ifyi_15_4>=1)))||((y_3>=1)&&(P_ifyi_15_4>=1)))||((y_5>=1)&&(P_ifyi_15_4>=1)))||((y_6>=1)&&(P_ifyi_15_4>=1)))||((y_0>=1)&&(P_ifyi_15_5>=1)))||((y_1>=1)&&(P_ifyi_15_5>=1)))||((y_2>=1)&&(P_ifyi_15_5>=1)))||((y_3>=1)&&(P_ifyi_15_5>=1)))||((y_4>=1)&&(P_ifyi_15_5>=1)))||((y_6>=1)&&(P_ifyi_15_5>=1)))||((y_0>=1)&&(P_ifyi_15_6>=1)))||((y_1>=1)&&(P_ifyi_15_6>=1)))||((y_2>=1)&&(P_ifyi_15_6>=1)))||((y_3>=1)&&(P_ifyi_15_6>=1)))||((y_4>=1)&&(P_ifyi_15_6>=1)))||((y_5>=1)&&(P_ifyi_15_6>=1)))" U XXF"(((((((((((((((((((((((((((((((((((((((((((y_1>=1)&&(P_ifyi_15_0>=1))||((y_2>=1)&&(P_ifyi_15_0>=1)))||((y_3>=1)&&(P_ifyi_15_0>=1)))||((y_4>=1)&&(P_ifyi_15_0>=1)))||((y_5>=1)&&(P_ifyi_15_0>=1)))||((y_6>=1)&&(P_ifyi_15_0>=1)))||((y_0>=1)&&(P_ifyi_15_1>=1)))||((y_2>=1)&&(P_ifyi_15_1>=1)))||((y_3>=1)&&(P_ifyi_15_1>=1)))||((y_4>=1)&&(P_ifyi_15_1>=1)))||((y_5>=1)&&(P_ifyi_15_1>=1)))||((y_6>=1)&&(P_ifyi_15_1>=1)))||((y_0>=1)&&(P_ifyi_15_2>=1)))||((y_1>=1)&&(P_ifyi_15_2>=1)))||((y_3>=1)&&(P_ifyi_15_2>=1)))||((y_4>=1)&&(P_ifyi_15_2>=1)))||((y_5>=1)&&(P_ifyi_15_2>=1)))||((y_6>=1)&&(P_ifyi_15_2>=1)))||((y_0>=1)&&(P_ifyi_15_3>=1)))||((y_1>=1)&&(P_ifyi_15_3>=1)))||((y_2>=1)&&(P_ifyi_15_3>=1)))||((y_4>=1)&&(P_ifyi_15_3>=1)))||((y_5>=1)&&(P_ifyi_15_3>=1)))||((y_6>=1)&&(P_ifyi_15_3>=1)))||((y_0>=1)&&(P_ifyi_15_4>=1)))||((y_1>=1)&&(P_ifyi_15_4>=1)))||((y_2>=1)&&(P_ifyi_15_4>=1)))||((y_3>=1)&&(P_ifyi_15_4>=1)))||((y_5>=1)&&(P_ifyi_15_4>=1)))||((y_6>=1)&&(P_ifyi_15_4>=1)))||((y_0>=1)&&(P_ifyi_15_5>=1)))||((y_1>=1)&&(P_ifyi_15_5>=1)))||((y_2>=1)&&(P_ifyi_15_5>=1)))||((y_3>=1)&&(P_ifyi_15_5>=1)))||((y_4>=1)&&(P_ifyi_15_5>=1)))||((y_6>=1)&&(P_ifyi_15_5>=1)))||((y_0>=1)&&(P_ifyi_15_6>=1)))||((y_1>=1)&&(P_ifyi_15_6>=1)))||((y_2>=1)&&(P_ifyi_15_6>=1)))||((y_3>=1)&&(P_ifyi_15_6>=1)))||((y_4>=1)&&(P_ifyi_15_6>=1)))||((y_5>=1)&&(P_ifyi_15_6>=1)))")
Presburger conditions satisfied. Using coverability to approximate state space in K-Induction.
Normalized transition count is 315
// Phase 1: matrix 315 rows 217 cols
invariant :P_wait_5_6 + -1'P_await_13_5 + P_done_5_6 = 0
invariant :P_wait_3_3 + -1'P_await_13_3 + P_done_3_3 = 0
invariant :P_wait_0_3 + -1'P_await_13_0 + P_done_0_3 = 0
invariant :P_wait_6_5 + -1'P_await_13_6 + P_done_6_5 = 0
invariant :P_b_1_false + P_b_1_true = 1
invariant :P_wait_2_0 + P_done_2_0 = 0
invariant :P_wait_6_6 + -1'P_await_13_6 + P_done_6_6 = 0
invariant :P_wait_4_5 + -1'P_await_13_4 + P_done_4_5 = 0
invariant :P_wait_5_3 + -1'P_await_13_5 + P_done_5_3 = 0
invariant :P_wait_3_2 + -1'P_await_13_3 + P_done_3_2 = 0
invariant :P_wait_0_0 + P_done_0_0 = 0
invariant :P_wait_3_4 + -1'P_await_13_3 + P_done_3_4 = 0
invariant :P_wait_1_0 + P_done_1_0 = 0
invariant :P_start_1_5 + P_setx_3_5 + P_setbi_5_5 + P_ify0_4_5 + P_sety_9_5 + P_ifxi_10_5 + P_setbi_11_5 + P_fordo_12_5 + P_await_13_5 + P_ifyi_15_5 + P_awaity_5 + P_CS_21_5 + P_setbi_24_5 = 1
invariant :P_wait_3_5 + -1'P_await_13_3 + P_done_3_5 = 0
invariant :P_wait_4_3 + -1'P_await_13_4 + P_done_4_3 = 0
invariant :P_wait_2_1 + -1'P_await_13_2 + P_done_2_1 = 0
invariant :P_wait_0_5 + -1'P_await_13_0 + P_done_0_5 = 0
invariant :P_wait_1_1 + -1'P_await_13_1 + P_done_1_1 = 0
invariant :P_b_4_false + P_b_4_true = 1
invariant :P_wait_5_2 + -1'P_await_13_5 + P_done_5_2 = 0
invariant :P_wait_1_5 + -1'P_await_13_1 + P_done_1_5 = 0
invariant :P_wait_4_0 + P_done_4_0 = 0
invariant :P_wait_5_4 + -1'P_await_13_5 + P_done_5_4 = 0
invariant :P_wait_4_4 + -1'P_await_13_4 + P_done_4_4 = 0
invariant :P_start_1_4 + P_setx_3_4 + P_setbi_5_4 + P_ify0_4_4 + P_sety_9_4 + P_ifxi_10_4 + P_setbi_11_4 + P_fordo_12_4 + P_await_13_4 + P_ifyi_15_4 + P_awaity_4 + P_CS_21_4 + P_setbi_24_4 = 1
invariant :P_wait_4_1 + -1'P_await_13_4 + P_done_4_1 = 0
invariant :P_wait_2_4 + -1'P_await_13_2 + P_done_2_4 = 0
invariant :P_wait_1_4 + -1'P_await_13_1 + P_done_1_4 = 0
invariant :P_start_1_3 + P_setx_3_3 + P_setbi_5_3 + P_ify0_4_3 + P_sety_9_3 + P_ifxi_10_3 + P_setbi_11_3 + P_fordo_12_3 + P_await_13_3 + P_ifyi_15_3 + P_awaity_3 + P_CS_21_3 + P_setbi_24_3 = 1
invariant :P_wait_5_5 + -1'P_await_13_5 + P_done_5_5 = 0
invariant :x_0 + x_1 + x_2 + x_3 + x_4 + x_5 + x_6 = 1
invariant :P_wait_0_1 + -1'P_await_13_0 + P_done_0_1 = 0
invariant :P_wait_5_1 + -1'P_await_13_5 + P_done_5_1 = 0
invariant :P_wait_2_3 + -1'P_await_13_2 + P_done_2_3 = 0
invariant :P_b_6_false + P_b_6_true = 1
invariant :P_wait_2_5 + -1'P_await_13_2 + P_done_2_5 = 0
invariant :P_start_1_0 + P_setx_3_0 + P_setbi_5_0 + P_ify0_4_0 + P_sety_9_0 + P_ifxi_10_0 + P_setbi_11_0 + P_fordo_12_0 + P_await_13_0 + P_ifyi_15_0 + P_awaity_0 + P_CS_21_0 + P_setbi_24_0 = 0
invariant :P_wait_3_0 + P_done_3_0 = 0
invariant :P_b_5_false + P_b_5_true = 1
invariant :P_wait_3_1 + -1'P_await_13_3 + P_done_3_1 = 0
invariant :P_start_1_2 + P_setx_3_2 + P_setbi_5_2 + P_ify0_4_2 + P_sety_9_2 + P_ifxi_10_2 + P_setbi_11_2 + P_fordo_12_2 + P_await_13_2 + P_ifyi_15_2 + P_awaity_2 + P_CS_21_2 + P_setbi_24_2 = 1
invariant :P_wait_4_2 + -1'P_await_13_4 + P_done_4_2 = 0
invariant :P_b_2_false + P_b_2_true = 1
invariant :P_wait_0_2 + -1'P_await_13_0 + P_done_0_2 = 0
invariant :P_wait_1_2 + -1'P_await_13_1 + P_done_1_2 = 0
invariant :P_wait_3_6 + -1'P_await_13_3 + P_done_3_6 = 0
invariant :P_wait_1_6 + -1'P_await_13_1 + P_done_1_6 = 0
invariant :P_wait_5_0 + P_done_5_0 = 0
invariant :P_wait_4_6 + -1'P_await_13_4 + P_done_4_6 = 0
invariant :P_wait_1_3 + -1'P_await_13_1 + P_done_1_3 = 0
invariant :P_wait_2_6 + -1'P_await_13_2 + P_done_2_6 = 0
invariant :P_start_1_6 + P_setx_3_6 + P_setbi_5_6 + P_ify0_4_6 + P_sety_9_6 + P_ifxi_10_6 + P_setbi_11_6 + P_fordo_12_6 + P_await_13_6 + P_ifyi_15_6 + P_awaity_6 + P_CS_21_6 + P_setbi_24_6 = 1
invariant :P_wait_6_2 + -1'P_await_13_6 + P_done_6_2 = 0
invariant :P_wait_6_0 + P_done_6_0 = 0
invariant :P_wait_6_4 + -1'P_await_13_6 + P_done_6_4 = 0
invariant :P_b_3_false + P_b_3_true = 1
invariant :P_wait_2_2 + -1'P_await_13_2 + P_done_2_2 = 0
invariant :P_wait_6_1 + -1'P_await_13_6 + P_done_6_1 = 0
invariant :P_b_0_false + P_b_0_true = 0
invariant :P_wait_6_3 + -1'P_await_13_6 + P_done_6_3 = 0
invariant :P_start_1_1 + P_setx_3_1 + P_setbi_5_1 + P_ify0_4_1 + P_sety_9_1 + P_ifxi_10_1 + P_setbi_11_1 + P_fordo_12_1 + P_await_13_1 + P_ifyi_15_1 + P_awaity_1 + P_CS_21_1 + P_setbi_24_1 = 1
invariant :P_wait_0_6 + -1'P_await_13_0 + P_done_0_6 = 0
invariant :y_0 + y_1 + y_2 + y_3 + y_4 + y_5 + y_6 = 1
invariant :P_wait_0_4 + -1'P_await_13_0 + P_done_0_4 = 0
Running compilation step : CommandLine [args=[gcc, -c, -I/home/mcc/BenchKit//lts_install_dir//include, -I., -std=c99, -fPIC, -O3, model.c], workingDir=/home/mcc/execution]
Compilation finished in 5747 ms.
Running link step : CommandLine [args=[gcc, -shared, -o, gal.so, model.o], workingDir=/home/mcc/execution]
Link finished in 61 ms.
Running LTSmin : CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=1, --when, --ltl, ((LTLAP0==true))U(X(X(<>((LTLAP0==true))))), --buchi-type=spotba], workingDir=/home/mcc/execution]
LTSmin run took 93 ms.
FORMULA LamportFastMutEx-PT-6-LTLFireability-00 FALSE TECHNIQUES PARTIAL_ORDER EXPLICIT LTSMIN SAT_SMT
Running LTSmin : CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=1, --when, --ltl, <>([](<>(X([]((LTLAP1==true)))))), --buchi-type=spotba], workingDir=/home/mcc/execution]
LTSmin run took 32 ms.
FORMULA LamportFastMutEx-PT-6-LTLFireability-01 FALSE TECHNIQUES PARTIAL_ORDER EXPLICIT LTSMIN SAT_SMT
Running LTSmin : CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=1, --when, --ltl, X((<>(X((LTLAP2==true))))U(<>((LTLAP3==true)))), --buchi-type=spotba], workingDir=/home/mcc/execution]
WARNING : LTSmin timed out (>225 s) on command CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=1, --when, --ltl, X((<>(X((LTLAP2==true))))U(<>((LTLAP3==true)))), --buchi-type=spotba], workingDir=/home/mcc/execution]
Running LTSmin : CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=1, --when, --ltl, X((((LTLAP1==true))U((LTLAP4==true)))U((LTLAP5==true))), --buchi-type=spotba], workingDir=/home/mcc/execution]
LTSmin run took 95 ms.
FORMULA LamportFastMutEx-PT-6-LTLFireability-03 FALSE TECHNIQUES PARTIAL_ORDER EXPLICIT LTSMIN SAT_SMT
Running LTSmin : CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=1, -p, --pins-guards, --when, --ltl, []([](<>(<>((LTLAP3==true))))), --buchi-type=spotba], workingDir=/home/mcc/execution]
LTSmin run took 268 ms.
FORMULA LamportFastMutEx-PT-6-LTLFireability-04 FALSE TECHNIQUES PARTIAL_ORDER EXPLICIT LTSMIN SAT_SMT
Running LTSmin : CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=1, --when, --ltl, X(<>((LTLAP6==true))), --buchi-type=spotba], workingDir=/home/mcc/execution]
LTSmin run took 84 ms.
FORMULA LamportFastMutEx-PT-6-LTLFireability-05 FALSE TECHNIQUES PARTIAL_ORDER EXPLICIT LTSMIN SAT_SMT
Running LTSmin : CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=1, -p, --pins-guards, --when, --ltl, (LTLAP7==true), --buchi-type=spotba], workingDir=/home/mcc/execution]
LTSmin run took 268 ms.
FORMULA LamportFastMutEx-PT-6-LTLFireability-06 FALSE TECHNIQUES PARTIAL_ORDER EXPLICIT LTSMIN SAT_SMT
Running LTSmin : CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=1, -p, --pins-guards, --when, --ltl, []((LTLAP8==true)), --buchi-type=spotba], workingDir=/home/mcc/execution]
LTSmin run took 316 ms.
FORMULA LamportFastMutEx-PT-6-LTLFireability-07 FALSE TECHNIQUES PARTIAL_ORDER EXPLICIT LTSMIN SAT_SMT
Running LTSmin : CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=1, -p, --pins-guards, --when, --ltl, []((LTLAP9==true)), --buchi-type=spotba], workingDir=/home/mcc/execution]
LTSmin run took 276 ms.
FORMULA LamportFastMutEx-PT-6-LTLFireability-08 FALSE TECHNIQUES PARTIAL_ORDER EXPLICIT LTSMIN SAT_SMT
Running LTSmin : CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=1, --when, --ltl, [](X(X((LTLAP10==true)))), --buchi-type=spotba], workingDir=/home/mcc/execution]
LTSmin run took 58 ms.
FORMULA LamportFastMutEx-PT-6-LTLFireability-09 FALSE TECHNIQUES PARTIAL_ORDER EXPLICIT LTSMIN SAT_SMT
Running LTSmin : CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=1, -p, --pins-guards, --when, --ltl, (([]((LTLAP11==true)))U([]((LTLAP12==true))))U(<>((LTLAP13==true))), --buchi-type=spotba], workingDir=/home/mcc/execution]
LTSmin run took 300 ms.
FORMULA LamportFastMutEx-PT-6-LTLFireability-10 FALSE TECHNIQUES PARTIAL_ORDER EXPLICIT LTSMIN SAT_SMT
Running LTSmin : CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=1, -p, --pins-guards, --when, --ltl, (LTLAP14==true), --buchi-type=spotba], workingDir=/home/mcc/execution]
LTSmin run took 280 ms.
FORMULA LamportFastMutEx-PT-6-LTLFireability-11 FALSE TECHNIQUES PARTIAL_ORDER EXPLICIT LTSMIN SAT_SMT
Running LTSmin : CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=1, -p, --pins-guards, --when, --ltl, <>(<>((LTLAP15==true))), --buchi-type=spotba], workingDir=/home/mcc/execution]
LTSmin run took 284 ms.
FORMULA LamportFastMutEx-PT-6-LTLFireability-12 TRUE TECHNIQUES PARTIAL_ORDER EXPLICIT LTSMIN SAT_SMT
Running LTSmin : CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=1, --when, --ltl, X(<>(X(<>((LTLAP16==true))))), --buchi-type=spotba], workingDir=/home/mcc/execution]
LTSmin run took 84 ms.
FORMULA LamportFastMutEx-PT-6-LTLFireability-13 FALSE TECHNIQUES PARTIAL_ORDER EXPLICIT LTSMIN SAT_SMT
Running LTSmin : CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=1, -p, --pins-guards, --when, --ltl, (LTLAP17==true), --buchi-type=spotba], workingDir=/home/mcc/execution]
LTSmin run took 311 ms.
FORMULA LamportFastMutEx-PT-6-LTLFireability-14 FALSE TECHNIQUES PARTIAL_ORDER EXPLICIT LTSMIN SAT_SMT
Running LTSmin : CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=1, -p, --pins-guards, --when, --ltl, ((<>((LTLAP18==true)))U(<>((LTLAP19==true))))U(((LTLAP20==true))U((LTLAP21==true))), --buchi-type=spotba], workingDir=/home/mcc/execution]
LTSmin run took 316 ms.
FORMULA LamportFastMutEx-PT-6-LTLFireability-15 FALSE TECHNIQUES PARTIAL_ORDER EXPLICIT LTSMIN SAT_SMT
Retrying LTSmin with larger timeout 1800 s
Running LTSmin : CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=1, --when, --ltl, X((<>(X((LTLAP2==true))))U(<>((LTLAP3==true)))), --buchi-type=spotba], workingDir=/home/mcc/execution]
WARNING : LTS min runner thread failed on error :java.lang.RuntimeException: Unexpected exception when executing ltsmin :CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=1, --when, --ltl, X((<>(X((LTLAP2==true))))U(<>((LTLAP3==true)))), --buchi-type=spotba], workingDir=/home/mcc/execution]
255
sparsehash FATAL ERROR: failed to allocate 25 groups

BK_STOP 1527486591361

--------------------
content from stderr:

+ export BINDIR=/home/mcc/BenchKit/
+ BINDIR=/home/mcc/BenchKit/
++ pwd
+ export MODEL=/home/mcc/execution
+ MODEL=/home/mcc/execution
+ /home/mcc/BenchKit//runeclipse.sh /home/mcc/execution LTLFireability -its -ltsminpath /home/mcc/BenchKit//lts_install_dir/ -smt
+ ulimit -s 65536
+ [[ -z '' ]]
+ export LTSMIN_MEM_SIZE=8589934592
+ LTSMIN_MEM_SIZE=8589934592
+ /home/mcc/BenchKit//itstools/its-tools -consoleLog -data /home/mcc/execution/workspace -pnfolder /home/mcc/execution -examination LTLFireability -z3path /home/mcc/BenchKit//z3/bin/z3 -yices2path /home/mcc/BenchKit//yices/bin/yices -its -ltsminpath /home/mcc/BenchKit//lts_install_dir/ -smt -vmargs -Dosgi.locking=none -Declipse.stateSaveDelayInterval=-1 -Dosgi.configuration.area=/tmp/.eclipse -Xss8m -Xms40m -Xmx8192m -Dfile.encoding=UTF-8 -Dosgi.requiredJavaVersion=1.6
May 28, 2018 5:13:06 AM fr.lip6.move.gal.application.Application start
INFO: Running its-tools with arguments : [-pnfolder, /home/mcc/execution, -examination, LTLFireability, -z3path, /home/mcc/BenchKit//z3/bin/z3, -yices2path, /home/mcc/BenchKit//yices/bin/yices, -its, -ltsminpath, /home/mcc/BenchKit//lts_install_dir/, -smt]
May 28, 2018 5:13:06 AM fr.lip6.move.gal.application.MccTranslator transformPNML
INFO: Parsing pnml file : /home/mcc/execution/model.pnml
May 28, 2018 5:13:06 AM fr.lip6.move.gal.nupn.PTNetReader loadFromXML
INFO: Load time of PNML (sax parser for PT used): 134 ms
May 28, 2018 5:13:06 AM fr.lip6.move.gal.pnml.togal.PTGALTransformer handlePage
INFO: Transformed 217 places.
May 28, 2018 5:13:07 AM fr.lip6.move.gal.pnml.togal.PTGALTransformer handlePage
INFO: Transformed 420 transitions.
May 28, 2018 5:13:07 AM fr.lip6.move.serialization.SerializationUtil systemToFile
INFO: Time to serialize gal into /home/mcc/execution/model.pnml.img.gal : 41 ms
May 28, 2018 5:13:07 AM fr.lip6.move.gal.instantiate.GALRewriter flatten
INFO: Flatten gal took : 278 ms
May 28, 2018 5:13:07 AM fr.lip6.move.serialization.SerializationUtil systemToFile
INFO: Time to serialize gal into /home/mcc/execution/LTLFireability.pnml.gal : 4 ms
May 28, 2018 5:13:07 AM fr.lip6.move.serialization.SerializationUtil serializePropertiesForITSLTLTools
INFO: Time to serialize properties into /home/mcc/execution/LTLFireability.ltl : 16 ms
May 28, 2018 5:13:08 AM fr.lip6.move.gal.semantics.DeterministicNextBuilder getDeterministicNext
INFO: Input system was already deterministic with 420 transitions.
May 28, 2018 5:13:09 AM fr.lip6.move.gal.gal2smt.bmc.KInductionSolver computeAndDeclareInvariants
INFO: Computed 65 place invariants in 156 ms
May 28, 2018 5:13:12 AM fr.lip6.move.gal.gal2smt.bmc.KInductionSolver init
INFO: Proved 217 variables to be positive in 2713 ms
May 28, 2018 5:13:12 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver computeAblingMatrix
INFO: Computing symmetric may disable matrix : 420 transitions.
May 28, 2018 5:13:12 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of disable matrix completed :0/420 took 1 ms. Total solver calls (SAT/UNSAT): 0(0/0)
May 28, 2018 5:13:12 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of Complete disable matrix. took 49 ms. Total solver calls (SAT/UNSAT): 0(0/0)
May 28, 2018 5:13:12 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver computeAblingMatrix
INFO: Computing symmetric may enable matrix : 420 transitions.
May 28, 2018 5:13:12 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of Complete enable matrix. took 15 ms. Total solver calls (SAT/UNSAT): 0(0/0)
May 28, 2018 5:13:32 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver computeCoEnablingMatrix
INFO: Computing symmetric co enabling matrix : 420 transitions.
May 28, 2018 5:13:32 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(0/420) took 42 ms. Total solver calls (SAT/UNSAT): 65(0/65)
May 28, 2018 5:13:35 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(8/420) took 3446 ms. Total solver calls (SAT/UNSAT): 581(24/557)
May 28, 2018 5:13:39 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(13/420) took 7454 ms. Total solver calls (SAT/UNSAT): 903(36/867)
May 28, 2018 5:13:44 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(14/420) took 12717 ms. Total solver calls (SAT/UNSAT): 1044(36/1008)
May 28, 2018 5:13:48 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(17/420) took 15990 ms. Total solver calls (SAT/UNSAT): 1461(36/1425)
May 28, 2018 5:13:51 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(20/420) took 19439 ms. Total solver calls (SAT/UNSAT): 1869(36/1833)
May 28, 2018 5:13:54 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(28/420) took 22543 ms. Total solver calls (SAT/UNSAT): 2913(123/2790)
May 28, 2018 5:13:59 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(35/420) took 27774 ms. Total solver calls (SAT/UNSAT): 3774(192/3582)
May 28, 2018 5:14:03 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(38/420) took 30949 ms. Total solver calls (SAT/UNSAT): 4128(219/3909)
May 28, 2018 5:14:06 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(39/420) took 34064 ms. Total solver calls (SAT/UNSAT): 4244(228/4016)
May 28, 2018 5:14:09 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(44/420) took 37620 ms. Total solver calls (SAT/UNSAT): 4809(270/4539)
May 28, 2018 5:14:12 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(61/420) took 40640 ms. Total solver calls (SAT/UNSAT): 6543(387/6156)
May 28, 2018 5:14:15 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(71/420) took 43787 ms. Total solver calls (SAT/UNSAT): 8616(462/8154)
May 28, 2018 5:14:20 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(80/420) took 48189 ms. Total solver calls (SAT/UNSAT): 10515(663/9852)
May 28, 2018 5:14:24 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(87/420) took 52513 ms. Total solver calls (SAT/UNSAT): 11936(809/11127)
May 28, 2018 5:14:28 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(90/420) took 56753 ms. Total solver calls (SAT/UNSAT): 12530(869/11661)
May 28, 2018 5:14:32 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(91/420) took 60572 ms. Total solver calls (SAT/UNSAT): 12726(889/11837)
May 28, 2018 5:14:36 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(92/420) took 64684 ms. Total solver calls (SAT/UNSAT): 12921(909/12012)
May 28, 2018 5:14:39 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(95/420) took 67783 ms. Total solver calls (SAT/UNSAT): 13500(966/12534)
May 28, 2018 5:14:43 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(97/420) took 71798 ms. Total solver calls (SAT/UNSAT): 13881(1004/12877)
May 28, 2018 5:14:50 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(98/420) took 78376 ms. Total solver calls (SAT/UNSAT): 14070(1023/13047)
May 28, 2018 5:14:53 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(100/420) took 81457 ms. Total solver calls (SAT/UNSAT): 14445(1059/13386)
May 28, 2018 5:14:57 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(101/420) took 85121 ms. Total solver calls (SAT/UNSAT): 14631(1077/13554)
May 28, 2018 5:15:01 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(102/420) took 89125 ms. Total solver calls (SAT/UNSAT): 14816(1095/13721)
May 28, 2018 5:15:04 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(104/420) took 92801 ms. Total solver calls (SAT/UNSAT): 15183(1131/14052)
May 28, 2018 5:15:08 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(109/420) took 96382 ms. Total solver calls (SAT/UNSAT): 15431(1143/14288)
May 28, 2018 5:15:11 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(114/420) took 99671 ms. Total solver calls (SAT/UNSAT): 15678(1155/14523)
May 28, 2018 5:15:15 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(117/420) took 103124 ms. Total solver calls (SAT/UNSAT): 15827(1167/14660)
May 28, 2018 5:15:18 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(131/420) took 106186 ms. Total solver calls (SAT/UNSAT): 18138(1431/16707)
May 28, 2018 5:15:21 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(157/420) took 109203 ms. Total solver calls (SAT/UNSAT): 22155(1740/20415)
May 28, 2018 5:15:24 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(164/420) took 112272 ms. Total solver calls (SAT/UNSAT): 23121(1841/21280)
May 28, 2018 5:15:30 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(172/420) took 118706 ms. Total solver calls (SAT/UNSAT): 24165(1948/22217)
May 28, 2018 5:15:34 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(177/420) took 122470 ms. Total solver calls (SAT/UNSAT): 24785(2010/22775)
May 28, 2018 5:15:38 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(180/420) took 126556 ms. Total solver calls (SAT/UNSAT): 25145(2046/23099)
May 28, 2018 5:15:42 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(182/420) took 130446 ms. Total solver calls (SAT/UNSAT): 25338(2058/23280)
May 28, 2018 5:15:45 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(191/420) took 133818 ms. Total solver calls (SAT/UNSAT): 25968(2079/23889)
May 28, 2018 5:15:49 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(205/420) took 136882 ms. Total solver calls (SAT/UNSAT): 26787(2136/24651)
May 28, 2018 5:15:52 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(241/420) took 139888 ms. Total solver calls (SAT/UNSAT): 28107(2205/25902)
May 28, 2018 5:15:55 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(262/420) took 142912 ms. Total solver calls (SAT/UNSAT): 28689(2281/26408)
May 28, 2018 5:15:58 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(286/420) took 146496 ms. Total solver calls (SAT/UNSAT): 29283(2395/26888)
May 28, 2018 5:16:01 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(299/420) took 149750 ms. Total solver calls (SAT/UNSAT): 29544(2415/27129)
May 28, 2018 5:16:04 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(314/420) took 152851 ms. Total solver calls (SAT/UNSAT): 30870(2504/28366)
May 28, 2018 5:16:08 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(333/420) took 156036 ms. Total solver calls (SAT/UNSAT): 32333(2677/29656)
May 28, 2018 5:16:11 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(338/420) took 159205 ms. Total solver calls (SAT/UNSAT): 32658(2714/29944)
May 28, 2018 5:16:14 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(344/420) took 162712 ms. Total solver calls (SAT/UNSAT): 33015(2748/30267)
May 28, 2018 5:16:18 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(347/420) took 166104 ms. Total solver calls (SAT/UNSAT): 33180(2766/30414)
May 28, 2018 5:16:21 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(354/420) took 169434 ms. Total solver calls (SAT/UNSAT): 33350(2778/30572)
May 28, 2018 5:16:24 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(367/420) took 172654 ms. Total solver calls (SAT/UNSAT): 33864(2798/31066)
May 28, 2018 5:16:27 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(384/420) took 175665 ms. Total solver calls (SAT/UNSAT): 34391(2862/31529)
May 28, 2018 5:16:31 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(395/420) took 178892 ms. Total solver calls (SAT/UNSAT): 34578(2880/31698)
May 28, 2018 5:16:33 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of Finished co-enabling matrix. took 181152 ms. Total solver calls (SAT/UNSAT): 34650(2883/31767)
May 28, 2018 5:16:33 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver computeDoNotAccord
INFO: Computing Do-Not-Accords matrix : 420 transitions.
May 28, 2018 5:16:33 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of Completed DNA matrix. took 39 ms. Total solver calls (SAT/UNSAT): 0(0/0)
May 28, 2018 5:16:33 AM fr.lip6.move.gal.gal2pins.Gal2PinsTransformerNext transform
INFO: Built C files in 205210ms conformant to PINS in folder :/home/mcc/execution
pins2lts-mc, 0.000: Registering PINS so language module
pins2lts-mc, 0.000: Loading model from ./gal.so
pins2lts-mc, 0.000: library has no initializer
pins2lts-mc, 0.000: loading model GAL
pins2lts-mc, 0.002: completed loading model GAL
pins2lts-mc, 0.002: LTL layer: formula: X((<>(X((LTLAP2==true))))U(<>((LTLAP3==true))))
pins2lts-mc, 0.002: "X((<>(X((LTLAP2==true))))U(<>((LTLAP3==true))))" is not a file, parsing as formula...
pins2lts-mc, 0.003: Using Spin LTL semantics
pins2lts-mc, 0.010: buchi has 2 states
pins2lts-mc, 0.010: Weak Buchi automaton detected, adding non-accepting as progress label.
pins2lts-mc, 0.015: DFS-FIFO for weak LTL, using special progress label 443
pins2lts-mc, 0.015: There are 444 state labels and 1 edge labels
pins2lts-mc, 0.015: State length is 218, there are 422 groups
pins2lts-mc, 0.015: Running dfsfifo using 1 core (sequential)
pins2lts-mc, 0.015: Using a tree table with 2^27 elements
pins2lts-mc, 0.015: Successor permutation: rr
pins2lts-mc, 0.015: Global bits: 2, count bits: 0, local bits: 0
pins2lts-mc, 0.086: 42 levels 1000 states 4746 transitions
pins2lts-mc, 0.160: 42 levels 2000 states 10536 transitions
pins2lts-mc, 0.310: 42 levels 4000 states 23047 transitions
pins2lts-mc, 0.583: 42 levels 8000 states 46157 transitions
pins2lts-mc, 1.155: 42 levels 16000 states 91868 transitions
pins2lts-mc, 2.254: 50 levels 32000 states 180490 transitions
pins2lts-mc, 4.636: 50 levels 64000 states 395826 transitions
pins2lts-mc, 9.730: 50 levels 128000 states 913550 transitions
pins2lts-mc, 20.258: 50 levels 256000 states 2032269 transitions
pins2lts-mc, 40.604: 50 levels 512000 states 4212614 transitions
pins2lts-mc, 80.167: 50 levels 1024000 states 8487138 transitions
pins2lts-mc, 149.819: 66 levels 2048000 states 14710386 transitions
pins2lts-mc, 305.833: 66 levels 4096000 states 29147387 transitions
pins2lts-mc, 637.055: 66 levels 8192000 states 63441521 transitions
pins2lts-mc, 1337.215: 66 levels 16384000 states 137752163 transitions
pins2lts-mc, 1477.782: Error: tree leafs table full! Change -s/--ratio.
pins2lts-mc, 1477.784:
pins2lts-mc, 1477.784:
pins2lts-mc, 1477.784: Explored 17551810 states 149132650 transitions, fanout: 8.497
pins2lts-mc, 1477.785: Total exploration time 1477.770 sec (1477.770 sec minimum, 1477.770 sec on average)
pins2lts-mc, 1477.785: States per second: 11877, Transitions per second: 100917
pins2lts-mc, 1477.785:
pins2lts-mc, 1477.785: Progress states detected: 0
pins2lts-mc, 1477.785: Redundant explorations: -0.0016
pins2lts-mc, 1477.785:
pins2lts-mc, 1477.785: Queue width: 8B, total height: 67, memory: 0.00MB
pins2lts-mc, 1477.785: Tree memory: 389.9MB, 23.3 B/state, compr.: 2.7%
pins2lts-mc, 1477.785: Tree fill ratio (roots/leafs): 13.0%/99.0%
pins2lts-mc, 1477.785: Stored 422 string chucks using 0MB
pins2lts-mc, 1477.785: Total memory used for chunk indexing: 0MB
pins2lts-mc, 1477.785: Est. total memory use: 389.9MB (~1024.0MB paged-in)
java.lang.RuntimeException: Unexpected exception when executing ltsmin :CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=1, --when, --ltl, X((<>(X((LTLAP2==true))))U(<>((LTLAP3==true)))), --buchi-type=spotba], workingDir=/home/mcc/execution]
255
at fr.lip6.move.gal.application.LTSminRunner.checkProperty(LTSminRunner.java:167)
at fr.lip6.move.gal.application.LTSminRunner.access$9(LTSminRunner.java:122)
at fr.lip6.move.gal.application.LTSminRunner$1.run(LTSminRunner.java:98)
at java.lang.Thread.run(Thread.java:748)
ITS-tools command line returned an error code 1

Sequence of Actions to be Executed by the VM

This is useful if one wants to reexecute the tool in the VM from the submitted image disk.

set -x
# this is for BenchKit: configuration of major elements for the test
export BK_INPUT="LamportFastMutEx-PT-6"
export BK_EXAMINATION="LTLFireability"
export BK_TOOL="itstools"
export BK_RESULT_DIR="/tmp/BK_RESULTS/OUTPUTS"
export BK_TIME_CONFINEMENT="3600"
export BK_MEMORY_CONFINEMENT="16384"

# this is specific to your benchmark or test

export BIN_DIR="$HOME/BenchKit/bin"

# remove the execution directoty if it exists (to avoid increse of .vmdk images)
if [ -d execution ] ; then
rm -rf execution
fi

tar xzf /home/mcc/BenchKit/INPUTS/LamportFastMutEx-PT-6.tgz
mv LamportFastMutEx-PT-6 execution
cd execution
pwd
ls -lh

# this is for BenchKit: explicit launching of the test
echo "====================================================================="
echo " Generated by BenchKit 2-3637"
echo " Executing tool itstools"
echo " Input is LamportFastMutEx-PT-6, examination is LTLFireability"
echo " Time confinement is $BK_TIME_CONFINEMENT seconds"
echo " Memory confinement is 16384 MBytes"
echo " Number of cores is 4"
echo " Run identifier is r260-csrt-152732585200040"
echo "====================================================================="
echo
echo "--------------------"
echo "content from stdout:"
echo
echo "=== Data for post analysis generated by BenchKit (invocation template)"
echo
if [ "LTLFireability" = "UpperBounds" ] ; then
echo "The expected result is a vector of positive values"
echo NUM_VECTOR
elif [ "LTLFireability" != "StateSpace" ] ; then
echo "The expected result is a vector of booleans"
echo BOOL_VECTOR
else
echo "no data necessary for post analysis"
fi
echo
if [ -f "LTLFireability.txt" ] ; then
echo "here is the order used to build the result vector(from text file)"
for x in $(grep Property LTLFireability.txt | cut -d ' ' -f 2 | sort -u) ; do
echo "FORMULA_NAME $x"
done
elif [ -f "LTLFireability.xml" ] ; then # for cunf (txt files deleted;-)
echo echo "here is the order used to build the result vector(from xml file)"
for x in $(grep '' LTLFireability.xml | cut -d '>' -f 2 | cut -d '<' -f 1 | sort -u) ; do
echo "FORMULA_NAME $x"
done
fi
echo
echo "=== Now, execution of the tool begins"
echo
echo -n "BK_START "
date -u +%s%3N
echo
timeout -s 9 $BK_TIME_CONFINEMENT bash -c "/home/mcc/BenchKit/BenchKit_head.sh 2> STDERR ; echo ; echo -n \"BK_STOP \" ; date -u +%s%3N"
if [ $? -eq 137 ] ; then
echo
echo "BK_TIME_CONFINEMENT_REACHED"
fi
echo
echo "--------------------"
echo "content from stderr:"
echo
cat STDERR ;