fond
Model Checking Contest 2018
8th edition, Bratislava, Slovakia, June 26, 2018
Execution of r260-csrt-152732585200036
Last Updated
June 26, 2018

About the Execution of ITS-Tools for LamportFastMutEx-PT-4

Execution Summary
Max Memory
Used (MB)
Time wait (ms) CPU Usage (ms) I/O Wait (ms) Computed Result Execution
Status
15758.160 21835.00 51630.00 137.50 FFFFFFFFFFFFFFFF normal

Execution Chart

We display below the execution chart for this examination (boot time has been removed).

Trace from the execution

Waiting for the VM to be ready (probing ssh)
.................
/home/mcc/execution
total 376K
-rw-r--r-- 1 mcc users 6.0K May 15 18:54 CTLCardinality.txt
-rw-r--r-- 1 mcc users 29K May 15 18:54 CTLCardinality.xml
-rw-r--r-- 1 mcc users 6.1K May 15 18:54 CTLFireability.txt
-rw-r--r-- 1 mcc users 30K May 15 18:54 CTLFireability.xml
-rw-r--r-- 1 mcc users 4.0K May 15 18:50 GenericPropertiesDefinition.xml
-rw-r--r-- 1 mcc users 6.3K May 15 18:50 GenericPropertiesVerdict.xml
-rw-r--r-- 1 mcc users 3.7K May 26 09:26 LTLCardinality.txt
-rw-r--r-- 1 mcc users 15K May 26 09:26 LTLCardinality.xml
-rw-r--r-- 1 mcc users 4.4K May 26 09:26 LTLFireability.txt
-rw-r--r-- 1 mcc users 18K May 26 09:26 LTLFireability.xml
-rw-r--r-- 1 mcc users 6.5K May 15 18:54 ReachabilityCardinality.txt
-rw-r--r-- 1 mcc users 29K May 15 18:54 ReachabilityCardinality.xml
-rw-r--r-- 1 mcc users 112 May 15 18:54 ReachabilityDeadlock.txt
-rw-r--r-- 1 mcc users 350 May 15 18:54 ReachabilityDeadlock.xml
-rw-r--r-- 1 mcc users 8.9K May 15 18:54 ReachabilityFireability.txt
-rw-r--r-- 1 mcc users 40K May 15 18:54 ReachabilityFireability.xml
-rw-r--r-- 1 mcc users 2.5K May 15 18:54 UpperBounds.txt
-rw-r--r-- 1 mcc users 5.7K May 15 18:54 UpperBounds.xml
-rw-r--r-- 1 mcc users 5 May 15 18:50 equiv_col
-rw-r--r-- 1 mcc users 2 May 15 18:50 instance
-rw-r--r-- 1 mcc users 6 May 15 18:50 iscolored
-rw-r--r-- 1 mcc users 110K May 15 18:50 model.pnml
=====================================================================
Generated by BenchKit 2-3637
Executing tool itstools
Input is LamportFastMutEx-PT-4, examination is LTLFireability
Time confinement is 3600 seconds
Memory confinement is 16384 MBytes
Number of cores is 4
Run identifier is r260-csrt-152732585200036
=====================================================================


--------------------
content from stdout:

=== Data for post analysis generated by BenchKit (invocation template)

The expected result is a vector of booleans
BOOL_VECTOR

here is the order used to build the result vector(from text file)
FORMULA_NAME LamportFastMutEx-PT-4-LTLFireability-00
FORMULA_NAME LamportFastMutEx-PT-4-LTLFireability-01
FORMULA_NAME LamportFastMutEx-PT-4-LTLFireability-02
FORMULA_NAME LamportFastMutEx-PT-4-LTLFireability-03
FORMULA_NAME LamportFastMutEx-PT-4-LTLFireability-04
FORMULA_NAME LamportFastMutEx-PT-4-LTLFireability-05
FORMULA_NAME LamportFastMutEx-PT-4-LTLFireability-06
FORMULA_NAME LamportFastMutEx-PT-4-LTLFireability-07
FORMULA_NAME LamportFastMutEx-PT-4-LTLFireability-08
FORMULA_NAME LamportFastMutEx-PT-4-LTLFireability-09
FORMULA_NAME LamportFastMutEx-PT-4-LTLFireability-10
FORMULA_NAME LamportFastMutEx-PT-4-LTLFireability-11
FORMULA_NAME LamportFastMutEx-PT-4-LTLFireability-12
FORMULA_NAME LamportFastMutEx-PT-4-LTLFireability-13
FORMULA_NAME LamportFastMutEx-PT-4-LTLFireability-14
FORMULA_NAME LamportFastMutEx-PT-4-LTLFireability-15

=== Now, execution of the tool begins

BK_START 1527484369696

Using solver Z3 to compute partial order matrices.
Built C files in :
/home/mcc/execution
Invoking ITS tools like this :CommandLine [args=[/home/mcc/BenchKit/itstools/plugins/fr.lip6.move.gal.itstools.binaries_1.0.0.201805151631/bin/its-ltl-linux64, --gc-threshold, 2000000, -i, /home/mcc/execution/LTLFireability.pnml.gal, -t, CGAL, -LTL, /home/mcc/execution/LTLFireability.ltl, -c, -stutter-deadlock], workingDir=/home/mcc/execution]

its-ltl command run as :

/home/mcc/BenchKit/itstools/plugins/fr.lip6.move.gal.itstools.binaries_1.0.0.201805151631/bin/its-ltl-linux64 --gc-threshold 2000000 -i /home/mcc/execution/LTLFireability.pnml.gal -t CGAL -LTL /home/mcc/execution/LTLFireability.ltl -c -stutter-deadlock
Read 16 LTL properties
Checking formula 0 : !(("((((((((((((((((((((((((((y_0>=1)&&(P_CS_21_0>=1))||((y_1>=1)&&(P_CS_21_0>=1)))||((y_2>=1)&&(P_CS_21_0>=1)))||((y_3>=1)&&(P_CS_21_0>=1)))||((y_4>=1)&&(P_CS_21_0>=1)))||((y_0>=1)&&(P_CS_21_1>=1)))||((y_1>=1)&&(P_CS_21_1>=1)))||((y_2>=1)&&(P_CS_21_1>=1)))||((y_3>=1)&&(P_CS_21_1>=1)))||((y_4>=1)&&(P_CS_21_1>=1)))||((y_0>=1)&&(P_CS_21_2>=1)))||((y_1>=1)&&(P_CS_21_2>=1)))||((y_2>=1)&&(P_CS_21_2>=1)))||((y_3>=1)&&(P_CS_21_2>=1)))||((y_4>=1)&&(P_CS_21_2>=1)))||((y_0>=1)&&(P_CS_21_3>=1)))||((y_1>=1)&&(P_CS_21_3>=1)))||((y_2>=1)&&(P_CS_21_3>=1)))||((y_3>=1)&&(P_CS_21_3>=1)))||((y_4>=1)&&(P_CS_21_3>=1)))||((y_0>=1)&&(P_CS_21_4>=1)))||((y_1>=1)&&(P_CS_21_4>=1)))||((y_2>=1)&&(P_CS_21_4>=1)))||((y_3>=1)&&(P_CS_21_4>=1)))||((y_4>=1)&&(P_CS_21_4>=1)))"))
Formula 0 simplified : !"((((((((((((((((((((((((((y_0>=1)&&(P_CS_21_0>=1))||((y_1>=1)&&(P_CS_21_0>=1)))||((y_2>=1)&&(P_CS_21_0>=1)))||((y_3>=1)&&(P_CS_21_0>=1)))||((y_4>=1)&&(P_CS_21_0>=1)))||((y_0>=1)&&(P_CS_21_1>=1)))||((y_1>=1)&&(P_CS_21_1>=1)))||((y_2>=1)&&(P_CS_21_1>=1)))||((y_3>=1)&&(P_CS_21_1>=1)))||((y_4>=1)&&(P_CS_21_1>=1)))||((y_0>=1)&&(P_CS_21_2>=1)))||((y_1>=1)&&(P_CS_21_2>=1)))||((y_2>=1)&&(P_CS_21_2>=1)))||((y_3>=1)&&(P_CS_21_2>=1)))||((y_4>=1)&&(P_CS_21_2>=1)))||((y_0>=1)&&(P_CS_21_3>=1)))||((y_1>=1)&&(P_CS_21_3>=1)))||((y_2>=1)&&(P_CS_21_3>=1)))||((y_3>=1)&&(P_CS_21_3>=1)))||((y_4>=1)&&(P_CS_21_3>=1)))||((y_0>=1)&&(P_CS_21_4>=1)))||((y_1>=1)&&(P_CS_21_4>=1)))||((y_2>=1)&&(P_CS_21_4>=1)))||((y_3>=1)&&(P_CS_21_4>=1)))||((y_4>=1)&&(P_CS_21_4>=1)))"
Presburger conditions satisfied. Using coverability to approximate state space in K-Induction.
Normalized transition count is 185
// Phase 1: matrix 185 rows 135 cols
invariant :P_wait_1_4 + -1'P_await_13_1 + P_done_1_4 = 0
invariant :P_start_1_4 + P_setx_3_4 + P_setbi_5_4 + P_ify0_4_4 + P_sety_9_4 + P_ifxi_10_4 + P_setbi_11_4 + P_fordo_12_4 + P_await_13_4 + P_ifyi_15_4 + P_awaity_4 + P_CS_21_4 + P_setbi_24_4 = 1
invariant :P_start_1_1 + P_setx_3_1 + P_setbi_5_1 + P_ify0_4_1 + P_sety_9_1 + P_ifxi_10_1 + P_setbi_11_1 + P_fordo_12_1 + P_await_13_1 + P_ifyi_15_1 + P_awaity_1 + P_CS_21_1 + P_setbi_24_1 = 1
invariant :P_wait_0_4 + -1'P_await_13_0 + P_done_0_4 = 0
invariant :P_wait_0_2 + -1'P_await_13_0 + P_done_0_2 = 0
invariant :P_wait_3_4 + -1'P_await_13_3 + P_done_3_4 = 0
invariant :P_b_4_false + P_b_4_true = 1
invariant :P_wait_0_1 + -1'P_await_13_0 + P_done_0_1 = 0
invariant :x_0 + x_1 + x_2 + x_3 + x_4 = 1
invariant :P_wait_1_1 + -1'P_await_13_1 + P_done_1_1 = 0
invariant :y_0 + y_1 + y_2 + y_3 + y_4 = 1
invariant :P_wait_3_1 + -1'P_await_13_3 + P_done_3_1 = 0
invariant :P_wait_4_4 + -1'P_await_13_4 + P_done_4_4 = 0
invariant :P_wait_3_2 + -1'P_await_13_3 + P_done_3_2 = 0
invariant :P_wait_4_1 + -1'P_await_13_4 + P_done_4_1 = 0
invariant :P_start_1_2 + P_setx_3_2 + P_setbi_5_2 + P_ify0_4_2 + P_sety_9_2 + P_ifxi_10_2 + P_setbi_11_2 + P_fordo_12_2 + P_await_13_2 + P_ifyi_15_2 + P_awaity_2 + P_CS_21_2 + P_setbi_24_2 = 1
invariant :P_wait_2_0 + P_done_2_0 = 0
invariant :P_wait_1_0 + P_done_1_0 = 0
invariant :P_wait_3_3 + -1'P_await_13_3 + P_done_3_3 = 0
invariant :P_wait_0_3 + -1'P_await_13_0 + P_done_0_3 = 0
invariant :P_b_1_false + P_b_1_true = 1
invariant :P_wait_2_4 + -1'P_await_13_2 + P_done_2_4 = 0
invariant :P_b_0_false + P_b_0_true = 0
invariant :P_wait_2_2 + -1'P_await_13_2 + P_done_2_2 = 0
invariant :P_wait_2_1 + -1'P_await_13_2 + P_done_2_1 = 0
invariant :P_wait_4_0 + P_done_4_0 = 0
invariant :P_start_1_3 + P_setx_3_3 + P_setbi_5_3 + P_ify0_4_3 + P_sety_9_3 + P_ifxi_10_3 + P_setbi_11_3 + P_fordo_12_3 + P_await_13_3 + P_ifyi_15_3 + P_awaity_3 + P_CS_21_3 + P_setbi_24_3 = 1
invariant :P_wait_0_0 + P_done_0_0 = 0
invariant :P_wait_4_3 + -1'P_await_13_4 + P_done_4_3 = 0
invariant :P_wait_2_3 + -1'P_await_13_2 + P_done_2_3 = 0
invariant :P_b_3_false + P_b_3_true = 1
invariant :P_wait_4_2 + -1'P_await_13_4 + P_done_4_2 = 0
invariant :P_wait_1_3 + -1'P_await_13_1 + P_done_1_3 = 0
invariant :P_start_1_0 + P_setx_3_0 + P_setbi_5_0 + P_ify0_4_0 + P_sety_9_0 + P_ifxi_10_0 + P_setbi_11_0 + P_fordo_12_0 + P_await_13_0 + P_ifyi_15_0 + P_awaity_0 + P_CS_21_0 + P_setbi_24_0 = 0
invariant :P_wait_1_2 + -1'P_await_13_1 + P_done_1_2 = 0
invariant :P_b_2_false + P_b_2_true = 1
invariant :P_wait_3_0 + P_done_3_0 = 0
Reverse transition relation is NOT exact ! Due to transitions T_setx_3_6, T_setx_3_7, T_setx_3_8, T_setx_3_9, T_setx_3_10, T_setx_3_11, T_setx_3_12, T_setx_3_13, T_setx_3_14, T_setx_3_15, T_setx_3_16, T_setx_3_17, T_setx_3_18, T_setx_3_19, T_setx_3_20, T_setx_3_21, T_setx_3_22, T_setx_3_23, T_setx_3_24, T_setx_3_25, T_setbi_5_4, T_setbi_5_6, T_setbi_5_8, T_setbi_5_10, T_awaity_2, T_awaity_3, T_awaity_4, T_awaity_5, T_sety_9_6, T_sety_9_8, T_sety_9_9, T_sety_9_10, T_sety_9_11, T_sety_9_12, T_sety_9_14, T_sety_9_15, T_sety_9_16, T_sety_9_17, T_sety_9_18, T_sety_9_20, T_sety_9_21, T_sety_9_22, T_sety_9_23, T_sety_9_24, T_setbi_11_4, T_setbi_11_6, T_setbi_11_8, T_setbi_11_10, T_ynei_15_6, T_ynei_15_8, T_ynei_15_9, T_ynei_15_10, T_ynei_15_11, T_ynei_15_12, T_ynei_15_14, T_ynei_15_15, T_ynei_15_16, T_ynei_15_17, T_ynei_15_18, T_ynei_15_20, T_ynei_15_21, T_ynei_15_22, T_ynei_15_23, T_ynei_15_24, T_yeqi_15_7, T_yeqi_15_13, T_yeqi_15_19, T_yeqi_15_25, T_sety0_23_7, T_sety0_23_8, T_sety0_23_9, T_sety0_23_10, T_sety0_23_12, T_sety0_23_13, T_sety0_23_14, T_sety0_23_15, T_sety0_23_17, T_sety0_23_18, T_sety0_23_19, T_sety0_23_20, T_sety0_23_22, T_sety0_23_23, T_sety0_23_24, T_sety0_23_25, T_setbi_24_3, T_setbi_24_4, T_setbi_24_5, T_setbi_24_6, T_setbi_24_7, T_setbi_24_8, T_setbi_24_9, T_setbi_24_10, Intersection with reachable at each step enabled. (destroyed/reverse/intersect/total) :78/60/92/230
Running compilation step : CommandLine [args=[gcc, -c, -I/home/mcc/BenchKit//lts_install_dir//include, -I., -std=c99, -fPIC, -O3, model.c], workingDir=/home/mcc/execution]
Compilation finished in 3570 ms.
Running link step : CommandLine [args=[gcc, -shared, -o, gal.so, model.o], workingDir=/home/mcc/execution]
Link finished in 62 ms.
Running LTSmin : CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=1, -p, --pins-guards, --when, --ltl, (LTLAP0==true), --buchi-type=spotba], workingDir=/home/mcc/execution]
LTSmin run took 131 ms.
FORMULA LamportFastMutEx-PT-4-LTLFireability-00 FALSE TECHNIQUES PARTIAL_ORDER EXPLICIT LTSMIN SAT_SMT
Running LTSmin : CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=1, --when, --ltl, X([]([]([](<>((LTLAP1==true)))))), --buchi-type=spotba], workingDir=/home/mcc/execution]
LTSmin run took 56 ms.
FORMULA LamportFastMutEx-PT-4-LTLFireability-01 FALSE TECHNIQUES PARTIAL_ORDER EXPLICIT LTSMIN SAT_SMT
Running LTSmin : CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=1, --when, --ltl, [](<>([]([](X((LTLAP0==true)))))), --buchi-type=spotba], workingDir=/home/mcc/execution]
LTSmin run took 32 ms.
FORMULA LamportFastMutEx-PT-4-LTLFireability-02 FALSE TECHNIQUES PARTIAL_ORDER EXPLICIT LTSMIN SAT_SMT
Running LTSmin : CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=1, -p, --pins-guards, --when, --ltl, (LTLAP2==true), --buchi-type=spotba], workingDir=/home/mcc/execution]
LTSmin run took 103 ms.
FORMULA LamportFastMutEx-PT-4-LTLFireability-03 FALSE TECHNIQUES PARTIAL_ORDER EXPLICIT LTSMIN SAT_SMT
Running LTSmin : CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=1, --when, --ltl, X((LTLAP3==true)), --buchi-type=spotba], workingDir=/home/mcc/execution]
LTSmin run took 32 ms.
FORMULA LamportFastMutEx-PT-4-LTLFireability-04 FALSE TECHNIQUES PARTIAL_ORDER EXPLICIT LTSMIN SAT_SMT
Running LTSmin : CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=1, -p, --pins-guards, --when, --ltl, []([]((LTLAP4==true))), --buchi-type=spotba], workingDir=/home/mcc/execution]
LTSmin run took 140 ms.
FORMULA LamportFastMutEx-PT-4-LTLFireability-05 FALSE TECHNIQUES PARTIAL_ORDER EXPLICIT LTSMIN SAT_SMT
Running LTSmin : CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=1, --when, --ltl, (X(((LTLAP5==true))U((LTLAP5==true))))U((LTLAP6==true)), --buchi-type=spotba], workingDir=/home/mcc/execution]
LTSmin run took 68 ms.
FORMULA LamportFastMutEx-PT-4-LTLFireability-06 FALSE TECHNIQUES PARTIAL_ORDER EXPLICIT LTSMIN SAT_SMT
Running LTSmin : CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=1, --when, --ltl, <>([]([](X([]((LTLAP1==true)))))), --buchi-type=spotba], workingDir=/home/mcc/execution]
LTSmin run took 47 ms.
FORMULA LamportFastMutEx-PT-4-LTLFireability-07 FALSE TECHNIQUES PARTIAL_ORDER EXPLICIT LTSMIN SAT_SMT
Running LTSmin : CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=1, -p, --pins-guards, --when, --ltl, <>(((LTLAP7==true))U(((LTLAP8==true))U((LTLAP9==true)))), --buchi-type=spotba], workingDir=/home/mcc/execution]
LTSmin run took 79 ms.
FORMULA LamportFastMutEx-PT-4-LTLFireability-08 FALSE TECHNIQUES PARTIAL_ORDER EXPLICIT LTSMIN SAT_SMT
Running LTSmin : CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=1, -p, --pins-guards, --when, --ltl, ((LTLAP10==true))U(<>(((LTLAP11==true))U((LTLAP12==true)))), --buchi-type=spotba], workingDir=/home/mcc/execution]
LTSmin run took 85 ms.
FORMULA LamportFastMutEx-PT-4-LTLFireability-09 FALSE TECHNIQUES PARTIAL_ORDER EXPLICIT LTSMIN SAT_SMT
Running LTSmin : CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=1, -p, --pins-guards, --when, --ltl, []((LTLAP13==true)), --buchi-type=spotba], workingDir=/home/mcc/execution]
LTSmin run took 84 ms.
FORMULA LamportFastMutEx-PT-4-LTLFireability-10 FALSE TECHNIQUES PARTIAL_ORDER EXPLICIT LTSMIN SAT_SMT
Running LTSmin : CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=1, --when, --ltl, X([]((LTLAP14==true))), --buchi-type=spotba], workingDir=/home/mcc/execution]
LTSmin run took 28 ms.
FORMULA LamportFastMutEx-PT-4-LTLFireability-11 FALSE TECHNIQUES PARTIAL_ORDER EXPLICIT LTSMIN SAT_SMT
Running LTSmin : CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=1, -p, --pins-guards, --when, --ltl, <>(((LTLAP15==true))U(<>((LTLAP16==true)))), --buchi-type=spotba], workingDir=/home/mcc/execution]
LTSmin run took 86 ms.
FORMULA LamportFastMutEx-PT-4-LTLFireability-12 FALSE TECHNIQUES PARTIAL_ORDER EXPLICIT LTSMIN SAT_SMT
Running LTSmin : CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=1, -p, --pins-guards, --when, --ltl, <>((LTLAP17==true)), --buchi-type=spotba], workingDir=/home/mcc/execution]
LTSmin run took 103 ms.
FORMULA LamportFastMutEx-PT-4-LTLFireability-13 FALSE TECHNIQUES PARTIAL_ORDER EXPLICIT LTSMIN SAT_SMT
Running LTSmin : CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=1, --when, --ltl, X(((LTLAP18==true))U(((LTLAP19==true))U((LTLAP20==true)))), --buchi-type=spotba], workingDir=/home/mcc/execution]
LTSmin run took 50 ms.
FORMULA LamportFastMutEx-PT-4-LTLFireability-14 FALSE TECHNIQUES PARTIAL_ORDER EXPLICIT LTSMIN SAT_SMT
Running LTSmin : CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=1, --when, --ltl, [](X((LTLAP12==true))), --buchi-type=spotba], workingDir=/home/mcc/execution]
LTSmin run took 42 ms.
FORMULA LamportFastMutEx-PT-4-LTLFireability-15 FALSE TECHNIQUES PARTIAL_ORDER EXPLICIT LTSMIN SAT_SMT
ITS tools runner thread asked to quit. Dying gracefully.

BK_STOP 1527484391531

--------------------
content from stderr:

+ export BINDIR=/home/mcc/BenchKit/
+ BINDIR=/home/mcc/BenchKit/
++ pwd
+ export MODEL=/home/mcc/execution
+ MODEL=/home/mcc/execution
+ /home/mcc/BenchKit//runeclipse.sh /home/mcc/execution LTLFireability -its -ltsminpath /home/mcc/BenchKit//lts_install_dir/ -smt
+ ulimit -s 65536
+ [[ -z '' ]]
+ export LTSMIN_MEM_SIZE=8589934592
+ LTSMIN_MEM_SIZE=8589934592
+ /home/mcc/BenchKit//itstools/its-tools -consoleLog -data /home/mcc/execution/workspace -pnfolder /home/mcc/execution -examination LTLFireability -z3path /home/mcc/BenchKit//z3/bin/z3 -yices2path /home/mcc/BenchKit//yices/bin/yices -its -ltsminpath /home/mcc/BenchKit//lts_install_dir/ -smt -vmargs -Dosgi.locking=none -Declipse.stateSaveDelayInterval=-1 -Dosgi.configuration.area=/tmp/.eclipse -Xss8m -Xms40m -Xmx8192m -Dfile.encoding=UTF-8 -Dosgi.requiredJavaVersion=1.6
May 28, 2018 5:12:52 AM fr.lip6.move.gal.application.Application start
INFO: Running its-tools with arguments : [-pnfolder, /home/mcc/execution, -examination, LTLFireability, -z3path, /home/mcc/BenchKit//z3/bin/z3, -yices2path, /home/mcc/BenchKit//yices/bin/yices, -its, -ltsminpath, /home/mcc/BenchKit//lts_install_dir/, -smt]
May 28, 2018 5:12:52 AM fr.lip6.move.gal.application.MccTranslator transformPNML
INFO: Parsing pnml file : /home/mcc/execution/model.pnml
May 28, 2018 5:12:52 AM fr.lip6.move.gal.nupn.PTNetReader loadFromXML
INFO: Load time of PNML (sax parser for PT used): 67 ms
May 28, 2018 5:12:52 AM fr.lip6.move.gal.pnml.togal.PTGALTransformer handlePage
INFO: Transformed 135 places.
May 28, 2018 5:12:52 AM fr.lip6.move.gal.pnml.togal.PTGALTransformer handlePage
INFO: Transformed 230 transitions.
May 28, 2018 5:12:52 AM fr.lip6.move.serialization.SerializationUtil systemToFile
INFO: Time to serialize gal into /home/mcc/execution/model.pnml.img.gal : 30 ms
May 28, 2018 5:12:52 AM fr.lip6.move.gal.instantiate.GALRewriter flatten
INFO: Flatten gal took : 65 ms
May 28, 2018 5:12:52 AM fr.lip6.move.serialization.SerializationUtil systemToFile
INFO: Time to serialize gal into /home/mcc/execution/LTLFireability.pnml.gal : 4 ms
May 28, 2018 5:12:52 AM fr.lip6.move.serialization.SerializationUtil serializePropertiesForITSLTLTools
INFO: Time to serialize properties into /home/mcc/execution/LTLFireability.ltl : 3 ms
May 28, 2018 5:12:53 AM fr.lip6.move.gal.semantics.DeterministicNextBuilder getDeterministicNext
INFO: Input system was already deterministic with 230 transitions.
May 28, 2018 5:12:53 AM fr.lip6.move.gal.gal2smt.bmc.KInductionSolver computeAndDeclareInvariants
INFO: Computed 37 place invariants in 38 ms
May 28, 2018 5:12:53 AM fr.lip6.move.gal.gal2smt.bmc.KInductionSolver init
INFO: Proved 135 variables to be positive in 235 ms
May 28, 2018 5:12:53 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver computeAblingMatrix
INFO: Computing symmetric may disable matrix : 230 transitions.
May 28, 2018 5:12:53 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of disable matrix completed :0/230 took 0 ms. Total solver calls (SAT/UNSAT): 0(0/0)
May 28, 2018 5:12:53 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of Complete disable matrix. took 15 ms. Total solver calls (SAT/UNSAT): 0(0/0)
May 28, 2018 5:12:53 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver computeAblingMatrix
INFO: Computing symmetric may enable matrix : 230 transitions.
May 28, 2018 5:12:53 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of Complete enable matrix. took 12 ms. Total solver calls (SAT/UNSAT): 0(0/0)
May 28, 2018 5:12:56 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver computeCoEnablingMatrix
INFO: Computing symmetric co enabling matrix : 230 transitions.
May 28, 2018 5:12:56 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(11/230) took 450 ms. Total solver calls (SAT/UNSAT): 650(16/634)
May 28, 2018 5:12:59 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(69/230) took 3506 ms. Total solver calls (SAT/UNSAT): 5375(428/4947)
May 28, 2018 5:13:02 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(153/230) took 6549 ms. Total solver calls (SAT/UNSAT): 9225(771/8454)
May 28, 2018 5:13:05 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(206/230) took 9810 ms. Total solver calls (SAT/UNSAT): 10686(915/9771)
May 28, 2018 5:13:06 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of Finished co-enabling matrix. took 10163 ms. Total solver calls (SAT/UNSAT): 10795(926/9869)
May 28, 2018 5:13:06 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver computeDoNotAccord
INFO: Computing Do-Not-Accords matrix : 230 transitions.
May 28, 2018 5:13:06 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of Completed DNA matrix. took 11 ms. Total solver calls (SAT/UNSAT): 0(0/0)
May 28, 2018 5:13:06 AM fr.lip6.move.gal.gal2pins.Gal2PinsTransformerNext transform
INFO: Built C files in 13385ms conformant to PINS in folder :/home/mcc/execution

Sequence of Actions to be Executed by the VM

This is useful if one wants to reexecute the tool in the VM from the submitted image disk.

set -x
# this is for BenchKit: configuration of major elements for the test
export BK_INPUT="LamportFastMutEx-PT-4"
export BK_EXAMINATION="LTLFireability"
export BK_TOOL="itstools"
export BK_RESULT_DIR="/tmp/BK_RESULTS/OUTPUTS"
export BK_TIME_CONFINEMENT="3600"
export BK_MEMORY_CONFINEMENT="16384"

# this is specific to your benchmark or test

export BIN_DIR="$HOME/BenchKit/bin"

# remove the execution directoty if it exists (to avoid increse of .vmdk images)
if [ -d execution ] ; then
rm -rf execution
fi

tar xzf /home/mcc/BenchKit/INPUTS/LamportFastMutEx-PT-4.tgz
mv LamportFastMutEx-PT-4 execution
cd execution
pwd
ls -lh

# this is for BenchKit: explicit launching of the test
echo "====================================================================="
echo " Generated by BenchKit 2-3637"
echo " Executing tool itstools"
echo " Input is LamportFastMutEx-PT-4, examination is LTLFireability"
echo " Time confinement is $BK_TIME_CONFINEMENT seconds"
echo " Memory confinement is 16384 MBytes"
echo " Number of cores is 4"
echo " Run identifier is r260-csrt-152732585200036"
echo "====================================================================="
echo
echo "--------------------"
echo "content from stdout:"
echo
echo "=== Data for post analysis generated by BenchKit (invocation template)"
echo
if [ "LTLFireability" = "UpperBounds" ] ; then
echo "The expected result is a vector of positive values"
echo NUM_VECTOR
elif [ "LTLFireability" != "StateSpace" ] ; then
echo "The expected result is a vector of booleans"
echo BOOL_VECTOR
else
echo "no data necessary for post analysis"
fi
echo
if [ -f "LTLFireability.txt" ] ; then
echo "here is the order used to build the result vector(from text file)"
for x in $(grep Property LTLFireability.txt | cut -d ' ' -f 2 | sort -u) ; do
echo "FORMULA_NAME $x"
done
elif [ -f "LTLFireability.xml" ] ; then # for cunf (txt files deleted;-)
echo echo "here is the order used to build the result vector(from xml file)"
for x in $(grep '' LTLFireability.xml | cut -d '>' -f 2 | cut -d '<' -f 1 | sort -u) ; do
echo "FORMULA_NAME $x"
done
fi
echo
echo "=== Now, execution of the tool begins"
echo
echo -n "BK_START "
date -u +%s%3N
echo
timeout -s 9 $BK_TIME_CONFINEMENT bash -c "/home/mcc/BenchKit/BenchKit_head.sh 2> STDERR ; echo ; echo -n \"BK_STOP \" ; date -u +%s%3N"
if [ $? -eq 137 ] ; then
echo
echo "BK_TIME_CONFINEMENT_REACHED"
fi
echo
echo "--------------------"
echo "content from stderr:"
echo
cat STDERR ;