Execution Chart

We display below the execution chart for this examination (boot time has been removed).

Trace from the execution

Waiting for the VM to be ready (probing ssh)
.................................................................
/home/mcc/execution
total 204K
-rw-r--r-- 1 mcc users 3.3K May 15 18:54 CTLCardinality.txt
-rw-r--r-- 1 mcc users 17K May 15 18:54 CTLCardinality.xml
-rw-r--r-- 1 mcc users 2.4K May 15 18:54 CTLFireability.txt
-rw-r--r-- 1 mcc users 14K May 15 18:54 CTLFireability.xml
-rw-r--r-- 1 mcc users 4.0K May 15 18:50 GenericPropertiesDefinition.xml
-rw-r--r-- 1 mcc users 6.3K May 15 18:50 GenericPropertiesVerdict.xml
-rw-r--r-- 1 mcc users 2.2K May 26 09:26 LTLCardinality.txt
-rw-r--r-- 1 mcc users 7.8K May 26 09:26 LTLCardinality.xml
-rw-r--r-- 1 mcc users 2.0K May 26 09:26 LTLFireability.txt
-rw-r--r-- 1 mcc users 9.2K May 26 09:26 LTLFireability.xml
-rw-r--r-- 1 mcc users 3.4K May 15 18:54 ReachabilityCardinality.txt
-rw-r--r-- 1 mcc users 17K May 15 18:54 ReachabilityCardinality.xml
-rw-r--r-- 1 mcc users 113 May 15 18:54 ReachabilityDeadlock.txt
-rw-r--r-- 1 mcc users 351 May 15 18:54 ReachabilityDeadlock.xml
-rw-r--r-- 1 mcc users 3.3K May 15 18:54 ReachabilityFireability.txt
-rw-r--r-- 1 mcc users 20K May 15 18:54 ReachabilityFireability.xml
-rw-r--r-- 1 mcc users 1.7K May 15 18:54 UpperBounds.txt
-rw-r--r-- 1 mcc users 3.8K May 15 18:54 UpperBounds.xml
-rw-r--r-- 1 mcc users 5 May 15 18:50 equiv_pt
-rw-r--r-- 1 mcc users 2 May 15 18:50 instance
-rw-r--r-- 1 mcc users 5 May 15 18:50 iscolored
-rw-r--r-- 1 mcc users 41K May 15 18:50 model.pnml
=====================================================================
Generated by BenchKit 2-3637
Executing tool itstools
Input is LamportFastMutEx-COL-5, examination is LTLFireability
Time confinement is 3600 seconds
Memory confinement is 16384 MBytes
Number of cores is 4
Run identifier is r260-csrt-152732585200024
=====================================================================

--------------------
content from stdout:

=== Data for post analysis generated by BenchKit (invocation template)

The expected result is a vector of booleans
BOOL_VECTOR

here is the order used to build the result vector(from text file)
FORMULA_NAME LamportFastMutEx-COL-5-LTLFireability-00
FORMULA_NAME LamportFastMutEx-COL-5-LTLFireability-01
FORMULA_NAME LamportFastMutEx-COL-5-LTLFireability-02
FORMULA_NAME LamportFastMutEx-COL-5-LTLFireability-03
FORMULA_NAME LamportFastMutEx-COL-5-LTLFireability-04
FORMULA_NAME LamportFastMutEx-COL-5-LTLFireability-05
FORMULA_NAME LamportFastMutEx-COL-5-LTLFireability-06
FORMULA_NAME LamportFastMutEx-COL-5-LTLFireability-07
FORMULA_NAME LamportFastMutEx-COL-5-LTLFireability-08
FORMULA_NAME LamportFastMutEx-COL-5-LTLFireability-09
FORMULA_NAME LamportFastMutEx-COL-5-LTLFireability-10
FORMULA_NAME LamportFastMutEx-COL-5-LTLFireability-11
FORMULA_NAME LamportFastMutEx-COL-5-LTLFireability-12
FORMULA_NAME LamportFastMutEx-COL-5-LTLFireability-13
FORMULA_NAME LamportFastMutEx-COL-5-LTLFireability-14
FORMULA_NAME LamportFastMutEx-COL-5-LTLFireability-15

=== Now, execution of the tool begins

BK_START 1527484358127

05:12:40.451 [main] ERROR PNML validation - The rng grammar file can't be accessed : www.pnml.org
05:12:40.453 [main] ERROR import - Grammar file errors have been raised, the validation can't be done, process will continue without Grammar validation
Using solver Z3 to compute partial order matrices.
Built C files in :
/home/mcc/execution
Invoking ITS tools like this :CommandLine [args=[/home/mcc/BenchKit/itstools/plugins/fr.lip6.move.gal.itstools.binaries_1.0.0.201805151631/bin/its-ltl-linux64, --gc-threshold, 2000000, -i, /home/mcc/execution/LTLFireability.pnml.gal, -t, CGAL, -LTL, /home/mcc/execution/LTLFireability.ltl, -c, -stutter-deadlock], workingDir=/home/mcc/execution]

its-ltl command run as :

/home/mcc/BenchKit/itstools/plugins/fr.lip6.move.gal.itstools.binaries_1.0.0.201805151631/bin/its-ltl-linux64 --gc-threshold 2000000 -i /home/mcc/execution/LTLFireability.pnml.gal -t CGAL -LTL /home/mcc/execution/LTLFireability.ltl -c -stutter-deadlock
Read 16 LTL properties
Checking formula 0 : !((F("((((((((((((((((((((((((((((((((((((((pid0.P_await_13_0>=1)&&(pid_x_pid0.wait_0>=1))&&(pid_x_bool0.b_0>=1))||(((pid1.P_await_13_1>=1)&&(pid_x_pid6.wait_6>=1))&&(pid_x_bool0.b_0>=1)))||(((pid2.P_await_13_2>=1)&&(pid_x_pid12.wait_12>=1))&&(pid_x_bool0.b_0>=1)))||(((pid3.P_await_13_3>=1)&&(pid_x_pid18.wait_18>=1))&&(pid_x_bool0.b_0>=1)))||(((pid4.P_await_13_4>=1)&&(pid_x_pid24.wait_24>=1))&&(pid_x_bool0.b_0>=1)))||(((pid5.P_await_13_5>=1)&&(pid_x_pid30.wait_30>=1))&&(pid_x_bool0.b_0>=1)))||(((pid0.P_await_13_0>=1)&&(pid_x_pid1.wait_1>=1))&&(pid_x_bool2.b_2>=1)))||(((pid1.P_await_13_1>=1)&&(pid_x_pid7.wait_7>=1))&&(pid_x_bool2.b_2>=1)))||(((pid2.P_await_13_2>=1)&&(pid_x_pid13.wait_13>=1))&&(pid_x_bool2.b_2>=1)))||(((pid3.P_await_13_3>=1)&&(pid_x_pid19.wait_19>=1))&&(pid_x_bool2.b_2>=1)))||(((pid4.P_await_13_4>=1)&&(pid_x_pid25.wait_25>=1))&&(pid_x_bool2.b_2>=1)))||(((pid5.P_await_13_5>=1)&&(pid_x_pid31.wait_31>=1))&&(pid_x_bool2.b_2>=1)))||(((pid0.P_await_13_0>=1)&&(pid_x_pid2.wait_2>=1))&&(pid_x_bool4.b_4>=1)))||(((pid1.P_await_13_1>=1)&&(pid_x_pid8.wait_8>=1))&&(pid_x_bool4.b_4>=1)))||(((pid2.P_await_13_2>=1)&&(pid_x_pid14.wait_14>=1))&&(pid_x_bool4.b_4>=1)))||(((pid3.P_await_13_3>=1)&&(pid_x_pid20.wait_20>=1))&&(pid_x_bool4.b_4>=1)))||(((pid4.P_await_13_4>=1)&&(pid_x_pid26.wait_26>=1))&&(pid_x_bool4.b_4>=1)))||(((pid5.P_await_13_5>=1)&&(pid_x_pid32.wait_32>=1))&&(pid_x_bool4.b_4>=1)))||(((pid0.P_await_13_0>=1)&&(pid_x_pid3.wait_3>=1))&&(pid_x_bool6.b_6>=1)))||(((pid1.P_await_13_1>=1)&&(pid_x_pid9.wait_9>=1))&&(pid_x_bool6.b_6>=1)))||(((pid2.P_await_13_2>=1)&&(pid_x_pid15.wait_15>=1))&&(pid_x_bool6.b_6>=1)))||(((pid3.P_await_13_3>=1)&&(pid_x_pid21.wait_21>=1))&&(pid_x_bool6.b_6>=1)))||(((pid4.P_await_13_4>=1)&&(pid_x_pid27.wait_27>=1))&&(pid_x_bool6.b_6>=1)))||(((pid5.P_await_13_5>=1)&&(pid_x_pid33.wait_33>=1))&&(pid_x_bool6.b_6>=1)))||(((pid0.P_await_13_0>=1)&&(pid_x_pid4.wait_4>=1))&&(pid_x_bool8.b_8>=1)))||(((pid1.P_await_13_1>=1)&&(pid_x_pid10.wait_10>=1))&&(pid_x_bool8.b_8>=1)))||(((pid2.P_await_13_2>=1)&&(pid_x_pid16.wait_16>=1))&&(pid_x_bool8.b_8>=1)))||(((pid3.P_await_13_3>=1)&&(pid_x_pid22.wait_22>=1))&&(pid_x_bool8.b_8>=1)))||(((pid4.P_await_13_4>=1)&&(pid_x_pid28.wait_28>=1))&&(pid_x_bool8.b_8>=1)))||(((pid5.P_await_13_5>=1)&&(pid_x_pid34.wait_34>=1))&&(pid_x_bool8.b_8>=1)))||(((pid0.P_await_13_0>=1)&&(pid_x_pid5.wait_5>=1))&&(pid_x_bool10.b_10>=1)))||(((pid1.P_await_13_1>=1)&&(pid_x_pid11.wait_11>=1))&&(pid_x_bool10.b_10>=1)))||(((pid2.P_await_13_2>=1)&&(pid_x_pid17.wait_17>=1))&&(pid_x_bool10.b_10>=1)))||(((pid3.P_await_13_3>=1)&&(pid_x_pid23.wait_23>=1))&&(pid_x_bool10.b_10>=1)))||(((pid4.P_await_13_4>=1)&&(pid_x_pid29.wait_29>=1))&&(pid_x_bool10.b_10>=1)))||(((pid5.P_await_13_5>=1)&&(pid_x_pid35.wait_35>=1))&&(pid_x_bool10.b_10>=1)))")))
Formula 0 simplified : !F"((((((((((((((((((((((((((((((((((((((pid0.P_await_13_0>=1)&&(pid_x_pid0.wait_0>=1))&&(pid_x_bool0.b_0>=1))||(((pid1.P_await_13_1>=1)&&(pid_x_pid6.wait_6>=1))&&(pid_x_bool0.b_0>=1)))||(((pid2.P_await_13_2>=1)&&(pid_x_pid12.wait_12>=1))&&(pid_x_bool0.b_0>=1)))||(((pid3.P_await_13_3>=1)&&(pid_x_pid18.wait_18>=1))&&(pid_x_bool0.b_0>=1)))||(((pid4.P_await_13_4>=1)&&(pid_x_pid24.wait_24>=1))&&(pid_x_bool0.b_0>=1)))||(((pid5.P_await_13_5>=1)&&(pid_x_pid30.wait_30>=1))&&(pid_x_bool0.b_0>=1)))||(((pid0.P_await_13_0>=1)&&(pid_x_pid1.wait_1>=1))&&(pid_x_bool2.b_2>=1)))||(((pid1.P_await_13_1>=1)&&(pid_x_pid7.wait_7>=1))&&(pid_x_bool2.b_2>=1)))||(((pid2.P_await_13_2>=1)&&(pid_x_pid13.wait_13>=1))&&(pid_x_bool2.b_2>=1)))||(((pid3.P_await_13_3>=1)&&(pid_x_pid19.wait_19>=1))&&(pid_x_bool2.b_2>=1)))||(((pid4.P_await_13_4>=1)&&(pid_x_pid25.wait_25>=1))&&(pid_x_bool2.b_2>=1)))||(((pid5.P_await_13_5>=1)&&(pid_x_pid31.wait_31>=1))&&(pid_x_bool2.b_2>=1)))||(((pid0.P_await_13_0>=1)&&(pid_x_pid2.wait_2>=1))&&(pid_x_bool4.b_4>=1)))||(((pid1.P_await_13_1>=1)&&(pid_x_pid8.wait_8>=1))&&(pid_x_bool4.b_4>=1)))||(((pid2.P_await_13_2>=1)&&(pid_x_pid14.wait_14>=1))&&(pid_x_bool4.b_4>=1)))||(((pid3.P_await_13_3>=1)&&(pid_x_pid20.wait_20>=1))&&(pid_x_bool4.b_4>=1)))||(((pid4.P_await_13_4>=1)&&(pid_x_pid26.wait_26>=1))&&(pid_x_bool4.b_4>=1)))||(((pid5.P_await_13_5>=1)&&(pid_x_pid32.wait_32>=1))&&(pid_x_bool4.b_4>=1)))||(((pid0.P_await_13_0>=1)&&(pid_x_pid3.wait_3>=1))&&(pid_x_bool6.b_6>=1)))||(((pid1.P_await_13_1>=1)&&(pid_x_pid9.wait_9>=1))&&(pid_x_bool6.b_6>=1)))||(((pid2.P_await_13_2>=1)&&(pid_x_pid15.wait_15>=1))&&(pid_x_bool6.b_6>=1)))||(((pid3.P_await_13_3>=1)&&(pid_x_pid21.wait_21>=1))&&(pid_x_bool6.b_6>=1)))||(((pid4.P_await_13_4>=1)&&(pid_x_pid27.wait_27>=1))&&(pid_x_bool6.b_6>=1)))||(((pid5.P_await_13_5>=1)&&(pid_x_pid33.wait_33>=1))&&(pid_x_bool6.b_6>=1)))||(((pid0.P_await_13_0>=1)&&(pid_x_pid4.wait_4>=1))&&(pid_x_bool8.b_8>=1)))||(((pid1.P_await_13_1>=1)&&(pid_x_pid10.wait_10>=1))&&(pid_x_bool8.b_8>=1)))||(((pid2.P_await_13_2>=1)&&(pid_x_pid16.wait_16>=1))&&(pid_x_bool8.b_8>=1)))||(((pid3.P_await_13_3>=1)&&(pid_x_pid22.wait_22>=1))&&(pid_x_bool8.b_8>=1)))||(((pid4.P_await_13_4>=1)&&(pid_x_pid28.wait_28>=1))&&(pid_x_bool8.b_8>=1)))||(((pid5.P_await_13_5>=1)&&(pid_x_pid34.wait_34>=1))&&(pid_x_bool8.b_8>=1)))||(((pid0.P_await_13_0>=1)&&(pid_x_pid5.wait_5>=1))&&(pid_x_bool10.b_10>=1)))||(((pid1.P_await_13_1>=1)&&(pid_x_pid11.wait_11>=1))&&(pid_x_bool10.b_10>=1)))||(((pid2.P_await_13_2>=1)&&(pid_x_pid17.wait_17>=1))&&(pid_x_bool10.b_10>=1)))||(((pid3.P_await_13_3>=1)&&(pid_x_pid23.wait_23>=1))&&(pid_x_bool10.b_10>=1)))||(((pid4.P_await_13_4>=1)&&(pid_x_pid29.wait_29>=1))&&(pid_x_bool10.b_10>=1)))||(((pid5.P_await_13_5>=1)&&(pid_x_pid35.wait_35>=1))&&(pid_x_bool10.b_10>=1)))"
built 82 ordering constraints for composite.
Presburger conditions satisfied. Using coverability to approximate state space in K-Induction.
Normalized transition count is 246
// Phase 1: matrix 246 rows 174 cols
invariant :pid2:P_start_1_2 + pid2:P_setx_3_2 + pid2:P_setbi_5_2 + pid2:P_ify0_4_2 + pid2:P_sety_9_2 + pid2:P_ifxi_10_2 + pid2:P_setbi_11_2 + pid2:P_fordo_12_2 + pid2:P_await_13_2 + pid2:P_ifyi_15_2 + pid2:P_awaity_2 + pid2:P_CS_21_2 + pid2:P_setbi_24_2 = 1
invariant :pid_x_pid33:wait_33 + pid_x_pid33:done_33 + -1'pid5:P_await_13_5 = 0
invariant :pid_x_pid11:wait_11 + pid_x_pid11:done_11 + -1'pid1:P_await_13_1 = 0
invariant :pid_x_pid2:wait_2 + pid_x_pid2:done_2 + -1'pid0:P_await_13_0 = 0
invariant :pid_x_pid29:wait_29 + pid_x_pid29:done_29 + -1'pid4:P_await_13_4 = 0
invariant :pid_x_bool10:b_10 + pid_x_bool11:b_11 = 1
invariant :pid_x_pid6:wait_6 + pid_x_pid6:done_6 = 0
invariant :pid_x_pid5:wait_5 + pid_x_pid5:done_5 + -1'pid0:P_await_13_0 = 0
invariant :pid_x_pid31:wait_31 + pid_x_pid31:done_31 + -1'pid5:P_await_13_5 = 0
invariant :pid_x_bool4:b_4 + pid_x_bool5:b_5 = 1
invariant :pid_x_pid34:wait_34 + pid_x_pid34:done_34 + -1'pid5:P_await_13_5 = 0
invariant :pid_x_pid3:wait_3 + pid_x_pid3:done_3 + -1'pid0:P_await_13_0 = 0
invariant :pid_x_pid17:wait_17 + pid_x_pid17:done_17 + -1'pid2:P_await_13_2 = 0
invariant :pid_x_bool0:b_0 + pid_x_bool1:b_1 = 0
invariant :pid0:y_0 + pid1:y_1 + pid2:y_2 + pid3:y_3 + pid4:y_4 + pid5:y_5 = 1
invariant :pid4:P_start_1_4 + pid4:P_setx_3_4 + pid4:P_setbi_5_4 + pid4:P_ify0_4_4 + pid4:P_sety_9_4 + pid4:P_ifxi_10_4 + pid4:P_setbi_11_4 + pid4:P_fordo_12_4 + pid4:P_await_13_4 + pid4:P_ifyi_15_4 + pid4:P_awaity_4 + pid4:P_CS_21_4 + pid4:P_setbi_24_4 = 1
invariant :pid_x_pid7:wait_7 + pid_x_pid7:done_7 + -1'pid1:P_await_13_1 = 0
invariant :pid_x_pid27:wait_27 + pid_x_pid27:done_27 + -1'pid4:P_await_13_4 = 0
invariant :pid_x_pid1:wait_1 + pid_x_pid1:done_1 + -1'pid0:P_await_13_0 = 0
invariant :pid_x_pid35:wait_35 + pid_x_pid35:done_35 + -1'pid5:P_await_13_5 = 0
invariant :pid_x_pid9:wait_9 + pid_x_pid9:done_9 + -1'pid1:P_await_13_1 = 0
invariant :pid_x_pid21:wait_21 + pid_x_pid21:done_21 + -1'pid3:P_await_13_3 = 0
invariant :pid_x_pid22:wait_22 + pid_x_pid22:done_22 + -1'pid3:P_await_13_3 = 0
invariant :pid_x_pid28:wait_28 + pid_x_pid28:done_28 + -1'pid4:P_await_13_4 = 0
invariant :pid_x_bool6:b_6 + pid_x_bool7:b_7 = 1
invariant :pid_x_bool2:b_2 + pid_x_bool3:b_3 = 1
invariant :pid_x_pid19:wait_19 + pid_x_pid19:done_19 + -1'pid3:P_await_13_3 = 0
invariant :pid_x_pid14:wait_14 + pid_x_pid14:done_14 + -1'pid2:P_await_13_2 = 0
invariant :pid_x_pid8:wait_8 + pid_x_pid8:done_8 + -1'pid1:P_await_13_1 = 0
invariant :pid_x_pid30:wait_30 + pid_x_pid30:done_30 = 0
invariant :pid_x_pid13:wait_13 + pid_x_pid13:done_13 + -1'pid2:P_await_13_2 = 0
invariant :pid_x_pid24:wait_24 + pid_x_pid24:done_24 = 0
invariant :pid_x_pid25:wait_25 + pid_x_pid25:done_25 + -1'pid4:P_await_13_4 = 0
invariant :pid_x_pid10:wait_10 + pid_x_pid10:done_10 + -1'pid1:P_await_13_1 = 0
invariant :pid5:P_start_1_5 + pid5:P_setx_3_5 + pid5:P_setbi_5_5 + pid5:P_ify0_4_5 + pid5:P_sety_9_5 + pid5:P_ifxi_10_5 + pid5:P_setbi_11_5 + pid5:P_fordo_12_5 + pid5:P_await_13_5 + pid5:P_ifyi_15_5 + pid5:P_awaity_5 + pid5:P_CS_21_5 + pid5:P_setbi_24_5 = 1
invariant :pid_x_pid18:wait_18 + pid_x_pid18:done_18 = 0
invariant :pid_x_pid26:wait_26 + pid_x_pid26:done_26 + -1'pid4:P_await_13_4 = 0
invariant :pid_x_bool8:b_8 + pid_x_bool9:b_9 = 1
invariant :pid0:P_start_1_0 + pid0:P_setx_3_0 + pid0:P_setbi_5_0 + pid0:P_ify0_4_0 + pid0:P_sety_9_0 + pid0:P_ifxi_10_0 + pid0:P_setbi_11_0 + pid0:P_fordo_12_0 + pid0:P_await_13_0 + pid0:P_ifyi_15_0 + pid0:P_awaity_0 + pid0:P_CS_21_0 + pid0:P_setbi_24_0 = 0
invariant :pid_x_pid16:wait_16 + pid_x_pid16:done_16 + -1'pid2:P_await_13_2 = 0
invariant :pid_x_pid0:wait_0 + pid_x_pid0:done_0 = 0
invariant :pid1:P_start_1_1 + pid1:P_setx_3_1 + pid1:P_setbi_5_1 + pid1:P_ify0_4_1 + pid1:P_sety_9_1 + pid1:P_ifxi_10_1 + pid1:P_setbi_11_1 + pid1:P_fordo_12_1 + pid1:P_await_13_1 + pid1:P_ifyi_15_1 + pid1:P_awaity_1 + pid1:P_CS_21_1 + pid1:P_setbi_24_1 = 1
invariant :pid_x_pid32:wait_32 + pid_x_pid32:done_32 + -1'pid5:P_await_13_5 = 0
invariant :pid_x_pid12:wait_12 + pid_x_pid12:done_12 = 0
invariant :pid_x_pid15:wait_15 + pid_x_pid15:done_15 + -1'pid2:P_await_13_2 = 0
invariant :pid_x_pid4:wait_4 + pid_x_pid4:done_4 + -1'pid0:P_await_13_0 = 0
invariant :pid_x_pid23:wait_23 + pid_x_pid23:done_23 + -1'pid3:P_await_13_3 = 0
invariant :pid0:x_0 + pid1:x_1 + pid2:x_2 + pid3:x_3 + pid4:x_4 + pid5:x_5 = 1
invariant :pid_x_pid20:wait_20 + pid_x_pid20:done_20 + -1'pid3:P_await_13_3 = 0
invariant :pid3:P_start_1_3 + pid3:P_setx_3_3 + pid3:P_setbi_5_3 + pid3:P_ify0_4_3 + pid3:P_sety_9_3 + pid3:P_ifxi_10_3 + pid3:P_setbi_11_3 + pid3:P_fordo_12_3 + pid3:P_await_13_3 + pid3:P_ifyi_15_3 + pid3:P_awaity_3 + pid3:P_CS_21_3 + pid3:P_setbi_24_3 = 1
Reverse transition relation is NOT exact ! Due to transitions T_setbi_2_1, T_setbi_2_2, T_setbi_2_3, T_setbi_2_4, T_setbi_2_5, T_setx_3_0, T_setx_3_1, T_setx_3_2, T_setx_3_3, T_setx_3_4, T_setx_3_5, T_setbi_5_1, T_setbi_5_2, T_setbi_5_3, T_setbi_5_4, T_setbi_5_5, T_awaity, T_sety_9_1, T_sety_9_2, T_sety_9_3, T_sety_9_4, T_sety_9_5, T_setbi_11_1, T_setbi_11_2, T_setbi_11_3, T_setbi_11_4, T_setbi_11_5, T_ynei_15_1, T_ynei_15_2, T_ynei_15_3, T_ynei_15_4, T_ynei_15_5, T_sety0_23, T_setbi_24_1, T_setbi_24_2, T_setbi_24_3, T_setbi_24_4, T_setbi_24_5, pid1.T_yeqi_15_1, pid2.T_yeqi_15_2, pid3.T_yeqi_15_3, pid4.T_yeqi_15_4, pid5.T_yeqi_15_5, Intersection with reachable at each step enabled. (destroyed/reverse/intersect/total) :12/27/43/82
2 unique states visited
2 strongly connected components in search stack
2 transitions explored
2 items max in DFS search stack
13439 ticks for the emptiness check
Model ,|S| ,Time ,Mem(kb) ,fin. SDD ,fin. DDD ,peak SDD ,peak DDD ,SDD Hom ,SDD cache peak ,DDD Hom ,DDD cachepeak ,SHom cache
STATS,0,134.431,1984060,1,0,4.16546e+06,11135,8315,5.10262e+06,331,124678,10468665
an accepting run exists (use option '-e' to print it)
Formula 0 is FALSE accepting run found.
FORMULA LamportFastMutEx-COL-5-LTLFireability-00 FALSE TECHNIQUES DECISION_DIAGRAMS TOPOLOGICAL USE_NUPN
Checking formula 1 : !(((G("((((((pid0.P_fordo_12_0>=1)||(pid1.P_fordo_12_1>=1))||(pid2.P_fordo_12_2>=1))||(pid3.P_fordo_12_3>=1))||(pid4.P_fordo_12_4>=1))||(pid5.P_fordo_12_5>=1))"))U(("(((((((((((((pid0.P_setbi_11_0>=1)&&(pid_x_bool0.b_0>=1))||((pid1.P_setbi_11_1>=1)&&(pid_x_bool2.b_2>=1)))||((pid2.P_setbi_11_2>=1)&&(pid_x_bool4.b_4>=1)))||((pid3.P_setbi_11_3>=1)&&(pid_x_bool6.b_6>=1)))||((pid4.P_setbi_11_4>=1)&&(pid_x_bool8.b_8>=1)))||((pid5.P_setbi_11_5>=1)&&(pid_x_bool10.b_10>=1)))||((pid0.P_setbi_11_0>=1)&&(pid_x_bool1.b_1>=1)))||((pid1.P_setbi_11_1>=1)&&(pid_x_bool3.b_3>=1)))||((pid2.P_setbi_11_2>=1)&&(pid_x_bool5.b_5>=1)))||((pid3.P_setbi_11_3>=1)&&(pid_x_bool7.b_7>=1)))||((pid4.P_setbi_11_4>=1)&&(pid_x_bool9.b_9>=1)))||((pid5.P_setbi_11_5>=1)&&(pid_x_bool11.b_11>=1)))")U(X("(((((((((((pid_x_pid2.done_2>=1)&&(pid_x_pid1.done_1>=1))&&(pid_x_pid4.done_4>=1))&&(pid_x_pid5.done_5>=1))&&(pid_x_pid3.done_3>=1))&&(pid0.P_await_13_0>=1))||((((((pid_x_pid8.done_8>=1)&&(pid_x_pid7.done_7>=1))&&(pid_x_pid10.done_10>=1))&&(pid_x_pid11.done_11>=1))&&(pid_x_pid9.done_9>=1))&&(pid1.P_await_13_1>=1)))||((((((pid_x_pid14.done_14>=1)&&(pid_x_pid13.done_13>=1))&&(pid_x_pid16.done_16>=1))&&(pid_x_pid17.done_17>=1))&&(pid_x_pid15.done_15>=1))&&(pid2.P_await_13_2>=1)))||((((((pid_x_pid20.done_20>=1)&&(pid_x_pid19.done_19>=1))&&(pid_x_pid22.done_22>=1))&&(pid_x_pid23.done_23>=1))&&(pid_x_pid21.done_21>=1))&&(pid3.P_await_13_3>=1)))||((((((pid_x_pid26.done_26>=1)&&(pid_x_pid25.done_25>=1))&&(pid_x_pid28.done_28>=1))&&(pid_x_pid29.done_29>=1))&&(pid_x_pid27.done_27>=1))&&(pid4.P_await_13_4>=1)))||((((((pid_x_pid32.done_32>=1)&&(pid_x_pid31.done_31>=1))&&(pid_x_pid34.done_34>=1))&&(pid_x_pid35.done_35>=1))&&(pid_x_pid33.done_33>=1))&&(pid5.P_await_13_5>=1)))")))))
Formula 1 simplified : !(G"((((((pid0.P_fordo_12_0>=1)||(pid1.P_fordo_12_1>=1))||(pid2.P_fordo_12_2>=1))||(pid3.P_fordo_12_3>=1))||(pid4.P_fordo_12_4>=1))||(pid5.P_fordo_12_5>=1))" U ("(((((((((((((pid0.P_setbi_11_0>=1)&&(pid_x_bool0.b_0>=1))||((pid1.P_setbi_11_1>=1)&&(pid_x_bool2.b_2>=1)))||((pid2.P_setbi_11_2>=1)&&(pid_x_bool4.b_4>=1)))||((pid3.P_setbi_11_3>=1)&&(pid_x_bool6.b_6>=1)))||((pid4.P_setbi_11_4>=1)&&(pid_x_bool8.b_8>=1)))||((pid5.P_setbi_11_5>=1)&&(pid_x_bool10.b_10>=1)))||((pid0.P_setbi_11_0>=1)&&(pid_x_bool1.b_1>=1)))||((pid1.P_setbi_11_1>=1)&&(pid_x_bool3.b_3>=1)))||((pid2.P_setbi_11_2>=1)&&(pid_x_bool5.b_5>=1)))||((pid3.P_setbi_11_3>=1)&&(pid_x_bool7.b_7>=1)))||((pid4.P_setbi_11_4>=1)&&(pid_x_bool9.b_9>=1)))||((pid5.P_setbi_11_5>=1)&&(pid_x_bool11.b_11>=1)))" U X"(((((((((((pid_x_pid2.done_2>=1)&&(pid_x_pid1.done_1>=1))&&(pid_x_pid4.done_4>=1))&&(pid_x_pid5.done_5>=1))&&(pid_x_pid3.done_3>=1))&&(pid0.P_await_13_0>=1))||((((((pid_x_pid8.done_8>=1)&&(pid_x_pid7.done_7>=1))&&(pid_x_pid10.done_10>=1))&&(pid_x_pid11.done_11>=1))&&(pid_x_pid9.done_9>=1))&&(pid1.P_await_13_1>=1)))||((((((pid_x_pid14.done_14>=1)&&(pid_x_pid13.done_13>=1))&&(pid_x_pid16.done_16>=1))&&(pid_x_pid17.done_17>=1))&&(pid_x_pid15.done_15>=1))&&(pid2.P_await_13_2>=1)))||((((((pid_x_pid20.done_20>=1)&&(pid_x_pid19.done_19>=1))&&(pid_x_pid22.done_22>=1))&&(pid_x_pid23.done_23>=1))&&(pid_x_pid21.done_21>=1))&&(pid3.P_await_13_3>=1)))||((((((pid_x_pid26.done_26>=1)&&(pid_x_pid25.done_25>=1))&&(pid_x_pid28.done_28>=1))&&(pid_x_pid29.done_29>=1))&&(pid_x_pid27.done_27>=1))&&(pid4.P_await_13_4>=1)))||((((((pid_x_pid32.done_32>=1)&&(pid_x_pid31.done_31>=1))&&(pid_x_pid34.done_34>=1))&&(pid_x_pid35.done_35>=1))&&(pid_x_pid33.done_33>=1))&&(pid5.P_await_13_5>=1)))"))
Running compilation step : CommandLine [args=[gcc, -c, -I/home/mcc/BenchKit//lts_install_dir//include, -I., -std=c99, -fPIC, -O3, model.c], workingDir=/home/mcc/execution]
Compilation finished in 4808 ms.
Running link step : CommandLine [args=[gcc, -shared, -o, gal.so, model.o], workingDir=/home/mcc/execution]
Link finished in 104 ms.
Running LTSmin : CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=1, --when, --ltl, ([]((LTLAP1==true)))U(((LTLAP2==true))U(X((LTLAP3==true)))), --buchi-type=spotba], workingDir=/home/mcc/execution]
LTSmin run took 106 ms.
FORMULA LamportFastMutEx-COL-5-LTLFireability-01 FALSE TECHNIQUES PARTIAL_ORDER EXPLICIT LTSMIN SAT_SMT
Running LTSmin : CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=1, --when, --ltl, ([](X((LTLAP4==true))))U(X(<>([]((LTLAP5==true))))), --buchi-type=spotba], workingDir=/home/mcc/execution]
LTSmin run took 64 ms.
FORMULA LamportFastMutEx-COL-5-LTLFireability-02 FALSE TECHNIQUES PARTIAL_ORDER EXPLICIT LTSMIN SAT_SMT
Running LTSmin : CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=1, -p, --pins-guards, --when, --ltl, []([]((LTLAP6==true))), --buchi-type=spotba], workingDir=/home/mcc/execution]
4 unique states visited
4 strongly connected components in search stack
4 transitions explored
4 items max in DFS search stack
11252 ticks for the emptiness check
Model ,|S| ,Time ,Mem(kb) ,fin. SDD ,fin. DDD ,peak SDD ,peak DDD ,SDD Hom ,SDD cache peak ,DDD Hom ,DDD cachepeak ,SHom cache
STATS,0,246.956,3370004,1,0,7.08982e+06,11410,1410,8.737e+06,224,131316,5173257
an accepting run exists (use option '-e' to print it)
Formula 1 is FALSE accepting run found.
FORMULA LamportFastMutEx-COL-5-LTLFireability-01 FALSE TECHNIQUES DECISION_DIAGRAMS TOPOLOGICAL USE_NUPN
Checking formula 2 : !(((G(X("(((((((pid0.y_0>=1)&&(pid0.P_ify0_4_0>=1))||((pid0.y_0>=1)&&(pid1.P_ify0_4_1>=1)))||((pid0.y_0>=1)&&(pid2.P_ify0_4_2>=1)))||((pid0.y_0>=1)&&(pid3.P_ify0_4_3>=1)))||((pid0.y_0>=1)&&(pid4.P_ify0_4_4>=1)))||((pid0.y_0>=1)&&(pid5.P_ify0_4_5>=1)))")))U(X(F(G("(((((((((((((((((((((((((((((((((((((pid0.P_sety_9_0>=1)&&(pid0.y_0>=1))||((pid1.P_sety_9_1>=1)&&(pid0.y_0>=1)))||((pid2.P_sety_9_2>=1)&&(pid0.y_0>=1)))||((pid3.P_sety_9_3>=1)&&(pid0.y_0>=1)))||((pid4.P_sety_9_4>=1)&&(pid0.y_0>=1)))||((pid5.P_sety_9_5>=1)&&(pid0.y_0>=1)))||((pid0.P_sety_9_0>=1)&&(pid1.y_1>=1)))||((pid1.P_sety_9_1>=1)&&(pid1.y_1>=1)))||((pid2.P_sety_9_2>=1)&&(pid1.y_1>=1)))||((pid3.P_sety_9_3>=1)&&(pid1.y_1>=1)))||((pid4.P_sety_9_4>=1)&&(pid1.y_1>=1)))||((pid5.P_sety_9_5>=1)&&(pid1.y_1>=1)))||((pid0.P_sety_9_0>=1)&&(pid2.y_2>=1)))||((pid1.P_sety_9_1>=1)&&(pid2.y_2>=1)))||((pid2.P_sety_9_2>=1)&&(pid2.y_2>=1)))||((pid3.P_sety_9_3>=1)&&(pid2.y_2>=1)))||((pid4.P_sety_9_4>=1)&&(pid2.y_2>=1)))||((pid5.P_sety_9_5>=1)&&(pid2.y_2>=1)))||((pid0.P_sety_9_0>=1)&&(pid3.y_3>=1)))||((pid1.P_sety_9_1>=1)&&(pid3.y_3>=1)))||((pid2.P_sety_9_2>=1)&&(pid3.y_3>=1)))||((pid3.P_sety_9_3>=1)&&(pid3.y_3>=1)))||((pid4.P_sety_9_4>=1)&&(pid3.y_3>=1)))||((pid5.P_sety_9_5>=1)&&(pid3.y_3>=1)))||((pid0.P_sety_9_0>=1)&&(pid4.y_4>=1)))||((pid1.P_sety_9_1>=1)&&(pid4.y_4>=1)))||((pid2.P_sety_9_2>=1)&&(pid4.y_4>=1)))||((pid3.P_sety_9_3>=1)&&(pid4.y_4>=1)))||((pid4.P_sety_9_4>=1)&&(pid4.y_4>=1)))||((pid5.P_sety_9_5>=1)&&(pid4.y_4>=1)))||((pid0.P_sety_9_0>=1)&&(pid5.y_5>=1)))||((pid1.P_sety_9_1>=1)&&(pid5.y_5>=1)))||((pid2.P_sety_9_2>=1)&&(pid5.y_5>=1)))||((pid3.P_sety_9_3>=1)&&(pid5.y_5>=1)))||((pid4.P_sety_9_4>=1)&&(pid5.y_5>=1)))||((pid5.P_sety_9_5>=1)&&(pid5.y_5>=1)))"))))))
Formula 2 simplified : !(GX"(((((((pid0.y_0>=1)&&(pid0.P_ify0_4_0>=1))||((pid0.y_0>=1)&&(pid1.P_ify0_4_1>=1)))||((pid0.y_0>=1)&&(pid2.P_ify0_4_2>=1)))||((pid0.y_0>=1)&&(pid3.P_ify0_4_3>=1)))||((pid0.y_0>=1)&&(pid4.P_ify0_4_4>=1)))||((pid0.y_0>=1)&&(pid5.P_ify0_4_5>=1)))" U XFG"(((((((((((((((((((((((((((((((((((((pid0.P_sety_9_0>=1)&&(pid0.y_0>=1))||((pid1.P_sety_9_1>=1)&&(pid0.y_0>=1)))||((pid2.P_sety_9_2>=1)&&(pid0.y_0>=1)))||((pid3.P_sety_9_3>=1)&&(pid0.y_0>=1)))||((pid4.P_sety_9_4>=1)&&(pid0.y_0>=1)))||((pid5.P_sety_9_5>=1)&&(pid0.y_0>=1)))||((pid0.P_sety_9_0>=1)&&(pid1.y_1>=1)))||((pid1.P_sety_9_1>=1)&&(pid1.y_1>=1)))||((pid2.P_sety_9_2>=1)&&(pid1.y_1>=1)))||((pid3.P_sety_9_3>=1)&&(pid1.y_1>=1)))||((pid4.P_sety_9_4>=1)&&(pid1.y_1>=1)))||((pid5.P_sety_9_5>=1)&&(pid1.y_1>=1)))||((pid0.P_sety_9_0>=1)&&(pid2.y_2>=1)))||((pid1.P_sety_9_1>=1)&&(pid2.y_2>=1)))||((pid2.P_sety_9_2>=1)&&(pid2.y_2>=1)))||((pid3.P_sety_9_3>=1)&&(pid2.y_2>=1)))||((pid4.P_sety_9_4>=1)&&(pid2.y_2>=1)))||((pid5.P_sety_9_5>=1)&&(pid2.y_2>=1)))||((pid0.P_sety_9_0>=1)&&(pid3.y_3>=1)))||((pid1.P_sety_9_1>=1)&&(pid3.y_3>=1)))||((pid2.P_sety_9_2>=1)&&(pid3.y_3>=1)))||((pid3.P_sety_9_3>=1)&&(pid3.y_3>=1)))||((pid4.P_sety_9_4>=1)&&(pid3.y_3>=1)))||((pid5.P_sety_9_5>=1)&&(pid3.y_3>=1)))||((pid0.P_sety_9_0>=1)&&(pid4.y_4>=1)))||((pid1.P_sety_9_1>=1)&&(pid4.y_4>=1)))||((pid2.P_sety_9_2>=1)&&(pid4.y_4>=1)))||((pid3.P_sety_9_3>=1)&&(pid4.y_4>=1)))||((pid4.P_sety_9_4>=1)&&(pid4.y_4>=1)))||((pid5.P_sety_9_5>=1)&&(pid4.y_4>=1)))||((pid0.P_sety_9_0>=1)&&(pid5.y_5>=1)))||((pid1.P_sety_9_1>=1)&&(pid5.y_5>=1)))||((pid2.P_sety_9_2>=1)&&(pid5.y_5>=1)))||((pid3.P_sety_9_3>=1)&&(pid5.y_5>=1)))||((pid4.P_sety_9_4>=1)&&(pid5.y_5>=1)))||((pid5.P_sety_9_5>=1)&&(pid5.y_5>=1)))")
LTSmin run took 204 ms.
FORMULA LamportFastMutEx-COL-5-LTLFireability-03 FALSE TECHNIQUES PARTIAL_ORDER EXPLICIT LTSMIN SAT_SMT
Running LTSmin : CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=1, --when, --ltl, X(X([](X(X((LTLAP4==true)))))), --buchi-type=spotba], workingDir=/home/mcc/execution]
LTSmin run took 63 ms.
FORMULA LamportFastMutEx-COL-5-LTLFireability-04 FALSE TECHNIQUES PARTIAL_ORDER EXPLICIT LTSMIN SAT_SMT
Running LTSmin : CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=1, --when, --ltl, <>(X(<>((LTLAP6==true)))), --buchi-type=spotba], workingDir=/home/mcc/execution]
LTSmin run took 28 ms.
FORMULA LamportFastMutEx-COL-5-LTLFireability-05 TRUE TECHNIQUES PARTIAL_ORDER EXPLICIT LTSMIN SAT_SMT
Running LTSmin : CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=1, --when, --ltl, X([]([]((LTLAP7==true)))), --buchi-type=spotba], workingDir=/home/mcc/execution]
LTSmin run took 71 ms.
FORMULA LamportFastMutEx-COL-5-LTLFireability-06 FALSE TECHNIQUES PARTIAL_ORDER EXPLICIT LTSMIN SAT_SMT
Running LTSmin : CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=1, -p, --pins-guards, --when, --ltl, (LTLAP8==true), --buchi-type=spotba], workingDir=/home/mcc/execution]
LTSmin run took 155 ms.
FORMULA LamportFastMutEx-COL-5-LTLFireability-07 FALSE TECHNIQUES PARTIAL_ORDER EXPLICIT LTSMIN SAT_SMT
Running LTSmin : CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=1, --when, --ltl, <>(X(<>(((LTLAP9==true))U((LTLAP3==true))))), --buchi-type=spotba], workingDir=/home/mcc/execution]
LTSmin run took 518 ms.
FORMULA LamportFastMutEx-COL-5-LTLFireability-08 FALSE TECHNIQUES PARTIAL_ORDER EXPLICIT LTSMIN SAT_SMT
Running LTSmin : CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=1, -p, --pins-guards, --when, --ltl, []((LTLAP6==true)), --buchi-type=spotba], workingDir=/home/mcc/execution]
LTSmin run took 211 ms.
FORMULA LamportFastMutEx-COL-5-LTLFireability-09 FALSE TECHNIQUES PARTIAL_ORDER EXPLICIT LTSMIN SAT_SMT
Running LTSmin : CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=1, -p, --pins-guards, --when, --ltl, []((LTLAP6==true)), --buchi-type=spotba], workingDir=/home/mcc/execution]
LTSmin run took 171 ms.
FORMULA LamportFastMutEx-COL-5-LTLFireability-10 FALSE TECHNIQUES PARTIAL_ORDER EXPLICIT LTSMIN SAT_SMT
Running LTSmin : CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=1, --when, --ltl, X((((LTLAP6==true))U((LTLAP10==true)))U(<>([]((LTLAP11==true))))), --buchi-type=spotba], workingDir=/home/mcc/execution]
LTSmin run took 76 ms.
FORMULA LamportFastMutEx-COL-5-LTLFireability-11 FALSE TECHNIQUES PARTIAL_ORDER EXPLICIT LTSMIN SAT_SMT
Running LTSmin : CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=1, -p, --pins-guards, --when, --ltl, (LTLAP6==true), --buchi-type=spotba], workingDir=/home/mcc/execution]
LTSmin run took 155 ms.
FORMULA LamportFastMutEx-COL-5-LTLFireability-12 TRUE TECHNIQUES PARTIAL_ORDER EXPLICIT LTSMIN SAT_SMT
Running LTSmin : CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=1, -p, --pins-guards, --when, --ltl, (<>(((LTLAP12==true))U((LTLAP13==true))))U((LTLAP3==true)), --buchi-type=spotba], workingDir=/home/mcc/execution]
LTSmin run took 173 ms.
FORMULA LamportFastMutEx-COL-5-LTLFireability-13 FALSE TECHNIQUES PARTIAL_ORDER EXPLICIT LTSMIN SAT_SMT
Running LTSmin : CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=1, -p, --pins-guards, --when, --ltl, []([](<>(((LTLAP14==true))U((LTLAP9==true))))), --buchi-type=spotba], workingDir=/home/mcc/execution]
LTSmin run took 155 ms.
FORMULA LamportFastMutEx-COL-5-LTLFireability-14 FALSE TECHNIQUES PARTIAL_ORDER EXPLICIT LTSMIN SAT_SMT
Running LTSmin : CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=1, --when, --ltl, (([]((LTLAP10==true)))U([]((LTLAP14==true))))U([]([](X((LTLAP15==true))))), --buchi-type=spotba], workingDir=/home/mcc/execution]
LTSmin run took 43 ms.
FORMULA LamportFastMutEx-COL-5-LTLFireability-15 FALSE TECHNIQUES PARTIAL_ORDER EXPLICIT LTSMIN SAT_SMT
ITS tools runner thread asked to quit. Dying gracefully.

BK_STOP 1527484611959

--------------------
content from stderr:

+ export BINDIR=/home/mcc/BenchKit/
+ BINDIR=/home/mcc/BenchKit/
++ pwd
+ export MODEL=/home/mcc/execution
+ MODEL=/home/mcc/execution
+ /home/mcc/BenchKit//runeclipse.sh /home/mcc/execution LTLFireability -its -ltsminpath /home/mcc/BenchKit//lts_install_dir/ -smt
+ ulimit -s 65536
+ [[ -z '' ]]
+ export LTSMIN_MEM_SIZE=8589934592
+ LTSMIN_MEM_SIZE=8589934592
+ /home/mcc/BenchKit//itstools/its-tools -consoleLog -data /home/mcc/execution/workspace -pnfolder /home/mcc/execution -examination LTLFireability -z3path /home/mcc/BenchKit//z3/bin/z3 -yices2path /home/mcc/BenchKit//yices/bin/yices -its -ltsminpath /home/mcc/BenchKit//lts_install_dir/ -smt -vmargs -Dosgi.locking=none -Declipse.stateSaveDelayInterval=-1 -Dosgi.configuration.area=/tmp/.eclipse -Xss8m -Xms40m -Xmx8192m -Dfile.encoding=UTF-8 -Dosgi.requiredJavaVersion=1.6
May 28, 2018 5:12:40 AM fr.lip6.move.gal.application.Application start
INFO: Running its-tools with arguments : [-pnfolder, /home/mcc/execution, -examination, LTLFireability, -z3path, /home/mcc/BenchKit//z3/bin/z3, -yices2path, /home/mcc/BenchKit//yices/bin/yices, -its, -ltsminpath, /home/mcc/BenchKit//lts_install_dir/, -smt]
May 28, 2018 5:12:40 AM fr.lip6.move.gal.application.MccTranslator transformPNML
INFO: Parsing pnml file : /home/mcc/execution/model.pnml
May 28, 2018 5:12:40 AM fr.lip6.move.gal.pnml.togal.PnmlToGalTransformer transform
INFO: Detected file is not PT type :http://www.pnml.org/version-2009/grammar/symmetricnet
May 28, 2018 5:12:40 AM fr.lip6.move.gal.pnml.togal.PnmlToGalTransformer transform
INFO: Load time of PNML (colored model parsed with PNMLFW) : 805 ms
May 28, 2018 5:12:40 AM fr.lip6.move.gal.pnml.togal.HLGALTransformer handlePage
INFO: Transformed 18 places.
May 28, 2018 5:12:40 AM fr.lip6.move.gal.pnml.togal.HLGALTransformer handlePage
INFO: Computed order using colors.
May 28, 2018 5:12:40 AM fr.lip6.move.gal.pnml.togal.HLGALTransformer handlePage
INFO: sort/places :pid * pid->wait,done,
pid * bool->b,
pid->P-start_1,x,y,P-setx_3,P-setbi_5,P-ify0_4,P-sety_9,P-ifxi_10,P-setbi_11,P-fordo_12,P-await_13,P-ifyi_15,P-awaity,P-CS_21,P-setbi_24,

May 28, 2018 5:12:40 AM fr.lip6.move.gal.pnml.togal.HLGALTransformer handlePage
INFO: Transformed 17 transitions.
May 28, 2018 5:12:40 AM fr.lip6.move.gal.pnml.togal.PnmlToGalTransformer transform
INFO: Computed order based on color domains.
May 28, 2018 5:12:40 AM fr.lip6.move.serialization.SerializationUtil systemToFile
INFO: Time to serialize gal into /home/mcc/execution/model.pnml.img.gal : 7 ms
May 28, 2018 5:12:41 AM fr.lip6.move.gal.application.MccTranslator applyOrder
INFO: Applying decomposition
May 28, 2018 5:12:41 AM fr.lip6.move.gal.instantiate.CompositeBuilder decomposeWithOrder
INFO: Decomposing Gal with order
May 28, 2018 5:12:41 AM fr.lip6.move.gal.instantiate.Instantiator fuseEqualParameters
INFO: Fused parameters : $i and $y of transition T_yeqi_15
May 28, 2018 5:12:41 AM fr.lip6.move.gal.instantiate.Instantiator fuseEqualParameters
INFO: Fused parameters : $i and $x of transition T_xeqi_10
May 28, 2018 5:12:41 AM fr.lip6.move.gal.instantiate.Instantiator instantiateParameters
INFO: On-the-fly reduction of False transitions avoided exploring 13.0 instantiations of transitions. Total transitions/syncs built is 333
May 28, 2018 5:12:41 AM fr.lip6.move.gal.instantiate.GALRewriter flatten
INFO: Flatten gal took : 78 ms
May 28, 2018 5:12:41 AM fr.lip6.move.gal.instantiate.CompositeBuilder rewriteArraysToAllowPartition
INFO: Rewriting arrays P_start_1, x, y, b, P_setx_3, P_setbi_5, P_ify0_4, P_sety_9, P_ifxi_10, P_setbi_11, P_fordo_12, wait, P_await_13, done, P_ifyi_15, P_awaity, P_CS_21, P_setbi_24 to variables to allow decomposition.
May 28, 2018 5:12:41 AM fr.lip6.move.gal.instantiate.Instantiator fuseIsomorphicEffects
INFO: Removed a total of 240 redundant transitions.
May 28, 2018 5:12:42 AM fr.lip6.move.serialization.SerializationUtil systemToFile
INFO: Time to serialize gal into /home/mcc/execution/LTLFireability.pnml.gal : 10 ms
May 28, 2018 5:12:42 AM fr.lip6.move.serialization.SerializationUtil serializePropertiesForITSLTLTools
INFO: Time to serialize properties into /home/mcc/execution/LTLFireability.ltl : 12 ms
May 28, 2018 5:12:42 AM fr.lip6.move.gal.semantics.DeterministicNextBuilder getDeterministicNext
INFO: Input system was not deterministic with 82 transitions. Expanding to a total of 399 deterministic transitions.
May 28, 2018 5:12:42 AM fr.lip6.move.gal.semantics.DeterministicNextBuilder getDeterministicNext
INFO: Determinization took 3 ms.
May 28, 2018 5:12:42 AM fr.lip6.move.gal.gal2smt.bmc.KInductionSolver computeAndDeclareInvariants
INFO: Computed 50 place invariants in 57 ms
May 28, 2018 5:12:42 AM fr.lip6.move.gal.gal2smt.bmc.KInductionSolver init
INFO: Proved 174 variables to be positive in 383 ms
May 28, 2018 5:12:42 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver computeAblingMatrix
INFO: Computing symmetric may disable matrix : 318 transitions.
May 28, 2018 5:12:42 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of disable matrix completed :0/318 took 0 ms. Total solver calls (SAT/UNSAT): 0(0/0)
May 28, 2018 5:12:42 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of Complete disable matrix. took 28 ms. Total solver calls (SAT/UNSAT): 0(0/0)
May 28, 2018 5:12:42 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver computeAblingMatrix
INFO: Computing symmetric may enable matrix : 318 transitions.
May 28, 2018 5:12:42 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of Complete enable matrix. took 19 ms. Total solver calls (SAT/UNSAT): 0(0/0)
May 28, 2018 5:12:56 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver computeCoEnablingMatrix
INFO: Computing symmetric co enabling matrix : 318 transitions.
May 28, 2018 5:12:56 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(0/318) took 149 ms. Total solver calls (SAT/UNSAT): 57(0/57)
May 28, 2018 5:12:59 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(8/318) took 3283 ms. Total solver calls (SAT/UNSAT): 509(20/489)
May 28, 2018 5:13:05 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(14/318) took 8622 ms. Total solver calls (SAT/UNSAT): 1005(42/963)
May 28, 2018 5:13:09 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(21/318) took 13212 ms. Total solver calls (SAT/UNSAT): 1733(84/1649)
May 28, 2018 5:13:14 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(23/318) took 17584 ms. Total solver calls (SAT/UNSAT): 1932(95/1837)
May 28, 2018 5:13:17 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(30/318) took 20617 ms. Total solver calls (SAT/UNSAT): 2597(130/2467)
May 28, 2018 5:13:20 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(38/318) took 23687 ms. Total solver calls (SAT/UNSAT): 3297(182/3115)
May 28, 2018 5:13:24 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(40/318) took 27756 ms. Total solver calls (SAT/UNSAT): 3462(195/3267)
May 28, 2018 5:13:29 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(42/318) took 33236 ms. Total solver calls (SAT/UNSAT): 3623(200/3423)
May 28, 2018 5:13:32 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(43/318) took 36311 ms. Total solver calls (SAT/UNSAT): 3702(209/3493)
May 28, 2018 5:13:36 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(49/318) took 40066 ms. Total solver calls (SAT/UNSAT): 4345(235/4110)
May 28, 2018 5:13:40 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(52/318) took 43816 ms. Total solver calls (SAT/UNSAT): 4843(235/4608)
May 28, 2018 5:13:43 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(59/318) took 47040 ms. Total solver calls (SAT/UNSAT): 5970(366/5604)
May 28, 2018 5:13:47 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(63/318) took 51076 ms. Total solver calls (SAT/UNSAT): 6592(437/6155)
May 28, 2018 5:13:52 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(68/318) took 55964 ms. Total solver calls (SAT/UNSAT): 7347(521/6826)
May 28, 2018 5:13:58 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(70/318) took 61771 ms. Total solver calls (SAT/UNSAT): 7642(553/7089)
May 28, 2018 5:14:02 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(71/318) took 65844 ms. Total solver calls (SAT/UNSAT): 7788(569/7219)
May 28, 2018 5:14:06 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(72/318) took 70000 ms. Total solver calls (SAT/UNSAT): 7933(585/7348)
May 28, 2018 5:14:11 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(75/318) took 74972 ms. Total solver calls (SAT/UNSAT): 8362(630/7732)
May 28, 2018 5:14:15 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(76/318) took 78584 ms. Total solver calls (SAT/UNSAT): 8503(645/7858)
May 28, 2018 5:14:19 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(77/318) took 83106 ms. Total solver calls (SAT/UNSAT): 8643(660/7983)
May 28, 2018 5:14:24 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(83/318) took 87551 ms. Total solver calls (SAT/UNSAT): 8904(670/8234)
May 28, 2018 5:14:27 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(89/318) took 90568 ms. Total solver calls (SAT/UNSAT): 9165(685/8480)
May 28, 2018 5:14:32 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(92/318) took 96130 ms. Total solver calls (SAT/UNSAT): 9573(732/8841)
May 28, 2018 5:14:37 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(95/318) took 101472 ms. Total solver calls (SAT/UNSAT): 9972(795/9177)
May 28, 2018 5:14:41 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(97/318) took 104685 ms. Total solver calls (SAT/UNSAT): 10233(814/9419)
May 28, 2018 5:14:44 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(99/318) took 108331 ms. Total solver calls (SAT/UNSAT): 10490(849/9641)
May 28, 2018 5:14:47 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(102/318) took 111389 ms. Total solver calls (SAT/UNSAT): 10868(880/9988)
May 28, 2018 5:14:51 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(110/318) took 114813 ms. Total solver calls (SAT/UNSAT): 11832(922/10910)
May 28, 2018 5:14:57 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(113/318) took 120590 ms. Total solver calls (SAT/UNSAT): 12177(964/11213)
May 28, 2018 5:15:00 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(114/318) took 123891 ms. Total solver calls (SAT/UNSAT): 12290(977/11313)
May 28, 2018 5:15:05 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(119/318) took 129308 ms. Total solver calls (SAT/UNSAT): 12840(1042/11798)
May 28, 2018 5:15:09 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(121/318) took 133106 ms. Total solver calls (SAT/UNSAT): 13053(1066/11987)
May 28, 2018 5:15:12 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(126/318) took 136172 ms. Total solver calls (SAT/UNSAT): 13568(1125/12443)
May 28, 2018 5:15:16 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(129/318) took 140252 ms. Total solver calls (SAT/UNSAT): 13865(1158/12707)
May 28, 2018 5:15:22 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(133/318) took 145730 ms. Total solver calls (SAT/UNSAT): 14247(1200/13047)
May 28, 2018 5:15:25 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(136/318) took 148791 ms. Total solver calls (SAT/UNSAT): 14523(1230/13293)
May 28, 2018 5:15:28 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(139/318) took 152438 ms. Total solver calls (SAT/UNSAT): 14730(1249/13481)
May 28, 2018 5:15:32 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(142/318) took 156372 ms. Total solver calls (SAT/UNSAT): 14898(1255/13643)
May 28, 2018 5:15:36 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(152/318) took 159910 ms. Total solver calls (SAT/UNSAT): 15393(1275/14118)
May 28, 2018 5:15:40 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(162/318) took 163681 ms. Total solver calls (SAT/UNSAT): 15788(1295/14493)
May 28, 2018 5:15:44 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(169/318) took 167531 ms. Total solver calls (SAT/UNSAT): 16005(1305/14700)
May 28, 2018 5:15:47 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(176/318) took 170656 ms. Total solver calls (SAT/UNSAT): 16205(1325/14880)
May 28, 2018 5:15:50 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(182/318) took 173671 ms. Total solver calls (SAT/UNSAT): 16356(1330/15026)
May 28, 2018 5:15:53 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(187/318) took 177004 ms. Total solver calls (SAT/UNSAT): 16475(1330/15145)
May 28, 2018 5:15:57 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(192/318) took 180616 ms. Total solver calls (SAT/UNSAT): 16600(1330/15270)
May 28, 2018 5:16:00 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(203/318) took 184071 ms. Total solver calls (SAT/UNSAT): 16857(1393/15464)
May 28, 2018 5:16:04 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(210/318) took 187676 ms. Total solver calls (SAT/UNSAT): 17014(1417/15597)
May 28, 2018 5:16:07 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(216/318) took 191307 ms. Total solver calls (SAT/UNSAT): 17140(1436/15704)
May 28, 2018 5:16:12 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(233/318) took 196023 ms. Total solver calls (SAT/UNSAT): 17757(1460/16297)
May 28, 2018 5:16:15 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(236/318) took 199077 ms. Total solver calls (SAT/UNSAT): 17958(1487/16471)
May 28, 2018 5:16:19 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(239/318) took 203039 ms. Total solver calls (SAT/UNSAT): 18150(1514/16636)
May 28, 2018 5:16:23 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(251/318) took 207150 ms. Total solver calls (SAT/UNSAT): 18828(1604/17224)
May 28, 2018 5:16:26 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(254/318) took 210372 ms. Total solver calls (SAT/UNSAT): 18975(1622/17353)
May 28, 2018 5:16:30 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(267/318) took 214176 ms. Total solver calls (SAT/UNSAT): 19508(1659/17849)
May 28, 2018 5:16:33 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(271/318) took 217404 ms. Total solver calls (SAT/UNSAT): 19638(1677/17961)
May 28, 2018 5:16:37 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(275/318) took 220550 ms. Total solver calls (SAT/UNSAT): 19752(1692/18060)
May 28, 2018 5:16:40 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(282/318) took 223836 ms. Total solver calls (SAT/UNSAT): 19913(1711/18202)
May 28, 2018 5:16:43 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(306/318) took 227019 ms. Total solver calls (SAT/UNSAT): 20103(1725/18378)
May 28, 2018 5:16:44 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of Finished co-enabling matrix. took 227667 ms. Total solver calls (SAT/UNSAT): 20133(1725/18408)
May 28, 2018 5:16:44 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver computeDoNotAccord
INFO: Computing Do-Not-Accords matrix : 318 transitions.
May 28, 2018 5:16:44 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of Completed DNA matrix. took 14 ms. Total solver calls (SAT/UNSAT): 0(0/0)
May 28, 2018 5:16:44 AM fr.lip6.move.gal.gal2pins.Gal2PinsTransformerNext transform
INFO: Built C files in 242049ms conformant to PINS in folder :/home/mcc/execution

Sequence of Actions to be Executed by the VM

This is useful if one wants to reexecute the tool in the VM from the submitted image disk.

set -x
# this is for BenchKit: configuration of major elements for the test
export BK_INPUT="LamportFastMutEx-COL-5"
export BK_EXAMINATION="LTLFireability"
export BK_TOOL="itstools"
export BK_RESULT_DIR="/tmp/BK_RESULTS/OUTPUTS"
export BK_TIME_CONFINEMENT="3600"
export BK_MEMORY_CONFINEMENT="16384"

# this is specific to your benchmark or test

export BIN_DIR="$HOME/BenchKit/bin"

# remove the execution directoty if it exists (to avoid increse of .vmdk images)
if [ -d execution ] ; then
rm -rf execution
fi

tar xzf /home/mcc/BenchKit/INPUTS/LamportFastMutEx-COL-5.tgz
mv LamportFastMutEx-COL-5 execution
cd execution
pwd
ls -lh

# this is for BenchKit: explicit launching of the test
echo "====================================================================="
echo " Generated by BenchKit 2-3637"
echo " Executing tool itstools"
echo " Input is LamportFastMutEx-COL-5, examination is LTLFireability"
echo " Time confinement is $BK_TIME_CONFINEMENT seconds"
echo " Memory confinement is 16384 MBytes"
echo " Number of cores is 4"
echo " Run identifier is r260-csrt-152732585200024"
echo "====================================================================="
echo
echo "--------------------"
echo "content from stdout:"
echo
echo "=== Data for post analysis generated by BenchKit (invocation template)"
echo
if [ "LTLFireability" = "UpperBounds" ] ; then
echo "The expected result is a vector of positive values"
echo NUM_VECTOR
elif [ "LTLFireability" != "StateSpace" ] ; then
echo "The expected result is a vector of booleans"
echo BOOL_VECTOR
else
echo "no data necessary for post analysis"
fi
echo
if [ -f "LTLFireability.txt" ] ; then
echo "here is the order used to build the result vector(from text file)"
for x in $(grep Property LTLFireability.txt | cut -d ' ' -f 2 | sort -u) ; do
echo "FORMULA_NAME $x"
done
elif [ -f "LTLFireability.xml" ] ; then # for cunf (txt files deleted;-)
echo echo "here is the order used to build the result vector(from xml file)"
for x in $(grep '' LTLFireability.xml | cut -d '>' -f 2 | cut -d '<' -f 1 | sort -u) ; do
echo "FORMULA_NAME $x"
done
fi
echo
echo "=== Now, execution of the tool begins"
echo
echo -n "BK_START "
date -u +%s%3N
echo
timeout -s 9 $BK_TIME_CONFINEMENT bash -c "/home/mcc/BenchKit/BenchKit_head.sh 2> STDERR ; echo ; echo -n \"BK_STOP \" ; date -u +%s%3N"
if [ $? -eq 137 ] ; then
echo
echo "BK_TIME_CONFINEMENT_REACHED"
fi
echo
echo "--------------------"
echo "content from stderr:"
echo
cat STDERR ;