About the Execution of Irma.full for PermAdmissibility-PT-10
Execution Summary | |||||
Max Memory Used (MB) |
Time wait (ms) | CPU Usage (ms) | I/O Wait (ms) | Computed Result | Execution Status |
15919.460 | 272862.00 | 268268.00 | 2120.40 | ???????????????? | normal |
Execution Chart
We display below the execution chart for this examination (boot time has been removed).
Trace from the execution
Waiting for the VM to be ready (probing ssh)
.................
/home/mcc/execution
total 872K
-rw-r--r-- 1 mcc users 4.0K May 15 18:54 CTLCardinality.txt
-rw-r--r-- 1 mcc users 20K May 15 18:54 CTLCardinality.xml
-rw-r--r-- 1 mcc users 27K May 15 18:54 CTLFireability.txt
-rw-r--r-- 1 mcc users 102K May 15 18:54 CTLFireability.xml
-rw-r--r-- 1 mcc users 4.0K May 15 18:50 GenericPropertiesDefinition.xml
-rw-r--r-- 1 mcc users 6.0K May 15 18:50 GenericPropertiesVerdict.xml
-rw-r--r-- 1 mcc users 2.6K May 26 09:26 LTLCardinality.txt
-rw-r--r-- 1 mcc users 9.9K May 26 09:26 LTLCardinality.xml
-rw-r--r-- 1 mcc users 9.6K May 26 09:26 LTLFireability.txt
-rw-r--r-- 1 mcc users 33K May 26 09:26 LTLFireability.xml
-rw-r--r-- 1 mcc users 4.7K May 15 18:54 ReachabilityCardinality.txt
-rw-r--r-- 1 mcc users 21K May 15 18:54 ReachabilityCardinality.xml
-rw-r--r-- 1 mcc users 114 May 15 18:54 ReachabilityDeadlock.txt
-rw-r--r-- 1 mcc users 352 May 15 18:54 ReachabilityDeadlock.xml
-rw-r--r-- 1 mcc users 19K May 15 18:54 ReachabilityFireability.txt
-rw-r--r-- 1 mcc users 70K May 15 18:54 ReachabilityFireability.xml
-rw-r--r-- 1 mcc users 2.0K May 15 18:54 UpperBounds.txt
-rw-r--r-- 1 mcc users 4.6K May 15 18:54 UpperBounds.xml
-rw-r--r-- 1 mcc users 5 May 15 18:50 equiv_col
-rw-r--r-- 1 mcc users 3 May 15 18:50 instance
-rw-r--r-- 1 mcc users 6 May 15 18:50 iscolored
-rw-r--r-- 1 mcc users 484K May 15 18:50 model.pnml
=====================================================================
Generated by BenchKit 2-3637
Executing tool irma4mcc-full
Input is PermAdmissibility-PT-10, examination is LTLFireability
Time confinement is 3600 seconds
Memory confinement is 16384 MBytes
Number of cores is 4
Run identifier is r258-csrt-152732584000142
=====================================================================
--------------------
content from stdout:
=== Data for post analysis generated by BenchKit (invocation template)
The expected result is a vector of booleans
BOOL_VECTOR
here is the order used to build the result vector(from text file)
FORMULA_NAME PermAdmissibility-PT-10-LTLFireability-00
FORMULA_NAME PermAdmissibility-PT-10-LTLFireability-01
FORMULA_NAME PermAdmissibility-PT-10-LTLFireability-02
FORMULA_NAME PermAdmissibility-PT-10-LTLFireability-03
FORMULA_NAME PermAdmissibility-PT-10-LTLFireability-04
FORMULA_NAME PermAdmissibility-PT-10-LTLFireability-05
FORMULA_NAME PermAdmissibility-PT-10-LTLFireability-06
FORMULA_NAME PermAdmissibility-PT-10-LTLFireability-07
FORMULA_NAME PermAdmissibility-PT-10-LTLFireability-08
FORMULA_NAME PermAdmissibility-PT-10-LTLFireability-09
FORMULA_NAME PermAdmissibility-PT-10-LTLFireability-10
FORMULA_NAME PermAdmissibility-PT-10-LTLFireability-11
FORMULA_NAME PermAdmissibility-PT-10-LTLFireability-12
FORMULA_NAME PermAdmissibility-PT-10-LTLFireability-13
FORMULA_NAME PermAdmissibility-PT-10-LTLFireability-14
FORMULA_NAME PermAdmissibility-PT-10-LTLFireability-15
=== Now, execution of the tool begins
BK_START 1527457408565
BK_STOP 1527457681427
--------------------
content from stderr:
Prefix is 65b80f64.
Reading known information in /usr/share/mcc4mcc/65b80f64-known.json.
Reading learned information in /usr/share/mcc4mcc/65b80f64-learned.json.
Reading value translations in /usr/share/mcc4mcc/65b80f64-values.json.
Using directory /home/mcc/execution for input, as it contains a model.pnml file.
Using PermAdmissibility-PT-10 as instance name.
Using PermAdmissibility as model name.
Using algorithm or tool bmdt.
Model characteristics are: {'Examination': 'LTLFireability', 'Place/Transition': True, 'Colored': True, 'Relative-Time': 1, 'Relative-Memory': 1, 'Ordinary': False, 'Simple Free Choice': False, 'Extended Free Choice': False, 'State Machine': False, 'Marked Graph': False, 'Connected': True, 'Strongly Connected': False, 'Source Place': True, 'Sink Place': True, 'Source Transition': False, 'Sink Transition': False, 'Loop Free': True, 'Conservative': False, 'Sub-Conservative': False, 'Nested Units': False, 'Safe': False, 'Deadlock': True, 'Reversible': False, 'Quasi Live': None, 'Live': None}.
Known tools are: [{'Time': 1212494, 'Memory': 15938.57, 'Tool': 'lola'}, {'Time': 1217293, 'Memory': 15951.56, 'Tool': 'lola'}].
Learned tools are: [{'Tool': 'lola'}].
Learned tool lola is 1.0x far from the best tool lola.
LTLFireability lola PermAdmissibility-PT-10...
Time: 3600 - MCC
----- Start make prepare stdout -----
----- Start make prepare stderr -----
===========================================================================================
PermAdmissibility-PT-10: translating PT Petri net model.pnml into LoLA format
===========================================================================================
translating PT Petri net complete
checking for too many tokens
===========================================================================================
PermAdmissibility-PT-10: translating PT formula LTLFireability into LoLA format
===========================================================================================
translating formula complete
touch formulae;
----- Start make result stdout -----
----- Start make result stderr -----
LTLFireability @ PermAdmissibility-PT-10 @ 3540 seconds
Makefile:222: recipe for target 'verify' failed
----- Start make result stdout -----
make: [verify] Error 134 (ignored)
----- Start make result stderr -----
lola: LoLA will run for 3540 seconds at most (--timelimit)
lola: NET
lola: reading net from model.pnml.lola
lola: finished parsing
lola: closed net file model.pnml.lola
lola: 760/65536 symbol table entries, 0 collisions
lola: preprocessing...
lola: finding significant places
lola: 168 places, 592 transitions, 136 significant places
lola: computing forward-conflicting sets
lola: computing back-conflicting sets
lola: 820 transition conflict sets
lola: TASK
lola: reading formula from PermAdmissibility-PT-10-LTLFireability.task
lola: A ((FIREABLE(display1_2_1) OR FIREABLE(display1_1_1) OR FIREABLE(display1_4_1) OR FIREABLE(display1_3_1) OR FIREABLE(display1_6_0) OR FIREABLE(display1_5_0) OR FIREABLE(display1_0_1) OR FIREABLE(display1_7_0) OR FIREABLE(display1_2_2) OR FIREABLE(display1_1_2) OR FIREABLE(display1_4_2) OR FIREABLE(display1_3_2) OR FIREABLE(display1_6_1) OR FIREABLE(display1_5_1) OR FIREABLE(display1_0_2) OR FIREABLE(display1_7_1) OR FIREABLE(display1_1_0) OR FIREABLE(display1_2_0) OR FIREABLE(display1_3_0) OR FIREABLE(display1_4_0) OR FIREABLE(display1_0_0) OR FIREABLE(display1_7_5) OR FIREABLE(display1_0_6) OR FIREABLE(display1_5_5) OR FIREABLE(display1_6_5) OR FIREABLE(display1_3_6) OR FIREABLE(display1_4_6) OR FIREABLE(display1_1_6) OR FIREABLE(display1_2_6) OR FIREABLE(display1_7_4) OR FIREABLE(display1_0_5) OR FIREABLE(display1_5_4) OR FIREABLE(display1_6_4) OR FIREABLE(display1_3_5) OR FIREABLE(display1_4_5) OR FIREABLE(display1_1_5) OR FIREABLE(display1_2_5) OR FIREABLE(display1_0_4) OR FIREABLE(display1_7_3) OR FIREABLE(display1_6_3) OR FIREABLE(display1_5_3) OR FIREABLE(display1_4_4) OR FIREABLE(display1_3_4) OR FIREABLE(display1_2_4) OR FIREABLE(display1_1_4) OR FIREABLE(display1_0_3) OR FIREABLE(display1_7_2) OR FIREABLE(display1_6_2) OR FIREABLE(display1_5_2) OR FIREABLE(display1_4_3) OR FIREABLE(display1_3_3) OR FIREABLE(display1_2_3) OR FIREABLE(display1_1_3) OR FIREABLE(display1_6_7) OR FIREABLE(display1_5_7) OR FIREABLE(display1_7_7) OR FIREABLE(display1_6_6) OR FIREABLE(display1_5_6) OR FIREABLE(display1_0_7) OR FIREABLE(display1_7_6) OR FIREABLE(display1_2_7) OR FIREABLE(display1_1_7) OR FIREABLE(display1_4_7) OR FIREABLE(display1_3_7))) : A (X ((FIREABLE(switch5_5_2) OR FIREABLE(switch5_0_3) OR FIREABLE(switch5_1_2) OR FIREABLE(switch5_4_2) OR FIREABLE(switch5_0_2) OR FIREABLE(switch5_4_7) OR FIREABLE(switch5_1_7) OR FIREABLE(switch5_5_7) OR FIREABLE(switch5_4_6) OR FIREABLE(switch5_1_6) OR FIREABLE(switch5_0_7) OR FIREABLE(switch5_5_6) OR FIREABLE(switch5_4_3) OR FIREABLE(switch5_1_3) OR FIREABLE(switch5_0_6) OR FIREABLE(switch5_5_3)))) : A (X (X (X ((FIREABLE(display4_0_0) OR FIREABLE(display4_4_0) OR FIREABLE(display4_3_0) OR FIREABLE(display4_2_0) OR FIREABLE(display4_1_0) OR FIREABLE(display4_7_1) OR FIREABLE(display4_0_2) OR FIREABLE(display4_5_1) OR FIREABLE(display4_6_1) OR FIREABLE(display4_3_2) OR FIREABLE(display4_4_2) OR FIREABLE(display4_1_2) OR FIREABLE(display4_2_2) OR FIREABLE(display4_7_0) OR FIREABLE(display4_0_1) OR FIREABLE(display4_5_0) OR FIREABLE(display4_6_0) OR FIREABLE(display4_3_1) OR FIREABLE(display4_4_1) OR FIREABLE(display4_1_1) OR FIREABLE(display4_2_1) OR FIREABLE(display4_2_4) OR FIREABLE(display4_1_4) OR FIREABLE(display4_4_4) OR FIREABLE(display4_3_4) OR FIREABLE(display4_6_3) OR FIREABLE(display4_5_3) OR FIREABLE(display4_0_4) OR FIREABLE(display4_7_3) OR FIREABLE(display4_2_3) OR FIREABLE(display4_1_3) OR FIREABLE(display4_4_3) OR FIREABLE(display4_3_3) OR FIREABLE(display4_6_2) OR FIREABLE(display4_5_2) OR FIREABLE(display4_0_3) OR FIREABLE(display4_7_2) OR FIREABLE(display4_1_6) OR FIREABLE(display4_2_6) OR FIREABLE(display4_3_6) OR FIREABLE(display4_4_6) OR FIREABLE(display4_5_5) OR FIREABLE(display4_6_5) OR FIREABLE(display4_7_5) OR FIREABLE(display4_0_6) OR FIREABLE(display4_1_5) OR FIREABLE(display4_2_5) OR FIREABLE(display4_3_5) OR FIREABLE(display4_4_5) OR FIREABLE(display4_5_4) OR FIREABLE(display4_6_4) OR FIREABLE(display4_7_4) OR FIREABLE(display4_0_5) OR FIREABLE(display4_7_7) OR FIREABLE(display4_6_7) OR FIREABLE(display4_5_7) OR FIREABLE(display4_4_7) OR FIREABLE(display4_3_7) OR FIREABLE(display4_2_7) OR FIREABLE(display4_1_7) OR FIREABLE(display4_0_7) OR FIREABLE(display4_7_6) OR FIREABLE(display4_6_6) OR FIREABLE(display4_5_6)))))) : A (G ((FIREABLE(display4_0_0) OR FIREABLE(display4_4_0) OR FIREABLE(display4_3_0) OR FIREABLE(display4_2_0) OR FIREABLE(display4_1_0) OR FIREABLE(display4_7_1) OR FIREABLE(display4_0_2) OR FIREABLE(display4_5_1) OR FIREABLE(display4_6_1) OR FIREABLE(display4_3_2) OR FIREABLE(display4_4_2) OR FIREABLE(display4_1_2) OR FIREABLE(display4_2_2) OR FIREABLE(display4_7_0) OR FIREABLE(display4_0_1) OR FIREABLE(display4_5_0) OR FIREABLE(display4_6_0) OR FIREABLE(display4_3_1) OR FIREABLE(display4_4_1) OR FIREABLE(display4_1_1) OR FIREABLE(display4_2_1) OR FIREABLE(display4_2_4) OR FIREABLE(display4_1_4) OR FIREABLE(display4_4_4) OR FIREABLE(display4_3_4) OR FIREABLE(display4_6_3) OR FIREABLE(display4_5_3) OR FIREABLE(display4_0_4) OR FIREABLE(display4_7_3) OR FIREABLE(display4_2_3) OR FIREABLE(display4_1_3) OR FIREABLE(display4_4_3) OR FIREABLE(display4_3_3) OR FIREABLE(display4_6_2) OR FIREABLE(display4_5_2) OR FIREABLE(display4_0_3) OR FIREABLE(display4_7_2) OR FIREABLE(display4_1_6) OR FIREABLE(display4_2_6) OR FIREABLE(display4_3_6) OR FIREABLE(display4_4_6) OR FIREABLE(display4_5_5) OR FIREABLE(display4_6_5) OR FIREABLE(display4_7_5) OR FIREABLE(display4_0_6) OR FIREABLE(display4_1_5) OR FIREABLE(display4_2_5) OR FIREABLE(display4_3_5) OR FIREABLE(display4_4_5) OR FIREABLE(display4_5_4) OR FIREABLE(display4_6_4) OR FIREABLE(display4_7_4) OR FIREABLE(display4_0_5) OR FIREABLE(display4_7_7) OR FIREABLE(display4_6_7) OR FIREABLE(display4_5_7) OR FIREABLE(display4_4_7) OR FIREABLE(display4_3_7) OR FIREABLE(display4_2_7) OR FIREABLE(display4_1_7) OR FIREABLE(display4_0_7) OR FIREABLE(display4_7_6) OR FIREABLE(display4_6_6) OR FIREABLE(display4_5_6)))) : A (G (((FIREABLE(switch6_5_7) OR FIREABLE(switch6_1_7) OR FIREABLE(switch6_4_7) OR FIREABLE(switch6_5_6) OR FIREABLE(switch6_0_7) OR FIREABLE(switch6_1_6) OR FIREABLE(switch6_4_6) OR FIREABLE(switch6_5_3) OR FIREABLE(switch6_0_6) OR FIREABLE(switch6_1_3) OR FIREABLE(switch6_4_3) OR FIREABLE(switch6_0_3) OR FIREABLE(switch6_5_2) OR FIREABLE(switch6_4_2) OR FIREABLE(switch6_1_2) OR FIREABLE(switch6_0_2)) U X ((FIREABLE(display4_0_0) OR FIREABLE(display4_4_0) OR FIREABLE(display4_3_0) OR FIREABLE(display4_2_0) OR FIREABLE(display4_1_0) OR FIREABLE(display4_7_1) OR FIREABLE(display4_0_2) OR FIREABLE(display4_5_1) OR FIREABLE(display4_6_1) OR FIREABLE(display4_3_2) OR FIREABLE(display4_4_2) OR FIREABLE(display4_1_2) OR FIREABLE(display4_2_2) OR FIREABLE(display4_7_0) OR FIREABLE(display4_0_1) OR FIREABLE(display4_5_0) OR FIREABLE(display4_6_0) OR FIREABLE(display4_3_1) OR FIREABLE(display4_4_1) OR FIREABLE(display4_1_1) OR FIREABLE(display4_2_1) OR FIREABLE(display4_2_4) OR FIREABLE(display4_1_4) OR FIREABLE(display4_4_4) OR FIREABLE(display4_3_4) OR FIREABLE(display4_6_3) OR FIREABLE(display4_5_3) OR FIREABLE(display4_0_4) OR FIREABLE(display4_7_3) OR FIREABLE(display4_2_3) OR FIREABLE(display4_1_3) OR FIREABLE(display4_4_3) OR FIREABLE(display4_3_3) OR FIREABLE(display4_6_2) OR FIREABLE(display4_5_2) OR FIREABLE(display4_0_3) OR FIREABLE(display4_7_2) OR FIREABLE(display4_1_6) OR FIREABLE(display4_2_6) OR FIREABLE(display4_3_6) OR FIREABLE(display4_4_6) OR FIREABLE(display4_5_5) OR FIREABLE(display4_6_5) OR FIREABLE(display4_7_5) OR FIREABLE(display4_0_6) OR FIREABLE(display4_1_5) OR FIREABLE(display4_2_5) OR FIREABLE(display4_3_5) OR FIREABLE(display4_4_5) OR FIREABLE(display4_5_4) OR FIREABLE(display4_6_4) OR FIREABLE(display4_7_4) OR FIREABLE(display4_0_5) OR FIREABLE(display4_7_7) OR FIREABLE(display4_6_7) OR FIREABLE(display4_5_7) OR FIREABLE(display4_4_7) OR FIREABLE(display4_3_7) OR FIREABLE(display4_2_7) OR FIREABLE(display4_1_7) OR FIREABLE(display4_0_7) OR FIREABLE(display4_7_6) OR FIREABLE(display4_6_6) OR FIREABLE(display4_5_6)))))) : A (G (F (X (((FIREABLE(switch12_3_0) OR FIREABLE(switch12_4_0) OR FIREABLE(switch12_1_0) OR FIREABLE(switch12_2_0) OR FIREABLE(switch12_0_0) OR FIREABLE(switch12_0_6) OR FIREABLE(switch12_7_5) OR FIREABLE(switch12_6_5) OR FIREABLE(switch12_5_5) OR FIREABLE(switch12_4_6) OR FIREABLE(switch12_3_6) OR FIREABLE(switch12_2_6) OR FIREABLE(switch12_1_6) OR FIREABLE(switch12_0_5) OR FIREABLE(switch12_7_4) OR FIREABLE(switch12_6_4) OR FIREABLE(switch12_5_4) OR FIREABLE(switch12_4_5) OR FIREABLE(switch12_3_5) OR FIREABLE(switch12_2_5) OR FIREABLE(switch12_1_5) OR FIREABLE(switch12_7_7) OR FIREABLE(switch12_5_7) OR FIREABLE(switch12_6_7) OR FIREABLE(switch12_7_6) OR FIREABLE(switch12_0_7) OR FIREABLE(switch12_5_6) OR FIREABLE(switch12_6_6) OR FIREABLE(switch12_3_7) OR FIREABLE(switch12_4_7) OR FIREABLE(switch12_1_7) OR FIREABLE(switch12_2_7) OR FIREABLE(switch12_6_1) OR FIREABLE(switch12_5_1) OR FIREABLE(switch12_0_2) OR FIREABLE(switch12_7_1) OR FIREABLE(switch12_2_2) OR FIREABLE(switch12_1_2) OR FIREABLE(switch12_4_2) OR FIREABLE(switch12_3_2) OR FIREABLE(switch12_6_0) OR FIREABLE(switch12_5_0) OR FIREABLE(switch12_0_1) OR FIREABLE(switch12_7_0) OR FIREABLE(switch12_2_1) OR FIREABLE(switch12_1_1) OR FIREABLE(switch12_4_1) OR FIREABLE(switch12_3_1) OR FIREABLE(switch12_5_3) OR FIREABLE(switch12_6_3) OR FIREABLE(switch12_7_3) OR FIREABLE(switch12_0_4) OR FIREABLE(switch12_1_4) OR FIREABLE(switch12_2_4) OR FIREABLE(switch12_3_4) OR FIREABLE(switch12_4_4) OR FIREABLE(switch12_5_2) OR FIREABLE(switch12_6_2) OR FIREABLE(switch12_7_2) OR FIREABLE(switch12_0_3) OR FIREABLE(switch12_1_3) OR FIREABLE(switch12_2_3) OR FIREABLE(switch12_3_3) OR FIREABLE(switch12_4_3)) U (FIREABLE(switch7_0_2) OR FIREABLE(switch7_1_2) OR FIREABLE(switch7_4_2) OR FIREABLE(switch7_5_2) OR FIREABLE(switch7_0_3) OR FIREABLE(switch7_5_7) OR FIREABLE(switch7_4_7) OR FIREABLE(switch7_1_7) OR FIREABLE(switch7_0_7) OR FIREABLE(switch7_5_6) OR FIREABLE(switch7_4_6) OR FIREABLE(switch7_1_6) OR FIREABLE(switch7_0_6) OR FIREABLE(switch7_5_3) OR FIREABLE(switch7_4_3) OR FIREABLE(switch7_1_3))))))) : A (F (X (G (X (G ((FIREABLE(switch11_0_0) OR FIREABLE(switch11_4_0) OR FIREABLE(switch11_3_0) OR FIREABLE(switch11_2_0) OR FIREABLE(switch11_1_0) OR FIREABLE(switch11_4_6) OR FIREABLE(switch11_3_6) OR FIREABLE(switch11_2_6) OR FIREABLE(switch11_1_6) OR FIREABLE(switch11_0_6) OR FIREABLE(switch11_7_5) OR FIREABLE(switch11_6_5) OR FIREABLE(switch11_5_5) OR FIREABLE(switch11_4_5) OR FIREABLE(switch11_3_5) OR FIREABLE(switch11_2_5) OR FIREABLE(switch11_1_5) OR FIREABLE(switch11_0_5) OR FIREABLE(switch11_7_4) OR FIREABLE(switch11_6_4) OR FIREABLE(switch11_5_4) OR FIREABLE(switch11_7_7) OR FIREABLE(switch11_5_7) OR FIREABLE(switch11_6_7) OR FIREABLE(switch11_3_7) OR FIREABLE(switch11_4_7) OR FIREABLE(switch11_1_7) OR FIREABLE(switch11_2_7) OR FIREABLE(switch11_7_6) OR FIREABLE(switch11_0_7) OR FIREABLE(switch11_5_6) OR FIREABLE(switch11_6_6) OR FIREABLE(switch11_2_2) OR FIREABLE(switch11_1_2) OR FIREABLE(switch11_4_2) OR FIREABLE(switch11_3_2) OR FIREABLE(switch11_6_1) OR FIREABLE(switch11_5_1) OR FIREABLE(switch11_0_2) OR FIREABLE(switch11_7_1) OR FIREABLE(switch11_2_1) OR FIREABLE(switch11_1_1) OR FIREABLE(switch11_4_1) OR FIREABLE(switch11_3_1) OR FIREABLE(switch11_6_0) OR FIREABLE(switch11_5_0) OR FIREABLE(switch11_0_1) OR FIREABLE(switch11_7_0) OR FIREABLE(switch11_1_4) OR FIREABLE(switch11_2_4) OR FIREABLE(switch11_3_4) OR FIREABLE(switch11_4_4) OR FIREABLE(switch11_5_3) OR FIREABLE(switch11_6_3) OR FIREABLE(switch11_7_3) OR FIREABLE(switch11_0_4) OR FIREABLE(switch11_1_3) OR FIREABLE(switch11_2_3) OR FIREABLE(switch11_3_3) OR FIREABLE(switch11_4_3) OR FIREABLE(switch11_5_2) OR FIREABLE(switch11_6_2) OR FIREABLE(switch11_7_2) OR FIREABLE(switch11_0_3)))))))) : A ((FIREABLE(switch10_4_0) OR FIREABLE(switch10_3_0) OR FIREABLE(switch10_2_0) OR FIREABLE(switch10_1_0) OR FIREABLE(switch10_0_0) OR FIREABLE(switch10_7_4) OR FIREABLE(switch10_0_5) OR FIREABLE(switch10_5_4) OR FIREABLE(switch10_6_4) OR FIREABLE(switch10_3_5) OR FIREABLE(switch10_4_5) OR FIREABLE(switch10_1_5) OR FIREABLE(switch10_2_5) OR FIREABLE(switch10_7_5) OR FIREABLE(switch10_0_6) OR FIREABLE(switch10_5_5) OR FIREABLE(switch10_6_5) OR FIREABLE(switch10_3_6) OR FIREABLE(switch10_4_6) OR FIREABLE(switch10_1_6) OR FIREABLE(switch10_2_6) OR FIREABLE(switch10_0_7) OR FIREABLE(switch10_7_6) OR FIREABLE(switch10_6_6) OR FIREABLE(switch10_5_6) OR FIREABLE(switch10_4_7) OR FIREABLE(switch10_3_7) OR FIREABLE(switch10_2_7) OR FIREABLE(switch10_1_7) OR FIREABLE(switch10_7_7) OR FIREABLE(switch10_6_7) OR FIREABLE(switch10_5_7) OR FIREABLE(switch10_5_0) OR FIREABLE(switch10_6_0) OR FIREABLE(switch10_7_0) OR FIREABLE(switch10_0_1) OR FIREABLE(switch10_1_1) OR FIREABLE(switch10_2_1) OR FIREABLE(switch10_3_1) OR FIREABLE(switch10_4_1) OR FIREABLE(switch10_5_1) OR FIREABLE(switch10_6_1) OR FIREABLE(switch10_7_1) OR FIREABLE(switch10_0_2) OR FIREABLE(switch10_1_2) OR FIREABLE(switch10_2_2) OR FIREABLE(switch10_3_2) OR FIREABLE(switch10_4_2) OR FIREABLE(switch10_6_2) OR FIREABLE(switch10_5_2) OR FIREABLE(switch10_0_3) OR FIREABLE(switch10_7_2) OR FIREABLE(switch10_2_3) OR FIREABLE(switch10_1_3) OR FIREABLE(switch10_4_3) OR FIREABLE(switch10_3_3) OR FIREABLE(switch10_6_3) OR FIREABLE(switch10_5_3) OR FIREABLE(switch10_0_4) OR FIREABLE(switch10_7_3) OR FIREABLE(switch10_2_4) OR FIREABLE(switch10_1_4) OR FIREABLE(switch10_4_4) OR FIREABLE(switch10_3_4))) : A (G (G (F (G (F (FIREABLE(switch12_0_6))))))) : A (FIREABLE(display4_6_3)) : A (X (F (FIREABLE(switch7_1_6)))) : A (G (F (F (G (FIREABLE(switch11_2_5)))))) : A (G (G (FIREABLE(display2_3_5)))) : A (F (G ((FIREABLE(switch10_4_1) U X (FIREABLE(display1_1_5)))))) : A ((F (G (F (FIREABLE(display3_4_6)))) U FIREABLE(display2_1_1))) : A (F (FIREABLE(switch8_0_6)))
lola: computing a collection of formulas
lola: RUNNING
lola: subprocess 0 will run for 221 seconds at most (--localtimelimit=-1)
lola: ========================================
lola: ...considering subproblem: A ((FIREABLE(display1_2_1) OR FIREABLE(display1_1_1) OR FIREABLE(display1_4_1) OR FIREABLE(display1_3_1) OR FIREABLE(display1_6_0) OR FIREABLE(display1_5_0) OR FIREABLE(display1_0_1) OR FIREABLE(display1_7_0) OR FIREABLE(display1_2_2) OR FIREABLE(display1_1_2) OR FIREABLE(display1_4_2) OR FIREABLE(display1_3_2) OR FIREABLE(display1_6_1) OR FIREABLE(display1_5_1) OR FIREABLE(display1_... (shortened)
lola: ========================================
lola: SUBTASK
lola: checking initial satisfaction
lola: processed formula: (FIREABLE(display1_2_1) OR FIREABLE(display1_1_1) OR FIREABLE(display1_4_1) OR FIREABLE(display1_3_1) OR FIREABLE(display1_6_0) OR FIREABLE(display1_5_0) OR FIREABLE(display1_0_1) OR FIREABLE(display1_7_0) OR FIREABLE(display1_2_2) OR FIREABLE(display1_1_2) OR FIREABLE(display1_4_2) OR FIREABLE(display1_3_2) OR FIREABLE(display1_6_1) OR FIREABLE(display1_5_1) OR FIREABLE(display1_0_2... (shortened)
lola: processed formula length: 1725
lola: 1 rewrites
lola: formula mentions 0 of 168 places; total mentions: 0
lola: closed formula file PermAdmissibility-PT-10-LTLFireability.task
lola: processed formula with 0 atomic propositions
lola: RUNNING
lola: SUBRESULT
lola: result: no
lola: produced by: preprocessing
lola: The net violates the given property already in its initial state.
lola: 0 markings, 0 edges
lola: ========================================
lola: subprocess 1 will run for 236 seconds at most (--localtimelimit=-1)
lola: ========================================
lola: ...considering subproblem: A (X ((FIREABLE(switch5_5_2) OR FIREABLE(switch5_0_3) OR FIREABLE(switch5_1_2) OR FIREABLE(switch5_4_2) OR FIREABLE(switch5_0_2) OR FIREABLE(switch5_4_7) OR FIREABLE(switch5_1_7) OR FIREABLE(switch5_5_7) OR FIREABLE(switch5_4_6) OR FIREABLE(switch5_1_6) OR FIREABLE(switch5_0_7) OR FIREABLE(switch5_5_6) OR FIREABLE(switch5_4_3) OR FIREABLE(switch5_1_3) OR FIREABLE(switch5_0_6) OR FIR... (shortened)
lola: ========================================
lola: SUBTASK
lola: checking LTL
lola: transforming LTL-Formula into a B\xfcchi-Automaton
lola: processed formula: A (X ((FIREABLE(switch5_5_2) OR FIREABLE(switch5_0_3) OR FIREABLE(switch5_1_2) OR FIREABLE(switch5_4_2) OR FIREABLE(switch5_0_2) OR FIREABLE(switch5_4_7) OR FIREABLE(switch5_1_7) OR FIREABLE(switch5_5_7) OR FIREABLE(switch5_4_6) OR FIREABLE(switch5_1_6) OR FIREABLE(switch5_0_7) OR FIREABLE(switch5_5_6) OR FIREABLE(switch5_4_3) OR FIREABLE(switch5_1_3) OR FIREABLE(switch5_0_6) OR FIREABLE(switch5_5_3))))
lola: processed formula: A (X ((FIREABLE(switch5_5_2) OR FIREABLE(switch5_0_3) OR FIREABLE(switch5_1_2) OR FIREABLE(switch5_4_2) OR FIREABLE(switch5_0_2) OR FIREABLE(switch5_4_7) OR FIREABLE(switch5_1_7) OR FIREABLE(switch5_5_7) OR FIREABLE(switch5_4_6) OR FIREABLE(switch5_1_6) OR FIREABLE(switch5_0_7) OR FIREABLE(switch5_5_6) OR FIREABLE(switch5_4_3) OR FIREABLE(switch5_1_3) OR FIREABLE(switch5_0_6) OR FIR... (shortened)
lola: processed formula length: 421
lola: 0 rewrites
lola: formula mentions 0 of 168 places; total mentions: 0
lola: closed formula file PermAdmissibility-PT-10-LTLFireability.task
lola: the resulting B\xfcchi automaton has 3 states
lola: STORE
lola: using a bit-perfect encoder (--encoder=bit)
lola: using 548 bytes per marking, with 30 unused bits
lola: using a prefix tree store (--store=prefix)
lola: Formula contains X operator; stubborn sets not applicable
lola: SEARCH
lola: RUNNING
lola: SUBRESULT
lola: result: no
lola: produced by: LTL model checker
lola: The net does not satisfy the given formula (language of the product automaton is nonempty).
lola: 161 markings, 161 edges
lola: ========================================
lola: subprocess 2 will run for 252 seconds at most (--localtimelimit=-1)
lola: ========================================
lola: ...considering subproblem: A (X (X (X ((FIREABLE(display4_0_0) OR FIREABLE(display4_4_0) OR FIREABLE(display4_3_0) OR FIREABLE(display4_2_0) OR FIREABLE(display4_1_0) OR FIREABLE(display4_7_1) OR FIREABLE(display4_0_2) OR FIREABLE(display4_5_1) OR FIREABLE(display4_6_1) OR FIREABLE(display4_3_2) OR FIREABLE(display4_4_2) OR FIREABLE(display4_1_2) OR FIREABLE(display4_2_2) OR FIREABLE(display4_7_0) OR FIREABLE(... (shortened)
lola: ========================================
lola: SUBTASK
lola: checking LTL
lola: transforming LTL-Formula into a B\xfcchi-Automaton
lola: processed formula: A (X (X (X ((FIREABLE(display4_0_0) OR FIREABLE(display4_4_0) OR FIREABLE(display4_3_0) OR FIREABLE(display4_2_0) OR FIREABLE(display4_1_0) OR FIREABLE(display4_7_1) OR FIREABLE(display4_0_2) OR FIREABLE(display4_5_1) OR FIREABLE(display4_6_1) OR FIREABLE(display4_3_2) OR FIREABLE(display4_4_2) OR FIREABLE(display4_1_2) OR FIREABLE(display4_2_2) OR FIREABLE(display4_7_0) OR FIREABLE(display4_0_1) OR FIREABLE(display4_5_0) OR FIREABLE(display4_6_0) OR FIREABLE(display4_3_1) OR FIREABLE(display4_4_1) OR FIREABLE(display4_1_1) OR FIREABLE(display4_2_1) OR FIREABLE(display4_2_4) OR FIREABLE(display4_1_4) OR FIREABLE(display4_4_4) OR FIREABLE(display4_3_4) OR FIREABLE(display4_6_3) OR FIREABLE(display4_5_3) OR FIREABLE(display4_0_4) OR FIREABLE(display4_7_3) OR FIREABLE(display4_2_3) OR FIREABLE(display4_1_3) OR FIREABLE(display4_4_3) OR FIREABLE(display4_3_3) OR FIREABLE(display4_6_2) OR FIREABLE(display4_5_2) OR FIREABLE(display4_0_3) OR FIREABLE(display4_7_2) OR FIREABLE(display4_1_6) OR FIREABLE(display4_2_6) OR FIREABLE(display4_3_6) OR FIREABLE(display4_4_6) OR FIREABLE(display4_5_5) OR FIREABLE(display4_6_5) OR FIREABLE(display4_7_5) OR FIREABLE(display4_0_6) OR FIREABLE(display4_1_5) OR FIREABLE(display4_2_5) OR FIREABLE(display4_3_5) OR FIREABLE(display4_4_5) OR FIREABLE(display4_5_4) OR FIREABLE(display4_6_4) OR FIREABLE(display4_7_4) OR FIREABLE(display4_0_5) OR FIREABLE(display4_7_7) OR FIREABLE(display4_6_7) OR FIREABLE(display4_5_7) OR FIREABLE(display4_4_7) OR FIREABLE(display4_3_7) OR FIREABLE(display4_2_7) OR FIREABLE(display4_1_7) OR FIREABLE(display4_0_7) OR FIREABLE(display4_7_6) OR FIREABLE(display4_6_6) OR FIREABLE(display4_5_6))))))
lola: processed formula: A (X (X (X ((FIREABLE(display4_0_0) OR FIREABLE(display4_4_0) OR FIREABLE(display4_3_0) OR FIREABLE(display4_2_0) OR FIREABLE(display4_1_0) OR FIREABLE(display4_7_1) OR FIREABLE(display4_0_2) OR FIREABLE(display4_5_1) OR FIREABLE(display4_6_1) OR FIREABLE(display4_3_2) OR FIREABLE(display4_4_2) OR FIREABLE(display4_1_2) OR FIREABLE(display4_2_2) OR FIREABLE(display4_7_0) OR FIREABLE(... (shortened)
lola: processed formula length: 1741
lola: 0 rewrites
lola: formula mentions 0 of 168 places; total mentions: 0
lola: closed formula file PermAdmissibility-PT-10-LTLFireability.task
lola: the resulting B\xfcchi automaton has 5 states
lola: STORE
lola: using a bit-perfect encoder (--encoder=bit)
lola: using 548 bytes per marking, with 29 unused bits
lola: using a prefix tree store (--store=prefix)
lola: Formula contains X operator; stubborn sets not applicable
lola: SEARCH
lola: RUNNING
lola: SUBRESULT
lola: result: no
lola: produced by: LTL model checker
lola: The net does not satisfy the given formula (language of the product automaton is nonempty).
lola: 161 markings, 161 edges
lola: ========================================
lola: subprocess 3 will run for 272 seconds at most (--localtimelimit=-1)
lola: ========================================
lola: ...considering subproblem: A (G ((FIREABLE(display4_0_0) OR FIREABLE(display4_4_0) OR FIREABLE(display4_3_0) OR FIREABLE(display4_2_0) OR FIREABLE(display4_1_0) OR FIREABLE(display4_7_1) OR FIREABLE(display4_0_2) OR FIREABLE(display4_5_1) OR FIREABLE(display4_6_1) OR FIREABLE(display4_3_2) OR FIREABLE(display4_4_2) OR FIREABLE(display4_1_2) OR FIREABLE(display4_2_2) OR FIREABLE(display4_7_0) OR FIREABLE(displa... (shortened)
lola: ========================================
lola: SUBTASK
lola: checking invariance
lola: Planning: workflow for reachability check: search (--findpath=off)
lola: STORE
lola: using a bit-perfect encoder (--encoder=bit)
lola: using 544 bytes per marking, with 0 unused bits
lola: using a prefix tree store (--store=prefix)
lola: SEARCH (state space)
lola: state space: using reachability graph (--search=depth)
lola: state space: using reachability preserving stubborn set method with insertion algorithm (--stubborn=tarjan)
lola: RUNNING
lola: SUBRESULT
lola: result: no
lola: produced by: state space
lola: The predicate is not invariant.
lola: 0 markings, 0 edges
lola: ========================================
lola: subprocess 4 will run for 295 seconds at most (--localtimelimit=-1)
lola: ========================================
lola: ...considering subproblem: A (G (((FIREABLE(switch6_5_7) OR FIREABLE(switch6_1_7) OR FIREABLE(switch6_4_7) OR FIREABLE(switch6_5_6) OR FIREABLE(switch6_0_7) OR FIREABLE(switch6_1_6) OR FIREABLE(switch6_4_6) OR FIREABLE(switch6_5_3) OR FIREABLE(switch6_0_6) OR FIREABLE(switch6_1_3) OR FIREABLE(switch6_4_3) OR FIREABLE(switch6_0_3) OR FIREABLE(switch6_5_2) OR FIREABLE(switch6_4_2) OR FIREABLE(switch6_1_2) OR FI... (shortened)
lola: ========================================
lola: SUBTASK
lola: checking LTL
lola: transforming LTL-Formula into a B\xfcchi-Automaton
lola: processed formula: A (G (((FIREABLE(switch6_5_7) OR FIREABLE(switch6_1_7) OR FIREABLE(switch6_4_7) OR FIREABLE(switch6_5_6) OR FIREABLE(switch6_0_7) OR FIREABLE(switch6_1_6) OR FIREABLE(switch6_4_6) OR FIREABLE(switch6_5_3) OR FIREABLE(switch6_0_6) OR FIREABLE(switch6_1_3) OR FIREABLE(switch6_4_3) OR FIREABLE(switch6_0_3) OR FIREABLE(switch6_5_2) OR FIREABLE(switch6_4_2) OR FIREABLE(switch6_1_2) OR FIREABLE(switch6_0_2)) U X ((FIREABLE(display4_0_0) OR FIREABLE(display4_4_0) OR FIREABLE(display4_3_0) OR FIREABLE(display4_2_0) OR FIREABLE(display4_1_0) OR FIREABLE(display4_7_1) OR FIREABLE(display4_0_2) OR FIREABLE(display4_5_1) OR FIREABLE(display4_6_1) OR FIREABLE(display4_3_2) OR FIREABLE(display4_4_2) OR FIREABLE(display4_1_2) OR FIREABLE(display4_2_2) OR FIREABLE(display4_7_0) OR FIREABLE(display4_0_1) OR FIREABLE(display4_5_0) OR FIREABLE(display4_6_0) OR FIREABLE(display4_3_1) OR FIREABLE(display4_4_1) OR FIREABLE(display4_1_1) OR FIREABLE(display4_2_1) OR FIREABLE(display4_2_4) OR FIREABLE(display4_1_4) OR FIREABLE(display4_4_4) OR FIREABLE(display4_3_4) OR FIREABLE(display4_6_3) OR FIREABLE(display4_5_3) OR FIREABLE(display4_0_4) OR FIREABLE(display4_7_3) OR FIREABLE(display4_2_3) OR FIREABLE(display4_1_3) OR FIREABLE(display4_4_3) OR FIREABLE(display4_3_3) OR FIREABLE(display4_6_2) OR FIREABLE(display4_5_2) OR FIREABLE(display4_0_3) OR FIREABLE(display4_7_2) OR FIREABLE(display4_1_6) OR FIREABLE(display4_2_6) OR FIREABLE(display4_3_6) OR FIREABLE(display4_4_6) OR FIREABLE(display4_5_5) OR FIREABLE(display4_6_5) OR FIREABLE(display4_7_5) OR FIREABLE(display4_0_6) OR FIREABLE(display4_1_5) OR FIREABLE(display4_2_5) OR FIREABLE(display4_3_5) OR FIREABLE(display4_4_5) OR FIREABLE(display4_5_4) OR FIREABLE(display4_6_4) OR FIREABLE(display4_7_4) OR FIREABLE(display4_0_5) OR FIREABLE(display4_7_7) OR FIREABLE(display4_6_7) OR FIREABLE(display4_5_7) OR FIREABLE(display4_4_7) OR FIREABLE(display4_3_7) OR FIREABLE(display4_2_7) OR FIREABLE(display4_1_7) OR FIREABLE(display4_0_7) OR FIREABLE(display4_7_6) OR FIREABLE(display4_6_6) OR FIREABLE(display4_5_6))))))
lola: processed formula: A (G (((FIREABLE(switch6_5_7) OR FIREABLE(switch6_1_7) OR FIREABLE(switch6_4_7) OR FIREABLE(switch6_5_6) OR FIREABLE(switch6_0_7) OR FIREABLE(switch6_1_6) OR FIREABLE(switch6_4_6) OR FIREABLE(switch6_5_3) OR FIREABLE(switch6_0_6) OR FIREABLE(switch6_1_3) OR FIREABLE(switch6_4_3) OR FIREABLE(switch6_0_3) OR FIREABLE(switch6_5_2) OR FIREABLE(switch6_4_2) OR FIREABLE(switch6_1_2) OR FI... (shortened)
lola: processed formula length: 2155
lola: 0 rewrites
lola: formula mentions 0 of 168 places; total mentions: 0
lola: closed formula file PermAdmissibility-PT-10-LTLFireability.task
lola: the resulting B\xfcchi automaton has 4 states
lola: STORE
lola: using a bit-perfect encoder (--encoder=bit)
lola: using 548 bytes per marking, with 29 unused bits
lola: using a prefix tree store (--store=prefix)
lola: Formula contains X operator; stubborn sets not applicable
lola: SEARCH
lola: RUNNING
lola: SUBRESULT
lola: result: no
lola: produced by: LTL model checker
lola: The net does not satisfy the given formula (language of the product automaton is nonempty).
lola: 161 markings, 161 edges
lola: ========================================
lola: subprocess 5 will run for 321 seconds at most (--localtimelimit=-1)
lola: ========================================
lola: ...considering subproblem: A (G (F (X (((FIREABLE(switch12_3_0) OR FIREABLE(switch12_4_0) OR FIREABLE(switch12_1_0) OR FIREABLE(switch12_2_0) OR FIREABLE(switch12_0_0) OR FIREABLE(switch12_0_6) OR FIREABLE(switch12_7_5) OR FIREABLE(switch12_6_5) OR FIREABLE(switch12_5_5) OR FIREABLE(switch12_4_6) OR FIREABLE(switch12_3_6) OR FIREABLE(switch12_2_6) OR FIREABLE(switch12_1_6) OR FIREABLE(switch12_0_5) OR FIREABLE... (shortened)
lola: ========================================
lola: SUBTASK
lola: checking LTL
lola: transforming LTL-Formula into a B\xfcchi-Automaton
lola: processed formula: A (G (F (X (((FIREABLE(switch12_3_0) OR FIREABLE(switch12_4_0) OR FIREABLE(switch12_1_0) OR FIREABLE(switch12_2_0) OR FIREABLE(switch12_0_0) OR FIREABLE(switch12_0_6) OR FIREABLE(switch12_7_5) OR FIREABLE(switch12_6_5) OR FIREABLE(switch12_5_5) OR FIREABLE(switch12_4_6) OR FIREABLE(switch12_3_6) OR FIREABLE(switch12_2_6) OR FIREABLE(switch12_1_6) OR FIREABLE(switch12_0_5) OR FIREABLE(switch12_7_4) OR FIREABLE(switch12_6_4) OR FIREABLE(switch12_5_4) OR FIREABLE(switch12_4_5) OR FIREABLE(switch12_3_5) OR FIREABLE(switch12_2_5) OR FIREABLE(switch12_1_5) OR FIREABLE(switch12_7_7) OR FIREABLE(switch12_5_7) OR FIREABLE(switch12_6_7) OR FIREABLE(switch12_7_6) OR FIREABLE(switch12_0_7) OR FIREABLE(switch12_5_6) OR FIREABLE(switch12_6_6) OR FIREABLE(switch12_3_7) OR FIREABLE(switch12_4_7) OR FIREABLE(switch12_1_7) OR FIREABLE(switch12_2_7) OR FIREABLE(switch12_6_1) OR FIREABLE(switch12_5_1) OR FIREABLE(switch12_0_2) OR FIREABLE(switch12_7_1) OR FIREABLE(switch12_2_2) OR FIREABLE(switch12_1_2) OR FIREABLE(switch12_4_2) OR FIREABLE(switch12_3_2) OR FIREABLE(switch12_6_0) OR FIREABLE(switch12_5_0) OR FIREABLE(switch12_0_1) OR FIREABLE(switch12_7_0) OR FIREABLE(switch12_2_1) OR FIREABLE(switch12_1_1) OR FIREABLE(switch12_4_1) OR FIREABLE(switch12_3_1) OR FIREABLE(switch12_5_3) OR FIREABLE(switch12_6_3) OR FIREABLE(switch12_7_3) OR FIREABLE(switch12_0_4) OR FIREABLE(switch12_1_4) OR FIREABLE(switch12_2_4) OR FIREABLE(switch12_3_4) OR FIREABLE(switch12_4_4) OR FIREABLE(switch12_5_2) OR FIREABLE(switch12_6_2) OR FIREABLE(switch12_7_2) OR FIREABLE(switch12_0_3) OR FIREABLE(switch12_1_3) OR FIREABLE(switch12_2_3) OR FIREABLE(switch12_3_3) OR FIREABLE(switch12_4_3)) U (FIREABLE(switch7_0_2) OR FIREABLE(switch7_1_2) OR FIREABLE(switch7_4_2) OR FIREABLE(switch7_5_2) OR FIREABLE(switch7_0_3) OR FIREABLE(switch7_5_7) OR FIREABLE(switch7_4_7) OR FIREABLE(switch7_1_7) OR FIREABLE(switch7_0_7) OR FIREABLE(switch7_5_6) OR FIREABLE(switch7_4_6) OR FIREABLE(switch7_1_6) OR FIREABLE(switch7_0_6) OR FIREABLE(switch7_5_3) OR FIREABLE(switch7_4_3) OR FIREABLE(switch7_1_3)))))))
lola: processed formula: A (G (F (X (((FIREABLE(switch12_3_0) OR FIREABLE(switch12_4_0) OR FIREABLE(switch12_1_0) OR FIREABLE(switch12_2_0) OR FIREABLE(switch12_0_0) OR FIREABLE(switch12_0_6) OR FIREABLE(switch12_7_5) OR FIREABLE(switch12_6_5) OR FIREABLE(switch12_5_5) OR FIREABLE(switch12_4_6) OR FIREABLE(switch12_3_6) OR FIREABLE(switch12_2_6) OR FIREABLE(switch12_1_6) OR FIREABLE(switch12_0_5) OR FIREABLE... (shortened)
lola: processed formula length: 2159
lola: 0 rewrites
lola: formula mentions 0 of 168 places; total mentions: 0
lola: closed formula file PermAdmissibility-PT-10-LTLFireability.task
lola: the resulting B\xfcchi automaton has 2 states
lola: STORE
lola: using a bit-perfect encoder (--encoder=bit)
lola: using 548 bytes per marking, with 30 unused bits
lola: using a prefix tree store (--store=prefix)
lola: Formula contains X operator; stubborn sets not applicable
lola: SEARCH
lola: RUNNING
lola: 1244870 markings, 1765736 edges, 248974 markings/sec, 0 secs
lola: 2393326 markings, 3449648 edges, 229691 markings/sec, 5 secs
lola: 3524933 markings, 5106445 edges, 226321 markings/sec, 10 secs
lola: 4629995 markings, 6744113 edges, 221012 markings/sec, 15 secs
lola: 5731297 markings, 8364621 edges, 220260 markings/sec, 20 secs
lola: 6750109 markings, 9893035 edges, 203762 markings/sec, 25 secs
lola: 7867846 markings, 11571913 edges, 223547 markings/sec, 30 secs
lola: 8970013 markings, 13240376 edges, 220433 markings/sec, 35 secs
lola: 10041197 markings, 14916147 edges, 214237 markings/sec, 40 secs
lola: 11163959 markings, 16663731 edges, 224552 markings/sec, 45 secs
lola: 12252892 markings, 18344897 edges, 217787 markings/sec, 50 secs
lola: 13238169 markings, 19866611 edges, 197055 markings/sec, 55 secs
lola: 14220692 markings, 21408233 edges, 196505 markings/sec, 60 secs
lola: 15179818 markings, 22904193 edges, 191825 markings/sec, 65 secs
lola: 16142835 markings, 24373169 edges, 192603 markings/sec, 70 secs
lola: 17150981 markings, 25857426 edges, 201629 markings/sec, 75 secs
lola: 18215254 markings, 27421648 edges, 212855 markings/sec, 80 secs
lola: 19260479 markings, 28996126 edges, 209045 markings/sec, 85 secs
lola: 20269681 markings, 30533141 edges, 201840 markings/sec, 90 secs
lola: 21314941 markings, 32120154 edges, 209052 markings/sec, 95 secs
lola: 22300195 markings, 33692305 edges, 197051 markings/sec, 100 secs
lola: 23299673 markings, 35234611 edges, 199896 markings/sec, 105 secs
lola: 24262149 markings, 36760181 edges, 192495 markings/sec, 110 secs
lola: 25222961 markings, 38276950 edges, 192162 markings/sec, 115 secs
lola: 26253713 markings, 39793875 edges, 206150 markings/sec, 120 secs
lola: 27216677 markings, 41243566 edges, 192593 markings/sec, 125 secs
lola: 28174635 markings, 42688587 edges, 191592 markings/sec, 130 secs
lola: 29154128 markings, 44181722 edges, 195899 markings/sec, 135 secs
lola: 30163243 markings, 45761711 edges, 201823 markings/sec, 140 secs
lola: 31137588 markings, 47297331 edges, 194869 markings/sec, 145 secs
lola: 32084615 markings, 48824901 edges, 189405 markings/sec, 150 secs
lola: 33107737 markings, 50419452 edges, 204624 markings/sec, 155 secs
lola: 34132991 markings, 51969235 edges, 205051 markings/sec, 160 secs
lola: 35061873 markings, 53398951 edges, 185776 markings/sec, 165 secs
lola: 36002461 markings, 54871736 edges, 188118 markings/sec, 170 secs
lola: 36905069 markings, 56314948 edges, 180522 markings/sec, 175 secs
lola: 37795454 markings, 57759575 edges, 178077 markings/sec, 180 secs
lola: 38832785 markings, 59308118 edges, 207466 markings/sec, 185 secs
lola: 39795539 markings, 60830964 edges, 192551 markings/sec, 190 secs
lola: 40756391 markings, 62369344 edges, 192170 markings/sec, 195 secs
lola: 41653232 markings, 63825248 edges, 179368 markings/sec, 200 secs
lola: 42611756 markings, 65342449 edges, 191705 markings/sec, 205 secs
lola: 43516638 markings, 66837485 edges, 180976 markings/sec, 210 secs
lola: 44546026 markings, 68388623 edges, 205878 markings/sec, 215 secs
lola: 45570899 markings, 69926426 edges, 204975 markings/sec, 220 secs
lola: 46560991 markings, 71429493 edges, 198018 markings/sec, 225 secs
lola: 47495200 markings, 72865086 edges, 186842 markings/sec, 230 secs
lola: 48522053 markings, 74438421 edges, 205371 markings/sec, 235 secs
lola: 48917217 markings, 75034378 edges, 79033 markings/sec, 240 secs
lola: 48922094 markings, 75041500 edges, 975 markings/sec, 245 secs
lola: Child process aborted or communication problem between parent and child process
terminate called after throwing an instance of 'std::runtime_error'
what(): parse error at position 0: unexpected character, last read: '
'
Aborted (core dumped)
FORMULA PermAdmissibility-PT-10-LTLFireability-0 CANNOT_COMPUTE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT STATE_COMPRESSION STUBBORN_SETS TOPOLOGICAL USE_NUPN
FORMULA PermAdmissibility-PT-10-LTLFireability-1 CANNOT_COMPUTE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT STATE_COMPRESSION STUBBORN_SETS TOPOLOGICAL USE_NUPN
FORMULA PermAdmissibility-PT-10-LTLFireability-2 CANNOT_COMPUTE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT STATE_COMPRESSION STUBBORN_SETS TOPOLOGICAL USE_NUPN
FORMULA PermAdmissibility-PT-10-LTLFireability-3 CANNOT_COMPUTE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT STATE_COMPRESSION STUBBORN_SETS TOPOLOGICAL USE_NUPN
FORMULA PermAdmissibility-PT-10-LTLFireability-4 CANNOT_COMPUTE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT STATE_COMPRESSION STUBBORN_SETS TOPOLOGICAL USE_NUPN
FORMULA PermAdmissibility-PT-10-LTLFireability-5 CANNOT_COMPUTE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT STATE_COMPRESSION STUBBORN_SETS TOPOLOGICAL USE_NUPN
FORMULA PermAdmissibility-PT-10-LTLFireability-6 CANNOT_COMPUTE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT STATE_COMPRESSION STUBBORN_SETS TOPOLOGICAL USE_NUPN
FORMULA PermAdmissibility-PT-10-LTLFireability-7 CANNOT_COMPUTE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT STATE_COMPRESSION STUBBORN_SETS TOPOLOGICAL USE_NUPN
FORMULA PermAdmissibility-PT-10-LTLFireability-8 CANNOT_COMPUTE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT STATE_COMPRESSION STUBBORN_SETS TOPOLOGICAL USE_NUPN
FORMULA PermAdmissibility-PT-10-LTLFireability-9 CANNOT_COMPUTE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT STATE_COMPRESSION STUBBORN_SETS TOPOLOGICAL USE_NUPN
FORMULA PermAdmissibility-PT-10-LTLFireability-10 CANNOT_COMPUTE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT STATE_COMPRESSION STUBBORN_SETS TOPOLOGICAL USE_NUPN
FORMULA PermAdmissibility-PT-10-LTLFireability-11 CANNOT_COMPUTE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT STATE_COMPRESSION STUBBORN_SETS TOPOLOGICAL USE_NUPN
FORMULA PermAdmissibility-PT-10-LTLFireability-12 CANNOT_COMPUTE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT STATE_COMPRESSION STUBBORN_SETS TOPOLOGICAL USE_NUPN
FORMULA PermAdmissibility-PT-10-LTLFireability-13 CANNOT_COMPUTE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT STATE_COMPRESSION STUBBORN_SETS TOPOLOGICAL USE_NUPN
FORMULA PermAdmissibility-PT-10-LTLFireability-14 CANNOT_COMPUTE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT STATE_COMPRESSION STUBBORN_SETS TOPOLOGICAL USE_NUPN
FORMULA PermAdmissibility-PT-10-LTLFireability-15 CANNOT_COMPUTE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT STATE_COMPRESSION STUBBORN_SETS TOPOLOGICAL USE_NUPN
----- Kill lola and sara stdout -----
----- Kill lola and sara stderr -----
----- Finished stdout -----
----- Finished stderr -----
Sequence of Actions to be Executed by the VM
This is useful if one wants to reexecute the tool in the VM from the submitted image disk.
set -x
# this is for BenchKit: configuration of major elements for the test
export BK_INPUT="PermAdmissibility-PT-10"
export BK_EXAMINATION="LTLFireability"
export BK_TOOL="irma4mcc-full"
export BK_RESULT_DIR="/tmp/BK_RESULTS/OUTPUTS"
export BK_TIME_CONFINEMENT="3600"
export BK_MEMORY_CONFINEMENT="16384"
# this is specific to your benchmark or test
export BIN_DIR="$HOME/BenchKit/bin"
# remove the execution directoty if it exists (to avoid increse of .vmdk images)
if [ -d execution ] ; then
rm -rf execution
fi
tar xzf /home/mcc/BenchKit/INPUTS/PermAdmissibility-PT-10.tgz
mv PermAdmissibility-PT-10 execution
cd execution
pwd
ls -lh
# this is for BenchKit: explicit launching of the test
echo "====================================================================="
echo " Generated by BenchKit 2-3637"
echo " Executing tool irma4mcc-full"
echo " Input is PermAdmissibility-PT-10, examination is LTLFireability"
echo " Time confinement is $BK_TIME_CONFINEMENT seconds"
echo " Memory confinement is 16384 MBytes"
echo " Number of cores is 4"
echo " Run identifier is r258-csrt-152732584000142"
echo "====================================================================="
echo
echo "--------------------"
echo "content from stdout:"
echo
echo "=== Data for post analysis generated by BenchKit (invocation template)"
echo
if [ "LTLFireability" = "UpperBounds" ] ; then
echo "The expected result is a vector of positive values"
echo NUM_VECTOR
elif [ "LTLFireability" != "StateSpace" ] ; then
echo "The expected result is a vector of booleans"
echo BOOL_VECTOR
else
echo "no data necessary for post analysis"
fi
echo
if [ -f "LTLFireability.txt" ] ; then
echo "here is the order used to build the result vector(from text file)"
for x in $(grep Property LTLFireability.txt | cut -d ' ' -f 2 | sort -u) ; do
echo "FORMULA_NAME $x"
done
elif [ -f "LTLFireability.xml" ] ; then # for cunf (txt files deleted;-)
echo echo "here is the order used to build the result vector(from xml file)"
for x in $(grep '
echo "FORMULA_NAME $x"
done
fi
echo
echo "=== Now, execution of the tool begins"
echo
echo -n "BK_START "
date -u +%s%3N
echo
timeout -s 9 $BK_TIME_CONFINEMENT bash -c "/home/mcc/BenchKit/BenchKit_head.sh 2> STDERR ; echo ; echo -n \"BK_STOP \" ; date -u +%s%3N"
if [ $? -eq 137 ] ; then
echo
echo "BK_TIME_CONFINEMENT_REACHED"
fi
echo
echo "--------------------"
echo "content from stderr:"
echo
cat STDERR ;