About the Execution of LoLA for PermAdmissibility-PT-50
Execution Summary | |||||
Max Memory Used (MB) |
Time wait (ms) | CPU Usage (ms) | I/O Wait (ms) | Computed Result | Execution Status |
15918.120 | 3570887.00 | 3631823.00 | 1575.70 | FFFFFF?FFFFFFF?F | normal |
Execution Chart
We display below the execution chart for this examination (boot time has been removed).
Trace from the execution
Waiting for the VM to be ready (probing ssh)
...................
/home/mcc/execution
total 848K
-rw-r--r-- 1 mcc users 5.0K May 15 18:54 CTLCardinality.txt
-rw-r--r-- 1 mcc users 25K May 15 18:54 CTLCardinality.xml
-rw-r--r-- 1 mcc users 19K May 15 18:54 CTLFireability.txt
-rw-r--r-- 1 mcc users 71K May 15 18:54 CTLFireability.xml
-rw-r--r-- 1 mcc users 4.0K May 15 18:50 GenericPropertiesDefinition.xml
-rw-r--r-- 1 mcc users 6.0K May 15 18:50 GenericPropertiesVerdict.xml
-rw-r--r-- 1 mcc users 3.0K May 26 09:26 LTLCardinality.txt
-rw-r--r-- 1 mcc users 12K May 26 09:26 LTLCardinality.xml
-rw-r--r-- 1 mcc users 9.5K May 26 09:26 LTLFireability.txt
-rw-r--r-- 1 mcc users 34K May 26 09:26 LTLFireability.xml
-rw-r--r-- 1 mcc users 4.0K May 15 18:54 ReachabilityCardinality.txt
-rw-r--r-- 1 mcc users 18K May 15 18:54 ReachabilityCardinality.xml
-rw-r--r-- 1 mcc users 114 May 15 18:54 ReachabilityDeadlock.txt
-rw-r--r-- 1 mcc users 352 May 15 18:54 ReachabilityDeadlock.xml
-rw-r--r-- 1 mcc users 21K May 15 18:54 ReachabilityFireability.txt
-rw-r--r-- 1 mcc users 78K May 15 18:54 ReachabilityFireability.xml
-rw-r--r-- 1 mcc users 2.1K May 15 18:54 UpperBounds.txt
-rw-r--r-- 1 mcc users 4.9K May 15 18:54 UpperBounds.xml
-rw-r--r-- 1 mcc users 5 May 15 18:50 equiv_col
-rw-r--r-- 1 mcc users 3 May 15 18:50 instance
-rw-r--r-- 1 mcc users 6 May 15 18:50 iscolored
-rw-r--r-- 1 mcc users 484K May 15 18:50 model.pnml
=====================================================================
Generated by BenchKit 2-3637
Executing tool lola
Input is PermAdmissibility-PT-50, examination is LTLFireability
Time confinement is 3600 seconds
Memory confinement is 16384 MBytes
Number of cores is 4
Run identifier is r256-csrt-152732582900146
=====================================================================
--------------------
content from stdout:
=== Data for post analysis generated by BenchKit (invocation template)
The expected result is a vector of booleans
BOOL_VECTOR
here is the order used to build the result vector(from text file)
FORMULA_NAME PermAdmissibility-PT-50-LTLFireability-00
FORMULA_NAME PermAdmissibility-PT-50-LTLFireability-01
FORMULA_NAME PermAdmissibility-PT-50-LTLFireability-02
FORMULA_NAME PermAdmissibility-PT-50-LTLFireability-03
FORMULA_NAME PermAdmissibility-PT-50-LTLFireability-04
FORMULA_NAME PermAdmissibility-PT-50-LTLFireability-05
FORMULA_NAME PermAdmissibility-PT-50-LTLFireability-06
FORMULA_NAME PermAdmissibility-PT-50-LTLFireability-07
FORMULA_NAME PermAdmissibility-PT-50-LTLFireability-08
FORMULA_NAME PermAdmissibility-PT-50-LTLFireability-09
FORMULA_NAME PermAdmissibility-PT-50-LTLFireability-10
FORMULA_NAME PermAdmissibility-PT-50-LTLFireability-11
FORMULA_NAME PermAdmissibility-PT-50-LTLFireability-12
FORMULA_NAME PermAdmissibility-PT-50-LTLFireability-13
FORMULA_NAME PermAdmissibility-PT-50-LTLFireability-14
FORMULA_NAME PermAdmissibility-PT-50-LTLFireability-15
=== Now, execution of the tool begins
BK_START 1527434896366
info: Time: 3600 - MCC
===========================================================================================
prep: translating PermAdmissibility-PT-50 Petri net model.pnml into LoLA format
===========================================================================================
prep: translating PT Petri net complete
prep: check for too many tokens
===========================================================================================
prep: translating PermAdmissibility-PT-50 formula LTLFireability into LoLA format
===========================================================================================
prep: translating PT formula complete
vrfy: Checking LTLFireability @ PermAdmissibility-PT-50 @ 3570 seconds
lola: LoLA will run for 3570 seconds at most (--timelimit)
lola: NET
lola: reading net from model.pnml.lola
lola: finished parsing
lola: closed net file model.pnml.lola
lola: 760/65536 symbol table entries, 0 collisions
lola: preprocessing...
lola: Size of bit vector: 5376
lola: finding significant places
lola: 168 places, 592 transitions, 136 significant places
lola: computing forward-conflicting sets
lola: computing back-conflicting sets
lola: 820 transition conflict sets
lola: TASK
lola: reading formula from PermAdmissibility-PT-50-LTLFireability.task
lola: A (F (X (X (G ((FIREABLE(display4_0_0) OR FIREABLE(display4_4_0) OR FIREABLE(display4_3_0) OR FIREABLE(display4_2_0) OR FIREABLE(display4_1_0) OR FIREABLE(display4_7_1) OR FIREABLE(display4_0_2) OR FIREABLE(display4_5_1) OR FIREABLE(display4_6_1) OR FIREABLE(display4_3_2) OR FIREABLE(display4_4_2) OR FIREABLE(display4_1_2) OR FIREABLE(display4_2_2) OR FIREABLE(display4_7_0) OR FIREABLE(display4_0_1) OR FIREABLE(display4_5_0) OR FIREABLE(display4_6_0) OR FIREABLE(display4_3_1) OR FIREABLE(display4_4_1) OR FIREABLE(display4_1_1) OR FIREABLE(display4_2_1) OR FIREABLE(display4_2_4) OR FIREABLE(display4_1_4) OR FIREABLE(display4_4_4) OR FIREABLE(display4_3_4) OR FIREABLE(display4_6_3) OR FIREABLE(display4_5_3) OR FIREABLE(display4_0_4) OR FIREABLE(display4_7_3) OR FIREABLE(display4_2_3) OR FIREABLE(display4_1_3) OR FIREABLE(display4_4_3) OR FIREABLE(display4_3_3) OR FIREABLE(display4_6_2) OR FIREABLE(display4_5_2) OR FIREABLE(display4_0_3) OR FIREABLE(display4_7_2) OR FIREABLE(display4_1_6) OR FIREABLE(display4_2_6) OR FIREABLE(display4_3_6) OR FIREABLE(display4_4_6) OR FIREABLE(display4_5_5) OR FIREABLE(display4_6_5) OR FIREABLE(display4_7_5) OR FIREABLE(display4_0_6) OR FIREABLE(display4_1_5) OR FIREABLE(display4_2_5) OR FIREABLE(display4_3_5) OR FIREABLE(display4_4_5) OR FIREABLE(display4_5_4) OR FIREABLE(display4_6_4) OR FIREABLE(display4_7_4) OR FIREABLE(display4_0_5) OR FIREABLE(display4_7_7) OR FIREABLE(display4_6_7) OR FIREABLE(display4_5_7) OR FIREABLE(display4_4_7) OR FIREABLE(display4_3_7) OR FIREABLE(display4_2_7) OR FIREABLE(display4_1_7) OR FIREABLE(display4_0_7) OR FIREABLE(display4_7_6) OR FIREABLE(display4_6_6) OR FIREABLE(display4_5_6))))))) : A ((FIREABLE(switch7_0_2) OR FIREABLE(switch7_1_2) OR FIREABLE(switch7_4_2) OR FIREABLE(switch7_5_2) OR FIREABLE(switch7_0_3) OR FIREABLE(switch7_5_7) OR FIREABLE(switch7_4_7) OR FIREABLE(switch7_1_7) OR FIREABLE(switch7_0_7) OR FIREABLE(switch7_5_6) OR FIREABLE(switch7_4_6) OR FIREABLE(switch7_1_6) OR FIREABLE(switch7_0_6) OR FIREABLE(switch7_5_3) OR FIREABLE(switch7_4_3) OR FIREABLE(switch7_1_3))) : A ((FIREABLE(display1_2_1) OR FIREABLE(display1_1_1) OR FIREABLE(display1_4_1) OR FIREABLE(display1_3_1) OR FIREABLE(display1_6_0) OR FIREABLE(display1_5_0) OR FIREABLE(display1_0_1) OR FIREABLE(display1_7_0) OR FIREABLE(display1_2_2) OR FIREABLE(display1_1_2) OR FIREABLE(display1_4_2) OR FIREABLE(display1_3_2) OR FIREABLE(display1_6_1) OR FIREABLE(display1_5_1) OR FIREABLE(display1_0_2) OR FIREABLE(display1_7_1) OR FIREABLE(display1_1_0) OR FIREABLE(display1_2_0) OR FIREABLE(display1_3_0) OR FIREABLE(display1_4_0) OR FIREABLE(display1_0_0) OR FIREABLE(display1_7_5) OR FIREABLE(display1_0_6) OR FIREABLE(display1_5_5) OR FIREABLE(display1_6_5) OR FIREABLE(display1_3_6) OR FIREABLE(display1_4_6) OR FIREABLE(display1_1_6) OR FIREABLE(display1_2_6) OR FIREABLE(display1_7_4) OR FIREABLE(display1_0_5) OR FIREABLE(display1_5_4) OR FIREABLE(display1_6_4) OR FIREABLE(display1_3_5) OR FIREABLE(display1_4_5) OR FIREABLE(display1_1_5) OR FIREABLE(display1_2_5) OR FIREABLE(display1_0_4) OR FIREABLE(display1_7_3) OR FIREABLE(display1_6_3) OR FIREABLE(display1_5_3) OR FIREABLE(display1_4_4) OR FIREABLE(display1_3_4) OR FIREABLE(display1_2_4) OR FIREABLE(display1_1_4) OR FIREABLE(display1_0_3) OR FIREABLE(display1_7_2) OR FIREABLE(display1_6_2) OR FIREABLE(display1_5_2) OR FIREABLE(display1_4_3) OR FIREABLE(display1_3_3) OR FIREABLE(display1_2_3) OR FIREABLE(display1_1_3) OR FIREABLE(display1_6_7) OR FIREABLE(display1_5_7) OR FIREABLE(display1_7_7) OR FIREABLE(display1_6_6) OR FIREABLE(display1_5_6) OR FIREABLE(display1_0_7) OR FIREABLE(display1_7_6) OR FIREABLE(display1_2_7) OR FIREABLE(display1_1_7) OR FIREABLE(display1_4_7) OR FIREABLE(display1_3_7))) : A (X (G (X ((FIREABLE(switch6_5_7) OR FIREABLE(switch6_1_7) OR FIREABLE(switch6_4_7) OR FIREABLE(switch6_5_6) OR FIREABLE(switch6_0_7) OR FIREABLE(switch6_1_6) OR FIREABLE(switch6_4_6) OR FIREABLE(switch6_5_3) OR FIREABLE(switch6_0_6) OR FIREABLE(switch6_1_3) OR FIREABLE(switch6_4_3) OR FIREABLE(switch6_0_3) OR FIREABLE(switch6_5_2) OR FIREABLE(switch6_4_2) OR FIREABLE(switch6_1_2) OR FIREABLE(switch6_0_2)))))) : A (G ((F (X ((FIREABLE(switch11_0_0) OR FIREABLE(switch11_4_0) OR FIREABLE(switch11_3_0) OR FIREABLE(switch11_2_0) OR FIREABLE(switch11_1_0) OR FIREABLE(switch11_4_6) OR FIREABLE(switch11_3_6) OR FIREABLE(switch11_2_6) OR FIREABLE(switch11_1_6) OR FIREABLE(switch11_0_6) OR FIREABLE(switch11_7_5) OR FIREABLE(switch11_6_5) OR FIREABLE(switch11_5_5) OR FIREABLE(switch11_4_5) OR FIREABLE(switch11_3_5) OR FIREABLE(switch11_2_5) OR FIREABLE(switch11_1_5) OR FIREABLE(switch11_0_5) OR FIREABLE(switch11_7_4) OR FIREABLE(switch11_6_4) OR FIREABLE(switch11_5_4) OR FIREABLE(switch11_7_7) OR FIREABLE(switch11_5_7) OR FIREABLE(switch11_6_7) OR FIREABLE(switch11_3_7) OR FIREABLE(switch11_4_7) OR FIREABLE(switch11_1_7) OR FIREABLE(switch11_2_7) OR FIREABLE(switch11_7_6) OR FIREABLE(switch11_0_7) OR FIREABLE(switch11_5_6) OR FIREABLE(switch11_6_6) OR FIREABLE(switch11_2_2) OR FIREABLE(switch11_1_2) OR FIREABLE(switch11_4_2) OR FIREABLE(switch11_3_2) OR FIREABLE(switch11_6_1) OR FIREABLE(switch11_5_1) OR FIREABLE(switch11_0_2) OR FIREABLE(switch11_7_1) OR FIREABLE(switch11_2_1) OR FIREABLE(switch11_1_1) OR FIREABLE(switch11_4_1) OR FIREABLE(switch11_3_1) OR FIREABLE(switch11_6_0) OR FIREABLE(switch11_5_0) OR FIREABLE(switch11_0_1) OR FIREABLE(switch11_7_0) OR FIREABLE(switch11_1_4) OR FIREABLE(switch11_2_4) OR FIREABLE(switch11_3_4) OR FIREABLE(switch11_4_4) OR FIREABLE(switch11_5_3) OR FIREABLE(switch11_6_3) OR FIREABLE(switch11_7_3) OR FIREABLE(switch11_0_4) OR FIREABLE(switch11_1_3) OR FIREABLE(switch11_2_3) OR FIREABLE(switch11_3_3) OR FIREABLE(switch11_4_3) OR FIREABLE(switch11_5_2) OR FIREABLE(switch11_6_2) OR FIREABLE(switch11_7_2) OR FIREABLE(switch11_0_3)))) U G ((FIREABLE(display3_4_0) OR FIREABLE(display3_3_0) OR FIREABLE(display3_2_0) OR FIREABLE(display3_1_0) OR FIREABLE(display3_0_0) OR FIREABLE(display3_3_2) OR FIREABLE(display3_4_2) OR FIREABLE(display3_1_2) OR FIREABLE(display3_2_2) OR FIREABLE(display3_7_1) OR FIREABLE(display3_0_2) OR FIREABLE(display3_5_1) OR FIREABLE(display3_6_1) OR FIREABLE(display3_3_1) OR FIREABLE(display3_4_1) OR FIREABLE(display3_1_1) OR FIREABLE(display3_2_1) OR FIREABLE(display3_7_0) OR FIREABLE(display3_0_1) OR FIREABLE(display3_5_0) OR FIREABLE(display3_6_0) OR FIREABLE(display3_0_5) OR FIREABLE(display3_7_4) OR FIREABLE(display3_6_4) OR FIREABLE(display3_5_4) OR FIREABLE(display3_4_5) OR FIREABLE(display3_3_5) OR FIREABLE(display3_2_5) OR FIREABLE(display3_1_5) OR FIREABLE(display3_0_6) OR FIREABLE(display3_7_5) OR FIREABLE(display3_6_5) OR FIREABLE(display3_5_5) OR FIREABLE(display3_4_6) OR FIREABLE(display3_3_6) OR FIREABLE(display3_2_6) OR FIREABLE(display3_1_6) OR FIREABLE(display3_7_2) OR FIREABLE(display3_0_3) OR FIREABLE(display3_5_2) OR FIREABLE(display3_6_2) OR FIREABLE(display3_3_3) OR FIREABLE(display3_4_3) OR FIREABLE(display3_1_3) OR FIREABLE(display3_2_3) OR FIREABLE(display3_7_3) OR FIREABLE(display3_0_4) OR FIREABLE(display3_5_3) OR FIREABLE(display3_6_3) OR FIREABLE(display3_3_4) OR FIREABLE(display3_4_4) OR FIREABLE(display3_1_4) OR FIREABLE(display3_2_4) OR FIREABLE(display3_5_6) OR FIREABLE(display3_6_6) OR FIREABLE(display3_7_6) OR FIREABLE(display3_0_7) OR FIREABLE(display3_1_7) OR FIREABLE(display3_2_7) OR FIREABLE(display3_3_7) OR FIREABLE(display3_4_7) OR FIREABLE(display3_5_7) OR FIREABLE(display3_6_7) OR FIREABLE(display3_7_7)))))) : A (G ((FIREABLE(switch10_4_0) OR FIREABLE(switch10_3_0) OR FIREABLE(switch10_2_0) OR FIREABLE(switch10_1_0) OR FIREABLE(switch10_0_0) OR FIREABLE(switch10_7_4) OR FIREABLE(switch10_0_5) OR FIREABLE(switch10_5_4) OR FIREABLE(switch10_6_4) OR FIREABLE(switch10_3_5) OR FIREABLE(switch10_4_5) OR FIREABLE(switch10_1_5) OR FIREABLE(switch10_2_5) OR FIREABLE(switch10_7_5) OR FIREABLE(switch10_0_6) OR FIREABLE(switch10_5_5) OR FIREABLE(switch10_6_5) OR FIREABLE(switch10_3_6) OR FIREABLE(switch10_4_6) OR FIREABLE(switch10_1_6) OR FIREABLE(switch10_2_6) OR FIREABLE(switch10_0_7) OR FIREABLE(switch10_7_6) OR FIREABLE(switch10_6_6) OR FIREABLE(switch10_5_6) OR FIREABLE(switch10_4_7) OR FIREABLE(switch10_3_7) OR FIREABLE(switch10_2_7) OR FIREABLE(switch10_1_7) OR FIREABLE(switch10_7_7) OR FIREABLE(switch10_6_7) OR FIREABLE(switch10_5_7) OR FIREABLE(switch10_5_0) OR FIREABLE(switch10_6_0) OR FIREABLE(switch10_7_0) OR FIREABLE(switch10_0_1) OR FIREABLE(switch10_1_1) OR FIREABLE(switch10_2_1) OR FIREABLE(switch10_3_1) OR FIREABLE(switch10_4_1) OR FIREABLE(switch10_5_1) OR FIREABLE(switch10_6_1) OR FIREABLE(switch10_7_1) OR FIREABLE(switch10_0_2) OR FIREABLE(switch10_1_2) OR FIREABLE(switch10_2_2) OR FIREABLE(switch10_3_2) OR FIREABLE(switch10_4_2) OR FIREABLE(switch10_6_2) OR FIREABLE(switch10_5_2) OR FIREABLE(switch10_0_3) OR FIREABLE(switch10_7_2) OR FIREABLE(switch10_2_3) OR FIREABLE(switch10_1_3) OR FIREABLE(switch10_4_3) OR FIREABLE(switch10_3_3) OR FIREABLE(switch10_6_3) OR FIREABLE(switch10_5_3) OR FIREABLE(switch10_0_4) OR FIREABLE(switch10_7_3) OR FIREABLE(switch10_2_4) OR FIREABLE(switch10_1_4) OR FIREABLE(switch10_4_4) OR FIREABLE(switch10_3_4)))) : A (F (F ((X ((FIREABLE(display1_2_1) OR FIREABLE(display1_1_1) OR FIREABLE(display1_4_1) OR FIREABLE(display1_3_1) OR FIREABLE(display1_6_0) OR FIREABLE(display1_5_0) OR FIREABLE(display1_0_1) OR FIREABLE(display1_7_0) OR FIREABLE(display1_2_2) OR FIREABLE(display1_1_2) OR FIREABLE(display1_4_2) OR FIREABLE(display1_3_2) OR FIREABLE(display1_6_1) OR FIREABLE(display1_5_1) OR FIREABLE(display1_0_2) OR FIREABLE(display1_7_1) OR FIREABLE(display1_1_0) OR FIREABLE(display1_2_0) OR FIREABLE(display1_3_0) OR FIREABLE(display1_4_0) OR FIREABLE(display1_0_0) OR FIREABLE(display1_7_5) OR FIREABLE(display1_0_6) OR FIREABLE(display1_5_5) OR FIREABLE(display1_6_5) OR FIREABLE(display1_3_6) OR FIREABLE(display1_4_6) OR FIREABLE(display1_1_6) OR FIREABLE(display1_2_6) OR FIREABLE(display1_7_4) OR FIREABLE(display1_0_5) OR FIREABLE(display1_5_4) OR FIREABLE(display1_6_4) OR FIREABLE(display1_3_5) OR FIREABLE(display1_4_5) OR FIREABLE(display1_1_5) OR FIREABLE(display1_2_5) OR FIREABLE(display1_0_4) OR FIREABLE(display1_7_3) OR FIREABLE(display1_6_3) OR FIREABLE(display1_5_3) OR FIREABLE(display1_4_4) OR FIREABLE(display1_3_4) OR FIREABLE(display1_2_4) OR FIREABLE(display1_1_4) OR FIREABLE(display1_0_3) OR FIREABLE(display1_7_2) OR FIREABLE(display1_6_2) OR FIREABLE(display1_5_2) OR FIREABLE(display1_4_3) OR FIREABLE(display1_3_3) OR FIREABLE(display1_2_3) OR FIREABLE(display1_1_3) OR FIREABLE(display1_6_7) OR FIREABLE(display1_5_7) OR FIREABLE(display1_7_7) OR FIREABLE(display1_6_6) OR FIREABLE(display1_5_6) OR FIREABLE(display1_0_7) OR FIREABLE(display1_7_6) OR FIREABLE(display1_2_7) OR FIREABLE(display1_1_7) OR FIREABLE(display1_4_7) OR FIREABLE(display1_3_7))) U F ((FIREABLE(switch4_2_7) OR FIREABLE(switch4_3_6) OR FIREABLE(switch4_3_7) OR FIREABLE(switch4_2_6))))))) : A ((FIREABLE(switch11_0_0) OR FIREABLE(switch11_4_0) OR FIREABLE(switch11_3_0) OR FIREABLE(switch11_2_0) OR FIREABLE(switch11_1_0) OR FIREABLE(switch11_4_6) OR FIREABLE(switch11_3_6) OR FIREABLE(switch11_2_6) OR FIREABLE(switch11_1_6) OR FIREABLE(switch11_0_6) OR FIREABLE(switch11_7_5) OR FIREABLE(switch11_6_5) OR FIREABLE(switch11_5_5) OR FIREABLE(switch11_4_5) OR FIREABLE(switch11_3_5) OR FIREABLE(switch11_2_5) OR FIREABLE(switch11_1_5) OR FIREABLE(switch11_0_5) OR FIREABLE(switch11_7_4) OR FIREABLE(switch11_6_4) OR FIREABLE(switch11_5_4) OR FIREABLE(switch11_7_7) OR FIREABLE(switch11_5_7) OR FIREABLE(switch11_6_7) OR FIREABLE(switch11_3_7) OR FIREABLE(switch11_4_7) OR FIREABLE(switch11_1_7) OR FIREABLE(switch11_2_7) OR FIREABLE(switch11_7_6) OR FIREABLE(switch11_0_7) OR FIREABLE(switch11_5_6) OR FIREABLE(switch11_6_6) OR FIREABLE(switch11_2_2) OR FIREABLE(switch11_1_2) OR FIREABLE(switch11_4_2) OR FIREABLE(switch11_3_2) OR FIREABLE(switch11_6_1) OR FIREABLE(switch11_5_1) OR FIREABLE(switch11_0_2) OR FIREABLE(switch11_7_1) OR FIREABLE(switch11_2_1) OR FIREABLE(switch11_1_1) OR FIREABLE(switch11_4_1) OR FIREABLE(switch11_3_1) OR FIREABLE(switch11_6_0) OR FIREABLE(switch11_5_0) OR FIREABLE(switch11_0_1) OR FIREABLE(switch11_7_0) OR FIREABLE(switch11_1_4) OR FIREABLE(switch11_2_4) OR FIREABLE(switch11_3_4) OR FIREABLE(switch11_4_4) OR FIREABLE(switch11_5_3) OR FIREABLE(switch11_6_3) OR FIREABLE(switch11_7_3) OR FIREABLE(switch11_0_4) OR FIREABLE(switch11_1_3) OR FIREABLE(switch11_2_3) OR FIREABLE(switch11_3_3) OR FIREABLE(switch11_4_3) OR FIREABLE(switch11_5_2) OR FIREABLE(switch11_6_2) OR FIREABLE(switch11_7_2) OR FIREABLE(switch11_0_3))) : A (G (X (G ((FIREABLE(display3_4_0) U FIREABLE(display1_4_5)))))) : A (((G (FIREABLE(display2_6_2)) U G (FIREABLE(display3_0_3))) U F (X (G (FIREABLE(switch6_4_2)))))) : A (FIREABLE(display3_3_7)) : A (FIREABLE(switch11_5_4)) : A ((G (X (FIREABLE(switch8_4_7))) U F (X (FIREABLE(display4_6_6))))) : A (X (X (G (G (G (FIREABLE(switch12_0_3))))))) : A (G ((X (X (FIREABLE(display3_7_6))) U X (FIREABLE(switch6_4_2))))) : A (X ((X (X (FIREABLE(switch12_6_3))) U G (F (FIREABLE(display1_2_1))))))
lola: rewrite Frontend/Parser/formula_rewrite.k:356
lola: rewrite Frontend/Parser/formula_rewrite.k:356
lola: rewrite Frontend/Parser/formula_rewrite.k:380
lola: rewrite Frontend/Parser/formula_rewrite.k:380
lola: rewrite Frontend/Parser/formula_rewrite.k:151
lola: rewrite Frontend/Parser/formula_rewrite.k:151
lola: rewrite Frontend/Parser/formula_rewrite.k:353
lola: rewrite Frontend/Parser/formula_rewrite.k:356
lola: rewrite Frontend/Parser/formula_rewrite.k:437
lola: rewrite Frontend/Parser/formula_rewrite.k:374
lola: rewrite Frontend/Parser/formula_rewrite.k:536
lola: rewrite Frontend/Parser/formula_rewrite.k:422
lola: rewrite Frontend/Parser/formula_rewrite.k:347
lola: rewrite Frontend/Parser/formula_rewrite.k:347
lola: rewrite Frontend/Parser/formula_rewrite.k:151
lola: rewrite Frontend/Parser/formula_rewrite.k:437
lola: rewrite Frontend/Parser/formula_rewrite.k:522
lola: rewrite Frontend/Parser/formula_rewrite.k:353
lola: rewrite Frontend/Parser/formula_rewrite.k:350
lola: rewrite Frontend/Parser/formula_rewrite.k:431
lola: rewrite Frontend/Parser/formula_rewrite.k:356
lola: rewrite Frontend/Parser/formula_rewrite.k:380
lola: rewrite Frontend/Parser/formula_rewrite.k:422
lola: rewrite Frontend/Parser/formula_rewrite.k:151
lola: rewrite Frontend/Parser/formula_rewrite.k:151
lola: rewrite Frontend/Parser/formula_rewrite.k:353
lola: rewrite Frontend/Parser/formula_rewrite.k:356
lola: rewrite Frontend/Parser/formula_rewrite.k:410
lola: rewrite Frontend/Parser/formula_rewrite.k:431
lola: rewrite Frontend/Parser/formula_rewrite.k:347
lola: rewrite Frontend/Parser/formula_rewrite.k:350
lola: rewrite Frontend/Parser/formula_rewrite.k:350
lola: rewrite Frontend/Parser/formula_rewrite.k:410
lola: rewrite Frontend/Parser/formula_rewrite.k:353
lola: rewrite Frontend/Parser/formula_rewrite.k:437
lola: rewrite Frontend/Parser/formula_rewrite.k:522
lola: rewrite Frontend/Parser/formula_rewrite.k:425
lola: rewrite Frontend/Parser/formula_rewrite.k:377
lola: computing a collection of formulas
lola: RUNNING
lola: subprocess 0 will run for 223 seconds at most (--localtimelimit=0)
lola: ========================================
lola: ...considering subproblem: (FIREABLE(switch7_0_2) OR FIREABLE(switch7_1_2) OR FIREABLE(switch7_4_2) OR FIREABLE(switch7_5_2) OR FIREABLE(switch7_0_3) OR FIREABLE(switch7_5_7) OR FIREABLE(switch7_4_7) OR FIREABLE(switch7_1_7) OR FIREABLE(switch7_0_7) OR FIREABLE(switch7_5_6) OR FIREABLE(switch7_4_6) OR FIREABLE(switch7_1_6) OR FIREABLE(switch7_0_6) OR FIREABLE(switch7_5_3) OR FIREABLE(switch7_4_3) OR FIREABLE(... (shortened)
lola: ========================================
lola: SUBTASK
lola: checking initial satisfaction
lola: processed formula: (FIREABLE(switch7_0_2) OR FIREABLE(switch7_1_2) OR FIREABLE(switch7_4_2) OR FIREABLE(switch7_5_2) OR FIREABLE(switch7_0_3) OR FIREABLE(switch7_5_7) OR FIREABLE(switch7_4_7) OR FIREABLE(switch7_1_7) OR FIREABLE(switch7_0_7) OR FIREABLE(switch7_5_6) OR FIREABLE(switch7_4_6) OR FIREABLE(switch7_1_6) OR FIREABLE(switch7_0_6) OR FIREABLE(switch7_5_3) OR FIREABLE(switch7_4_3) OR FIREABLE(... (shortened)
lola: processed formula length: 413
lola: 38 rewrites
lola: closed formula file PermAdmissibility-PT-50-LTLFireability.task
lola: processed formula with 0 atomic propositions
lola: RUNNING
lola: SUBRESULT
lola: result: no
lola: produced by: preprocessing
lola: The net violates the given property already in its initial state.
lola: 0 markings, 0 edges
lola: ========================================
FORMULA PermAdmissibility-PT-50-LTLFireability-1 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
lola: subprocess 1 will run for 238 seconds at most (--localtimelimit=0)
lola: ========================================
lola: ...considering subproblem: (FIREABLE(display1_2_1) OR FIREABLE(display1_1_1) OR FIREABLE(display1_4_1) OR FIREABLE(display1_3_1) OR FIREABLE(display1_6_0) OR FIREABLE(display1_5_0) OR FIREABLE(display1_0_1) OR FIREABLE(display1_7_0) OR FIREABLE(display1_2_2) OR FIREABLE(display1_1_2) OR FIREABLE(display1_4_2) OR FIREABLE(display1_3_2) OR FIREABLE(display1_6_1) OR FIREABLE(display1_5_1) OR FIREABLE(display1_0_2... (shortened)
lola: ========================================
lola: SUBTASK
lola: checking initial satisfaction
lola: processed formula: (FIREABLE(display1_2_1) OR FIREABLE(display1_1_1) OR FIREABLE(display1_4_1) OR FIREABLE(display1_3_1) OR FIREABLE(display1_6_0) OR FIREABLE(display1_5_0) OR FIREABLE(display1_0_1) OR FIREABLE(display1_7_0) OR FIREABLE(display1_2_2) OR FIREABLE(display1_1_2) OR FIREABLE(display1_4_2) OR FIREABLE(display1_3_2) OR FIREABLE(display1_6_1) OR FIREABLE(display1_5_1) OR FIREABLE(display1_0_2... (shortened)
lola: processed formula length: 1725
lola: 38 rewrites
lola: closed formula file PermAdmissibility-PT-50-LTLFireability.task
lola: processed formula with 0 atomic propositions
lola: RUNNING
lola: SUBRESULT
lola: result: no
lola: produced by: preprocessing
lola: The net violates the given property already in its initial state.
lola: 0 markings, 0 edges
lola: ========================================
FORMULA PermAdmissibility-PT-50-LTLFireability-2 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
lola: subprocess 2 will run for 255 seconds at most (--localtimelimit=0)
lola: ========================================
lola: ...considering subproblem: (FIREABLE(switch11_0_0) OR FIREABLE(switch11_4_0) OR FIREABLE(switch11_3_0) OR FIREABLE(switch11_2_0) OR FIREABLE(switch11_1_0) OR FIREABLE(switch11_4_6) OR FIREABLE(switch11_3_6) OR FIREABLE(switch11_2_6) OR FIREABLE(switch11_1_6) OR FIREABLE(switch11_0_6) OR FIREABLE(switch11_7_5) OR FIREABLE(switch11_6_5) OR FIREABLE(switch11_5_5) OR FIREABLE(switch11_4_5) OR FIREABLE(switch11_3_5... (shortened)
lola: ========================================
lola: SUBTASK
lola: checking initial satisfaction
lola: processed formula: (FIREABLE(switch11_0_0) OR FIREABLE(switch11_4_0) OR FIREABLE(switch11_3_0) OR FIREABLE(switch11_2_0) OR FIREABLE(switch11_1_0) OR FIREABLE(switch11_4_6) OR FIREABLE(switch11_3_6) OR FIREABLE(switch11_2_6) OR FIREABLE(switch11_1_6) OR FIREABLE(switch11_0_6) OR FIREABLE(switch11_7_5) OR FIREABLE(switch11_6_5) OR FIREABLE(switch11_5_5) OR FIREABLE(switch11_4_5) OR FIREABLE(switch11_3_5... (shortened)
lola: processed formula length: 1725
lola: 38 rewrites
lola: closed formula file PermAdmissibility-PT-50-LTLFireability.task
lola: processed formula with 0 atomic propositions
lola: RUNNING
lola: SUBRESULT
lola: result: no
lola: produced by: preprocessing
lola: The net violates the given property already in its initial state.
lola: 0 markings, 0 edges
lola: ========================================
FORMULA PermAdmissibility-PT-50-LTLFireability-7 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
lola: subprocess 3 will run for 274 seconds at most (--localtimelimit=0)
lola: ========================================
lola: ...considering subproblem: FIREABLE(display3_3_7)
lola: ========================================
lola: SUBTASK
lola: checking initial satisfaction
lola: processed formula: FIREABLE(display3_3_7)
lola: processed formula length: 22
lola: 38 rewrites
lola: closed formula file PermAdmissibility-PT-50-LTLFireability.task
lola: processed formula with 0 atomic propositions
lola: RUNNING
lola: SUBRESULT
lola: result: no
lola: produced by: preprocessing
lola: The net violates the given property already in its initial state.
lola: 0 markings, 0 edges
lola: ========================================
FORMULA PermAdmissibility-PT-50-LTLFireability-10 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
lola: subprocess 4 will run for 297 seconds at most (--localtimelimit=0)
lola: ========================================
lola: ...considering subproblem: FIREABLE(switch11_5_4)
lola: ========================================
lola: SUBTASK
lola: checking initial satisfaction
lola: processed formula: FIREABLE(switch11_5_4)
lola: processed formula length: 22
lola: 38 rewrites
lola: closed formula file PermAdmissibility-PT-50-LTLFireability.task
lola: processed formula with 0 atomic propositions
lola: RUNNING
lola: SUBRESULT
lola: result: no
lola: produced by: preprocessing
lola: The net violates the given property already in its initial state.
lola: 0 markings, 0 edges
lola:
FORMULA PermAdmissibility-PT-50-LTLFireability-11 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
========================================
lola: subprocess 5 will run for 324 seconds at most (--localtimelimit=0)
lola: ========================================
lola: ...considering subproblem: A (X (G ((F (FIREABLE(display1_4_5)) AND (FIREABLE(display3_4_0) OR FIREABLE(display1_4_5))))))
lola: ========================================
lola: SUBTASK
lola: checking LTL
lola: transforming LTL-Formula into a Büchi-Automaton
lola: processed formula: A (X (G ((F (FIREABLE(display1_4_5)) AND (FIREABLE(display3_4_0) OR FIREABLE(display1_4_5))))))
lola: processed formula length: 95
lola: 38 rewrites
lola: closed formula file PermAdmissibility-PT-50-LTLFireability.task
lola: the resulting Büchi automaton has 4 states
lola: STORE
lola: using a simple compression encoder (--encoder=simplecompressed)
lola: using a prefix tree store (--store=prefix)
lola: Formula contains X operator; stubborn sets not applicable
lola: SEARCH
lola: RUNNING
lola: SUBRESULT
lola: result: no
lola: produced by: LTL model checker
lola: The net does not satisfy the given formula (language of the product automaton is nonempty).
lola: 801 markings, 801 edges
lola: ========================================
FORMULA PermAdmissibility-PT-50-LTLFireability-8 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
lola: subprocess 6 will run for 357 seconds at most (--localtimelimit=0)
lola: ========================================
lola: ...considering subproblem: (A (F (G ((FIREABLE(display3_4_0) OR FIREABLE(display3_3_0) OR FIREABLE(display3_2_0) OR FIREABLE(display3_1_0) OR FIREABLE(display3_0_0) OR FIREABLE(display3_3_2) OR FIREABLE(display3_4_2) OR FIREABLE(display3_1_2) OR FIREABLE(display3_2_2) OR FIREABLE(display3_7_1) OR FIREABLE(display3_0_2) OR FIREABLE(display3_5_1) OR FIREABLE(display3_6_1) OR FIREABLE(display3_3_1) OR FIREABLE(di... (shortened)
lola: ========================================
lola: SUBTASK
lola: checking a Boolean combination of formulas
lola: RUNNING
lola: subprocess 6 will run for 357 seconds at most (--localtimelimit=0)
lola: ========================================
lola: ...considering subproblem: A (F (G ((FIREABLE(display3_4_0) OR FIREABLE(display3_3_0) OR FIREABLE(display3_2_0) OR FIREABLE(display3_1_0) OR FIREABLE(display3_0_0) OR FIREABLE(display3_3_2) OR FIREABLE(display3_4_2) OR FIREABLE(display3_1_2) OR FIREABLE(display3_2_2) OR FIREABLE(display3_7_1) OR FIREABLE(display3_0_2) OR FIREABLE(display3_5_1) OR FIREABLE(display3_6_1) OR FIREABLE(display3_3_1) OR FIREABLE(dis... (shortened)
lola: ========================================
lola: SUBTASK
lola: checking LTL
lola: transforming LTL-Formula into a Büchi-Automaton
lola: processed formula: A (F (G ((FIREABLE(display3_4_0) OR FIREABLE(display3_3_0) OR FIREABLE(display3_2_0) OR FIREABLE(display3_1_0) OR FIREABLE(display3_0_0) OR FIREABLE(display3_3_2) OR FIREABLE(display3_4_2) OR FIREABLE(display3_1_2) OR FIREABLE(display3_2_2) OR FIREABLE(display3_7_1) OR FIREABLE(display3_0_2) OR FIREABLE(display3_5_1) OR FIREABLE(display3_6_1) OR FIREABLE(display3_3_1) OR FIREABLE(dis... (shortened)
lola: processed formula length: 1737
lola: 38 rewrites
lola: closed formula file PermAdmissibility-PT-50-LTLFireability.task
lola: the resulting Büchi automaton has 2 states
lola: STORE
lola: using a simple compression encoder (--encoder=simplecompressed)
lola: using a prefix tree store (--store=prefix)
lola: using ltl preserving stubborn set method (--stubborn)
lola: SEARCH
lola: RUNNING
lola: SUBRESULT
lola: result: no
lola: produced by: LTL model checker
lola: The net does not satisfy the given formula (language of the product automaton is nonempty).
lola: 802 markings, 803 edges
lola: ========================================
lola: SUBRESULT
lola: result: no
lola: The Boolean predicate is false.
lola: ========================================
FORMULA PermAdmissibility-PT-50-LTLFireability-4 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
lola: subprocess 7 will run for 396 seconds at most (--localtimelimit=0)
lola: ========================================
lola: ...considering subproblem: A (X (X (G ((FIREABLE(switch6_5_7) OR FIREABLE(switch6_1_7) OR FIREABLE(switch6_4_7) OR FIREABLE(switch6_5_6) OR FIREABLE(switch6_0_7) OR FIREABLE(switch6_1_6) OR FIREABLE(switch6_4_6) OR FIREABLE(switch6_5_3) OR FIREABLE(switch6_0_6) OR FIREABLE(switch6_1_3) OR FIREABLE(switch6_4_3) OR FIREABLE(switch6_0_3) OR FIREABLE(switch6_5_2) OR FIREABLE(switch6_4_2) OR FIREABLE(switch6_1_2) O... (shortened)
lola: ========================================
lola: SUBTASK
lola: checking LTL
lola: transforming LTL-Formula into a Büchi-Automaton
lola: processed formula: A (X (X (G ((FIREABLE(switch6_5_7) OR FIREABLE(switch6_1_7) OR FIREABLE(switch6_4_7) OR FIREABLE(switch6_5_6) OR FIREABLE(switch6_0_7) OR FIREABLE(switch6_1_6) OR FIREABLE(switch6_4_6) OR FIREABLE(switch6_5_3) OR FIREABLE(switch6_0_6) OR FIREABLE(switch6_1_3) OR FIREABLE(switch6_4_3) OR FIREABLE(switch6_0_3) OR FIREABLE(switch6_5_2) OR FIREABLE(switch6_4_2) OR FIREABLE(switch6_1_2) O... (shortened)
lola: processed formula length: 429
lola: 38 rewrites
lola: closed formula file PermAdmissibility-PT-50-LTLFireability.task
lola: the resulting Büchi automaton has 4 states
lola: STORE
lola: using a simple compression encoder (--encoder=simplecompressed)
lola: using a prefix tree store (--store=prefix)
lola: Formula contains X operator; stubborn sets not applicable
lola: SEARCH
lola: RUNNING
lola: SUBRESULT
lola: result: no
lola: produced by: LTL model checker
lola: The net does not satisfy the given formula (language of the product automaton is nonempty).
lola: 801 markings, 801 edges
FORMULA PermAdmissibility-PT-50-LTLFireability-3 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
lola: ========================================
lola: subprocess 8 will run for 446 seconds at most (--localtimelimit=0)
lola: ========================================
lola: ...considering subproblem: A (X ((F (FIREABLE(display4_6_6)) OR (G (FIREABLE(switch8_4_7)) AND F (FIREABLE(display4_6_6))))))
lola: ========================================
lola: SUBTASK
lola: checking LTL
lola: transforming LTL-Formula into a Büchi-Automaton
lola: processed formula: A (X ((F (FIREABLE(display4_6_6)) OR (G (FIREABLE(switch8_4_7)) AND F (FIREABLE(display4_6_6))))))
lola: processed formula length: 98
lola: 38 rewrites
lola: closed formula file PermAdmissibility-PT-50-LTLFireability.task
lola: the resulting Büchi automaton has 4 states
lola: STORE
lola: using a simple compression encoder (--encoder=simplecompressed)
lola: using a prefix tree store (--store=prefix)
lola: Formula contains X operator; stubborn sets not applicable
lola: SEARCH
lola: RUNNING
lola: SUBRESULT
lola: result: no
lola: produced by: LTL model checker
lola: The net does not satisfy the given formula (language of the product automaton is nonempty).
lola: 801 markings, 801 edges
FORMULA PermAdmissibility-PT-50-LTLFireability-12 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
lola: ========================================
lola: subprocess 9 will run for 510 seconds at most (--localtimelimit=0)
lola: ========================================
lola: ...considering subproblem: A (X (X (G (FIREABLE(switch12_0_3)))))
lola: ========================================
lola: SUBTASK
lola: checking LTL
lola: transforming LTL-Formula into a Büchi-Automaton
lola: processed formula: A (X (X (G (FIREABLE(switch12_0_3)))))
lola: processed formula length: 38
lola: 38 rewrites
lola: closed formula file PermAdmissibility-PT-50-LTLFireability.task
lola: the resulting Büchi automaton has 4 states
lola: STORE
lola: using a simple compression encoder (--encoder=simplecompressed)
lola: using a prefix tree store (--store=prefix)
lola: Formula contains X operator; stubborn sets not applicable
lola: SEARCH
lola: RUNNING
lola: SUBRESULT
lola: result: no
lola: produced by: LTL model checker
lola: The net does not satisfy the given formula (language of the product automaton is nonempty).
lola: 801 markings, 801 edges
FORMULA PermAdmissibility-PT-50-LTLFireability-13 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
lola: ========================================
lola: subprocess 10 will run for 595 seconds at most (--localtimelimit=0)
lola: ========================================
lola: ...considering subproblem: A (X (G ((F (FIREABLE(switch6_4_2)) AND (X (FIREABLE(display3_7_6)) OR FIREABLE(switch6_4_2))))))
lola: ========================================
lola: SUBTASK
lola: checking LTL
lola: transforming LTL-Formula into a Büchi-Automaton
lola: processed formula: A (X (G ((F (FIREABLE(switch6_4_2)) AND (X (FIREABLE(display3_7_6)) OR FIREABLE(switch6_4_2))))))
lola: processed formula length: 97
lola: 38 rewrites
lola: closed formula file PermAdmissibility-PT-50-LTLFireability.task
lola: the resulting Büchi automaton has 5 states
lola: STORE
lola: using a simple compression encoder (--encoder=simplecompressed)
lola: using a prefix tree store (--store=prefix)
lola: Formula contains X operator; stubborn sets not applicable
lola: SEARCH
lola: RUNNING
lola: 1156375 markings, 2166023 edges, 231275 markings/sec, 0 secs
lola: 2237256 markings, 4334796 edges, 216176 markings/sec, 5 secs
lola: 3416902 markings, 6698517 edges, 235929 markings/sec, 10 secs
lola: 4417191 markings, 8802645 edges, 200058 markings/sec, 15 secs
lola: 5461435 markings, 10945908 edges, 208849 markings/sec, 20 secs
lola: 6462991 markings, 13063609 edges, 200311 markings/sec, 25 secs
lola: 7439940 markings, 15197802 edges, 195390 markings/sec, 30 secs
lola: 8445272 markings, 17316556 edges, 201066 markings/sec, 35 secs
lola: 9434197 markings, 19419821 edges, 197785 markings/sec, 40 secs
lola: 10431552 markings, 21575553 edges, 199471 markings/sec, 45 secs
lola: 11360739 markings, 23692576 edges, 185837 markings/sec, 50 secs
lola: 12362308 markings, 25772807 edges, 200314 markings/sec, 55 secs
lola: 13290533 markings, 27819835 edges, 185645 markings/sec, 60 secs
lola: 14228748 markings, 29867900 edges, 187643 markings/sec, 65 secs
lola: 15182812 markings, 31989123 edges, 190813 markings/sec, 70 secs
lola: 16073968 markings, 34011752 edges, 178231 markings/sec, 75 secs
lola: 17076603 markings, 36045885 edges, 200527 markings/sec, 80 secs
lola: 18053072 markings, 38181238 edges, 195294 markings/sec, 85 secs
lola: 19069639 markings, 40438742 edges, 203313 markings/sec, 90 secs
lola: 20044837 markings, 42634924 edges, 195040 markings/sec, 95 secs
lola: 20995847 markings, 44860293 edges, 190202 markings/sec, 100 secs
lola: 22134701 markings, 47233489 edges, 227771 markings/sec, 105 secs
lola: 23188764 markings, 49513013 edges, 210813 markings/sec, 110 secs
lola: 24229161 markings, 51814892 edges, 208079 markings/sec, 115 secs
lola: 25257686 markings, 54146317 edges, 205705 markings/sec, 120 secs
lola: 26203957 markings, 56291121 edges, 189254 markings/sec, 125 secs
lola: 27181972 markings, 58491043 edges, 195603 markings/sec, 130 secs
lola: 28146873 markings, 60730745 edges, 192980 markings/sec, 135 secs
lola: 29198894 markings, 63013975 edges, 210404 markings/sec, 140 secs
lola: 30255254 markings, 65254413 edges, 211272 markings/sec, 145 secs
lola: 31313452 markings, 67565191 edges, 211640 markings/sec, 150 secs
lola: 32332307 markings, 69853004 edges, 203771 markings/sec, 155 secs
lola: 33347873 markings, 72183058 edges, 203113 markings/sec, 160 secs
lola: 34346774 markings, 74459024 edges, 199780 markings/sec, 165 secs
lola: 35361315 markings, 76767217 edges, 202908 markings/sec, 170 secs
lola: 36359229 markings, 79076492 edges, 199583 markings/sec, 175 secs
lola: 37340593 markings, 81310804 edges, 196273 markings/sec, 180 secs
lola: 38297167 markings, 83585731 edges, 191315 markings/sec, 185 secs
lola: 39330221 markings, 85858632 edges, 206611 markings/sec, 190 secs
lola: 40356397 markings, 88058115 edges, 205235 markings/sec, 195 secs
lola: 41385016 markings, 90301869 edges, 205724 markings/sec, 200 secs
lola: 42372212 markings, 92565356 edges, 197439 markings/sec, 205 secs
lola: 43292225 markings, 94657324 edges, 184003 markings/sec, 210 secs
lola: 44261024 markings, 96835888 edges, 193760 markings/sec, 215 secs
lola: 45179675 markings, 98999901 edges, 183730 markings/sec, 220 secs
lola: 46173094 markings, 101225294 edges, 198684 markings/sec, 225 secs
lola: 47147466 markings, 103474620 edges, 194874 markings/sec, 230 secs
lola: 48077636 markings, 105713332 edges, 186034 markings/sec, 235 secs
lola: 49131610 markings, 108001488 edges, 210795 markings/sec, 240 secs
lola: 50143521 markings, 110190848 edges, 202382 markings/sec, 245 secs
lola: 51164860 markings, 112439408 edges, 204268 markings/sec, 250 secs
lola: 52142499 markings, 114590728 edges, 195528 markings/sec, 255 secs
lola: 53060411 markings, 116694578 edges, 183582 markings/sec, 260 secs
lola: 54014274 markings, 118850538 edges, 190773 markings/sec, 265 secs
lola: 54920736 markings, 120935232 edges, 181292 markings/sec, 270 secs
lola: 55867914 markings, 123113342 edges, 189436 markings/sec, 275 secs
lola: 56751502 markings, 125139966 edges, 176718 markings/sec, 280 secs
lola: 57646590 markings, 127294053 edges, 179018 markings/sec, 285 secs
lola: 58588782 markings, 129410900 edges, 188438 markings/sec, 290 secs
lola: 59477440 markings, 131506201 edges, 177732 markings/sec, 295 secs
lola: 60421781 markings, 133787623 edges, 188868 markings/sec, 300 secs
lola: 61447466 markings, 135887083 edges, 205137 markings/sec, 305 secs
lola: 62437879 markings, 138050412 edges, 198083 markings/sec, 310 secs
lola: 63409806 markings, 140222151 edges, 194385 markings/sec, 315 secs
lola: 64346873 markings, 142331187 edges, 187413 markings/sec, 320 secs
lola: 65238420 markings, 144424951 edges, 178309 markings/sec, 325 secs
lola: 66183939 markings, 146538136 edges, 189104 markings/sec, 330 secs
lola: 67083214 markings, 148680981 edges, 179855 markings/sec, 335 secs
lola: 68079735 markings, 150922742 edges, 199304 markings/sec, 340 secs
lola: 68955002 markings, 153012713 edges, 175053 markings/sec, 345 secs
lola: 69900974 markings, 155293165 edges, 189194 markings/sec, 350 secs
lola: 70884627 markings, 157514986 edges, 196731 markings/sec, 355 secs
lola: 71787018 markings, 159655546 edges, 180478 markings/sec, 360 secs
lola: 72706470 markings, 161785337 edges, 183890 markings/sec, 365 secs
lola: 73603323 markings, 163860269 edges, 179371 markings/sec, 370 secs
lola: 74454988 markings, 165933112 edges, 170333 markings/sec, 375 secs
lola: 75357148 markings, 168126171 edges, 180432 markings/sec, 380 secs
lola: 76411007 markings, 170514235 edges, 210772 markings/sec, 385 secs
lola: 77449944 markings, 172758352 edges, 207787 markings/sec, 390 secs
lola: 78482296 markings, 174981718 edges, 206470 markings/sec, 395 secs
lola: 79478602 markings, 177243587 edges, 199261 markings/sec, 400 secs
lola: 80454075 markings, 179452201 edges, 195095 markings/sec, 405 secs
lola: 81387469 markings, 181609789 edges, 186679 markings/sec, 410 secs
lola: 82347036 markings, 183765017 edges, 191913 markings/sec, 415 secs
lola: 83274767 markings, 185939891 edges, 185546 markings/sec, 420 secs
lola: 84261940 markings, 188192012 edges, 197435 markings/sec, 425 secs
lola: 85233071 markings, 190459789 edges, 194226 markings/sec, 430 secs
lola: 86170608 markings, 192698045 edges, 187507 markings/sec, 435 secs
lola: 87091916 markings, 194929467 edges, 184262 markings/sec, 440 secs
lola: 88063853 markings, 197121964 edges, 194387 markings/sec, 445 secs
lola: 88962021 markings, 199252426 edges, 179634 markings/sec, 450 secs
lola: 89830578 markings, 201365102 edges, 173711 markings/sec, 455 secs
lola: 90813266 markings, 203568895 edges, 196538 markings/sec, 460 secs
lola: 91601894 markings, 205455508 edges, 157726 markings/sec, 465 secs
lola: Child process aborted or communication problem between parent and child process
lola: subprocess 11 will run for 619 seconds at most (--localtimelimit=0)
lola: ========================================
lola: ...considering subproblem: A (G ((FIREABLE(switch10_4_0) OR FIREABLE(switch10_3_0) OR FIREABLE(switch10_2_0) OR FIREABLE(switch10_1_0) OR FIREABLE(switch10_0_0) OR FIREABLE(switch10_7_4) OR FIREABLE(switch10_0_5) OR FIREABLE(switch10_5_4) OR FIREABLE(switch10_6_4) OR FIREABLE(switch10_3_5) OR FIREABLE(switch10_4_5) OR FIREABLE(switch10_1_5) OR FIREABLE(switch10_2_5) OR FIREABLE(switch10_7_5) OR FIREABLE(switch... (shortened)
lola: ========================================
lola: SUBTASK
lola: checking invariance
lola: Planning: workflow for reachability check: stateequation||search (--findpath=off)
lola: rewrite Frontend/Parser/formula_rewrite.k:631
lola: rewrite Frontend/Parser/formula_rewrite.k:694
lola: processed formula: A (G ((FIREABLE(switch10_4_0) OR FIREABLE(switch10_3_0) OR FIREABLE(switch10_2_0) OR FIREABLE(switch10_1_0) OR FIREABLE(switch10_0_0) OR FIREABLE(switch10_7_4) OR FIREABLE(switch10_0_5) OR FIREABLE(switch10_5_4) OR FIREABLE(switch10_6_4) OR FIREABLE(switch10_3_5) OR FIREABLE(switch10_4_5) OR FIREABLE(switch10_1_5) OR FIREABLE(switch10_2_5) OR FIREABLE(switch10_7_5) OR FIREABLE(switch... (shortened)
lola: processed formula length: 1733
lola: 40 rewrites
lola: closed formula file PermAdmissibility-PT-50-LTLFireability.task
lola: STORE
lola: using a simple compression encoder (--encoder=simplecompressed)
lola: using a prefix tree store (--store=prefix)
lola: SEARCH (state space)
lola: state space: using reachability graph (--search=depth)
lola: state space: using reachability preserving stubborn set method with insertion algorithm (--stubborn=tarjan)
lola: RUNNING
lola: rewrite Frontend/Parser/formula_rewrite.k:631
lola: rewrite Frontend/Parser/formula_rewrite.k:694
lola: formula 0: (NOT FIREABLE(switch10_4_0) AND NOT FIREABLE(switch10_3_0) AND NOT FIREABLE(switch10_2_0) AND NOT FIREABLE(switch10_1_0) AND NOT FIREABLE(switch10_0_0) AND NOT FIREABLE(switch10_7_4) AND NOT FIREABLE(switch10_0_5) AND NOT FIREABLE(switch10_5_4) AND NOT FIREABLE(switch10_6_4) AND NOT FIREABLE(switch10_3_5) AND NOT FIREABLE(switch10_4_5) AND NOT FIREABLE(switch10_1_5) AND NOT FIREABLE(switch10_2_5) AND NOT FIREABLE(switch10_7_5) AND NOT FIREABLE(switch10_0_6) AND NOT FIREABLE(switch10_5_5) AND NOT FIREABLE(switch10_6_5) AND NOT FIREABLE(switch10_3_6) AND NOT FIREABLE(switch10_4_6) AND NOT FIREABLE(switch10_1_6) AND NOT FIREABLE(switch10_2_6) AND NOT FIREABLE(switch10_0_7) AND NOT FIREABLE(switch10_7_6) AND NOT FIREABLE(switch10_6_6) AND NOT FIREABLE(switch10_5_6) AND NOT FIREABLE(switch10_4_7) AND NOT FIREABLE(switch10_3_7) AND NOT FIREABLE(switch10_2_7) AND NOT FIREABLE(switch10_1_7) AND NOT FIREABLE(switch10_7_7) AND NOT FIREABLE(switch10_6_7) AND NOT FIREABLE(switch10_5_7) AND NOT FIREABLE(switch10_5_0) AND NOT FIREABLE(switch10_6_0) AND NOT FIREABLE(switch10_7_0) AND NOT FIREABLE(switch10_0_1) AND NOT FIREABLE(switch10_1_1) AND NOT FIREABLE(switch10_2_1) AND NOT FIREABLE(switch10_3_1) AND NOT FIREABLE(switch10_4_1) AND NOT FIREABLE(switch10_5_1) AND NOT FIREABLE(switch10_6_1) AND NOT FIREABLE(switch10_7_1) AND NOT FIREABLE(switch10_0_2) AND NOT FIREABLE(switch10_1_2) AND NOT FIREABLE(switch10_2_2) AND NOT FIREABLE(switch10_3_2) AND NOT FIREABLE(switch10_4_2) AND NOT FIREABLE(switch10_6_2) AND NOT FIREABLE(switch10_5_2) AND NOT FIREABLE(switch10_0_3) AND NOT FIREABLE(switch10_7_2) AND NOT FIREABLE(switch10_2_3) AND NOT FIREABLE(switch10_1_3) AND NOT FIREABLE(switch10_4_3) AND NOT FIREABLE(switch10_3_3) AND NOT FIREABLE(switch10_6_3) AND NOT FIREABLE(switch10_5_3) AND NOT FIREABLE(switch10_0_4) AND NOT FIREABLE(switch10_7_3) AND NOT FIREABLE(switch10_2_4) AND NOT FIREABLE(switch10_1_4) AND NOT FIREABLE(switch10_4_4) AND NOT FIREABLE(switch10_3_4))
lola: SUBRESULT
lola: result: no
lola: produced by: state space
lola: The predicate is not invariant.
lola: 0 markings, 0 edges
lola: ========================================
FORMULA PermAdmissibility-PT-50-LTLFireability-5 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
lola: subprocess 12 will run for 774 seconds at most (--localtimelimit=0)
lola: ========================================
lola: ...considering subproblem: A (F ((FIREABLE(switch4_2_7) OR FIREABLE(switch4_3_6) OR FIREABLE(switch4_3_7) OR FIREABLE(switch4_2_6))))
lola: ========================================
lola: SUBTASK
lola: checking eventual occurrence
lola: rewrite Frontend/Parser/formula_rewrite.k:659
lola: rewrite Frontend/Parser/formula_rewrite.k:694
lola: processed formula: (NOT FIREABLE(switch4_2_7) AND NOT FIREABLE(switch4_3_6) AND NOT FIREABLE(switch4_3_7) AND NOT FIREABLE(switch4_2_6))
lola: processed formula length: 117
lola: 40 rewrites
lola: closed formula file PermAdmissibility-PT-50-LTLFireability.task
lola: STORE
lola: using a simple compression encoder (--encoder=simplecompressed)
lola: using a prefix tree store (--store=prefix)
lola: SEARCH (state space / EG)
lola: state space: using search routine for EG formula (--search=depth)
lola: state space: using EG preserving stubborn set method (--stubborn=tarjan)
lola: RUNNING
lola: 555014 markings, 3393574 edges, 111003 markings/sec, 0 secs
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lola: 68639493 markings, 496161553 edges, 86718 markings/sec, 760 secs
lola: 69073589 markings, 499389514 edges, 86819 markings/sec, 765 secs
lola: local time limit reached - aborting
lola:
preliminary result: unknown no no no no no unknown no no unknown no no no no unknown unknown
lola: memory consumption: 3338076 KB
lola: time consumption: 1248 seconds
lola: Child process aborted or communication problem between parent and child process
lola: subprocess 13 will run for 773 seconds at most (--localtimelimit=0)
lola: ========================================
lola: ...considering subproblem: A (F (G (FIREABLE(switch6_4_2))))
lola: ========================================
lola: SUBTASK
lola: checking LTL
lola: transforming LTL-Formula into a Büchi-Automaton
lola: processed formula: A (F (G (FIREABLE(switch6_4_2))))
lola: processed formula length: 33
lola: 38 rewrites
lola: closed formula file PermAdmissibility-PT-50-LTLFireability.task
lola: the resulting Büchi automaton has 2 states
lola: STORE
lola: using a simple compression encoder (--encoder=simplecompressed)
lola: using a prefix tree store (--store=prefix)
lola: using ltl preserving stubborn set method (--stubborn)
lola: SEARCH
lola: RUNNING
lola: SUBRESULT
lola: result: no
lola: produced by: LTL model checker
lola: The net does not satisfy the given formula (language of the product automaton is nonempty).
lola: 802 markings, 803 edges
lola: ========================================
FORMULA PermAdmissibility-PT-50-LTLFireability-9 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
lola: subprocess 14 will run for 1160 seconds at most (--localtimelimit=0)
lola: ========================================
lola: ...considering subproblem: A (G (F (FIREABLE(display1_2_1))))
lola: ========================================
lola: SUBTASK
lola: checking LTL
lola: transforming LTL-Formula into a Büchi-Automaton
lola: processed formula: A (G (F (FIREABLE(display1_2_1))))
lola: processed formula length: 34
lola: 38 rewrites
lola: closed formula file PermAdmissibility-PT-50-LTLFireability.task
lola: the resulting Büchi automaton has 2 states
lola: STORE
lola: using a simple compression encoder (--encoder=simplecompressed)
lola: using a prefix tree store (--store=prefix)
lola: using ltl preserving stubborn set method (--stubborn)
lola: SEARCH
lola: RUNNING
lola: SUBRESULT
lola: result: no
lola: produced by: LTL model checker
lola: The net does not satisfy the given formula (language of the product automaton is nonempty).
lola: 801 markings, 801 edges
lola: ========================================
FORMULA PermAdmissibility-PT-50-LTLFireability-15 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
lola: subprocess 15 will run for 2321 seconds at most (--localtimelimit=0)
lola: ========================================
lola: ...considering subproblem: A (F (G ((FIREABLE(display4_0_0) OR FIREABLE(display4_4_0) OR FIREABLE(display4_3_0) OR FIREABLE(display4_2_0) OR FIREABLE(display4_1_0) OR FIREABLE(display4_7_1) OR FIREABLE(display4_0_2) OR FIREABLE(display4_5_1) OR FIREABLE(display4_6_1) OR FIREABLE(display4_3_2) OR FIREABLE(display4_4_2) OR FIREABLE(display4_1_2) OR FIREABLE(display4_2_2) OR FIREABLE(display4_7_0) OR FIREABLE(dis... (shortened)
lola: ========================================
lola: SUBTASK
lola: checking LTL
lola: transforming LTL-Formula into a Büchi-Automaton
lola: processed formula: A (F (G ((FIREABLE(display4_0_0) OR FIREABLE(display4_4_0) OR FIREABLE(display4_3_0) OR FIREABLE(display4_2_0) OR FIREABLE(display4_1_0) OR FIREABLE(display4_7_1) OR FIREABLE(display4_0_2) OR FIREABLE(display4_5_1) OR FIREABLE(display4_6_1) OR FIREABLE(display4_3_2) OR FIREABLE(display4_4_2) OR FIREABLE(display4_1_2) OR FIREABLE(display4_2_2) OR FIREABLE(display4_7_0) OR FIREABLE(dis... (shortened)
lola: processed formula length: 1737
lola: 38 rewrites
lola: closed formula file PermAdmissibility-PT-50-LTLFireability.task
lola: the resulting Büchi automaton has 2 states
lola: STORE
lola: using a simple compression encoder (--encoder=simplecompressed)
lola: using a prefix tree store (--store=prefix)
lola: using ltl preserving stubborn set method (--stubborn)
lola: SEARCH
lola: RUNNING
lola: SUBRESULT
lola: result: no
lola: produced by: LTL model checker
lola: The net does not satisfy the given formula (language of the product automaton is nonempty).
lola: 802 markings, 803 edges
lola: ========================================
FORMULA PermAdmissibility-PT-50-LTLFireability-0 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
lola: ========================================
lola: ...considering subproblem: A (X (G ((F (FIREABLE(switch6_4_2)) AND (X (FIREABLE(display3_7_6)) OR FIREABLE(switch6_4_2))))))
lola: ========================================
lola: SUBTASK
lola: checking LTL
lola: transforming LTL-Formula into a Büchi-Automaton
lola: processed formula: A (X (G ((F (FIREABLE(switch6_4_2)) AND (X (FIREABLE(display3_7_6)) OR FIREABLE(switch6_4_2))))))
lola: processed formula length: 97
lola: 38 rewrites
lola: closed formula file PermAdmissibility-PT-50-LTLFireability.task
lola: the resulting Büchi automaton has 5 states
lola: STORE
lola: using a simple compression encoder (--encoder=simplecompressed)
lola: using a prefix tree store (--store=prefix)
lola: Formula contains X operator; stubborn sets not applicable
lola: SEARCH
lola: RUNNING
lola: 1262999 markings, 2371999 edges, 252600 markings/sec, 0 secs
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lola: 68705715 markings, 152405929 edges, 191976 markings/sec, 340 secs
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lola: 76040807 markings, 169830696 edges, 197127 markings/sec, 380 secs
lola: 77142648 markings, 172079949 edges, 220368 markings/sec, 385 secs
lola: 78152665 markings, 174284500 edges, 202003 markings/sec, 390 secs
lola: 79185445 markings, 176578749 edges, 206556 markings/sec, 395 secs
lola: 80166958 markings, 178815242 edges, 196303 markings/sec, 400 secs
lola: 81125564 markings, 180991557 edges, 191721 markings/sec, 405 secs
lola: 82080756 markings, 183154075 edges, 191038 markings/sec, 410 secs
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lola: 83983597 markings, 187566684 edges, 191743 markings/sec, 420 secs
lola: 84983343 markings, 189857968 edges, 199949 markings/sec, 425 secs
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lola: 86803367 markings, 194234769 edges, 180451 markings/sec, 435 secs
lola: 87789413 markings, 196499160 edges, 197209 markings/sec, 440 secs
lola: 88721369 markings, 198693964 edges, 186391 markings/sec, 445 secs
lola: 89633558 markings, 200867211 edges, 182438 markings/sec, 450 secs
lola: 90615467 markings, 203103809 edges, 196382 markings/sec, 455 secs
lola: 91542317 markings, 205306933 edges, 185370 markings/sec, 460 secs
lola: 91704132 markings, 205702514 edges, 32363 markings/sec, 465 secs
lola: Child process aborted or communication problem between parent and child process
FORMULA PermAdmissibility-PT-50-LTLFireability-14 CANNOT_COMPUTE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
lola: ========================================
lola: ...considering subproblem: A (F ((FIREABLE(switch4_2_7) OR FIREABLE(switch4_3_6) OR FIREABLE(switch4_3_7) OR FIREABLE(switch4_2_6))))
lola: ========================================
lola: SUBTASK
lola: checking eventual occurrence
lola: rewrite Frontend/Parser/formula_rewrite.k:659
lola: rewrite Frontend/Parser/formula_rewrite.k:694
lola: processed formula: (NOT FIREABLE(switch4_2_7) AND NOT FIREABLE(switch4_3_6) AND NOT FIREABLE(switch4_3_7) AND NOT FIREABLE(switch4_2_6))
lola: processed formula length: 117
lola: 40 rewrites
lola: closed formula file PermAdmissibility-PT-50-LTLFireability.task
lola: STORE
lola: using a simple compression encoder (--encoder=simplecompressed)
lola: using a prefix tree store (--store=prefix)
lola: SEARCH (state space / EG)
lola: state space: using search routine for EG formula (--search=depth)
lola: state space: using EG preserving stubborn set method (--stubborn=tarjan)
lola: RUNNING
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lola: 87233212 markings, 633485042 edges, 81782 markings/sec, 985 secs
lola: 87635116 markings, 636362017 edges, 80381 markings/sec, 990 secs
lola: 88028320 markings, 639223632 edges, 78641 markings/sec, 995 secs
lola: 88412351 markings, 642066286 edges, 76806 markings/sec, 1000 secs
lola: 88796219 markings, 644912521 edges, 76774 markings/sec, 1005 secs
lola: 89190050 markings, 647863701 edges, 78766 markings/sec, 1010 secs
lola: 89576822 markings, 650748882 edges, 77354 markings/sec, 1015 secs
lola: 89965293 markings, 653643679 edges, 77694 markings/sec, 1020 secs
lola: 90350005 markings, 656535963 edges, 76942 markings/sec, 1025 secs
lola: 90777626 markings, 659727097 edges, 85524 markings/sec, 1030 secs
lola: 91192787 markings, 662832764 edges, 83032 markings/sec, 1035 secs
lola: 91581829 markings, 665750947 edges, 77808 markings/sec, 1040 secs
lola: 91974287 markings, 668673047 edges, 78492 markings/sec, 1045 secs
lola: 92367048 markings, 671597962 edges, 78552 markings/sec, 1050 secs
lola: 92792014 markings, 674562408 edges, 84993 markings/sec, 1055 secs
lola: 93197667 markings, 677501799 edges, 81131 markings/sec, 1060 secs
lola: 93599765 markings, 680422999 edges, 80420 markings/sec, 1065 secs
lola: 93994454 markings, 683329344 edges, 78938 markings/sec, 1070 secs
lola: 94380677 markings, 686218273 edges, 77245 markings/sec, 1075 secs
lola: 94772927 markings, 689110579 edges, 78450 markings/sec, 1080 secs
lola: 95156481 markings, 691985918 edges, 76711 markings/sec, 1085 secs
lola: 95548599 markings, 694882045 edges, 78424 markings/sec, 1090 secs
lola: 95931290 markings, 697749526 edges, 76538 markings/sec, 1095 secs
lola: 96318393 markings, 700654262 edges, 77421 markings/sec, 1100 secs
lola: 96696380 markings, 703491710 edges, 75597 markings/sec, 1105 secs
lola: 97083254 markings, 706396575 edges, 77375 markings/sec, 1110 secs
lola: 97471939 markings, 709316395 edges, 77737 markings/sec, 1115 secs
lola: 97863628 markings, 712258839 edges, 78338 markings/sec, 1120 secs
lola: 98299072 markings, 715225649 edges, 87089 markings/sec, 1125 secs
lola: 98699782 markings, 718140830 edges, 80142 markings/sec, 1130 secs
lola: 99112457 markings, 721198437 edges, 82535 markings/sec, 1135 secs
lola: 99503518 markings, 724096556 edges, 78212 markings/sec, 1140 secs
lola: 99894194 markings, 726996128 edges, 78135 markings/sec, 1145 secs
lola: 100318535 markings, 730160424 edges, 84868 markings/sec, 1150 secs
lola: 100730941 markings, 733265298 edges, 82481 markings/sec, 1155 secs
lola: 101120723 markings, 736167435 edges, 77956 markings/sec, 1160 secs
lola: 101508169 markings, 739083720 edges, 77489 markings/sec, 1165 secs
lola: 101901948 markings, 742019638 edges, 78756 markings/sec, 1170 secs
lola: 102339121 markings, 745313079 edges, 87435 markings/sec, 1175 secs
lola: 102788860 markings, 748671330 edges, 89948 markings/sec, 1180 secs
lola: 103213023 markings, 751833469 edges, 84833 markings/sec, 1185 secs
lola: 103618487 markings, 754852336 edges, 81093 markings/sec, 1190 secs
lola: 104084926 markings, 758092924 edges, 93288 markings/sec, 1195 secs
lola: 104496962 markings, 761085362 edges, 82407 markings/sec, 1200 secs
lola: 104892571 markings, 763997805 edges, 79122 markings/sec, 1205 secs
lola: 105284295 markings, 766884948 edges, 78345 markings/sec, 1210 secs
lola: 105741580 markings, 770272329 edges, 91457 markings/sec, 1215 secs
lola: 106197919 markings, 773655150 edges, 91268 markings/sec, 1220 secs
lola: 106645228 markings, 777017628 edges, 89462 markings/sec, 1225 secs
lola: 107100986 markings, 780398407 edges, 91152 markings/sec, 1230 secs
lola: 107494561 markings, 783353195 edges, 78715 markings/sec, 1235 secs
lola: 107883558 markings, 786275316 edges, 77799 markings/sec, 1240 secs
lola: 108268016 markings, 789163266 edges, 76892 markings/sec, 1245 secs
lola: 108656968 markings, 792085484 edges, 77790 markings/sec, 1250 secs
lola: 109045627 markings, 795005243 edges, 77732 markings/sec, 1255 secs
lola: 109463769 markings, 798069658 edges, 83628 markings/sec, 1260 secs
lola: 109892306 markings, 801028907 edges, 85707 markings/sec, 1265 secs
lola: 110289086 markings, 803959578 edges, 79356 markings/sec, 1270 secs
lola: 110701613 markings, 806975508 edges, 82505 markings/sec, 1275 secs
lola: 111157185 markings, 810366768 edges, 91114 markings/sec, 1280 secs
lola: 111598378 markings, 813655276 edges, 88239 markings/sec, 1285 secs
lola: 112032751 markings, 816929481 edges, 86875 markings/sec, 1290 secs
lola: 112469507 markings, 820185087 edges, 87351 markings/sec, 1295 secs
lola: 112907561 markings, 823457139 edges, 87611 markings/sec, 1300 secs
lola: 113342939 markings, 826739842 edges, 87076 markings/sec, 1305 secs
lola: 113779088 markings, 829994470 edges, 87230 markings/sec, 1310 secs
lola: 114212897 markings, 833237258 edges, 86762 markings/sec, 1315 secs
lola: 114645037 markings, 836489198 edges, 86428 markings/sec, 1320 secs
lola: 115079589 markings, 839730669 edges, 86910 markings/sec, 1325 secs
lola: 115516164 markings, 842984512 edges, 87315 markings/sec, 1330 secs
lola: 115978791 markings, 846192474 edges, 92525 markings/sec, 1335 secs
lola: 116431252 markings, 849460774 edges, 90492 markings/sec, 1340 secs
lola: 116872629 markings, 852720556 edges, 88275 markings/sec, 1345 secs
lola: 117297675 markings, 855863284 edges, 85009 markings/sec, 1350 secs
lola: 117738504 markings, 859127972 edges, 88166 markings/sec, 1355 secs
lola: 118178604 markings, 862434067 edges, 88020 markings/sec, 1360 secs
lola: 118628035 markings, 865767712 edges, 89886 markings/sec, 1365 secs
lola: 119069963 markings, 869093030 edges, 88386 markings/sec, 1370 secs
lola: 119517233 markings, 872414425 edges, 89454 markings/sec, 1375 secs
lola: 119915616 markings, 875406224 edges, 79677 markings/sec, 1380 secs
lola: 120305836 markings, 878337509 edges, 78044 markings/sec, 1385 secs
lola: 120698109 markings, 881286449 edges, 78455 markings/sec, 1390 secs
lola: 121099444 markings, 884305245 edges, 80267 markings/sec, 1395 secs
lola: 121538932 markings, 887614354 edges, 87898 markings/sec, 1400 secs
lola: 122028322 markings, 890968409 edges, 97878 markings/sec, 1405 secs
lola: 122480575 markings, 894279727 edges, 90451 markings/sec, 1410 secs
lola: 122911377 markings, 897477707 edges, 86160 markings/sec, 1415 secs
lola: 123356631 markings, 900791264 edges, 89051 markings/sec, 1420 secs
lola: 123796899 markings, 904070383 edges, 88054 markings/sec, 1425 secs
lola: 124233848 markings, 907329202 edges, 87390 markings/sec, 1430 secs
lola: 124664777 markings, 910579622 edges, 86186 markings/sec, 1435 secs
lola: 125104490 markings, 913859980 edges, 87943 markings/sec, 1440 secs
lola: 125516153 markings, 916965562 edges, 82333 markings/sec, 1445 secs
lola: 125908528 markings, 919886529 edges, 78475 markings/sec, 1450 secs
lola: 126295603 markings, 922802709 edges, 77415 markings/sec, 1455 secs
lola: 126710676 markings, 925897175 edges, 83015 markings/sec, 1460 secs
lola: 127153462 markings, 929206017 edges, 88557 markings/sec, 1465 secs
lola: 127597845 markings, 932524606 edges, 88877 markings/sec, 1470 secs
lola: 128056468 markings, 935860383 edges, 91725 markings/sec, 1475 secs
lola: 128527034 markings, 939201705 edges, 94113 markings/sec, 1480 secs
lola: 128985669 markings, 942521756 edges, 91727 markings/sec, 1485 secs
lola: 129426081 markings, 945774602 edges, 88082 markings/sec, 1490 secs
lola: 129869489 markings, 949058441 edges, 88682 markings/sec, 1495 secs
lola: 130259073 markings, 951977510 edges, 77917 markings/sec, 1500 secs
lola: 130654486 markings, 954901938 edges, 79083 markings/sec, 1505 secs
lola: 131044339 markings, 957826262 edges, 77971 markings/sec, 1510 secs
lola: 131480751 markings, 961110278 edges, 87282 markings/sec, 1515 secs
lola: 131923215 markings, 964394846 edges, 88493 markings/sec, 1520 secs
lola: 132357563 markings, 967662547 edges, 86870 markings/sec, 1525 secs
lola: 132795676 markings, 970962792 edges, 87623 markings/sec, 1530 secs
lola: 133235553 markings, 974272546 edges, 87975 markings/sec, 1535 secs
lola: 133663175 markings, 977448507 edges, 85524 markings/sec, 1540 secs
lola: 134081069 markings, 980590996 edges, 83579 markings/sec, 1545 secs
lola: 134537227 markings, 983798884 edges, 91232 markings/sec, 1550 secs
lola: 134979975 markings, 986995817 edges, 88550 markings/sec, 1555 secs
lola: 135403821 markings, 990136431 edges, 84769 markings/sec, 1560 secs
lola: 135844328 markings, 993412963 edges, 88101 markings/sec, 1565 secs
lola: 136287194 markings, 996710376 edges, 88573 markings/sec, 1570 secs
lola: 136725073 markings, 999971853 edges, 87576 markings/sec, 1575 secs
lola: 137161529 markings, 1003229993 edges, 87291 markings/sec, 1580 secs
lola: 137594695 markings, 1006495940 edges, 86633 markings/sec, 1585 secs
lola: 138033554 markings, 1009771631 edges, 87772 markings/sec, 1590 secs
lola: 138460354 markings, 1012991679 edges, 85360 markings/sec, 1595 secs
lola: 138857063 markings, 1015947833 edges, 79342 markings/sec, 1600 secs
lola: 139254873 markings, 1018943393 edges, 79562 markings/sec, 1605 secs
lola: 139645833 markings, 1021856547 edges, 78192 markings/sec, 1610 secs
lola: 140031617 markings, 1024758086 edges, 77157 markings/sec, 1615 secs
lola: 140445551 markings, 1027842099 edges, 82787 markings/sec, 1620 secs
lola: 140885181 markings, 1031119947 edges, 87926 markings/sec, 1625 secs
lola: 141361378 markings, 1034447517 edges, 95239 markings/sec, 1630 secs
lola: 141816911 markings, 1037741030 edges, 91107 markings/sec, 1635 secs
lola: 142261640 markings, 1041026407 edges, 88946 markings/sec, 1640 secs
lola: 142703477 markings, 1044298977 edges, 88367 markings/sec, 1645 secs
lola: 143144605 markings, 1047569737 edges, 88226 markings/sec, 1650 secs
lola: 143585969 markings, 1050848352 edges, 88273 markings/sec, 1655 secs
lola: 144023463 markings, 1054133510 edges, 87499 markings/sec, 1660 secs
lola: 144457404 markings, 1057398442 edges, 86788 markings/sec, 1665 secs
lola: 144900097 markings, 1060686544 edges, 88539 markings/sec, 1670 secs
lola: 145334785 markings, 1063959495 edges, 86938 markings/sec, 1675 secs
lola: 145769066 markings, 1067229814 edges, 86856 markings/sec, 1680 secs
lola: 146187462 markings, 1070336750 edges, 83679 markings/sec, 1685 secs
lola: 146573266 markings, 1073234131 edges, 77161 markings/sec, 1690 secs
lola: 146977889 markings, 1076277268 edges, 80925 markings/sec, 1695 secs
lola: 147373015 markings, 1079248996 edges, 79025 markings/sec, 1700 secs
lola: 147784253 markings, 1082124317 edges, 82248 markings/sec, 1705 secs
lola: 148191883 markings, 1085059866 edges, 81526 markings/sec, 1710 secs
lola: 148617399 markings, 1088212256 edges, 85103 markings/sec, 1715 secs
lola: 149060975 markings, 1091508211 edges, 88715 markings/sec, 1720 secs
lola: 149501048 markings, 1094788304 edges, 88015 markings/sec, 1725 secs
lola: 149940699 markings, 1098063453 edges, 87930 markings/sec, 1730 secs
lola: 150379675 markings, 1101337752 edges, 87795 markings/sec, 1735 secs
lola: 150809153 markings, 1104578944 edges, 85896 markings/sec, 1740 secs
lola: 151234971 markings, 1107753619 edges, 85164 markings/sec, 1745 secs
lola: 151665775 markings, 1111005318 edges, 86161 markings/sec, 1750 secs
lola: 152077821 markings, 1114077408 edges, 82409 markings/sec, 1755 secs
lola: 152502917 markings, 1117282728 edges, 85019 markings/sec, 1760 secs
lola: 152938416 markings, 1120532129 edges, 87100 markings/sec, 1765 secs
lola: 153349853 markings, 1123609562 edges, 82287 markings/sec, 1770 secs
lola: 153772762 markings, 1126784058 edges, 84582 markings/sec, 1775 secs
lola: 154198171 markings, 1129953938 edges, 85082 markings/sec, 1780 secs
lola: 154661535 markings, 1133243264 edges, 92673 markings/sec, 1785 secs
lola: 155118743 markings, 1136535797 edges, 91442 markings/sec, 1790 secs
lola: 155562245 markings, 1139787784 edges, 88700 markings/sec, 1795 secs
lola: 155996654 markings, 1142989937 edges, 86882 markings/sec, 1800 secs
lola: 156426803 markings, 1146192644 edges, 86030 markings/sec, 1805 secs
lola: 156863636 markings, 1149433361 edges, 87367 markings/sec, 1810 secs
lola: 157299550 markings, 1152674973 edges, 87183 markings/sec, 1815 secs
lola: 157726685 markings, 1155880850 edges, 85427 markings/sec, 1820 secs
lola: 158148184 markings, 1159053140 edges, 84300 markings/sec, 1825 secs
lola: 158579852 markings, 1162261094 edges, 86334 markings/sec, 1830 secs
lola: 159002654 markings, 1165439949 edges, 84560 markings/sec, 1835 secs
lola: 159426835 markings, 1168634980 edges, 84836 markings/sec, 1840 secs
lola: 159853290 markings, 1171845932 edges, 85291 markings/sec, 1845 secs
lola: time limit reached - aborting
lola:
preliminary result: no no no no no no unknown no no no no no no no unknown no
lola:
preliminary result: no no no no no no unknown no no no no no no no unknown no
lola: caught signal User defined signal 1 - aborting LoLA
lola:
preliminary result: no no no no no no unknown no no no no no no no unknown no
lola: memory consumption: 7667724 KB
lola: time consumption: 3570 seconds
lola: caught signal User defined signal 1 - aborting LoLA
lola:
preliminary result: no no no no no no unknown no no no no no no no unknown no
lola: memory consumption: 7667956 KB
lola: time consumption: 3570 seconds
BK_STOP 1527438467253
--------------------
content from stderr:
Sequence of Actions to be Executed by the VM
This is useful if one wants to reexecute the tool in the VM from the submitted image disk.
set -x
# this is for BenchKit: configuration of major elements for the test
export BK_INPUT="PermAdmissibility-PT-50"
export BK_EXAMINATION="LTLFireability"
export BK_TOOL="lola"
export BK_RESULT_DIR="/tmp/BK_RESULTS/OUTPUTS"
export BK_TIME_CONFINEMENT="3600"
export BK_MEMORY_CONFINEMENT="16384"
# this is specific to your benchmark or test
export BIN_DIR="$HOME/BenchKit/bin"
# remove the execution directoty if it exists (to avoid increse of .vmdk images)
if [ -d execution ] ; then
rm -rf execution
fi
tar xzf /home/mcc/BenchKit/INPUTS/PermAdmissibility-PT-50.tgz
mv PermAdmissibility-PT-50 execution
cd execution
pwd
ls -lh
# this is for BenchKit: explicit launching of the test
echo "====================================================================="
echo " Generated by BenchKit 2-3637"
echo " Executing tool lola"
echo " Input is PermAdmissibility-PT-50, examination is LTLFireability"
echo " Time confinement is $BK_TIME_CONFINEMENT seconds"
echo " Memory confinement is 16384 MBytes"
echo " Number of cores is 4"
echo " Run identifier is r256-csrt-152732582900146"
echo "====================================================================="
echo
echo "--------------------"
echo "content from stdout:"
echo
echo "=== Data for post analysis generated by BenchKit (invocation template)"
echo
if [ "LTLFireability" = "UpperBounds" ] ; then
echo "The expected result is a vector of positive values"
echo NUM_VECTOR
elif [ "LTLFireability" != "StateSpace" ] ; then
echo "The expected result is a vector of booleans"
echo BOOL_VECTOR
else
echo "no data necessary for post analysis"
fi
echo
if [ -f "LTLFireability.txt" ] ; then
echo "here is the order used to build the result vector(from text file)"
for x in $(grep Property LTLFireability.txt | cut -d ' ' -f 2 | sort -u) ; do
echo "FORMULA_NAME $x"
done
elif [ -f "LTLFireability.xml" ] ; then # for cunf (txt files deleted;-)
echo echo "here is the order used to build the result vector(from xml file)"
for x in $(grep '
echo "FORMULA_NAME $x"
done
fi
echo
echo "=== Now, execution of the tool begins"
echo
echo -n "BK_START "
date -u +%s%3N
echo
timeout -s 9 $BK_TIME_CONFINEMENT bash -c "/home/mcc/BenchKit/BenchKit_head.sh 2> STDERR ; echo ; echo -n \"BK_STOP \" ; date -u +%s%3N"
if [ $? -eq 137 ] ; then
echo
echo "BK_TIME_CONFINEMENT_REACHED"
fi
echo
echo "--------------------"
echo "content from stderr:"
echo
cat STDERR ;