Execution Chart

We display below the execution chart for this examination (boot time has been removed).

Trace from the execution

Waiting for the VM to be ready (probing ssh)
......................................................................................
/home/mcc/execution
total 304K
-rw-r--r-- 1 mcc users 3.7K May 15 18:54 CTLCardinality.txt
-rw-r--r-- 1 mcc users 21K May 15 18:54 CTLCardinality.xml
-rw-r--r-- 1 mcc users 2.5K May 15 18:54 CTLFireability.txt
-rw-r--r-- 1 mcc users 16K May 15 18:54 CTLFireability.xml
-rw-r--r-- 1 mcc users 4.0K May 15 18:50 GenericPropertiesDefinition.xml
-rw-r--r-- 1 mcc users 6.1K May 15 18:50 GenericPropertiesVerdict.xml
-rw-r--r-- 1 mcc users 2.3K May 26 09:26 LTLCardinality.txt
-rw-r--r-- 1 mcc users 8.5K May 26 09:26 LTLCardinality.xml
-rw-r--r-- 1 mcc users 2.0K May 26 09:26 LTLFireability.txt
-rw-r--r-- 1 mcc users 9.4K May 26 09:26 LTLFireability.xml
-rw-r--r-- 1 mcc users 3.3K May 15 18:54 ReachabilityCardinality.txt
-rw-r--r-- 1 mcc users 16K May 15 18:54 ReachabilityCardinality.xml
-rw-r--r-- 1 mcc users 113 May 15 18:54 ReachabilityDeadlock.txt
-rw-r--r-- 1 mcc users 351 May 15 18:54 ReachabilityDeadlock.xml
-rw-r--r-- 1 mcc users 2.5K May 15 18:54 ReachabilityFireability.txt
-rw-r--r-- 1 mcc users 14K May 15 18:54 ReachabilityFireability.xml
-rw-r--r-- 1 mcc users 1.7K May 15 18:54 UpperBounds.txt
-rw-r--r-- 1 mcc users 3.7K May 15 18:54 UpperBounds.xml
-rw-r--r-- 1 mcc users 6 May 15 18:50 equiv_col
-rw-r--r-- 1 mcc users 4 May 15 18:50 instance
-rw-r--r-- 1 mcc users 6 May 15 18:50 iscolored
-rw-r--r-- 1 mcc users 141K May 15 18:50 model.pnml
=====================================================================
Generated by BenchKit 2-3637
Executing tool itstoolsl
Input is FlexibleBarrier-PT-06b, examination is LTLFireability
Time confinement is 3600 seconds
Memory confinement is 16384 MBytes
Number of cores is 4
Run identifier is r249-blw7-152732550500036
=====================================================================

--------------------
content from stdout:

=== Data for post analysis generated by BenchKit (invocation template)

The expected result is a vector of booleans
BOOL_VECTOR

here is the order used to build the result vector(from text file)
FORMULA_NAME FlexibleBarrier-PT-06b-LTLFireability-00
FORMULA_NAME FlexibleBarrier-PT-06b-LTLFireability-01
FORMULA_NAME FlexibleBarrier-PT-06b-LTLFireability-02
FORMULA_NAME FlexibleBarrier-PT-06b-LTLFireability-03
FORMULA_NAME FlexibleBarrier-PT-06b-LTLFireability-04
FORMULA_NAME FlexibleBarrier-PT-06b-LTLFireability-05
FORMULA_NAME FlexibleBarrier-PT-06b-LTLFireability-06
FORMULA_NAME FlexibleBarrier-PT-06b-LTLFireability-07
FORMULA_NAME FlexibleBarrier-PT-06b-LTLFireability-08
FORMULA_NAME FlexibleBarrier-PT-06b-LTLFireability-09
FORMULA_NAME FlexibleBarrier-PT-06b-LTLFireability-10
FORMULA_NAME FlexibleBarrier-PT-06b-LTLFireability-11
FORMULA_NAME FlexibleBarrier-PT-06b-LTLFireability-12
FORMULA_NAME FlexibleBarrier-PT-06b-LTLFireability-13
FORMULA_NAME FlexibleBarrier-PT-06b-LTLFireability-14
FORMULA_NAME FlexibleBarrier-PT-06b-LTLFireability-15

=== Now, execution of the tool begins

BK_START 1527981748948

Using solver Z3 to compute partial order matrices.
Built C files in :
/home/mcc/execution
Invoking ITS tools like this :CommandLine [args=[/home/mcc/BenchKit/itstools/plugins/fr.lip6.move.gal.itstools.binaries_1.0.0.201805241334/bin/its-ltl-linux64, --gc-threshold, 2000000, -i, /home/mcc/execution/LTLFireability.pnml.gal, -t, CGAL, -LTL, /home/mcc/execution/LTLFireability.ltl, -c, -stutter-deadlock], workingDir=/home/mcc/execution]

its-ltl command run as :

/home/mcc/BenchKit/itstools/plugins/fr.lip6.move.gal.itstools.binaries_1.0.0.201805241334/bin/its-ltl-linux64 --gc-threshold 2000000 -i /home/mcc/execution/LTLFireability.pnml.gal -t CGAL -LTL /home/mcc/execution/LTLFireability.ltl -c -stutter-deadlock
Read 16 LTL properties
Checking formula 0 : !(((("(i1.u13.p515>=1)")U(G("(i0.u11.p392>=1)")))U(F(X(F("(i1.u13.p514>=1)"))))))
Formula 0 simplified : !(("(i1.u13.p515>=1)" U G"(i0.u11.p392>=1)") U FXF"(i1.u13.p514>=1)")
built 4 ordering constraints for composite.
built 98 ordering constraints for composite.
built 90 ordering constraints for composite.
built 80 ordering constraints for composite.
built 66 ordering constraints for composite.
built 48 ordering constraints for composite.
built 94 ordering constraints for composite.
Presburger conditions satisfied. Using coverability to approximate state space in K-Induction.
// Phase 1: matrix 621 rows 542 cols
invariant :u17:p0 + i1:u13:p398 + i1:u13:p399 + i1:u13:p400 + i1:u13:p401 + i1:u13:p402 + i1:u13:p403 + i1:u13:p404 + i1:u13:p405 + i1:u13:p406 + i1:u13:p407 + i1:u13:p408 + i1:u13:p409 + i1:u13:p410 + i1:u13:p411 + i1:u13:p412 + i1:u13:p413 + i1:u13:p414 + i1:u13:p415 + i1:u13:p416 + i1:u13:p417 + i1:u13:p418 + i1:u13:p419 + i1:u13:p420 + i1:u13:p421 + i1:u13:p422 + i1:u13:p423 + i1:u13:p424 + i1:u13:p425 + i1:u13:p426 + i1:u13:p427 + i1:u13:p428 + i1:u13:p429 + i1:u13:p430 + i1:u13:p431 + i1:u13:p432 + i1:u13:p433 + i1:u13:p434 + i1:u13:p435 + i1:u13:p436 + i1:u13:p437 + i1:u13:p438 + i1:u13:p439 + i1:u13:p440 + i1:u13:p441 + i1:u13:p442 + i1:u13:p443 + i1:u13:p444 + i1:u13:p445 + i1:u13:p446 + i1:u13:p447 + i1:u13:p448 + i1:u13:p449 + i1:u13:p450 + i1:u13:p451 + i1:u13:p452 + i1:u13:p453 + i1:u13:p454 + i1:u13:p455 + i1:u13:p456 + i1:u13:p457 + i1:u13:p458 + i1:u13:p459 + i1:u13:p460 + i1:u13:p461 + i1:u13:p462 + i1:u13:p463 + i1:u13:p464 + i1:u13:p465 + i1:u13:p466 + i1:u13:p467 + i1:u13:p468 + i1:u13:p469 + i1:u13:p470 + i1:u13:p471 + i1:u13:p472 + i1:u13:p473 + i1:u13:p474 + i1:u13:p475 + i1:u13:p476 + i1:u13:p477 + i1:u13:p478 + i1:u13:p479 + i1:u13:p480 + i1:u13:p481 + i1:u13:p482 + i1:u13:p483 + i1:u13:p484 + i1:u13:p485 + i1:u13:p486 + i1:u13:p487 + i1:u13:p488 + i1:u13:p489 + i1:u13:p490 + i1:u13:p491 + i1:u13:p492 + i1:u13:p493 + i1:u13:p494 + i1:u13:p495 + i1:u13:p496 + i1:u13:p497 + i1:u13:p498 + i1:u13:p499 + i1:u13:p500 + i1:u13:p501 + i1:u13:p502 + i1:u13:p503 + i1:u13:p504 + i1:u13:p505 + i1:u13:p506 + i1:u13:p507 + i1:u13:p508 + i1:u13:p509 + i1:u13:p510 + i1:u13:p511 + i1:u13:p512 + i1:u13:p513 + i1:u13:p514 + i1:u13:p515 + i1:u13:p516 + i1:u13:p517 + i1:u13:p518 + i1:u13:p519 + i1:u13:p520 + i1:u13:p521 + i1:u13:p522 + i1:u13:p523 + i1:u13:p524 + i1:u13:p525 + i1:u13:p526 + i1:u13:p527 + i1:u13:p528 + i1:u13:p529 + i1:u16:p397 = 1
invariant :u17:p0 + i0:u18:p1 + i0:i0:u19:p2 + i0:i0:i0:u20:p3 + i0:i0:i0:i0:u21:p4 + i0:i0:i0:i0:i0:u7:p74 + i0:i0:i0:i0:i0:u7:p75 + i0:i0:i0:i0:i0:u7:p76 + i0:i0:i0:i0:i0:u7:p77 + i0:i0:i0:i0:i0:u7:p78 + i0:i0:i0:i0:i0:u7:p79 + i0:i0:i0:i0:i0:u7:p80 + i0:i0:i0:i0:i0:u7:p81 + i0:i0:i0:i0:i0:u7:p82 + i0:i0:i0:i0:i0:u7:p83 + i0:i0:i0:i0:i0:u7:p84 + i0:i0:i0:i0:i0:u7:p85 + i0:i0:i0:i0:i0:u7:p86 + i0:i0:i0:i0:i0:u7:p87 + i0:i0:i0:i0:i0:u7:p88 + i0:i0:i0:i0:i0:u7:p89 + i0:i0:i0:i0:i0:u7:p90 + i0:i0:i0:i0:i0:u7:p91 + i0:i0:i0:i0:i0:u7:p92 + i0:i0:i0:i0:i0:u7:p93 + i0:i0:i0:i0:i0:u7:p94 + i0:i0:i0:i0:i0:u7:p95 + i0:i0:i0:i0:i0:u7:p96 + i0:i0:i0:i0:i0:u7:p97 + i0:i0:i0:i0:i0:u7:p98 + i0:i0:i0:i0:i0:u7:p99 + i0:i0:i0:i0:i0:u7:p100 + i0:i0:i0:i0:i0:u7:p101 + i0:i0:i0:i0:i0:u7:p102 + i0:i0:i0:i0:i0:u7:p103 + i0:i0:i0:i0:i0:u7:p104 + i0:i0:i0:i0:i0:u7:p105 + i0:i0:i0:i0:i0:u7:p106 + i0:i0:i0:i0:i0:u7:p107 + i0:i0:i0:i0:i0:u7:p108 + i0:i0:i0:i0:i0:u7:p109 + i0:i0:i0:i0:i0:u7:p110 + i0:i0:i0:i0:i0:u7:p111 + i0:i0:i0:i0:i0:u7:p112 + i0:i0:i0:i0:i0:u7:p113 + i0:i0:i0:i0:i0:u7:p114 + i0:i0:i0:i0:i0:u7:p115 + i0:i0:i0:i0:i0:u7:p116 + i0:i0:i0:i0:i0:u7:p117 + i0:i0:i0:i0:i0:u7:p118 + i0:i0:i0:i0:i0:u7:p119 + i0:i0:i0:i0:i0:u7:p120 + i0:i0:i0:i0:i0:u7:p121 + i0:i0:i0:i0:i0:u7:p122 + i0:i0:i0:i0:i0:u7:p123 + i0:i0:i0:i0:i0:u7:p124 + i0:i0:i0:i0:i0:u7:p125 + i0:i0:i0:i0:i0:u7:p126 + i0:i0:i0:i0:i0:u7:p127 + i0:i0:i0:i0:i0:u7:p128 + i0:i0:i0:i0:i0:u7:p129 + i0:i0:i0:i0:i0:u7:p130 + i0:i0:i0:i0:i0:u7:p131 + i0:i0:i0:i0:i0:u7:p132 + i0:i0:i0:i0:i0:u7:p133 + i0:i0:i0:i0:i0:u7:p134 + i0:i0:i0:i0:i0:u7:p135 + i0:i0:i0:i0:i0:u7:p136 + i0:i0:i0:i0:i0:u7:p137 + i0:i0:i0:i0:i0:u7:p138 + i0:i0:i0:i0:i0:u7:p139 + i0:i0:i0:i0:i0:u7:p140 + i0:i0:i0:i0:i0:u7:p141 + i0:i0:i0:i0:i0:u15:p5 = 1
invariant :u17:p0 + i0:u18:p1 + i0:i0:u19:p2 + i0:i0:i0:u9:p210 + i0:i0:i0:u9:p211 + i0:i0:i0:u9:p212 + i0:i0:i0:u9:p213 + i0:i0:i0:u9:p214 + i0:i0:i0:u9:p215 + i0:i0:i0:u9:p216 + i0:i0:i0:u9:p217 + i0:i0:i0:u9:p218 + i0:i0:i0:u9:p219 + i0:i0:i0:u9:p220 + i0:i0:i0:u9:p221 + i0:i0:i0:u9:p222 + i0:i0:i0:u9:p223 + i0:i0:i0:u9:p224 + i0:i0:i0:u9:p225 + i0:i0:i0:u9:p226 + i0:i0:i0:u9:p227 + i0:i0:i0:u9:p228 + i0:i0:i0:u9:p229 + i0:i0:i0:u9:p230 + i0:i0:i0:u9:p231 + i0:i0:i0:u9:p232 + i0:i0:i0:u9:p233 + i0:i0:i0:u9:p234 + i0:i0:i0:u9:p235 + i0:i0:i0:u9:p236 + i0:i0:i0:u9:p237 + i0:i0:i0:u9:p238 + i0:i0:i0:u9:p239 + i0:i0:i0:u9:p240 + i0:i0:i0:u9:p241 + i0:i0:i0:u9:p242 + i0:i0:i0:u9:p243 + i0:i0:i0:u9:p244 + i0:i0:i0:u9:p245 + i0:i0:i0:u9:p246 + i0:i0:i0:u9:p247 + i0:i0:i0:u9:p248 + i0:i0:i0:u9:p249 + i0:i0:i0:u9:p250 + i0:i0:i0:u9:p251 + i0:i0:i0:u9:p252 + i0:i0:i0:u9:p253 + i0:i0:i0:u9:p254 + i0:i0:i0:u9:p255 + i0:i0:i0:u9:p256 + i0:i0:i0:u9:p257 + i0:i0:i0:u9:p258 + i0:i0:i0:u9:p259 + i0:i0:i0:u9:p260 + i0:i0:i0:u9:p261 + i0:i0:i0:u9:p262 + i0:i0:i0:u9:p263 + i0:i0:i0:u9:p264 + i0:i0:i0:u9:p265 + i0:i0:i0:u9:p266 + i0:i0:i0:u9:p267 + i0:i0:i0:u9:p268 + i0:i0:i0:u9:p269 + i0:i0:i0:u9:p270 + i0:i0:i0:u9:p271 + i0:i0:i0:u9:p272 + i0:i0:i0:u9:p273 + i0:i0:i0:u9:p274 + i0:i0:i0:u9:p275 + i0:i0:i0:u9:p276 + i0:i0:i0:u9:p277 + i0:i0:i0:u20:p3 = 1
invariant :u17:p0 + i0:u18:p1 + i0:i0:u19:p2 + i0:i0:i0:u20:p3 + i0:i0:i0:i0:u8:p142 + i0:i0:i0:i0:u8:p143 + i0:i0:i0:i0:u8:p144 + i0:i0:i0:i0:u8:p145 + i0:i0:i0:i0:u8:p146 + i0:i0:i0:i0:u8:p147 + i0:i0:i0:i0:u8:p148 + i0:i0:i0:i0:u8:p149 + i0:i0:i0:i0:u8:p150 + i0:i0:i0:i0:u8:p151 + i0:i0:i0:i0:u8:p152 + i0:i0:i0:i0:u8:p153 + i0:i0:i0:i0:u8:p154 + i0:i0:i0:i0:u8:p155 + i0:i0:i0:i0:u8:p156 + i0:i0:i0:i0:u8:p157 + i0:i0:i0:i0:u8:p158 + i0:i0:i0:i0:u8:p159 + i0:i0:i0:i0:u8:p160 + i0:i0:i0:i0:u8:p161 + i0:i0:i0:i0:u8:p162 + i0:i0:i0:i0:u8:p163 + i0:i0:i0:i0:u8:p164 + i0:i0:i0:i0:u8:p165 + i0:i0:i0:i0:u8:p166 + i0:i0:i0:i0:u8:p167 + i0:i0:i0:i0:u8:p168 + i0:i0:i0:i0:u8:p169 + i0:i0:i0:i0:u8:p170 + i0:i0:i0:i0:u8:p171 + i0:i0:i0:i0:u8:p172 + i0:i0:i0:i0:u8:p173 + i0:i0:i0:i0:u8:p174 + i0:i0:i0:i0:u8:p175 + i0:i0:i0:i0:u8:p176 + i0:i0:i0:i0:u8:p177 + i0:i0:i0:i0:u8:p178 + i0:i0:i0:i0:u8:p179 + i0:i0:i0:i0:u8:p180 + i0:i0:i0:i0:u8:p181 + i0:i0:i0:i0:u8:p182 + i0:i0:i0:i0:u8:p183 + i0:i0:i0:i0:u8:p184 + i0:i0:i0:i0:u8:p185 + i0:i0:i0:i0:u8:p186 + i0:i0:i0:i0:u8:p187 + i0:i0:i0:i0:u8:p188 + i0:i0:i0:i0:u8:p189 + i0:i0:i0:i0:u8:p190 + i0:i0:i0:i0:u8:p191 + i0:i0:i0:i0:u8:p192 + i0:i0:i0:i0:u8:p193 + i0:i0:i0:i0:u8:p194 + i0:i0:i0:i0:u8:p195 + i0:i0:i0:i0:u8:p196 + i0:i0:i0:i0:u8:p197 + i0:i0:i0:i0:u8:p198 + i0:i0:i0:i0:u8:p199 + i0:i0:i0:i0:u8:p200 + i0:i0:i0:i0:u8:p201 + i0:i0:i0:i0:u8:p202 + i0:i0:i0:i0:u8:p203 + i0:i0:i0:i0:u8:p204 + i0:i0:i0:i0:u8:p205 + i0:i0:i0:i0:u8:p206 + i0:i0:i0:i0:u8:p207 + i0:i0:i0:i0:u8:p208 + i0:i0:i0:i0:u8:p209 + i0:i0:i0:i0:u21:p4 = 1
invariant :u17:p0 + i0:u18:p1 + i0:i0:u19:p2 + i0:i0:i0:u20:p3 + i0:i0:i0:i0:u21:p4 + i0:i0:i0:i0:i0:u6:p6 + i0:i0:i0:i0:i0:u6:p7 + i0:i0:i0:i0:i0:u6:p8 + i0:i0:i0:i0:i0:u6:p9 + i0:i0:i0:i0:i0:u6:p10 + i0:i0:i0:i0:i0:u6:p11 + i0:i0:i0:i0:i0:u6:p12 + i0:i0:i0:i0:i0:u6:p13 + i0:i0:i0:i0:i0:u6:p14 + i0:i0:i0:i0:i0:u6:p15 + i0:i0:i0:i0:i0:u6:p16 + i0:i0:i0:i0:i0:u6:p17 + i0:i0:i0:i0:i0:u6:p18 + i0:i0:i0:i0:i0:u6:p19 + i0:i0:i0:i0:i0:u6:p20 + i0:i0:i0:i0:i0:u6:p21 + i0:i0:i0:i0:i0:u6:p22 + i0:i0:i0:i0:i0:u6:p23 + i0:i0:i0:i0:i0:u6:p24 + i0:i0:i0:i0:i0:u6:p25 + i0:i0:i0:i0:i0:u6:p26 + i0:i0:i0:i0:i0:u6:p27 + i0:i0:i0:i0:i0:u6:p28 + i0:i0:i0:i0:i0:u6:p29 + i0:i0:i0:i0:i0:u6:p30 + i0:i0:i0:i0:i0:u6:p31 + i0:i0:i0:i0:i0:u6:p32 + i0:i0:i0:i0:i0:u6:p33 + i0:i0:i0:i0:i0:u6:p34 + i0:i0:i0:i0:i0:u6:p35 + i0:i0:i0:i0:i0:u6:p36 + i0:i0:i0:i0:i0:u6:p37 + i0:i0:i0:i0:i0:u6:p38 + i0:i0:i0:i0:i0:u6:p39 + i0:i0:i0:i0:i0:u6:p40 + i0:i0:i0:i0:i0:u6:p41 + i0:i0:i0:i0:i0:u6:p42 + i0:i0:i0:i0:i0:u6:p43 + i0:i0:i0:i0:i0:u6:p44 + i0:i0:i0:i0:i0:u6:p45 + i0:i0:i0:i0:i0:u6:p46 + i0:i0:i0:i0:i0:u6:p47 + i0:i0:i0:i0:i0:u6:p48 + i0:i0:i0:i0:i0:u6:p49 + i0:i0:i0:i0:i0:u6:p50 + i0:i0:i0:i0:i0:u6:p51 + i0:i0:i0:i0:i0:u6:p52 + i0:i0:i0:i0:i0:u6:p53 + i0:i0:i0:i0:i0:u6:p54 + i0:i0:i0:i0:i0:u6:p55 + i0:i0:i0:i0:i0:u6:p56 + i0:i0:i0:i0:i0:u6:p57 + i0:i0:i0:i0:i0:u6:p58 + i0:i0:i0:i0:i0:u6:p59 + i0:i0:i0:i0:i0:u6:p60 + i0:i0:i0:i0:i0:u6:p61 + i0:i0:i0:i0:i0:u6:p62 + i0:i0:i0:i0:i0:u6:p63 + i0:i0:i0:i0:i0:u6:p64 + i0:i0:i0:i0:i0:u6:p65 + i0:i0:i0:i0:i0:u6:p66 + i0:i0:i0:i0:i0:u6:p67 + i0:i0:i0:i0:i0:u6:p68 + i0:i0:i0:i0:i0:u6:p69 + i0:i0:i0:i0:i0:u6:p70 + i0:i0:i0:i0:i0:u6:p71 + i0:i0:i0:i0:i0:u6:p72 + i0:i0:i0:i0:i0:u6:p73 + i0:i0:i0:i0:i0:u15:p5 = 1
invariant :u17:p0 + i0:u11:p346 + i0:u11:p347 + i0:u11:p348 + i0:u11:p349 + i0:u11:p350 + i0:u11:p351 + i0:u11:p352 + i0:u11:p353 + i0:u11:p354 + i0:u11:p355 + i0:u11:p356 + i0:u11:p357 + i0:u11:p358 + i0:u11:p359 + i0:u11:p360 + i0:u11:p361 + i0:u11:p362 + i0:u11:p363 + i0:u11:p364 + i0:u11:p365 + i0:u11:p366 + i0:u11:p367 + i0:u11:p368 + i0:u11:p369 + i0:u11:p370 + i0:u11:p371 + i0:u11:p372 + i0:u11:p373 + i0:u11:p374 + i0:u11:p375 + i0:u11:p376 + i0:u11:p377 + i0:u11:p378 + i0:u11:p379 + i0:u11:p380 + i0:u11:p381 + i0:u11:p382 + i0:u11:p383 + i0:u11:p384 + i0:u11:p385 + i0:u11:p386 + i0:u11:p387 + i0:u11:p388 + i0:u11:p389 + i0:u11:p390 + i0:u11:p391 + i0:u11:p392 + i0:u11:p393 + i0:u11:p394 + i0:u11:p395 + i0:u11:p396 + i0:u18:p1 = 1
invariant :u17:p0 + i0:u18:p1 + i0:i0:u10:p278 + i0:i0:u10:p279 + i0:i0:u10:p280 + i0:i0:u10:p281 + i0:i0:u10:p282 + i0:i0:u10:p283 + i0:i0:u10:p284 + i0:i0:u10:p285 + i0:i0:u10:p286 + i0:i0:u10:p287 + i0:i0:u10:p288 + i0:i0:u10:p289 + i0:i0:u10:p290 + i0:i0:u10:p291 + i0:i0:u10:p292 + i0:i0:u10:p293 + i0:i0:u10:p294 + i0:i0:u10:p295 + i0:i0:u10:p296 + i0:i0:u10:p297 + i0:i0:u10:p298 + i0:i0:u10:p299 + i0:i0:u10:p300 + i0:i0:u10:p301 + i0:i0:u10:p302 + i0:i0:u10:p303 + i0:i0:u10:p304 + i0:i0:u10:p305 + i0:i0:u10:p306 + i0:i0:u10:p307 + i0:i0:u10:p308 + i0:i0:u10:p309 + i0:i0:u10:p310 + i0:i0:u10:p311 + i0:i0:u10:p312 + i0:i0:u10:p313 + i0:i0:u10:p314 + i0:i0:u10:p315 + i0:i0:u10:p316 + i0:i0:u10:p317 + i0:i0:u10:p318 + i0:i0:u10:p319 + i0:i0:u10:p320 + i0:i0:u10:p321 + i0:i0:u10:p322 + i0:i0:u10:p323 + i0:i0:u10:p324 + i0:i0:u10:p325 + i0:i0:u10:p326 + i0:i0:u10:p327 + i0:i0:u10:p328 + i0:i0:u10:p329 + i0:i0:u10:p330 + i0:i0:u10:p331 + i0:i0:u10:p332 + i0:i0:u10:p333 + i0:i0:u10:p334 + i0:i0:u10:p335 + i0:i0:u10:p336 + i0:i0:u10:p337 + i0:i0:u10:p338 + i0:i0:u10:p339 + i0:i0:u10:p340 + i0:i0:u10:p341 + i0:i0:u10:p342 + i0:i0:u10:p343 + i0:i0:u10:p344 + i0:i0:u10:p345 + i0:i0:u19:p2 = 1
invariant :u17:p0 + i1:u14:p530 + i1:u14:p531 + i1:u14:p532 + i1:u14:p533 + i1:u14:p534 + i1:u14:p535 + i1:u14:p536 + i1:u14:p537 + i1:u14:p538 + i1:u14:p539 + i1:u14:p540 + i1:u14:p541 + i1:u16:p397 = 1
Running compilation step : CommandLine [args=[gcc, -c, -I/home/mcc/BenchKit//lts_install_dir//include, -I., -std=c99, -fPIC, -O3, model.c], workingDir=/home/mcc/execution]
Compilation finished in 5914 ms.
Running link step : CommandLine [args=[gcc, -shared, -o, gal.so, model.o], workingDir=/home/mcc/execution]
Link finished in 87 ms.
Running LTSmin : CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=1, --when, --ltl, (((LTLAP0==true))U([]((LTLAP1==true))))U(<>(X(<>((LTLAP2==true))))), --buchi-type=spotba], workingDir=/home/mcc/execution]
LTSmin run took 46 ms.
FORMULA FlexibleBarrier-PT-06b-LTLFireability-00 FALSE TECHNIQUES PARTIAL_ORDER EXPLICIT LTSMIN SAT_SMT
Running LTSmin : CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=1, --when, --ltl, [](<>(X(((LTLAP3==true))U((LTLAP4==true))))), --buchi-type=spotba], workingDir=/home/mcc/execution]
LTSmin run took 34 ms.
FORMULA FlexibleBarrier-PT-06b-LTLFireability-01 FALSE TECHNIQUES PARTIAL_ORDER EXPLICIT LTSMIN SAT_SMT
Running LTSmin : CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=1, --when, --ltl, X((LTLAP5==true)), --buchi-type=spotba], workingDir=/home/mcc/execution]
LTSmin run took 30 ms.
FORMULA FlexibleBarrier-PT-06b-LTLFireability-02 FALSE TECHNIQUES PARTIAL_ORDER EXPLICIT LTSMIN SAT_SMT
Running LTSmin : CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=1, -p, --pins-guards, --when, --ltl, []((<>([]((LTLAP6==true))))U([]([]((LTLAP7==true))))), --buchi-type=spotba], workingDir=/home/mcc/execution]
LTSmin run took 802 ms.
FORMULA FlexibleBarrier-PT-06b-LTLFireability-03 FALSE TECHNIQUES PARTIAL_ORDER EXPLICIT LTSMIN SAT_SMT
Running LTSmin : CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=1, -p, --pins-guards, --when, --ltl, []((LTLAP8==true)), --buchi-type=spotba], workingDir=/home/mcc/execution]
LTSmin run took 792 ms.
FORMULA FlexibleBarrier-PT-06b-LTLFireability-04 FALSE TECHNIQUES PARTIAL_ORDER EXPLICIT LTSMIN SAT_SMT
Running LTSmin : CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=1, -p, --pins-guards, --when, --ltl, <>([]((LTLAP9==true))), --buchi-type=spotba], workingDir=/home/mcc/execution]
LTSmin run took 793 ms.
FORMULA FlexibleBarrier-PT-06b-LTLFireability-05 FALSE TECHNIQUES PARTIAL_ORDER EXPLICIT LTSMIN SAT_SMT
Running LTSmin : CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=1, -p, --pins-guards, --when, --ltl, <>((<>((LTLAP10==true)))U((LTLAP11==true))), --buchi-type=spotba], workingDir=/home/mcc/execution]
LTSmin run took 788 ms.
FORMULA FlexibleBarrier-PT-06b-LTLFireability-06 FALSE TECHNIQUES PARTIAL_ORDER EXPLICIT LTSMIN SAT_SMT
Running LTSmin : CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=1, --when, --ltl, X((<>(<>((LTLAP12==true))))U(((LTLAP13==true))U((LTLAP14==true)))), --buchi-type=spotba], workingDir=/home/mcc/execution]
LTSmin run took 65 ms.
FORMULA FlexibleBarrier-PT-06b-LTLFireability-07 FALSE TECHNIQUES PARTIAL_ORDER EXPLICIT LTSMIN SAT_SMT
Running LTSmin : CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=1, --when, --ltl, [](X([]([]((LTLAP15==true))))), --buchi-type=spotba], workingDir=/home/mcc/execution]
LTSmin run took 49 ms.
FORMULA FlexibleBarrier-PT-06b-LTLFireability-08 FALSE TECHNIQUES PARTIAL_ORDER EXPLICIT LTSMIN SAT_SMT
Running LTSmin : CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=1, --when, --ltl, X(<>(<>(((LTLAP16==true))U((LTLAP17==true))))), --buchi-type=spotba], workingDir=/home/mcc/execution]
LTSmin run took 62 ms.
FORMULA FlexibleBarrier-PT-06b-LTLFireability-09 FALSE TECHNIQUES PARTIAL_ORDER EXPLICIT LTSMIN SAT_SMT
Running LTSmin : CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=1, -p, --pins-guards, --when, --ltl, (LTLAP18==true), --buchi-type=spotba], workingDir=/home/mcc/execution]
LTSmin run took 952 ms.
FORMULA FlexibleBarrier-PT-06b-LTLFireability-10 FALSE TECHNIQUES PARTIAL_ORDER EXPLICIT LTSMIN SAT_SMT
Running LTSmin : CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=1, --when, --ltl, (<>(((LTLAP19==true))U((LTLAP20==true))))U(X(((LTLAP21==true))U((LTLAP22==true)))), --buchi-type=spotba], workingDir=/home/mcc/execution]
LTSmin run took 67 ms.
FORMULA FlexibleBarrier-PT-06b-LTLFireability-11 FALSE TECHNIQUES PARTIAL_ORDER EXPLICIT LTSMIN SAT_SMT
Running LTSmin : CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=1, -p, --pins-guards, --when, --ltl, ((LTLAP23==true))U((LTLAP24==true)), --buchi-type=spotba], workingDir=/home/mcc/execution]
LTSmin run took 904 ms.
FORMULA FlexibleBarrier-PT-06b-LTLFireability-12 FALSE TECHNIQUES PARTIAL_ORDER EXPLICIT LTSMIN SAT_SMT
Running LTSmin : CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=1, -p, --pins-guards, --when, --ltl, (LTLAP25==true), --buchi-type=spotba], workingDir=/home/mcc/execution]
LTSmin run took 788 ms.
FORMULA FlexibleBarrier-PT-06b-LTLFireability-13 FALSE TECHNIQUES PARTIAL_ORDER EXPLICIT LTSMIN SAT_SMT
Running LTSmin : CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=1, -p, --pins-guards, --when, --ltl, (LTLAP26==true), --buchi-type=spotba], workingDir=/home/mcc/execution]
LTSmin run took 883 ms.
FORMULA FlexibleBarrier-PT-06b-LTLFireability-14 FALSE TECHNIQUES PARTIAL_ORDER EXPLICIT LTSMIN SAT_SMT
Running LTSmin : CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=1, --when, --ltl, X(([]([]((LTLAP27==true))))U(X(X((LTLAP28==true))))), --buchi-type=spotba], workingDir=/home/mcc/execution]
LTSmin run took 28 ms.
FORMULA FlexibleBarrier-PT-06b-LTLFireability-15 FALSE TECHNIQUES PARTIAL_ORDER EXPLICIT LTSMIN SAT_SMT
ITS tools runner thread asked to quit. Dying gracefully.

BK_STOP 1527981785298

--------------------
content from stderr:

+ export BINDIR=/home/mcc/BenchKit/
+ BINDIR=/home/mcc/BenchKit/
++ pwd
+ export MODEL=/home/mcc/execution
+ MODEL=/home/mcc/execution
+ /home/mcc/BenchKit//runeclipse.sh /home/mcc/execution LTLFireability -its -ltsminpath /home/mcc/BenchKit//lts_install_dir/ -louvain -smt
+ ulimit -s 65536
+ [[ -z '' ]]
+ export LTSMIN_MEM_SIZE=8589934592
+ LTSMIN_MEM_SIZE=8589934592
+ /home/mcc/BenchKit//itstools/its-tools -consoleLog -data /home/mcc/execution/workspace -pnfolder /home/mcc/execution -examination LTLFireability -z3path /home/mcc/BenchKit//z3/bin/z3 -yices2path /home/mcc/BenchKit//yices/bin/yices -its -ltsminpath /home/mcc/BenchKit//lts_install_dir/ -louvain -smt -vmargs -Dosgi.locking=none -Declipse.stateSaveDelayInterval=-1 -Dosgi.configuration.area=/tmp/.eclipse -Xss8m -Xms40m -Xmx8192m -Dfile.encoding=UTF-8 -Dosgi.requiredJavaVersion=1.6
Jun 02, 2018 11:22:30 PM fr.lip6.move.gal.application.Application start
INFO: Running its-tools with arguments : [-pnfolder, /home/mcc/execution, -examination, LTLFireability, -z3path, /home/mcc/BenchKit//z3/bin/z3, -yices2path, /home/mcc/BenchKit//yices/bin/yices, -its, -ltsminpath, /home/mcc/BenchKit//lts_install_dir/, -louvain, -smt]
Jun 02, 2018 11:22:30 PM fr.lip6.move.gal.application.MccTranslator transformPNML
INFO: Parsing pnml file : /home/mcc/execution/model.pnml
Jun 02, 2018 11:22:30 PM fr.lip6.move.gal.nupn.PTNetReader loadFromXML
INFO: Load time of PNML (sax parser for PT used): 83 ms
Jun 02, 2018 11:22:30 PM fr.lip6.move.gal.pnml.togal.PTGALTransformer handlePage
INFO: Transformed 542 places.
Jun 02, 2018 11:22:30 PM fr.lip6.move.gal.pnml.togal.PTGALTransformer handlePage
INFO: Transformed 621 transitions.
Jun 02, 2018 11:22:30 PM fr.lip6.move.gal.pnml.togal.PnmlToGalTransformer transform
INFO: Found NUPN structural information;
Jun 02, 2018 11:22:31 PM fr.lip6.move.serialization.SerializationUtil systemToFile
INFO: Time to serialize gal into /home/mcc/execution/model.pnml.img.gal : 20 ms
Jun 02, 2018 11:22:31 PM fr.lip6.move.gal.application.MccTranslator applyOrder
INFO: Applying decomposition
Jun 02, 2018 11:22:31 PM fr.lip6.move.gal.instantiate.GALRewriter flatten
INFO: Flatten gal took : 88 ms
Jun 02, 2018 11:22:31 PM fr.lip6.move.gal.instantiate.GALRewriter flatten
INFO: Flatten gal took : 57 ms
Jun 02, 2018 11:22:31 PM fr.lip6.move.gal.instantiate.CompositeBuilder decomposeWithOrder
INFO: Decomposing Gal with order
Jun 02, 2018 11:22:31 PM fr.lip6.move.gal.instantiate.GALRewriter flatten
INFO: Flatten gal took : 61 ms
Jun 02, 2018 11:22:31 PM fr.lip6.move.gal.instantiate.CompositeBuilder rewriteArraysToAllowPartition
INFO: Rewriting arrays to variables to allow decomposition.
Jun 02, 2018 11:22:31 PM fr.lip6.move.gal.instantiate.Instantiator fuseIsomorphicEffects
INFO: Removed a total of 35 redundant transitions.
Jun 02, 2018 11:22:31 PM fr.lip6.move.serialization.SerializationUtil systemToFile
INFO: Time to serialize gal into /home/mcc/execution/LTLFireability.pnml.gal : 10 ms
Jun 02, 2018 11:22:31 PM fr.lip6.move.serialization.SerializationUtil serializePropertiesForITSLTLTools
INFO: Time to serialize properties into /home/mcc/execution/LTLFireability.ltl : 1 ms
Jun 02, 2018 11:22:31 PM fr.lip6.move.gal.semantics.DeterministicNextBuilder getDeterministicNext
INFO: Input system was already deterministic with 621 transitions.
Jun 02, 2018 11:22:32 PM fr.lip6.move.gal.gal2smt.bmc.KInductionSolver computeAndDeclareInvariants
INFO: Computed 8 place invariants in 182 ms
Jun 02, 2018 11:22:32 PM fr.lip6.move.gal.gal2smt.bmc.KInductionSolver init
INFO: Proved 542 variables to be positive in 741 ms
Jun 02, 2018 11:22:32 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver computeAblingMatrix
INFO: Computing symmetric may disable matrix : 621 transitions.
Jun 02, 2018 11:22:32 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of disable matrix completed :0/621 took 0 ms. Total solver calls (SAT/UNSAT): 0(0/0)
Jun 02, 2018 11:22:32 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of Complete disable matrix. took 55 ms. Total solver calls (SAT/UNSAT): 0(0/0)
Jun 02, 2018 11:22:32 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver computeAblingMatrix
INFO: Computing symmetric may enable matrix : 621 transitions.
Jun 02, 2018 11:22:32 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of Complete enable matrix. took 14 ms. Total solver calls (SAT/UNSAT): 0(0/0)
Jun 02, 2018 11:22:33 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver computeCoEnablingMatrix
INFO: Computing symmetric co enabling matrix : 621 transitions.
Jun 02, 2018 11:22:35 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(31/621) took 2138 ms. Total solver calls (SAT/UNSAT): 5260(264/4996)
Jun 02, 2018 11:22:38 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(49/621) took 5163 ms. Total solver calls (SAT/UNSAT): 9049(695/8354)
Jun 02, 2018 11:22:41 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(90/621) took 8170 ms. Total solver calls (SAT/UNSAT): 20836(695/20141)
Jun 02, 2018 11:22:44 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(268/621) took 11171 ms. Total solver calls (SAT/UNSAT): 28417(837/27580)
Jun 02, 2018 11:22:47 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(490/621) took 14279 ms. Total solver calls (SAT/UNSAT): 36412(1007/35405)
Jun 02, 2018 11:22:50 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(566/621) took 17298 ms. Total solver calls (SAT/UNSAT): 42530(1232/41298)
Jun 02, 2018 11:22:51 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of Finished co-enabling matrix. took 18181 ms. Total solver calls (SAT/UNSAT): 43488(1260/42228)
Jun 02, 2018 11:22:51 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver computeDoNotAccord
INFO: Computing Do-Not-Accords matrix : 621 transitions.
Jun 02, 2018 11:22:51 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of Completed DNA matrix. took 74 ms. Total solver calls (SAT/UNSAT): 0(0/0)
Jun 02, 2018 11:22:51 PM fr.lip6.move.gal.gal2pins.Gal2PinsTransformerNext transform
INFO: Built C files in 20401ms conformant to PINS in folder :/home/mcc/execution

Sequence of Actions to be Executed by the VM

This is useful if one wants to reexecute the tool in the VM from the submitted image disk.

set -x
# this is for BenchKit: configuration of major elements for the test
export BK_INPUT="FlexibleBarrier-PT-06b"
export BK_EXAMINATION="LTLFireability"
export BK_TOOL="itstoolsl"
export BK_RESULT_DIR="/tmp/BK_RESULTS/OUTPUTS"
export BK_TIME_CONFINEMENT="3600"
export BK_MEMORY_CONFINEMENT="16384"

# this is specific to your benchmark or test

export BIN_DIR="$HOME/BenchKit/bin"

# remove the execution directoty if it exists (to avoid increse of .vmdk images)
if [ -d execution ] ; then
rm -rf execution
fi

tar xzf /home/mcc/BenchKit/INPUTS/FlexibleBarrier-PT-06b.tgz
mv FlexibleBarrier-PT-06b execution
cd execution
pwd
ls -lh

# this is for BenchKit: explicit launching of the test
echo "====================================================================="
echo " Generated by BenchKit 2-3637"
echo " Executing tool itstoolsl"
echo " Input is FlexibleBarrier-PT-06b, examination is LTLFireability"
echo " Time confinement is $BK_TIME_CONFINEMENT seconds"
echo " Memory confinement is 16384 MBytes"
echo " Number of cores is 4"
echo " Run identifier is r249-blw7-152732550500036"
echo "====================================================================="
echo
echo "--------------------"
echo "content from stdout:"
echo
echo "=== Data for post analysis generated by BenchKit (invocation template)"
echo
if [ "LTLFireability" = "UpperBounds" ] ; then
echo "The expected result is a vector of positive values"
echo NUM_VECTOR
elif [ "LTLFireability" != "StateSpace" ] ; then
echo "The expected result is a vector of booleans"
echo BOOL_VECTOR
else
echo "no data necessary for post analysis"
fi
echo
if [ -f "LTLFireability.txt" ] ; then
echo "here is the order used to build the result vector(from text file)"
for x in $(grep Property LTLFireability.txt | cut -d ' ' -f 2 | sort -u) ; do
echo "FORMULA_NAME $x"
done
elif [ -f "LTLFireability.xml" ] ; then # for cunf (txt files deleted;-)
echo echo "here is the order used to build the result vector(from xml file)"
for x in $(grep '' LTLFireability.xml | cut -d '>' -f 2 | cut -d '<' -f 1 | sort -u) ; do
echo "FORMULA_NAME $x"
done
fi
echo
echo "=== Now, execution of the tool begins"
echo
echo -n "BK_START "
date -u +%s%3N
echo
timeout -s 9 $BK_TIME_CONFINEMENT bash -c "/home/mcc/BenchKit/BenchKit_head.sh 2> STDERR ; echo ; echo -n \"BK_STOP \" ; date -u +%s%3N"
if [ $? -eq 137 ] ; then
echo
echo "BK_TIME_CONFINEMENT_REACHED"
fi
echo
echo "--------------------"
echo "content from stderr:"
echo
cat STDERR ;