Execution Chart

We display below the execution chart for this examination (boot time has been removed).

Trace from the execution

Waiting for the VM to be ready (probing ssh)
................
/home/mcc/execution
total 188K
-rw-r--r-- 1 mcc users 3.7K May 15 18:54 CTLCardinality.txt
-rw-r--r-- 1 mcc users 22K May 15 18:54 CTLCardinality.xml
-rw-r--r-- 1 mcc users 2.3K May 15 18:54 CTLFireability.txt
-rw-r--r-- 1 mcc users 16K May 15 18:54 CTLFireability.xml
-rw-r--r-- 1 mcc users 4.0K May 15 18:50 GenericPropertiesDefinition.xml
-rw-r--r-- 1 mcc users 5.9K May 15 18:50 GenericPropertiesVerdict.xml
-rw-r--r-- 1 mcc users 2.4K May 26 09:26 LTLCardinality.txt
-rw-r--r-- 1 mcc users 13K May 26 09:26 LTLCardinality.xml
-rw-r--r-- 1 mcc users 1.8K May 26 09:26 LTLFireability.txt
-rw-r--r-- 1 mcc users 8.9K May 26 09:26 LTLFireability.xml
-rw-r--r-- 1 mcc users 3.6K May 15 18:54 ReachabilityCardinality.txt
-rw-r--r-- 1 mcc users 19K May 15 18:54 ReachabilityCardinality.xml
-rw-r--r-- 1 mcc users 101 May 15 18:54 ReachabilityDeadlock.txt
-rw-r--r-- 1 mcc users 339 May 15 18:54 ReachabilityDeadlock.xml
-rw-r--r-- 1 mcc users 2.3K May 15 18:54 ReachabilityFireability.txt
-rw-r--r-- 1 mcc users 14K May 15 18:54 ReachabilityFireability.xml
-rw-r--r-- 1 mcc users 1.5K May 15 18:54 UpperBounds.txt
-rw-r--r-- 1 mcc users 3.5K May 15 18:54 UpperBounds.xml
-rw-r--r-- 1 mcc users 6 May 15 18:50 equiv_col
-rw-r--r-- 1 mcc users 4 May 15 18:50 instance
-rw-r--r-- 1 mcc users 6 May 15 18:50 iscolored
-rw-r--r-- 1 mcc users 17K May 15 18:50 model.pnml
=====================================================================
Generated by BenchKit 2-3637
Executing tool itstoolsl
Input is FMS-PT-200, examination is LTLFireability
Time confinement is 3600 seconds
Memory confinement is 16384 MBytes
Number of cores is 4
Run identifier is r249-blw7-152732550500026
=====================================================================

--------------------
content from stdout:

=== Data for post analysis generated by BenchKit (invocation template)

The expected result is a vector of booleans
BOOL_VECTOR

here is the order used to build the result vector(from text file)
FORMULA_NAME FMS-PT-200-LTLFireability-00
FORMULA_NAME FMS-PT-200-LTLFireability-01
FORMULA_NAME FMS-PT-200-LTLFireability-02
FORMULA_NAME FMS-PT-200-LTLFireability-03
FORMULA_NAME FMS-PT-200-LTLFireability-04
FORMULA_NAME FMS-PT-200-LTLFireability-05
FORMULA_NAME FMS-PT-200-LTLFireability-06
FORMULA_NAME FMS-PT-200-LTLFireability-07
FORMULA_NAME FMS-PT-200-LTLFireability-08
FORMULA_NAME FMS-PT-200-LTLFireability-09
FORMULA_NAME FMS-PT-200-LTLFireability-10
FORMULA_NAME FMS-PT-200-LTLFireability-11
FORMULA_NAME FMS-PT-200-LTLFireability-12
FORMULA_NAME FMS-PT-200-LTLFireability-13
FORMULA_NAME FMS-PT-200-LTLFireability-14
FORMULA_NAME FMS-PT-200-LTLFireability-15

=== Now, execution of the tool begins

BK_START 1527981170185

Converted graph to binary with : CommandLine [args=[/home/mcc/BenchKit/itstools/plugins/fr.lip6.move.gal.louvain.binaries_1.0.0.201805241334/bin/convert-linux64, -i, /tmp/graph5595692678491891378.txt, -o, /tmp/graph5595692678491891378.bin, -w, /tmp/graph5595692678491891378.weights], workingDir=null]
Built communities with : CommandLine [args=[/home/mcc/BenchKit/itstools/plugins/fr.lip6.move.gal.louvain.binaries_1.0.0.201805241334/bin/louvain-linux64, /tmp/graph5595692678491891378.bin, -l, -1, -v, -w, /tmp/graph5595692678491891378.weights, -q, 0, -e, 0.001], workingDir=null]
Using solver Z3 to compute partial order matrices.
Built C files in :
/home/mcc/execution
Invoking ITS tools like this :CommandLine [args=[/home/mcc/BenchKit/itstools/plugins/fr.lip6.move.gal.itstools.binaries_1.0.0.201805241334/bin/its-ltl-linux64, --gc-threshold, 2000000, -i, /home/mcc/execution/LTLFireability.pnml.gal, -t, CGAL, -LTL, /home/mcc/execution/LTLFireability.ltl, -c, -stutter-deadlock], workingDir=/home/mcc/execution]

its-ltl command run as :

/home/mcc/BenchKit/itstools/plugins/fr.lip6.move.gal.itstools.binaries_1.0.0.201805241334/bin/its-ltl-linux64 --gc-threshold 2000000 -i /home/mcc/execution/LTLFireability.pnml.gal -t CGAL -LTL /home/mcc/execution/LTLFireability.ltl -c -stutter-deadlock
Read 16 LTL properties
Checking formula 0 : !((F(F(X(F(X("((i3.u1.P12wM3>=1)&&(i3.u6.M3>=1))")))))))
Formula 0 simplified : !FXFX"((i3.u1.P12wM3>=1)&&(i3.u6.M3>=1))"
built 5 ordering constraints for composite.
built 5 ordering constraints for composite.
built 6 ordering constraints for composite.
built 3 ordering constraints for composite.
Presburger conditions satisfied. Using coverability to approximate state space in K-Induction.
// Phase 1: matrix 20 rows 22 cols
invariant :i1:u4:P2wM2 + i1:u4:P2 + i1:u4:P2s + i1:u5:P2M2 + i1:u8:P2wP1 + i1:u8:P2d + i3:u1:P12 + i3:u1:P12wM3 + i3:u6:P12s + -1'i3:u6:M3 = 198
invariant :u7:P3s + u7:P3M2 + u7:P3 = 200
invariant :i3:u6:P12M3 + i3:u6:M3 = 2
invariant :i0:u3:P1M1 + i0:u3:M1 = 3
invariant :i1:u5:M2 + i1:u5:P2M2 = 1
invariant :i0:u0:P1d + i0:u0:P1s + i0:u0:P1wP2 + i0:u2:P1 + i0:u2:P1wM1 + -1'i0:u3:M1 + i3:u1:P12 + i3:u1:P12wM3 + i3:u6:P12s + -1'i3:u6:M3 = 195
Running compilation step : CommandLine [args=[gcc, -c, -I/home/mcc/BenchKit//lts_install_dir//include, -I., -std=c99, -fPIC, -O3, model.c], workingDir=/home/mcc/execution]
Compilation finished in 565 ms.
Running link step : CommandLine [args=[gcc, -shared, -o, gal.so, model.o], workingDir=/home/mcc/execution]
Link finished in 46 ms.
Running LTSmin : CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=1, --when, --ltl, <>(<>(X(<>(X((LTLAP0==true)))))), --buchi-type=spotba], workingDir=/home/mcc/execution]
LTSmin run took 39 ms.
FORMULA FMS-PT-200-LTLFireability-00 FALSE TECHNIQUES PARTIAL_ORDER EXPLICIT LTSMIN SAT_SMT
Running LTSmin : CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=1, -p, --pins-guards, --when, --ltl, <>((LTLAP1==true)), --buchi-type=spotba], workingDir=/home/mcc/execution]
LTSmin run took 37 ms.
FORMULA FMS-PT-200-LTLFireability-01 FALSE TECHNIQUES PARTIAL_ORDER EXPLICIT LTSMIN SAT_SMT
Running LTSmin : CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=1, -p, --pins-guards, --when, --ltl, (LTLAP2==true), --buchi-type=spotba], workingDir=/home/mcc/execution]
LTSmin run took 18 ms.
FORMULA FMS-PT-200-LTLFireability-02 TRUE TECHNIQUES PARTIAL_ORDER EXPLICIT LTSMIN SAT_SMT
Running LTSmin : CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=1, --when, --ltl, ((X((LTLAP3==true)))U(X((LTLAP4==true))))U(([]((LTLAP5==true)))U((LTLAP3==true))), --buchi-type=spotba], workingDir=/home/mcc/execution]
LTSmin run took 21 ms.
FORMULA FMS-PT-200-LTLFireability-03 FALSE TECHNIQUES PARTIAL_ORDER EXPLICIT LTSMIN SAT_SMT
Running LTSmin : CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=1, -p, --pins-guards, --when, --ltl, [](([]([]((LTLAP0==true))))U([]((LTLAP6==true)))), --buchi-type=spotba], workingDir=/home/mcc/execution]
LTSmin run took 40 ms.
FORMULA FMS-PT-200-LTLFireability-04 FALSE TECHNIQUES PARTIAL_ORDER EXPLICIT LTSMIN SAT_SMT
Running LTSmin : CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=1, -p, --pins-guards, --when, --ltl, (LTLAP7==true), --buchi-type=spotba], workingDir=/home/mcc/execution]
LTSmin run took 81 ms.
FORMULA FMS-PT-200-LTLFireability-05 FALSE TECHNIQUES PARTIAL_ORDER EXPLICIT LTSMIN SAT_SMT
Running LTSmin : CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=1, -p, --pins-guards, --when, --ltl, ((LTLAP8==true))U([]((LTLAP1==true))), --buchi-type=spotba], workingDir=/home/mcc/execution]
LTSmin run took 29 ms.
FORMULA FMS-PT-200-LTLFireability-06 FALSE TECHNIQUES PARTIAL_ORDER EXPLICIT LTSMIN SAT_SMT
Running LTSmin : CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=1, --when, --ltl, (X((LTLAP9==true)))U((LTLAP2==true)), --buchi-type=spotba], workingDir=/home/mcc/execution]
LTSmin run took 19 ms.
FORMULA FMS-PT-200-LTLFireability-07 TRUE TECHNIQUES PARTIAL_ORDER EXPLICIT LTSMIN SAT_SMT
Running LTSmin : CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=1, --when, --ltl, [](X(X((LTLAP2==true)))), --buchi-type=spotba], workingDir=/home/mcc/execution]
Reverse transition relation is exact ! Faster fixpoint algorithm enabled.
4 unique states visited
4 strongly connected components in search stack
4 transitions explored
4 items max in DFS search stack
21062 ticks for the emptiness check
Model ,|S| ,Time ,Mem(kb) ,fin. SDD ,fin. DDD ,peak SDD ,peak DDD ,SDD Hom ,SDD cache peak ,DDD Hom ,DDD cachepeak ,SHom cache
STATS,0,210.623,1892352,1,0,719393,3.23191e+06,273,1.75238e+06,725,6.19992e+06,423292
an accepting run exists (use option '-e' to print it)
Formula 0 is FALSE accepting run found.
FORMULA FMS-PT-200-LTLFireability-00 FALSE TECHNIQUES DECISION_DIAGRAMS TOPOLOGICAL USE_NUPN
Checking formula 1 : !((F("(i3.u6.P12s>=1)")))
Formula 1 simplified : !F"(i3.u6.P12s>=1)"
WARNING : LTSmin timed out (>225 s) on command CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=1, --when, --ltl, [](X(X((LTLAP2==true)))), --buchi-type=spotba], workingDir=/home/mcc/execution]
Running LTSmin : CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=1, -p, --pins-guards, --when, --ltl, (<>([](<>((LTLAP10==true)))))U((LTLAP2==true)), --buchi-type=spotba], workingDir=/home/mcc/execution]
LTSmin run took 44 ms.
FORMULA FMS-PT-200-LTLFireability-09 TRUE TECHNIQUES PARTIAL_ORDER EXPLICIT LTSMIN SAT_SMT
Running LTSmin : CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=1, --when, --ltl, <>([](X([](X((LTLAP8==true)))))), --buchi-type=spotba], workingDir=/home/mcc/execution]
LTSmin run took 127 ms.
FORMULA FMS-PT-200-LTLFireability-10 FALSE TECHNIQUES PARTIAL_ORDER EXPLICIT LTSMIN SAT_SMT
Running LTSmin : CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=1, --when, --ltl, X([]([](X([]((LTLAP11==true)))))), --buchi-type=spotba], workingDir=/home/mcc/execution]
LTSmin run took 37 ms.
FORMULA FMS-PT-200-LTLFireability-11 FALSE TECHNIQUES PARTIAL_ORDER EXPLICIT LTSMIN SAT_SMT
Running LTSmin : CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=1, --when, --ltl, (X((LTLAP12==true)))U(X(X(<>((LTLAP5==true))))), --buchi-type=spotba], workingDir=/home/mcc/execution]
LTSmin run took 45 ms.
FORMULA FMS-PT-200-LTLFireability-12 FALSE TECHNIQUES PARTIAL_ORDER EXPLICIT LTSMIN SAT_SMT
Running LTSmin : CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=1, -p, --pins-guards, --when, --ltl, ([](((LTLAP13==true))U((LTLAP1==true))))U([]((LTLAP10==true))), --buchi-type=spotba], workingDir=/home/mcc/execution]
LTSmin run took 55 ms.
FORMULA FMS-PT-200-LTLFireability-13 FALSE TECHNIQUES PARTIAL_ORDER EXPLICIT LTSMIN SAT_SMT
Running LTSmin : CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=1, -p, --pins-guards, --when, --ltl, (LTLAP12==true), --buchi-type=spotba], workingDir=/home/mcc/execution]
LTSmin run took 52 ms.
FORMULA FMS-PT-200-LTLFireability-14 FALSE TECHNIQUES PARTIAL_ORDER EXPLICIT LTSMIN SAT_SMT
Running LTSmin : CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=1, --when, --ltl, ((LTLAP0==true))U(X(X(X((LTLAP7==true))))), --buchi-type=spotba], workingDir=/home/mcc/execution]
LTSmin run took 40 ms.
FORMULA FMS-PT-200-LTLFireability-15 FALSE TECHNIQUES PARTIAL_ORDER EXPLICIT LTSMIN SAT_SMT
Retrying LTSmin with larger timeout 1800 s
Running LTSmin : CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=1, --when, --ltl, [](X(X((LTLAP2==true)))), --buchi-type=spotba], workingDir=/home/mcc/execution]
2 unique states visited
2 strongly connected components in search stack
2 transitions explored
2 items max in DFS search stack
22184 ticks for the emptiness check
Model ,|S| ,Time ,Mem(kb) ,fin. SDD ,fin. DDD ,peak SDD ,peak DDD ,SDD Hom ,SDD cache peak ,DDD Hom ,DDD cachepeak ,SHom cache
STATS,0,432.47,5697284,1,0,1.1656e+06,3.23212e+06,230,4.47604e+07,686,2.01935e+07,23777
an accepting run exists (use option '-e' to print it)
Formula 1 is FALSE accepting run found.
FORMULA FMS-PT-200-LTLFireability-01 FALSE TECHNIQUES DECISION_DIAGRAMS TOPOLOGICAL USE_NUPN
Checking formula 2 : !(("(i1.u4.P2>=1)"))
Formula 2 simplified : !"(i1.u4.P2>=1)"
1 unique states visited
0 strongly connected components in search stack
0 transitions explored
1 items max in DFS search stack
9841 ticks for the emptiness check
Model ,|S| ,Time ,Mem(kb) ,fin. SDD ,fin. DDD ,peak SDD ,peak DDD ,SDD Hom ,SDD cache peak ,DDD Hom ,DDD cachepeak ,SHom cache
STATS,0,530.887,5697284,1,0,1.1656e+06,3.23212e+06,255,4.47604e+07,692,2.01935e+07,40274
no accepting run found
Formula 2 is TRUE no accepting run found.
FORMULA FMS-PT-200-LTLFireability-02 TRUE TECHNIQUES DECISION_DIAGRAMS TOPOLOGICAL USE_NUPN
Checking formula 3 : !((((X("(i0.u3.P1M1>=1)"))U(X("(i3.u6.P12M3>=1)")))U((G("(u7.P3s>=1)"))U("(i0.u3.P1M1>=1)"))))
Formula 3 simplified : !((X"(i0.u3.P1M1>=1)" U X"(i3.u6.P12M3>=1)") U (G"(u7.P3s>=1)" U "(i0.u3.P1M1>=1)"))
4 unique states visited
4 strongly connected components in search stack
4 transitions explored
4 items max in DFS search stack
10344 ticks for the emptiness check
Model ,|S| ,Time ,Mem(kb) ,fin. SDD ,fin. DDD ,peak SDD ,peak DDD ,SDD Hom ,SDD cache peak ,DDD Hom ,DDD cachepeak ,SHom cache
STATS,0,634.337,5699448,1,0,1.1656e+06,3.23212e+06,330,4.47604e+07,695,2.01935e+07,427774
an accepting run exists (use option '-e' to print it)
Formula 3 is FALSE accepting run found.
FORMULA FMS-PT-200-LTLFireability-03 FALSE TECHNIQUES DECISION_DIAGRAMS TOPOLOGICAL USE_NUPN
Checking formula 4 : !((G((G(G("((i3.u1.P12wM3>=1)&&(i3.u6.M3>=1))")))U(G("((i1.u8.P2wP1>=1)&&(i0.u0.P1wP2>=1))")))))
Formula 4 simplified : !G(G"((i3.u1.P12wM3>=1)&&(i3.u6.M3>=1))" U G"((i1.u8.P2wP1>=1)&&(i0.u0.P1wP2>=1))")
3 unique states visited
3 strongly connected components in search stack
3 transitions explored
3 items max in DFS search stack
1 ticks for the emptiness check
Model ,|S| ,Time ,Mem(kb) ,fin. SDD ,fin. DDD ,peak SDD ,peak DDD ,SDD Hom ,SDD cache peak ,DDD Hom ,DDD cachepeak ,SHom cache
STATS,0,634.34,5699448,1,0,1.1656e+06,3.23212e+06,379,4.47604e+07,695,2.01935e+07,427823
an accepting run exists (use option '-e' to print it)
Formula 4 is FALSE accepting run found.
FORMULA FMS-PT-200-LTLFireability-04 FALSE TECHNIQUES DECISION_DIAGRAMS TOPOLOGICAL USE_NUPN
Checking formula 5 : !(("(i0.u0.P1s>=1)"))
Formula 5 simplified : !"(i0.u0.P1s>=1)"
3 unique states visited
3 strongly connected components in search stack
3 transitions explored
3 items max in DFS search stack
0 ticks for the emptiness check
Model ,|S| ,Time ,Mem(kb) ,fin. SDD ,fin. DDD ,peak SDD ,peak DDD ,SDD Hom ,SDD cache peak ,DDD Hom ,DDD cachepeak ,SHom cache
STATS,0,634.34,5699448,1,0,1.1656e+06,3.23212e+06,384,4.47604e+07,696,2.01935e+07,427832
an accepting run exists (use option '-e' to print it)
Formula 5 is FALSE accepting run found.
FORMULA FMS-PT-200-LTLFireability-05 FALSE TECHNIQUES DECISION_DIAGRAMS TOPOLOGICAL USE_NUPN
Checking formula 6 : !((("(i0.u0.P1d>=1)")U(G("(i3.u6.P12s>=1)"))))
Formula 6 simplified : !("(i0.u0.P1d>=1)" U G"(i3.u6.P12s>=1)")
3 unique states visited
3 strongly connected components in search stack
3 transitions explored
3 items max in DFS search stack
0 ticks for the emptiness check
Model ,|S| ,Time ,Mem(kb) ,fin. SDD ,fin. DDD ,peak SDD ,peak DDD ,SDD Hom ,SDD cache peak ,DDD Hom ,DDD cachepeak ,SHom cache
STATS,0,634.341,5699448,1,0,1.1656e+06,3.23212e+06,415,4.47604e+07,696,2.01935e+07,427866
an accepting run exists (use option '-e' to print it)
Formula 6 is FALSE accepting run found.
FORMULA FMS-PT-200-LTLFireability-06 FALSE TECHNIQUES DECISION_DIAGRAMS TOPOLOGICAL USE_NUPN
Checking formula 7 : !(((X("(i1.u8.P2d>=1)"))U("(i1.u4.P2>=1)")))
Formula 7 simplified : !(X"(i1.u8.P2d>=1)" U "(i1.u4.P2>=1)")
1 unique states visited
0 strongly connected components in search stack
0 transitions explored
1 items max in DFS search stack
0 ticks for the emptiness check
Model ,|S| ,Time ,Mem(kb) ,fin. SDD ,fin. DDD ,peak SDD ,peak DDD ,SDD Hom ,SDD cache peak ,DDD Hom ,DDD cachepeak ,SHom cache
STATS,0,634.341,5699448,1,0,1.1656e+06,3.23212e+06,415,4.47604e+07,696,2.01935e+07,427866
no accepting run found
Formula 7 is TRUE no accepting run found.
FORMULA FMS-PT-200-LTLFireability-07 TRUE TECHNIQUES DECISION_DIAGRAMS TOPOLOGICAL USE_NUPN
Checking formula 8 : !((G(X(X("(i1.u4.P2>=1)")))))
Formula 8 simplified : !GXX"(i1.u4.P2>=1)"
WARNING : LTS min runner thread failed on error :java.lang.RuntimeException: Unexpected exception when executing ltsmin :CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=1, --when, --ltl, [](X(X((LTLAP2==true)))), --buchi-type=spotba], workingDir=/home/mcc/execution]
255

BK_TIME_CONFINEMENT_REACHED

--------------------
content from stderr:

+ export BINDIR=/home/mcc/BenchKit/
+ BINDIR=/home/mcc/BenchKit/
++ pwd
+ export MODEL=/home/mcc/execution
+ MODEL=/home/mcc/execution
+ /home/mcc/BenchKit//runeclipse.sh /home/mcc/execution LTLFireability -its -ltsminpath /home/mcc/BenchKit//lts_install_dir/ -louvain -smt
+ ulimit -s 65536
+ [[ -z '' ]]
+ export LTSMIN_MEM_SIZE=8589934592
+ LTSMIN_MEM_SIZE=8589934592
+ /home/mcc/BenchKit//itstools/its-tools -consoleLog -data /home/mcc/execution/workspace -pnfolder /home/mcc/execution -examination LTLFireability -z3path /home/mcc/BenchKit//z3/bin/z3 -yices2path /home/mcc/BenchKit//yices/bin/yices -its -ltsminpath /home/mcc/BenchKit//lts_install_dir/ -louvain -smt -vmargs -Dosgi.locking=none -Declipse.stateSaveDelayInterval=-1 -Dosgi.configuration.area=/tmp/.eclipse -Xss8m -Xms40m -Xmx8192m -Dfile.encoding=UTF-8 -Dosgi.requiredJavaVersion=1.6
Jun 02, 2018 11:12:51 PM fr.lip6.move.gal.application.Application start
INFO: Running its-tools with arguments : [-pnfolder, /home/mcc/execution, -examination, LTLFireability, -z3path, /home/mcc/BenchKit//z3/bin/z3, -yices2path, /home/mcc/BenchKit//yices/bin/yices, -its, -ltsminpath, /home/mcc/BenchKit//lts_install_dir/, -louvain, -smt]
Jun 02, 2018 11:12:51 PM fr.lip6.move.gal.application.MccTranslator transformPNML
INFO: Parsing pnml file : /home/mcc/execution/model.pnml
Jun 02, 2018 11:12:51 PM fr.lip6.move.gal.nupn.PTNetReader loadFromXML
INFO: Load time of PNML (sax parser for PT used): 35 ms
Jun 02, 2018 11:12:51 PM fr.lip6.move.gal.pnml.togal.PTGALTransformer handlePage
INFO: Transformed 22 places.
Jun 02, 2018 11:12:51 PM fr.lip6.move.gal.pnml.togal.PTGALTransformer handlePage
INFO: Transformed 20 transitions.
Jun 02, 2018 11:12:51 PM fr.lip6.move.serialization.SerializationUtil systemToFile
INFO: Time to serialize gal into /home/mcc/execution/model.pnml.img.gal : 5 ms
Jun 02, 2018 11:12:51 PM fr.lip6.move.gal.application.MccTranslator applyOrder
INFO: Applying decomposition
Jun 02, 2018 11:12:51 PM fr.lip6.move.gal.instantiate.GALRewriter flatten
INFO: Flatten gal took : 16 ms
Jun 02, 2018 11:12:51 PM fr.lip6.move.gal.instantiate.GALRewriter flatten
INFO: Flatten gal took : 5 ms
Begin: Sat Jun 2 23:12:52 2018

Computation of communities with the Newman-Girvan Modularity quality function

level 0:
start computation: Sat Jun 2 23:12:52 2018
network size: 22 nodes, 52 links, 40 weight
quality increased from -0.048125 to 0.5325
end computation: Sat Jun 2 23:12:52 2018
level 1:
start computation: Sat Jun 2 23:12:52 2018
network size: 9 nodes, 33 links, 40 weight
quality increased from 0.5325 to 0.596563
end computation: Sat Jun 2 23:12:52 2018
level 2:
start computation: Sat Jun 2 23:12:52 2018
network size: 4 nodes, 10 links, 40 weight
quality increased from 0.596563 to 0.596563
end computation: Sat Jun 2 23:12:52 2018
End: Sat Jun 2 23:12:52 2018
Total duration: 0 sec
0.596563
Jun 02, 2018 11:12:52 PM fr.lip6.move.gal.instantiate.CompositeBuilder decomposeWithOrder
INFO: Decomposing Gal with order
Jun 02, 2018 11:12:52 PM fr.lip6.move.gal.instantiate.GALRewriter flatten
INFO: Flatten gal took : 4 ms
Jun 02, 2018 11:12:52 PM fr.lip6.move.gal.instantiate.CompositeBuilder rewriteArraysToAllowPartition
INFO: Rewriting arrays to variables to allow decomposition.
Jun 02, 2018 11:12:52 PM fr.lip6.move.gal.instantiate.Instantiator fuseIsomorphicEffects
INFO: Removed a total of 1 redundant transitions.
Jun 02, 2018 11:12:52 PM fr.lip6.move.serialization.SerializationUtil systemToFile
INFO: Time to serialize gal into /home/mcc/execution/LTLFireability.pnml.gal : 1 ms
Jun 02, 2018 11:12:52 PM fr.lip6.move.serialization.SerializationUtil serializePropertiesForITSLTLTools
INFO: Time to serialize properties into /home/mcc/execution/LTLFireability.ltl : 0 ms
Jun 02, 2018 11:12:52 PM fr.lip6.move.gal.semantics.DeterministicNextBuilder getDeterministicNext
INFO: Input system was already deterministic with 20 transitions.
Jun 02, 2018 11:12:52 PM fr.lip6.move.gal.gal2smt.bmc.KInductionSolver computeAndDeclareInvariants
INFO: Computed 6 place invariants in 4 ms
Jun 02, 2018 11:12:52 PM fr.lip6.move.gal.gal2smt.bmc.KInductionSolver init
INFO: Proved 22 variables to be positive in 52 ms
Jun 02, 2018 11:12:52 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver computeAblingMatrix
INFO: Computing symmetric may disable matrix : 20 transitions.
Jun 02, 2018 11:12:52 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of disable matrix completed :0/20 took 0 ms. Total solver calls (SAT/UNSAT): 0(0/0)
Jun 02, 2018 11:12:52 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of Complete disable matrix. took 1 ms. Total solver calls (SAT/UNSAT): 0(0/0)
Jun 02, 2018 11:12:52 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver computeAblingMatrix
INFO: Computing symmetric may enable matrix : 20 transitions.
Jun 02, 2018 11:12:52 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of Complete enable matrix. took 0 ms. Total solver calls (SAT/UNSAT): 0(0/0)
Jun 02, 2018 11:12:52 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver computeCoEnablingMatrix
INFO: Computing symmetric co enabling matrix : 20 transitions.
Jun 02, 2018 11:12:52 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of Finished co-enabling matrix. took 240 ms. Total solver calls (SAT/UNSAT): 82(80/2)
Jun 02, 2018 11:12:52 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver computeDoNotAccord
INFO: Computing Do-Not-Accords matrix : 20 transitions.
Jun 02, 2018 11:12:52 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of Completed DNA matrix. took 77 ms. Total solver calls (SAT/UNSAT): 24(0/24)
Jun 02, 2018 11:12:52 PM fr.lip6.move.gal.gal2pins.Gal2PinsTransformerNext transform
INFO: Built C files in 806ms conformant to PINS in folder :/home/mcc/execution
pins2lts-mc, 0.000: Registering PINS so language module
pins2lts-mc, 0.000: Loading model from ./gal.so
pins2lts-mc, 0.000: library has no initializer
pins2lts-mc, 0.000: loading model GAL
pins2lts-mc, 0.000: completed loading model GAL
pins2lts-mc, 0.000: LTL layer: formula: [](X(X((LTLAP2==true))))
pins2lts-mc, 0.000: "[](X(X((LTLAP2==true))))" is not a file, parsing as formula...
pins2lts-mc, 0.000: Using Spin LTL semantics
pins2lts-mc, 0.007: buchi has 4 states
pins2lts-mc, 0.007: Weak Buchi automaton detected, adding non-accepting as progress label.
pins2lts-mc, 0.008: DFS-FIFO for weak LTL, using special progress label 35
pins2lts-mc, 0.008: There are 36 state labels and 1 edge labels
pins2lts-mc, 0.008: State length is 23, there are 25 groups
pins2lts-mc, 0.008: Running dfsfifo using 1 core (sequential)
pins2lts-mc, 0.008: Using a tree table with 2^27 elements
pins2lts-mc, 0.008: Successor permutation: rr
pins2lts-mc, 0.008: Global bits: 2, count bits: 0, local bits: 0
pins2lts-mc, 0.019: 1 levels 1000 states 5759 transitions
pins2lts-mc, 0.027: 1 levels 2000 states 12005 transitions
pins2lts-mc, 0.044: 1 levels 4000 states 25012 transitions
pins2lts-mc, 0.079: 1 levels 8000 states 52116 transitions
pins2lts-mc, 0.144: 1 levels 16000 states 108436 transitions
pins2lts-mc, 0.272: 1 levels 32000 states 224355 transitions
pins2lts-mc, 0.505: 1 levels 64000 states 463132 transitions
pins2lts-mc, 0.940: 1 levels 128000 states 960776 transitions
pins2lts-mc, 1.690: 1 levels 256000 states 1984591 transitions
pins2lts-mc, 3.008: 1 levels 512000 states 4089613 transitions
pins2lts-mc, 5.554: 1 levels 1024000 states 8404324 transitions
pins2lts-mc, 10.868: 1 levels 2048000 states 17275213 transitions
pins2lts-mc, 21.679: 1 levels 4096000 states 35545910 transitions
pins2lts-mc, 43.313: 1 levels 8192000 states 72946004 transitions
pins2lts-mc, 88.367: 1 levels 16384000 states 149575918 transitions
pins2lts-mc, 180.876: 1 levels 32768000 states 307047428 transitions
pins2lts-mc, 374.132: 1 levels 65536000 states 628445131 transitions
pins2lts-mc, 721.235: Error: tree roots table full! Change -s/--ratio.
pins2lts-mc, 721.239:
pins2lts-mc, 721.239:
pins2lts-mc, 721.240: Explored 108183917 states 1055603707 transitions, fanout: 9.757
pins2lts-mc, 721.240: Total exploration time 721.230 sec (721.230 sec minimum, 721.230 sec on average)
pins2lts-mc, 721.240: States per second: 149999, Transitions per second: 1463616
pins2lts-mc, 721.240:
pins2lts-mc, 721.240: Progress states detected: 134217361
pins2lts-mc, 721.240: Redundant explorations: -19.3965
pins2lts-mc, 721.240:
pins2lts-mc, 721.240: Queue width: 8B, total height: 49642814, memory: 378.74MB
pins2lts-mc, 721.240: Tree memory: 1031.0MB, 8.1 B/state, compr.: 8.6%
pins2lts-mc, 721.240: Tree fill ratio (roots/leafs): 99.0%/2.0%
pins2lts-mc, 721.240: Stored 20 string chucks using 0MB
pins2lts-mc, 721.240: Total memory used for chunk indexing: 0MB
pins2lts-mc, 721.240: Est. total memory use: 1409.7MB (~1402.7MB paged-in)
java.lang.RuntimeException: Unexpected exception when executing ltsmin :CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=1, --when, --ltl, [](X(X((LTLAP2==true)))), --buchi-type=spotba], workingDir=/home/mcc/execution]
255
at fr.lip6.move.gal.application.LTSminRunner.checkProperty(LTSminRunner.java:167)
at fr.lip6.move.gal.application.LTSminRunner.access$9(LTSminRunner.java:122)
at fr.lip6.move.gal.application.LTSminRunner$1.run(LTSminRunner.java:98)
at java.lang.Thread.run(Thread.java:748)

Sequence of Actions to be Executed by the VM

This is useful if one wants to reexecute the tool in the VM from the submitted image disk.

set -x
# this is for BenchKit: configuration of major elements for the test
export BK_INPUT="FMS-PT-200"
export BK_EXAMINATION="LTLFireability"
export BK_TOOL="itstoolsl"
export BK_RESULT_DIR="/tmp/BK_RESULTS/OUTPUTS"
export BK_TIME_CONFINEMENT="3600"
export BK_MEMORY_CONFINEMENT="16384"

# this is specific to your benchmark or test

export BIN_DIR="$HOME/BenchKit/bin"

# remove the execution directoty if it exists (to avoid increse of .vmdk images)
if [ -d execution ] ; then
rm -rf execution
fi

tar xzf /home/mcc/BenchKit/INPUTS/FMS-PT-200.tgz
mv FMS-PT-200 execution
cd execution
pwd
ls -lh

# this is for BenchKit: explicit launching of the test
echo "====================================================================="
echo " Generated by BenchKit 2-3637"
echo " Executing tool itstoolsl"
echo " Input is FMS-PT-200, examination is LTLFireability"
echo " Time confinement is $BK_TIME_CONFINEMENT seconds"
echo " Memory confinement is 16384 MBytes"
echo " Number of cores is 4"
echo " Run identifier is r249-blw7-152732550500026"
echo "====================================================================="
echo
echo "--------------------"
echo "content from stdout:"
echo
echo "=== Data for post analysis generated by BenchKit (invocation template)"
echo
if [ "LTLFireability" = "UpperBounds" ] ; then
echo "The expected result is a vector of positive values"
echo NUM_VECTOR
elif [ "LTLFireability" != "StateSpace" ] ; then
echo "The expected result is a vector of booleans"
echo BOOL_VECTOR
else
echo "no data necessary for post analysis"
fi
echo
if [ -f "LTLFireability.txt" ] ; then
echo "here is the order used to build the result vector(from text file)"
for x in $(grep Property LTLFireability.txt | cut -d ' ' -f 2 | sort -u) ; do
echo "FORMULA_NAME $x"
done
elif [ -f "LTLFireability.xml" ] ; then # for cunf (txt files deleted;-)
echo echo "here is the order used to build the result vector(from xml file)"
for x in $(grep '' LTLFireability.xml | cut -d '>' -f 2 | cut -d '<' -f 1 | sort -u) ; do
echo "FORMULA_NAME $x"
done
fi
echo
echo "=== Now, execution of the tool begins"
echo
echo -n "BK_START "
date -u +%s%3N
echo
timeout -s 9 $BK_TIME_CONFINEMENT bash -c "/home/mcc/BenchKit/BenchKit_head.sh 2> STDERR ; echo ; echo -n \"BK_STOP \" ; date -u +%s%3N"
if [ $? -eq 137 ] ; then
echo
echo "BK_TIME_CONFINEMENT_REACHED"
fi
echo
echo "--------------------"
echo "content from stderr:"
echo
cat STDERR ;