Execution Chart

We display below the execution chart for this examination (boot time has been removed).

Trace from the execution

Waiting for the VM to be ready (probing ssh)
............................................................................
/home/mcc/execution
total 304K
-rw-r--r-- 1 mcc users 3.7K May 15 18:54 CTLCardinality.txt
-rw-r--r-- 1 mcc users 21K May 15 18:54 CTLCardinality.xml
-rw-r--r-- 1 mcc users 2.5K May 15 18:54 CTLFireability.txt
-rw-r--r-- 1 mcc users 16K May 15 18:54 CTLFireability.xml
-rw-r--r-- 1 mcc users 4.0K May 15 18:50 GenericPropertiesDefinition.xml
-rw-r--r-- 1 mcc users 6.1K May 15 18:50 GenericPropertiesVerdict.xml
-rw-r--r-- 1 mcc users 2.3K May 26 09:26 LTLCardinality.txt
-rw-r--r-- 1 mcc users 8.5K May 26 09:26 LTLCardinality.xml
-rw-r--r-- 1 mcc users 2.0K May 26 09:26 LTLFireability.txt
-rw-r--r-- 1 mcc users 9.4K May 26 09:26 LTLFireability.xml
-rw-r--r-- 1 mcc users 3.3K May 15 18:54 ReachabilityCardinality.txt
-rw-r--r-- 1 mcc users 16K May 15 18:54 ReachabilityCardinality.xml
-rw-r--r-- 1 mcc users 113 May 15 18:54 ReachabilityDeadlock.txt
-rw-r--r-- 1 mcc users 351 May 15 18:54 ReachabilityDeadlock.xml
-rw-r--r-- 1 mcc users 2.5K May 15 18:54 ReachabilityFireability.txt
-rw-r--r-- 1 mcc users 14K May 15 18:54 ReachabilityFireability.xml
-rw-r--r-- 1 mcc users 1.7K May 15 18:54 UpperBounds.txt
-rw-r--r-- 1 mcc users 3.7K May 15 18:54 UpperBounds.xml
-rw-r--r-- 1 mcc users 6 May 15 18:50 equiv_col
-rw-r--r-- 1 mcc users 4 May 15 18:50 instance
-rw-r--r-- 1 mcc users 6 May 15 18:50 iscolored
-rw-r--r-- 1 mcc users 141K May 15 18:50 model.pnml
=====================================================================
Generated by BenchKit 2-3637
Executing tool itstools
Input is FlexibleBarrier-PT-06b, examination is LTLFireability
Time confinement is 3600 seconds
Memory confinement is 16384 MBytes
Number of cores is 4
Run identifier is r248-blw7-152732549700036
=====================================================================

--------------------
content from stdout:

=== Data for post analysis generated by BenchKit (invocation template)

The expected result is a vector of booleans
BOOL_VECTOR

here is the order used to build the result vector(from text file)
FORMULA_NAME FlexibleBarrier-PT-06b-LTLFireability-00
FORMULA_NAME FlexibleBarrier-PT-06b-LTLFireability-01
FORMULA_NAME FlexibleBarrier-PT-06b-LTLFireability-02
FORMULA_NAME FlexibleBarrier-PT-06b-LTLFireability-03
FORMULA_NAME FlexibleBarrier-PT-06b-LTLFireability-04
FORMULA_NAME FlexibleBarrier-PT-06b-LTLFireability-05
FORMULA_NAME FlexibleBarrier-PT-06b-LTLFireability-06
FORMULA_NAME FlexibleBarrier-PT-06b-LTLFireability-07
FORMULA_NAME FlexibleBarrier-PT-06b-LTLFireability-08
FORMULA_NAME FlexibleBarrier-PT-06b-LTLFireability-09
FORMULA_NAME FlexibleBarrier-PT-06b-LTLFireability-10
FORMULA_NAME FlexibleBarrier-PT-06b-LTLFireability-11
FORMULA_NAME FlexibleBarrier-PT-06b-LTLFireability-12
FORMULA_NAME FlexibleBarrier-PT-06b-LTLFireability-13
FORMULA_NAME FlexibleBarrier-PT-06b-LTLFireability-14
FORMULA_NAME FlexibleBarrier-PT-06b-LTLFireability-15

=== Now, execution of the tool begins

BK_START 1527960552993

Using solver Z3 to compute partial order matrices.
Built C files in :
/home/mcc/execution
Invoking ITS tools like this :CommandLine [args=[/home/mcc/BenchKit/itstools/plugins/fr.lip6.move.gal.itstools.binaries_1.0.0.201805151631/bin/its-ltl-linux64, --gc-threshold, 2000000, -i, /home/mcc/execution/LTLFireability.pnml.gal, -t, CGAL, -LTL, /home/mcc/execution/LTLFireability.ltl, -c, -stutter-deadlock], workingDir=/home/mcc/execution]

its-ltl command run as :

/home/mcc/BenchKit/itstools/plugins/fr.lip6.move.gal.itstools.binaries_1.0.0.201805151631/bin/its-ltl-linux64 --gc-threshold 2000000 -i /home/mcc/execution/LTLFireability.pnml.gal -t CGAL -LTL /home/mcc/execution/LTLFireability.ltl -c -stutter-deadlock
Read 16 LTL properties
Checking formula 0 : !(((("(u13.p515>=1)")U(G("(u11.p392>=1)")))U(F(X(F("(u13.p514>=1)"))))))
Formula 0 simplified : !(("(u13.p515>=1)" U G"(u11.p392>=1)") U FXF"(u13.p514>=1)")
built 34 ordering constraints for composite.
Presburger conditions satisfied. Using coverability to approximate state space in K-Induction.
// Phase 1: matrix 621 rows 542 cols
invariant :u11:p346 + u11:p347 + u11:p348 + u11:p349 + u11:p350 + u11:p351 + u11:p352 + u11:p353 + u11:p354 + u11:p355 + u11:p356 + u11:p357 + u11:p358 + u11:p359 + u11:p360 + u11:p361 + u11:p362 + u11:p363 + u11:p364 + u11:p365 + u11:p366 + u11:p367 + u11:p368 + u11:p369 + u11:p370 + u11:p371 + u11:p372 + u11:p373 + u11:p374 + u11:p375 + u11:p376 + u11:p377 + u11:p378 + u11:p379 + u11:p380 + u11:p381 + u11:p382 + u11:p383 + u11:p384 + u11:p385 + u11:p386 + u11:p387 + u11:p388 + u11:p389 + u11:p390 + u11:p391 + u11:p392 + u11:p393 + u11:p394 + u11:p395 + u11:p396 + u18:p1 + u17:p0 = 1
invariant :u9:p210 + u9:p211 + u9:p212 + u9:p213 + u9:p214 + u9:p215 + u9:p216 + u9:p217 + u9:p218 + u9:p219 + u9:p220 + u9:p221 + u9:p222 + u9:p223 + u9:p224 + u9:p225 + u9:p226 + u9:p227 + u9:p228 + u9:p229 + u9:p230 + u9:p231 + u9:p232 + u9:p233 + u9:p234 + u9:p235 + u9:p236 + u9:p237 + u9:p238 + u9:p239 + u9:p240 + u9:p241 + u9:p242 + u9:p243 + u9:p244 + u9:p245 + u9:p246 + u9:p247 + u9:p248 + u9:p249 + u9:p250 + u9:p251 + u9:p252 + u9:p253 + u9:p254 + u9:p255 + u9:p256 + u9:p257 + u9:p258 + u9:p259 + u9:p260 + u9:p261 + u9:p262 + u9:p263 + u9:p264 + u9:p265 + u9:p266 + u9:p267 + u9:p268 + u9:p269 + u9:p270 + u9:p271 + u9:p272 + u9:p273 + u9:p274 + u9:p275 + u9:p276 + u9:p277 + u20:p3 + u19:p2 + u18:p1 + u17:p0 = 1
invariant :u14:p530 + u14:p531 + u14:p532 + u14:p533 + u14:p534 + u14:p535 + u14:p536 + u14:p537 + u14:p538 + u14:p539 + u14:p540 + u14:p541 + u16:p397 + u17:p0 = 1
invariant :u10:p278 + u10:p279 + u10:p280 + u10:p281 + u10:p282 + u10:p283 + u10:p284 + u10:p285 + u10:p286 + u10:p287 + u10:p288 + u10:p289 + u10:p290 + u10:p291 + u10:p292 + u10:p293 + u10:p294 + u10:p295 + u10:p296 + u10:p297 + u10:p298 + u10:p299 + u10:p300 + u10:p301 + u10:p302 + u10:p303 + u10:p304 + u10:p305 + u10:p306 + u10:p307 + u10:p308 + u10:p309 + u10:p310 + u10:p311 + u10:p312 + u10:p313 + u10:p314 + u10:p315 + u10:p316 + u10:p317 + u10:p318 + u10:p319 + u10:p320 + u10:p321 + u10:p322 + u10:p323 + u10:p324 + u10:p325 + u10:p326 + u10:p327 + u10:p328 + u10:p329 + u10:p330 + u10:p331 + u10:p332 + u10:p333 + u10:p334 + u10:p335 + u10:p336 + u10:p337 + u10:p338 + u10:p339 + u10:p340 + u10:p341 + u10:p342 + u10:p343 + u10:p344 + u10:p345 + u19:p2 + u18:p1 + u17:p0 = 1
invariant :u7:p74 + u7:p75 + u7:p76 + u7:p77 + u7:p78 + u7:p79 + u7:p80 + u7:p81 + u7:p82 + u7:p83 + u7:p84 + u7:p85 + u7:p86 + u7:p87 + u7:p88 + u7:p89 + u7:p90 + u7:p91 + u7:p92 + u7:p93 + u7:p94 + u7:p95 + u7:p96 + u7:p97 + u7:p98 + u7:p99 + u7:p100 + u7:p101 + u7:p102 + u7:p103 + u7:p104 + u7:p105 + u7:p106 + u7:p107 + u7:p108 + u7:p109 + u7:p110 + u7:p111 + u7:p112 + u7:p113 + u7:p114 + u7:p115 + u7:p116 + u7:p117 + u7:p118 + u7:p119 + u7:p120 + u7:p121 + u7:p122 + u7:p123 + u7:p124 + u7:p125 + u7:p126 + u7:p127 + u7:p128 + u7:p129 + u7:p130 + u7:p131 + u7:p132 + u7:p133 + u7:p134 + u7:p135 + u7:p136 + u7:p137 + u7:p138 + u7:p139 + u7:p140 + u7:p141 + u15:p5 + u21:p4 + u20:p3 + u19:p2 + u18:p1 + u17:p0 = 1
invariant :u13:p398 + u13:p399 + u13:p400 + u13:p401 + u13:p402 + u13:p403 + u13:p404 + u13:p405 + u13:p406 + u13:p407 + u13:p408 + u13:p409 + u13:p410 + u13:p411 + u13:p412 + u13:p413 + u13:p414 + u13:p415 + u13:p416 + u13:p417 + u13:p418 + u13:p419 + u13:p420 + u13:p421 + u13:p422 + u13:p423 + u13:p424 + u13:p425 + u13:p426 + u13:p427 + u13:p428 + u13:p429 + u13:p430 + u13:p431 + u13:p432 + u13:p433 + u13:p434 + u13:p435 + u13:p436 + u13:p437 + u13:p438 + u13:p439 + u13:p440 + u13:p441 + u13:p442 + u13:p443 + u13:p444 + u13:p445 + u13:p446 + u13:p447 + u13:p448 + u13:p449 + u13:p450 + u13:p451 + u13:p452 + u13:p453 + u13:p454 + u13:p455 + u13:p456 + u13:p457 + u13:p458 + u13:p459 + u13:p460 + u13:p461 + u13:p462 + u13:p463 + u13:p464 + u13:p465 + u13:p466 + u13:p467 + u13:p468 + u13:p469 + u13:p470 + u13:p471 + u13:p472 + u13:p473 + u13:p474 + u13:p475 + u13:p476 + u13:p477 + u13:p478 + u13:p479 + u13:p480 + u13:p481 + u13:p482 + u13:p483 + u13:p484 + u13:p485 + u13:p486 + u13:p487 + u13:p488 + u13:p489 + u13:p490 + u13:p491 + u13:p492 + u13:p493 + u13:p494 + u13:p495 + u13:p496 + u13:p497 + u13:p498 + u13:p499 + u13:p500 + u13:p501 + u13:p502 + u13:p503 + u13:p504 + u13:p505 + u13:p506 + u13:p507 + u13:p508 + u13:p509 + u13:p510 + u13:p511 + u13:p512 + u13:p513 + u13:p514 + u13:p515 + u13:p516 + u13:p517 + u13:p518 + u13:p519 + u13:p520 + u13:p521 + u13:p522 + u13:p523 + u13:p524 + u13:p525 + u13:p526 + u13:p527 + u13:p528 + u13:p529 + u16:p397 + u17:p0 = 1
invariant :u8:p142 + u8:p143 + u8:p144 + u8:p145 + u8:p146 + u8:p147 + u8:p148 + u8:p149 + u8:p150 + u8:p151 + u8:p152 + u8:p153 + u8:p154 + u8:p155 + u8:p156 + u8:p157 + u8:p158 + u8:p159 + u8:p160 + u8:p161 + u8:p162 + u8:p163 + u8:p164 + u8:p165 + u8:p166 + u8:p167 + u8:p168 + u8:p169 + u8:p170 + u8:p171 + u8:p172 + u8:p173 + u8:p174 + u8:p175 + u8:p176 + u8:p177 + u8:p178 + u8:p179 + u8:p180 + u8:p181 + u8:p182 + u8:p183 + u8:p184 + u8:p185 + u8:p186 + u8:p187 + u8:p188 + u8:p189 + u8:p190 + u8:p191 + u8:p192 + u8:p193 + u8:p194 + u8:p195 + u8:p196 + u8:p197 + u8:p198 + u8:p199 + u8:p200 + u8:p201 + u8:p202 + u8:p203 + u8:p204 + u8:p205 + u8:p206 + u8:p207 + u8:p208 + u8:p209 + u21:p4 + u20:p3 + u19:p2 + u18:p1 + u17:p0 = 1
invariant :u6:p6 + u6:p7 + u6:p8 + u6:p9 + u6:p10 + u6:p11 + u6:p12 + u6:p13 + u6:p14 + u6:p15 + u6:p16 + u6:p17 + u6:p18 + u6:p19 + u6:p20 + u6:p21 + u6:p22 + u6:p23 + u6:p24 + u6:p25 + u6:p26 + u6:p27 + u6:p28 + u6:p29 + u6:p30 + u6:p31 + u6:p32 + u6:p33 + u6:p34 + u6:p35 + u6:p36 + u6:p37 + u6:p38 + u6:p39 + u6:p40 + u6:p41 + u6:p42 + u6:p43 + u6:p44 + u6:p45 + u6:p46 + u6:p47 + u6:p48 + u6:p49 + u6:p50 + u6:p51 + u6:p52 + u6:p53 + u6:p54 + u6:p55 + u6:p56 + u6:p57 + u6:p58 + u6:p59 + u6:p60 + u6:p61 + u6:p62 + u6:p63 + u6:p64 + u6:p65 + u6:p66 + u6:p67 + u6:p68 + u6:p69 + u6:p70 + u6:p71 + u6:p72 + u6:p73 + u15:p5 + u21:p4 + u20:p3 + u19:p2 + u18:p1 + u17:p0 = 1
Running compilation step : CommandLine [args=[gcc, -c, -I/home/mcc/BenchKit//lts_install_dir//include, -I., -std=c99, -fPIC, -O3, model.c], workingDir=/home/mcc/execution]
Compilation finished in 6283 ms.
Running link step : CommandLine [args=[gcc, -shared, -o, gal.so, model.o], workingDir=/home/mcc/execution]
Link finished in 81 ms.
Running LTSmin : CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=1, --when, --ltl, (((LTLAP0==true))U([]((LTLAP1==true))))U(<>(X(<>((LTLAP2==true))))), --buchi-type=spotba], workingDir=/home/mcc/execution]
LTSmin run took 60 ms.
FORMULA FlexibleBarrier-PT-06b-LTLFireability-00 FALSE TECHNIQUES PARTIAL_ORDER EXPLICIT LTSMIN SAT_SMT
Running LTSmin : CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=1, --when, --ltl, [](<>(X(((LTLAP3==true))U((LTLAP4==true))))), --buchi-type=spotba], workingDir=/home/mcc/execution]
LTSmin run took 36 ms.
FORMULA FlexibleBarrier-PT-06b-LTLFireability-01 FALSE TECHNIQUES PARTIAL_ORDER EXPLICIT LTSMIN SAT_SMT
Running LTSmin : CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=1, --when, --ltl, X((LTLAP5==true)), --buchi-type=spotba], workingDir=/home/mcc/execution]
LTSmin run took 61 ms.
FORMULA FlexibleBarrier-PT-06b-LTLFireability-02 FALSE TECHNIQUES PARTIAL_ORDER EXPLICIT LTSMIN SAT_SMT
Running LTSmin : CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=1, -p, --pins-guards, --when, --ltl, []((<>([]((LTLAP6==true))))U([]([]((LTLAP7==true))))), --buchi-type=spotba], workingDir=/home/mcc/execution]
LTSmin run took 876 ms.
FORMULA FlexibleBarrier-PT-06b-LTLFireability-03 FALSE TECHNIQUES PARTIAL_ORDER EXPLICIT LTSMIN SAT_SMT
Running LTSmin : CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=1, -p, --pins-guards, --when, --ltl, []((LTLAP8==true)), --buchi-type=spotba], workingDir=/home/mcc/execution]
LTSmin run took 792 ms.
FORMULA FlexibleBarrier-PT-06b-LTLFireability-04 FALSE TECHNIQUES PARTIAL_ORDER EXPLICIT LTSMIN SAT_SMT
Running LTSmin : CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=1, -p, --pins-guards, --when, --ltl, <>([]((LTLAP9==true))), --buchi-type=spotba], workingDir=/home/mcc/execution]
LTSmin run took 888 ms.
FORMULA FlexibleBarrier-PT-06b-LTLFireability-05 FALSE TECHNIQUES PARTIAL_ORDER EXPLICIT LTSMIN SAT_SMT
Running LTSmin : CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=1, -p, --pins-guards, --when, --ltl, <>((<>((LTLAP10==true)))U((LTLAP11==true))), --buchi-type=spotba], workingDir=/home/mcc/execution]
LTSmin run took 858 ms.
FORMULA FlexibleBarrier-PT-06b-LTLFireability-06 FALSE TECHNIQUES PARTIAL_ORDER EXPLICIT LTSMIN SAT_SMT
Running LTSmin : CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=1, --when, --ltl, X((<>(<>((LTLAP12==true))))U(((LTLAP13==true))U((LTLAP14==true)))), --buchi-type=spotba], workingDir=/home/mcc/execution]
LTSmin run took 67 ms.
FORMULA FlexibleBarrier-PT-06b-LTLFireability-07 FALSE TECHNIQUES PARTIAL_ORDER EXPLICIT LTSMIN SAT_SMT
Running LTSmin : CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=1, --when, --ltl, [](X([]([]((LTLAP15==true))))), --buchi-type=spotba], workingDir=/home/mcc/execution]
LTSmin run took 51 ms.
FORMULA FlexibleBarrier-PT-06b-LTLFireability-08 FALSE TECHNIQUES PARTIAL_ORDER EXPLICIT LTSMIN SAT_SMT
Running LTSmin : CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=1, --when, --ltl, X(<>(<>(((LTLAP16==true))U((LTLAP17==true))))), --buchi-type=spotba], workingDir=/home/mcc/execution]
LTSmin run took 71 ms.
FORMULA FlexibleBarrier-PT-06b-LTLFireability-09 FALSE TECHNIQUES PARTIAL_ORDER EXPLICIT LTSMIN SAT_SMT
Running LTSmin : CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=1, -p, --pins-guards, --when, --ltl, (LTLAP18==true), --buchi-type=spotba], workingDir=/home/mcc/execution]
LTSmin run took 882 ms.
FORMULA FlexibleBarrier-PT-06b-LTLFireability-10 FALSE TECHNIQUES PARTIAL_ORDER EXPLICIT LTSMIN SAT_SMT
Running LTSmin : CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=1, --when, --ltl, (<>(((LTLAP19==true))U((LTLAP20==true))))U(X(((LTLAP21==true))U((LTLAP22==true)))), --buchi-type=spotba], workingDir=/home/mcc/execution]
LTSmin run took 69 ms.
FORMULA FlexibleBarrier-PT-06b-LTLFireability-11 FALSE TECHNIQUES PARTIAL_ORDER EXPLICIT LTSMIN SAT_SMT
Running LTSmin : CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=1, -p, --pins-guards, --when, --ltl, ((LTLAP23==true))U((LTLAP24==true)), --buchi-type=spotba], workingDir=/home/mcc/execution]
LTSmin run took 820 ms.
FORMULA FlexibleBarrier-PT-06b-LTLFireability-12 FALSE TECHNIQUES PARTIAL_ORDER EXPLICIT LTSMIN SAT_SMT
Running LTSmin : CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=1, -p, --pins-guards, --when, --ltl, (LTLAP25==true), --buchi-type=spotba], workingDir=/home/mcc/execution]
LTSmin run took 786 ms.
FORMULA FlexibleBarrier-PT-06b-LTLFireability-13 FALSE TECHNIQUES PARTIAL_ORDER EXPLICIT LTSMIN SAT_SMT
Running LTSmin : CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=1, -p, --pins-guards, --when, --ltl, (LTLAP26==true), --buchi-type=spotba], workingDir=/home/mcc/execution]
LTSmin run took 928 ms.
FORMULA FlexibleBarrier-PT-06b-LTLFireability-14 FALSE TECHNIQUES PARTIAL_ORDER EXPLICIT LTSMIN SAT_SMT
Running LTSmin : CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=1, --when, --ltl, X(([]([]((LTLAP27==true))))U(X(X((LTLAP28==true))))), --buchi-type=spotba], workingDir=/home/mcc/execution]
LTSmin run took 48 ms.
FORMULA FlexibleBarrier-PT-06b-LTLFireability-15 FALSE TECHNIQUES PARTIAL_ORDER EXPLICIT LTSMIN SAT_SMT
ITS tools runner thread asked to quit. Dying gracefully.

BK_STOP 1527960591428

--------------------
content from stderr:

+ export BINDIR=/home/mcc/BenchKit/
+ BINDIR=/home/mcc/BenchKit/
++ pwd
+ export MODEL=/home/mcc/execution
+ MODEL=/home/mcc/execution
+ /home/mcc/BenchKit//runeclipse.sh /home/mcc/execution LTLFireability -its -ltsminpath /home/mcc/BenchKit//lts_install_dir/ -smt
+ ulimit -s 65536
+ [[ -z '' ]]
+ export LTSMIN_MEM_SIZE=8589934592
+ LTSMIN_MEM_SIZE=8589934592
+ /home/mcc/BenchKit//itstools/its-tools -consoleLog -data /home/mcc/execution/workspace -pnfolder /home/mcc/execution -examination LTLFireability -z3path /home/mcc/BenchKit//z3/bin/z3 -yices2path /home/mcc/BenchKit//yices/bin/yices -its -ltsminpath /home/mcc/BenchKit//lts_install_dir/ -smt -vmargs -Dosgi.locking=none -Declipse.stateSaveDelayInterval=-1 -Dosgi.configuration.area=/tmp/.eclipse -Xss8m -Xms40m -Xmx8192m -Dfile.encoding=UTF-8 -Dosgi.requiredJavaVersion=1.6
Jun 02, 2018 5:29:14 PM fr.lip6.move.gal.application.Application start
INFO: Running its-tools with arguments : [-pnfolder, /home/mcc/execution, -examination, LTLFireability, -z3path, /home/mcc/BenchKit//z3/bin/z3, -yices2path, /home/mcc/BenchKit//yices/bin/yices, -its, -ltsminpath, /home/mcc/BenchKit//lts_install_dir/, -smt]
Jun 02, 2018 5:29:14 PM fr.lip6.move.gal.application.MccTranslator transformPNML
INFO: Parsing pnml file : /home/mcc/execution/model.pnml
Jun 02, 2018 5:29:14 PM fr.lip6.move.gal.nupn.PTNetReader loadFromXML
INFO: Load time of PNML (sax parser for PT used): 74 ms
Jun 02, 2018 5:29:14 PM fr.lip6.move.gal.pnml.togal.PTGALTransformer handlePage
INFO: Transformed 542 places.
Jun 02, 2018 5:29:14 PM fr.lip6.move.gal.pnml.togal.PTGALTransformer handlePage
INFO: Transformed 621 transitions.
Jun 02, 2018 5:29:14 PM fr.lip6.move.gal.pnml.togal.PnmlToGalTransformer transform
INFO: Found NUPN structural information;
Jun 02, 2018 5:29:14 PM fr.lip6.move.serialization.SerializationUtil systemToFile
INFO: Time to serialize gal into /home/mcc/execution/model.pnml.img.gal : 21 ms
Jun 02, 2018 5:29:15 PM fr.lip6.move.gal.application.MccTranslator applyOrder
INFO: Applying decomposition
Jun 02, 2018 5:29:15 PM fr.lip6.move.gal.instantiate.CompositeBuilder decomposeWithOrder
INFO: Decomposing Gal with order
Jun 02, 2018 5:29:15 PM fr.lip6.move.gal.instantiate.GALRewriter flatten
INFO: Flatten gal took : 85 ms
Jun 02, 2018 5:29:15 PM fr.lip6.move.gal.instantiate.CompositeBuilder rewriteArraysToAllowPartition
INFO: Rewriting arrays to variables to allow decomposition.
Jun 02, 2018 5:29:15 PM fr.lip6.move.gal.instantiate.Instantiator fuseIsomorphicEffects
INFO: Removed a total of 35 redundant transitions.
Jun 02, 2018 5:29:15 PM fr.lip6.move.serialization.SerializationUtil systemToFile
INFO: Time to serialize gal into /home/mcc/execution/LTLFireability.pnml.gal : 8 ms
Jun 02, 2018 5:29:15 PM fr.lip6.move.serialization.SerializationUtil serializePropertiesForITSLTLTools
INFO: Time to serialize properties into /home/mcc/execution/LTLFireability.ltl : 1 ms
Jun 02, 2018 5:29:15 PM fr.lip6.move.gal.semantics.DeterministicNextBuilder getDeterministicNext
INFO: Input system was already deterministic with 621 transitions.
Jun 02, 2018 5:29:15 PM fr.lip6.move.gal.gal2smt.bmc.KInductionSolver computeAndDeclareInvariants
INFO: Computed 8 place invariants in 161 ms
Jun 02, 2018 5:29:16 PM fr.lip6.move.gal.gal2smt.bmc.KInductionSolver init
INFO: Proved 542 variables to be positive in 817 ms
Jun 02, 2018 5:29:16 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver computeAblingMatrix
INFO: Computing symmetric may disable matrix : 621 transitions.
Jun 02, 2018 5:29:16 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of disable matrix completed :0/621 took 0 ms. Total solver calls (SAT/UNSAT): 0(0/0)
Jun 02, 2018 5:29:16 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of Complete disable matrix. took 51 ms. Total solver calls (SAT/UNSAT): 0(0/0)
Jun 02, 2018 5:29:16 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver computeAblingMatrix
INFO: Computing symmetric may enable matrix : 621 transitions.
Jun 02, 2018 5:29:16 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of Complete enable matrix. took 12 ms. Total solver calls (SAT/UNSAT): 0(0/0)
Jun 02, 2018 5:29:17 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver computeCoEnablingMatrix
INFO: Computing symmetric co enabling matrix : 621 transitions.
Jun 02, 2018 5:29:20 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(13/621) took 3169 ms. Total solver calls (SAT/UNSAT): 3343(36/3307)
Jun 02, 2018 5:29:24 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(17/621) took 7027 ms. Total solver calls (SAT/UNSAT): 3813(110/3703)
Jun 02, 2018 5:29:27 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(21/621) took 10474 ms. Total solver calls (SAT/UNSAT): 4243(171/4072)
Jun 02, 2018 5:29:31 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(27/621) took 13944 ms. Total solver calls (SAT/UNSAT): 4870(237/4633)
SMT solver raised 'unknown', retrying with same input.
SMT solver raised 'unknown' twice, overapproximating result to 1.
Jun 02, 2018 5:29:35 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(37/621) took 17641 ms. Total solver calls (SAT/UNSAT): 5756(280/5476)
Jun 02, 2018 5:29:35 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of Finished co-enabling matrix. took 17656 ms. Total solver calls (SAT/UNSAT): 5756(280/5476)
Jun 02, 2018 5:29:35 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver computeDoNotAccord
INFO: Computing Do-Not-Accords matrix : 621 transitions.
Jun 02, 2018 5:29:37 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of Completed DNA matrix. took 2309 ms. Total solver calls (SAT/UNSAT): 2843(0/2843)
Jun 02, 2018 5:29:37 PM fr.lip6.move.gal.gal2pins.Gal2PinsTransformerNext transform
INFO: Built C files in 22098ms conformant to PINS in folder :/home/mcc/execution

Sequence of Actions to be Executed by the VM

This is useful if one wants to reexecute the tool in the VM from the submitted image disk.

set -x
# this is for BenchKit: configuration of major elements for the test
export BK_INPUT="FlexibleBarrier-PT-06b"
export BK_EXAMINATION="LTLFireability"
export BK_TOOL="itstools"
export BK_RESULT_DIR="/tmp/BK_RESULTS/OUTPUTS"
export BK_TIME_CONFINEMENT="3600"
export BK_MEMORY_CONFINEMENT="16384"

# this is specific to your benchmark or test

export BIN_DIR="$HOME/BenchKit/bin"

# remove the execution directoty if it exists (to avoid increse of .vmdk images)
if [ -d execution ] ; then
rm -rf execution
fi

tar xzf /home/mcc/BenchKit/INPUTS/FlexibleBarrier-PT-06b.tgz
mv FlexibleBarrier-PT-06b execution
cd execution
pwd
ls -lh

# this is for BenchKit: explicit launching of the test
echo "====================================================================="
echo " Generated by BenchKit 2-3637"
echo " Executing tool itstools"
echo " Input is FlexibleBarrier-PT-06b, examination is LTLFireability"
echo " Time confinement is $BK_TIME_CONFINEMENT seconds"
echo " Memory confinement is 16384 MBytes"
echo " Number of cores is 4"
echo " Run identifier is r248-blw7-152732549700036"
echo "====================================================================="
echo
echo "--------------------"
echo "content from stdout:"
echo
echo "=== Data for post analysis generated by BenchKit (invocation template)"
echo
if [ "LTLFireability" = "UpperBounds" ] ; then
echo "The expected result is a vector of positive values"
echo NUM_VECTOR
elif [ "LTLFireability" != "StateSpace" ] ; then
echo "The expected result is a vector of booleans"
echo BOOL_VECTOR
else
echo "no data necessary for post analysis"
fi
echo
if [ -f "LTLFireability.txt" ] ; then
echo "here is the order used to build the result vector(from text file)"
for x in $(grep Property LTLFireability.txt | cut -d ' ' -f 2 | sort -u) ; do
echo "FORMULA_NAME $x"
done
elif [ -f "LTLFireability.xml" ] ; then # for cunf (txt files deleted;-)
echo echo "here is the order used to build the result vector(from xml file)"
for x in $(grep '' LTLFireability.xml | cut -d '>' -f 2 | cut -d '<' -f 1 | sort -u) ; do
echo "FORMULA_NAME $x"
done
fi
echo
echo "=== Now, execution of the tool begins"
echo
echo -n "BK_START "
date -u +%s%3N
echo
timeout -s 9 $BK_TIME_CONFINEMENT bash -c "/home/mcc/BenchKit/BenchKit_head.sh 2> STDERR ; echo ; echo -n \"BK_STOP \" ; date -u +%s%3N"
if [ $? -eq 137 ] ; then
echo
echo "BK_TIME_CONFINEMENT_REACHED"
fi
echo
echo "--------------------"
echo "content from stderr:"
echo
cat STDERR ;