About the Execution of ITS-Tools.L for BridgeAndVehicles-PT-V10P10N10
Execution Summary | |||||
Max Memory Used (MB) |
Time wait (ms) | CPU Usage (ms) | I/O Wait (ms) | Computed Result | Execution Status |
15753.710 | 101485.00 | 233770.00 | 256.20 | FFFFFTFTFFFFFFFF | normal |
Execution Chart
We display below the execution chart for this examination (boot time has been removed).
Trace from the execution
Waiting for the VM to be ready (probing ssh)
.....................
/home/mcc/execution
total 668K
-rw-r--r-- 1 mcc users 5.2K May 15 18:54 CTLCardinality.txt
-rw-r--r-- 1 mcc users 23K May 15 18:54 CTLCardinality.xml
-rw-r--r-- 1 mcc users 21K May 15 18:54 CTLFireability.txt
-rw-r--r-- 1 mcc users 69K May 15 18:54 CTLFireability.xml
-rw-r--r-- 1 mcc users 4.0K May 15 18:49 GenericPropertiesDefinition.xml
-rw-r--r-- 1 mcc users 6.1K May 15 18:49 GenericPropertiesVerdict.xml
-rw-r--r-- 1 mcc users 3.4K May 26 09:26 LTLCardinality.txt
-rw-r--r-- 1 mcc users 13K May 26 09:26 LTLCardinality.xml
-rw-r--r-- 1 mcc users 8.4K May 26 09:26 LTLFireability.txt
-rw-r--r-- 1 mcc users 27K May 26 09:26 LTLFireability.xml
-rw-r--r-- 1 mcc users 5.0K May 15 18:54 ReachabilityCardinality.txt
-rw-r--r-- 1 mcc users 21K May 15 18:54 ReachabilityCardinality.xml
-rw-r--r-- 1 mcc users 121 May 15 18:54 ReachabilityDeadlock.txt
-rw-r--r-- 1 mcc users 359 May 15 18:54 ReachabilityDeadlock.xml
-rw-r--r-- 1 mcc users 21K May 15 18:54 ReachabilityFireability.txt
-rw-r--r-- 1 mcc users 67K May 15 18:54 ReachabilityFireability.xml
-rw-r--r-- 1 mcc users 2.1K May 15 18:54 UpperBounds.txt
-rw-r--r-- 1 mcc users 4.4K May 15 18:54 UpperBounds.xml
-rw-r--r-- 1 mcc users 5 May 15 18:49 equiv_col
-rw-r--r-- 1 mcc users 10 May 15 18:49 instance
-rw-r--r-- 1 mcc users 6 May 15 18:49 iscolored
-rw-r--r-- 1 mcc users 311K May 15 18:49 model.pnml
=====================================================================
Generated by BenchKit 2-3637
Executing tool itstoolsl
Input is BridgeAndVehicles-PT-V10P10N10, examination is LTLFireability
Time confinement is 3600 seconds
Memory confinement is 16384 MBytes
Number of cores is 4
Run identifier is r225-ebro-152732379600076
=====================================================================
--------------------
content from stdout:
=== Data for post analysis generated by BenchKit (invocation template)
The expected result is a vector of booleans
BOOL_VECTOR
here is the order used to build the result vector(from text file)
FORMULA_NAME BridgeAndVehicles-PT-V10P10N10-LTLFireability-00
FORMULA_NAME BridgeAndVehicles-PT-V10P10N10-LTLFireability-01
FORMULA_NAME BridgeAndVehicles-PT-V10P10N10-LTLFireability-02
FORMULA_NAME BridgeAndVehicles-PT-V10P10N10-LTLFireability-03
FORMULA_NAME BridgeAndVehicles-PT-V10P10N10-LTLFireability-04
FORMULA_NAME BridgeAndVehicles-PT-V10P10N10-LTLFireability-05
FORMULA_NAME BridgeAndVehicles-PT-V10P10N10-LTLFireability-06
FORMULA_NAME BridgeAndVehicles-PT-V10P10N10-LTLFireability-07
FORMULA_NAME BridgeAndVehicles-PT-V10P10N10-LTLFireability-08
FORMULA_NAME BridgeAndVehicles-PT-V10P10N10-LTLFireability-09
FORMULA_NAME BridgeAndVehicles-PT-V10P10N10-LTLFireability-10
FORMULA_NAME BridgeAndVehicles-PT-V10P10N10-LTLFireability-11
FORMULA_NAME BridgeAndVehicles-PT-V10P10N10-LTLFireability-12
FORMULA_NAME BridgeAndVehicles-PT-V10P10N10-LTLFireability-13
FORMULA_NAME BridgeAndVehicles-PT-V10P10N10-LTLFireability-14
FORMULA_NAME BridgeAndVehicles-PT-V10P10N10-LTLFireability-15
=== Now, execution of the tool begins
BK_START 1527611308907
Converted graph to binary with : CommandLine [args=[/home/mcc/BenchKit/itstools/plugins/fr.lip6.move.gal.louvain.binaries_1.0.0.201805241334/bin/convert-linux64, -i, /tmp/graph2999639092409549394.txt, -o, /tmp/graph2999639092409549394.bin, -w, /tmp/graph2999639092409549394.weights], workingDir=null]
Built communities with : CommandLine [args=[/home/mcc/BenchKit/itstools/plugins/fr.lip6.move.gal.louvain.binaries_1.0.0.201805241334/bin/louvain-linux64, /tmp/graph2999639092409549394.bin, -l, -1, -v, -w, /tmp/graph2999639092409549394.weights, -q, 0, -e, 0.001], workingDir=null]
Using solver Z3 to compute partial order matrices.
Built C files in :
/home/mcc/execution
Invoking ITS tools like this :CommandLine [args=[/home/mcc/BenchKit/itstools/plugins/fr.lip6.move.gal.itstools.binaries_1.0.0.201805241334/bin/its-ltl-linux64, --gc-threshold, 2000000, -i, /home/mcc/execution/LTLFireability.pnml.gal, -t, CGAL, -LTL, /home/mcc/execution/LTLFireability.ltl, -c, -stutter-deadlock], workingDir=/home/mcc/execution]
its-ltl command run as :
/home/mcc/BenchKit/itstools/plugins/fr.lip6.move.gal.itstools.binaries_1.0.0.201805241334/bin/its-ltl-linux64 --gc-threshold 2000000 -i /home/mcc/execution/LTLFireability.pnml.gal -t CGAL -LTL /home/mcc/execution/LTLFireability.ltl -c -stutter-deadlock
Read 16 LTL properties
Checking formula 0 : !((G(X(X(F("((((((((((((i2.u0.ROUTE_A>=1)&&(i0.u5.NB_ATTENTE_A_0>=1))||((i2.u0.ROUTE_A>=1)&&(i2.u4.NB_ATTENTE_A_1>=1)))||((i2.u0.ROUTE_A>=1)&&(i2.u4.NB_ATTENTE_A_2>=1)))||((i2.u0.ROUTE_A>=1)&&(i2.u4.NB_ATTENTE_A_3>=1)))||((i2.u0.ROUTE_A>=1)&&(i2.u4.NB_ATTENTE_A_4>=1)))||((i2.u0.ROUTE_A>=1)&&(i2.u4.NB_ATTENTE_A_5>=1)))||((i2.u0.ROUTE_A>=1)&&(i2.u4.NB_ATTENTE_A_6>=1)))||((i2.u0.ROUTE_A>=1)&&(i2.u4.NB_ATTENTE_A_7>=1)))||((i2.u0.ROUTE_A>=1)&&(i2.u4.NB_ATTENTE_A_8>=1)))||((i2.u0.ROUTE_A>=1)&&(i2.u4.NB_ATTENTE_A_9>=1)))||((i2.u0.ROUTE_A>=1)&&(i2.u4.NB_ATTENTE_A_10>=1)))"))))))
Formula 0 simplified : !GXXF"((((((((((((i2.u0.ROUTE_A>=1)&&(i0.u5.NB_ATTENTE_A_0>=1))||((i2.u0.ROUTE_A>=1)&&(i2.u4.NB_ATTENTE_A_1>=1)))||((i2.u0.ROUTE_A>=1)&&(i2.u4.NB_ATTENTE_A_2>=1)))||((i2.u0.ROUTE_A>=1)&&(i2.u4.NB_ATTENTE_A_3>=1)))||((i2.u0.ROUTE_A>=1)&&(i2.u4.NB_ATTENTE_A_4>=1)))||((i2.u0.ROUTE_A>=1)&&(i2.u4.NB_ATTENTE_A_5>=1)))||((i2.u0.ROUTE_A>=1)&&(i2.u4.NB_ATTENTE_A_6>=1)))||((i2.u0.ROUTE_A>=1)&&(i2.u4.NB_ATTENTE_A_7>=1)))||((i2.u0.ROUTE_A>=1)&&(i2.u4.NB_ATTENTE_A_8>=1)))||((i2.u0.ROUTE_A>=1)&&(i2.u4.NB_ATTENTE_A_9>=1)))||((i2.u0.ROUTE_A>=1)&&(i2.u4.NB_ATTENTE_A_10>=1)))"
built 6 ordering constraints for composite.
built 276 ordering constraints for composite.
built 55 ordering constraints for composite.
built 155 ordering constraints for composite.
Presburger conditions satisfied. Using coverability to approximate state space in K-Induction.
Normalized transition count is 90
// Phase 1: matrix 90 rows 48 cols
invariant :i0:u5:CONTROLEUR_1 + i0:u5:VIDANGE_2 + i1:u1:CHOIX_1 + i1:u1:CHOIX_2 + i2:u4:CONTROLEUR_2 + i2:u4:VIDANGE_1 = 1
invariant :i1:u1:SUR_PONT_B + i1:u1:SORTI_B + i1:u3:ATTENTE_B + i1:u3:ROUTE_B = 10
invariant :i0:u5:NB_ATTENTE_A_0 + i2:u4:NB_ATTENTE_A_1 + i2:u4:NB_ATTENTE_A_2 + i2:u4:NB_ATTENTE_A_3 + i2:u4:NB_ATTENTE_A_4 + i2:u4:NB_ATTENTE_A_5 + i2:u4:NB_ATTENTE_A_6 + i2:u4:NB_ATTENTE_A_7 + i2:u4:NB_ATTENTE_A_8 + i2:u4:NB_ATTENTE_A_9 + i2:u4:NB_ATTENTE_A_10 = 1
invariant :i1:u1:SUR_PONT_A + i1:u1:SORTI_A + i2:u0:ROUTE_A + i2:u0:ATTENTE_A = 10
invariant :-1'i1:u1:SORTI_A + i1:u1:CAPACITE + -1'i1:u1:SORTI_B + -1'i1:u3:ATTENTE_B + -1'i1:u3:ROUTE_B + -1'i2:u0:ROUTE_A + -1'i2:u0:ATTENTE_A = -10
invariant :i0:u5:NB_ATTENTE_B_1 + i0:u5:NB_ATTENTE_B_2 + i0:u5:NB_ATTENTE_B_3 + i0:u5:NB_ATTENTE_B_4 + i0:u5:NB_ATTENTE_B_5 + i0:u5:NB_ATTENTE_B_6 + i0:u5:NB_ATTENTE_B_7 + i0:u5:NB_ATTENTE_B_8 + i0:u5:NB_ATTENTE_B_9 + i0:u5:NB_ATTENTE_B_10 + i2:u4:NB_ATTENTE_B_0 = 1
invariant :i0:u2:COMPTEUR_0 + i0:u2:COMPTEUR_1 + i0:u2:COMPTEUR_2 + i0:u2:COMPTEUR_3 + i0:u2:COMPTEUR_4 + i0:u2:COMPTEUR_5 + i0:u2:COMPTEUR_6 + i0:u2:COMPTEUR_7 + i0:u2:COMPTEUR_8 + i0:u2:COMPTEUR_9 + i0:u2:COMPTEUR_10 = 1
Running compilation step : CommandLine [args=[gcc, -c, -I/home/mcc/BenchKit//lts_install_dir//include, -I., -std=c99, -fPIC, -O3, model.c], workingDir=/home/mcc/execution]
Compilation finished in 6856 ms.
Running link step : CommandLine [args=[gcc, -shared, -o, gal.so, model.o], workingDir=/home/mcc/execution]
Link finished in 72 ms.
Running LTSmin : CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=1, --when, --ltl, [](X(X(<>((LTLAP0==true))))), --buchi-type=spotba], workingDir=/home/mcc/execution]
LTSmin run took 88 ms.
FORMULA BridgeAndVehicles-PT-V10P10N10-LTLFireability-00 FALSE TECHNIQUES PARTIAL_ORDER EXPLICIT LTSMIN SAT_SMT
Running LTSmin : CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=1, -p, --pins-guards, --when, --ltl, ((LTLAP0==true))U((LTLAP1==true)), --buchi-type=spotba], workingDir=/home/mcc/execution]
LTSmin run took 131 ms.
FORMULA BridgeAndVehicles-PT-V10P10N10-LTLFireability-01 FALSE TECHNIQUES PARTIAL_ORDER EXPLICIT LTSMIN SAT_SMT
Running LTSmin : CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=1, --when, --ltl, <>(X([](X((LTLAP2==true))))), --buchi-type=spotba], workingDir=/home/mcc/execution]
LTSmin run took 37 ms.
FORMULA BridgeAndVehicles-PT-V10P10N10-LTLFireability-02 FALSE TECHNIQUES PARTIAL_ORDER EXPLICIT LTSMIN SAT_SMT
Running LTSmin : CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=1, --when, --ltl, <>([](<>([](X((LTLAP3==true)))))), --buchi-type=spotba], workingDir=/home/mcc/execution]
LTSmin run took 45 ms.
FORMULA BridgeAndVehicles-PT-V10P10N10-LTLFireability-03 FALSE TECHNIQUES PARTIAL_ORDER EXPLICIT LTSMIN SAT_SMT
Running LTSmin : CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=1, --when, --ltl, [](((LTLAP4==true))U(X(X((LTLAP1==true))))), --buchi-type=spotba], workingDir=/home/mcc/execution]
LTSmin run took 113 ms.
FORMULA BridgeAndVehicles-PT-V10P10N10-LTLFireability-04 FALSE TECHNIQUES PARTIAL_ORDER EXPLICIT LTSMIN SAT_SMT
Running LTSmin : CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=1, --when, --ltl, <>(<>(X(((LTLAP1==true))U((LTLAP5==true))))), --buchi-type=spotba], workingDir=/home/mcc/execution]
LTSmin run took 670 ms.
FORMULA BridgeAndVehicles-PT-V10P10N10-LTLFireability-05 TRUE TECHNIQUES PARTIAL_ORDER EXPLICIT LTSMIN SAT_SMT
Running LTSmin : CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=1, --when, --ltl, [](<>(X(X((LTLAP4==true))))), --buchi-type=spotba], workingDir=/home/mcc/execution]
LTSmin run took 21838 ms.
FORMULA BridgeAndVehicles-PT-V10P10N10-LTLFireability-06 FALSE TECHNIQUES PARTIAL_ORDER EXPLICIT LTSMIN SAT_SMT
Running LTSmin : CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=1, --when, --ltl, <>(X(<>((LTLAP6==true)))), --buchi-type=spotba], workingDir=/home/mcc/execution]
LTSmin run took 501 ms.
FORMULA BridgeAndVehicles-PT-V10P10N10-LTLFireability-07 TRUE TECHNIQUES PARTIAL_ORDER EXPLICIT LTSMIN SAT_SMT
Running LTSmin : CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=1, --when, --ltl, X((LTLAP7==true)), --buchi-type=spotba], workingDir=/home/mcc/execution]
LTSmin run took 55 ms.
FORMULA BridgeAndVehicles-PT-V10P10N10-LTLFireability-08 FALSE TECHNIQUES PARTIAL_ORDER EXPLICIT LTSMIN SAT_SMT
Running LTSmin : CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=1, --when, --ltl, <>(X([](<>(X((LTLAP8==true)))))), --buchi-type=spotba], workingDir=/home/mcc/execution]
LTSmin run took 66 ms.
FORMULA BridgeAndVehicles-PT-V10P10N10-LTLFireability-09 FALSE TECHNIQUES PARTIAL_ORDER EXPLICIT LTSMIN SAT_SMT
Running LTSmin : CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=1, -p, --pins-guards, --when, --ltl, ([](<>((LTLAP9==true))))U((LTLAP10==true)), --buchi-type=spotba], workingDir=/home/mcc/execution]
LTSmin run took 191 ms.
FORMULA BridgeAndVehicles-PT-V10P10N10-LTLFireability-10 FALSE TECHNIQUES PARTIAL_ORDER EXPLICIT LTSMIN SAT_SMT
Running LTSmin : CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=1, -p, --pins-guards, --when, --ltl, (LTLAP11==true), --buchi-type=spotba], workingDir=/home/mcc/execution]
LTSmin run took 146 ms.
FORMULA BridgeAndVehicles-PT-V10P10N10-LTLFireability-11 FALSE TECHNIQUES PARTIAL_ORDER EXPLICIT LTSMIN SAT_SMT
Running LTSmin : CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=1, -p, --pins-guards, --when, --ltl, (([]((LTLAP12==true)))U((LTLAP5==true)))U((LTLAP13==true)), --buchi-type=spotba], workingDir=/home/mcc/execution]
LTSmin run took 136 ms.
FORMULA BridgeAndVehicles-PT-V10P10N10-LTLFireability-12 FALSE TECHNIQUES PARTIAL_ORDER EXPLICIT LTSMIN SAT_SMT
Running LTSmin : CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=1, --when, --ltl, [](<>(X(((LTLAP14==true))U((LTLAP15==true))))), --buchi-type=spotba], workingDir=/home/mcc/execution]
LTSmin run took 572 ms.
FORMULA BridgeAndVehicles-PT-V10P10N10-LTLFireability-13 FALSE TECHNIQUES PARTIAL_ORDER EXPLICIT LTSMIN SAT_SMT
Running LTSmin : CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=1, --when, --ltl, [](X((LTLAP16==true))), --buchi-type=spotba], workingDir=/home/mcc/execution]
LTSmin run took 43 ms.
FORMULA BridgeAndVehicles-PT-V10P10N10-LTLFireability-14 FALSE TECHNIQUES PARTIAL_ORDER EXPLICIT LTSMIN SAT_SMT
Running LTSmin : CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=1, -p, --pins-guards, --when, --ltl, (LTLAP17==true), --buchi-type=spotba], workingDir=/home/mcc/execution]
LTSmin run took 151 ms.
FORMULA BridgeAndVehicles-PT-V10P10N10-LTLFireability-15 FALSE TECHNIQUES PARTIAL_ORDER EXPLICIT LTSMIN SAT_SMT
ITS tools runner thread asked to quit. Dying gracefully.
BK_STOP 1527611410392
--------------------
content from stderr:
+ export BINDIR=/home/mcc/BenchKit/
+ BINDIR=/home/mcc/BenchKit/
++ pwd
+ export MODEL=/home/mcc/execution
+ MODEL=/home/mcc/execution
+ /home/mcc/BenchKit//runeclipse.sh /home/mcc/execution LTLFireability -its -ltsminpath /home/mcc/BenchKit//lts_install_dir/ -louvain -smt
+ ulimit -s 65536
+ [[ -z '' ]]
+ export LTSMIN_MEM_SIZE=8589934592
+ LTSMIN_MEM_SIZE=8589934592
+ /home/mcc/BenchKit//itstools/its-tools -consoleLog -data /home/mcc/execution/workspace -pnfolder /home/mcc/execution -examination LTLFireability -z3path /home/mcc/BenchKit//z3/bin/z3 -yices2path /home/mcc/BenchKit//yices/bin/yices -its -ltsminpath /home/mcc/BenchKit//lts_install_dir/ -louvain -smt -vmargs -Dosgi.locking=none -Declipse.stateSaveDelayInterval=-1 -Dosgi.configuration.area=/tmp/.eclipse -Xss8m -Xms40m -Xmx8192m -Dfile.encoding=UTF-8 -Dosgi.requiredJavaVersion=1.6
May 29, 2018 4:28:32 PM fr.lip6.move.gal.application.Application start
INFO: Running its-tools with arguments : [-pnfolder, /home/mcc/execution, -examination, LTLFireability, -z3path, /home/mcc/BenchKit//z3/bin/z3, -yices2path, /home/mcc/BenchKit//yices/bin/yices, -its, -ltsminpath, /home/mcc/BenchKit//lts_install_dir/, -louvain, -smt]
May 29, 2018 4:28:32 PM fr.lip6.move.gal.application.MccTranslator transformPNML
INFO: Parsing pnml file : /home/mcc/execution/model.pnml
May 29, 2018 4:28:32 PM fr.lip6.move.gal.nupn.PTNetReader loadFromXML
INFO: Load time of PNML (sax parser for PT used): 295 ms
May 29, 2018 4:28:32 PM fr.lip6.move.gal.pnml.togal.PTGALTransformer handlePage
INFO: Transformed 48 places.
May 29, 2018 4:28:33 PM fr.lip6.move.gal.pnml.togal.PTGALTransformer handlePage
INFO: Transformed 288 transitions.
May 29, 2018 4:28:33 PM fr.lip6.move.serialization.SerializationUtil systemToFile
INFO: Time to serialize gal into /home/mcc/execution/model.pnml.img.gal : 67 ms
May 29, 2018 4:28:33 PM fr.lip6.move.gal.application.MccTranslator applyOrder
INFO: Applying decomposition
May 29, 2018 4:28:33 PM fr.lip6.move.gal.instantiate.GALRewriter flatten
INFO: Flatten gal took : 186 ms
May 29, 2018 4:28:33 PM fr.lip6.move.gal.instantiate.GALRewriter flatten
INFO: Flatten gal took : 117 ms
Begin: Tue May 29 16:28:34 2018
Computation of communities with the Newman-Girvan Modularity quality function
level 0:
start computation: Tue May 29 16:28:34 2018
network size: 48 nodes, 590 links, 576 weight
quality increased from -0.0733406 to 0.211596
end computation: Tue May 29 16:28:34 2018
level 1:
start computation: Tue May 29 16:28:34 2018
network size: 6 nodes, 30 links, 576 weight
quality increased from 0.211596 to 0.233497
end computation: Tue May 29 16:28:34 2018
level 2:
start computation: Tue May 29 16:28:34 2018
network size: 3 nodes, 9 links, 576 weight
quality increased from 0.233497 to 0.233497
end computation: Tue May 29 16:28:34 2018
End: Tue May 29 16:28:34 2018
Total duration: 0 sec
0.233497
May 29, 2018 4:28:34 PM fr.lip6.move.gal.instantiate.CompositeBuilder decomposeWithOrder
INFO: Decomposing Gal with order
May 29, 2018 4:28:34 PM fr.lip6.move.gal.instantiate.GALRewriter flatten
INFO: Flatten gal took : 240 ms
May 29, 2018 4:28:34 PM fr.lip6.move.gal.instantiate.CompositeBuilder rewriteArraysToAllowPartition
INFO: Rewriting arrays to variables to allow decomposition.
May 29, 2018 4:28:35 PM fr.lip6.move.gal.instantiate.Instantiator fuseIsomorphicEffects
INFO: Removed a total of 531 redundant transitions.
May 29, 2018 4:28:35 PM fr.lip6.move.serialization.SerializationUtil systemToFile
INFO: Time to serialize gal into /home/mcc/execution/LTLFireability.pnml.gal : 29 ms
May 29, 2018 4:28:35 PM fr.lip6.move.serialization.SerializationUtil serializePropertiesForITSLTLTools
INFO: Time to serialize properties into /home/mcc/execution/LTLFireability.ltl : 33 ms
May 29, 2018 4:28:36 PM fr.lip6.move.gal.semantics.DeterministicNextBuilder getDeterministicNext
INFO: Input system was already deterministic with 288 transitions.
May 29, 2018 4:28:36 PM fr.lip6.move.gal.gal2smt.bmc.KInductionSolver computeAndDeclareInvariants
INFO: Computed 7 place invariants in 72 ms
May 29, 2018 4:28:37 PM fr.lip6.move.gal.gal2smt.bmc.KInductionSolver init
INFO: Proved 48 variables to be positive in 721 ms
May 29, 2018 4:28:37 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver computeAblingMatrix
INFO: Computing symmetric may disable matrix : 288 transitions.
May 29, 2018 4:28:37 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of disable matrix completed :0/288 took 0 ms. Total solver calls (SAT/UNSAT): 0(0/0)
May 29, 2018 4:28:37 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of Complete disable matrix. took 64 ms. Total solver calls (SAT/UNSAT): 0(0/0)
May 29, 2018 4:28:37 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver computeAblingMatrix
INFO: Computing symmetric may enable matrix : 288 transitions.
May 29, 2018 4:28:37 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of Complete enable matrix. took 27 ms. Total solver calls (SAT/UNSAT): 0(0/0)
May 29, 2018 4:28:58 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver computeCoEnablingMatrix
INFO: Computing symmetric co enabling matrix : 288 transitions.
May 29, 2018 4:28:59 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(0/288) took 1388 ms. Total solver calls (SAT/UNSAT): 264(134/130)
May 29, 2018 4:29:03 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(4/288) took 4846 ms. Total solver calls (SAT/UNSAT): 1310(278/1032)
May 29, 2018 4:29:06 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(16/288) took 7975 ms. Total solver calls (SAT/UNSAT): 4484(506/3978)
May 29, 2018 4:29:09 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(31/288) took 11181 ms. Total solver calls (SAT/UNSAT): 8214(833/7381)
May 29, 2018 4:29:13 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(50/288) took 15038 ms. Total solver calls (SAT/UNSAT): 12808(877/11931)
May 29, 2018 4:29:16 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(66/288) took 18171 ms. Total solver calls (SAT/UNSAT): 16432(877/15555)
May 29, 2018 4:29:20 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(76/288) took 22218 ms. Total solver calls (SAT/UNSAT): 18567(877/17690)
May 29, 2018 4:29:23 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(87/288) took 25290 ms. Total solver calls (SAT/UNSAT): 20800(877/19923)
May 29, 2018 4:29:26 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(114/288) took 28368 ms. Total solver calls (SAT/UNSAT): 25768(877/24891)
May 29, 2018 4:29:29 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(145/288) took 31368 ms. Total solver calls (SAT/UNSAT): 30573(877/29696)
May 29, 2018 4:29:32 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(182/288) took 34397 ms. Total solver calls (SAT/UNSAT): 35050(877/34173)
May 29, 2018 4:29:35 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(235/288) took 37435 ms. Total solver calls (SAT/UNSAT): 39078(877/38201)
May 29, 2018 4:29:37 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of Finished co-enabling matrix. took 39155 ms. Total solver calls (SAT/UNSAT): 40313(887/39426)
May 29, 2018 4:29:37 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver computeDoNotAccord
INFO: Computing Do-Not-Accords matrix : 288 transitions.
May 29, 2018 4:29:37 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of Completed DNA matrix. took 577 ms. Total solver calls (SAT/UNSAT): 45(0/45)
May 29, 2018 4:29:38 PM fr.lip6.move.gal.gal2pins.Gal2PinsTransformerNext transform
INFO: Built C files in 62272ms conformant to PINS in folder :/home/mcc/execution
Sequence of Actions to be Executed by the VM
This is useful if one wants to reexecute the tool in the VM from the submitted image disk.
set -x
# this is for BenchKit: configuration of major elements for the test
export BK_INPUT="BridgeAndVehicles-PT-V10P10N10"
export BK_EXAMINATION="LTLFireability"
export BK_TOOL="itstoolsl"
export BK_RESULT_DIR="/tmp/BK_RESULTS/OUTPUTS"
export BK_TIME_CONFINEMENT="3600"
export BK_MEMORY_CONFINEMENT="16384"
# this is specific to your benchmark or test
export BIN_DIR="$HOME/BenchKit/bin"
# remove the execution directoty if it exists (to avoid increse of .vmdk images)
if [ -d execution ] ; then
rm -rf execution
fi
tar xzf /home/mcc/BenchKit/INPUTS/BridgeAndVehicles-PT-V10P10N10.tgz
mv BridgeAndVehicles-PT-V10P10N10 execution
cd execution
pwd
ls -lh
# this is for BenchKit: explicit launching of the test
echo "====================================================================="
echo " Generated by BenchKit 2-3637"
echo " Executing tool itstoolsl"
echo " Input is BridgeAndVehicles-PT-V10P10N10, examination is LTLFireability"
echo " Time confinement is $BK_TIME_CONFINEMENT seconds"
echo " Memory confinement is 16384 MBytes"
echo " Number of cores is 4"
echo " Run identifier is r225-ebro-152732379600076"
echo "====================================================================="
echo
echo "--------------------"
echo "content from stdout:"
echo
echo "=== Data for post analysis generated by BenchKit (invocation template)"
echo
if [ "LTLFireability" = "UpperBounds" ] ; then
echo "The expected result is a vector of positive values"
echo NUM_VECTOR
elif [ "LTLFireability" != "StateSpace" ] ; then
echo "The expected result is a vector of booleans"
echo BOOL_VECTOR
else
echo "no data necessary for post analysis"
fi
echo
if [ -f "LTLFireability.txt" ] ; then
echo "here is the order used to build the result vector(from text file)"
for x in $(grep Property LTLFireability.txt | cut -d ' ' -f 2 | sort -u) ; do
echo "FORMULA_NAME $x"
done
elif [ -f "LTLFireability.xml" ] ; then # for cunf (txt files deleted;-)
echo echo "here is the order used to build the result vector(from xml file)"
for x in $(grep '
echo "FORMULA_NAME $x"
done
fi
echo
echo "=== Now, execution of the tool begins"
echo
echo -n "BK_START "
date -u +%s%3N
echo
timeout -s 9 $BK_TIME_CONFINEMENT bash -c "/home/mcc/BenchKit/BenchKit_head.sh 2> STDERR ; echo ; echo -n \"BK_STOP \" ; date -u +%s%3N"
if [ $? -eq 137 ] ; then
echo
echo "BK_TIME_CONFINEMENT_REACHED"
fi
echo
echo "--------------------"
echo "content from stderr:"
echo
cat STDERR ;