Execution Chart

We display below the execution chart for this examination (boot time has been removed).

Trace from the execution

Waiting for the VM to be ready (probing ssh)
.....................
/home/mcc/execution
total 200K
-rw-r--r-- 1 mcc users 3.6K May 15 18:54 CTLCardinality.txt
-rw-r--r-- 1 mcc users 17K May 15 18:54 CTLCardinality.xml
-rw-r--r-- 1 mcc users 3.1K May 15 18:54 CTLFireability.txt
-rw-r--r-- 1 mcc users 17K May 15 18:54 CTLFireability.xml
-rw-r--r-- 1 mcc users 4.0K May 15 18:49 GenericPropertiesDefinition.xml
-rw-r--r-- 1 mcc users 6.1K May 15 18:49 GenericPropertiesVerdict.xml
-rw-r--r-- 1 mcc users 2.7K May 26 09:26 LTLCardinality.txt
-rw-r--r-- 1 mcc users 11K May 26 09:26 LTLCardinality.xml
-rw-r--r-- 1 mcc users 2.2K May 26 09:26 LTLFireability.txt
-rw-r--r-- 1 mcc users 8.7K May 26 09:26 LTLFireability.xml
-rw-r--r-- 1 mcc users 3.1K May 15 18:54 ReachabilityCardinality.txt
-rw-r--r-- 1 mcc users 12K May 15 18:54 ReachabilityCardinality.xml
-rw-r--r-- 1 mcc users 122 May 15 18:54 ReachabilityDeadlock.txt
-rw-r--r-- 1 mcc users 360 May 15 18:54 ReachabilityDeadlock.xml
-rw-r--r-- 1 mcc users 3.5K May 15 18:54 ReachabilityFireability.txt
-rw-r--r-- 1 mcc users 18K May 15 18:54 ReachabilityFireability.xml
-rw-r--r-- 1 mcc users 1.9K May 15 18:54 UpperBounds.txt
-rw-r--r-- 1 mcc users 3.9K May 15 18:54 UpperBounds.xml
-rw-r--r-- 1 mcc users 5 May 15 18:49 equiv_pt
-rw-r--r-- 1 mcc users 10 May 15 18:49 instance
-rw-r--r-- 1 mcc users 5 May 15 18:49 iscolored
-rw-r--r-- 1 mcc users 38K May 15 18:49 model.pnml
=====================================================================
Generated by BenchKit 2-3637
Executing tool itstoolsl
Input is BridgeAndVehicles-COL-V10P10N10, examination is LTLCardinality
Time confinement is 3600 seconds
Memory confinement is 16384 MBytes
Number of cores is 4
Run identifier is r225-ebro-152732379500035
=====================================================================

--------------------
content from stdout:

=== Data for post analysis generated by BenchKit (invocation template)

The expected result is a vector of booleans
BOOL_VECTOR

here is the order used to build the result vector(from text file)
FORMULA_NAME BridgeAndVehicles-COL-V10P10N10-LTLCardinality-00
FORMULA_NAME BridgeAndVehicles-COL-V10P10N10-LTLCardinality-01
FORMULA_NAME BridgeAndVehicles-COL-V10P10N10-LTLCardinality-02
FORMULA_NAME BridgeAndVehicles-COL-V10P10N10-LTLCardinality-03
FORMULA_NAME BridgeAndVehicles-COL-V10P10N10-LTLCardinality-04
FORMULA_NAME BridgeAndVehicles-COL-V10P10N10-LTLCardinality-05
FORMULA_NAME BridgeAndVehicles-COL-V10P10N10-LTLCardinality-06
FORMULA_NAME BridgeAndVehicles-COL-V10P10N10-LTLCardinality-07
FORMULA_NAME BridgeAndVehicles-COL-V10P10N10-LTLCardinality-08
FORMULA_NAME BridgeAndVehicles-COL-V10P10N10-LTLCardinality-09
FORMULA_NAME BridgeAndVehicles-COL-V10P10N10-LTLCardinality-10
FORMULA_NAME BridgeAndVehicles-COL-V10P10N10-LTLCardinality-11
FORMULA_NAME BridgeAndVehicles-COL-V10P10N10-LTLCardinality-12
FORMULA_NAME BridgeAndVehicles-COL-V10P10N10-LTLCardinality-13
FORMULA_NAME BridgeAndVehicles-COL-V10P10N10-LTLCardinality-14
FORMULA_NAME BridgeAndVehicles-COL-V10P10N10-LTLCardinality-15

=== Now, execution of the tool begins

BK_START 1527595130052

11:58:53.871 [main] ERROR PNML validation - The rng grammar file can't be accessed : www.pnml.org
11:58:53.874 [main] ERROR import - Grammar file errors have been raised, the validation can't be done, process will continue without Grammar validation
Using solver Z3 to compute partial order matrices.
Built C files in :
/home/mcc/execution
Invoking ITS tools like this :CommandLine [args=[/home/mcc/BenchKit/itstools/plugins/fr.lip6.move.gal.itstools.binaries_1.0.0.201805241334/bin/its-ltl-linux64, --gc-threshold, 2000000, -i, /home/mcc/execution/LTLCardinality.pnml.gal, -t, CGAL, -LTL, /home/mcc/execution/LTLCardinality.ltl, -c, -stutter-deadlock], workingDir=/home/mcc/execution]

its-ltl command run as :

/home/mcc/BenchKit/itstools/plugins/fr.lip6.move.gal.itstools.binaries_1.0.0.201805241334/bin/its-ltl-linux64 --gc-threshold 2000000 -i /home/mcc/execution/LTLCardinality.pnml.gal -t CGAL -LTL /home/mcc/execution/LTLCardinality.ltl -c -stutter-deadlock
Read 16 LTL properties
Checking formula 0 : !(("((VIDANGE_0+VIDANGE_1)<=(CONTROLEUR_0+CONTROLEUR_1))"))
Formula 0 simplified : !"((VIDANGE_0+VIDANGE_1)<=(CONTROLEUR_0+CONTROLEUR_1))"
Presburger conditions satisfied. Using coverability to approximate state space in K-Induction.
Normalized transition count is 90
// Phase 1: matrix 90 rows 48 cols
invariant :SUR_PONT_B_0 + ATTENTE_B_0 + ROUTE_B_0 + SORTI_B_0 = 10
invariant :NB_ATTENTE_B_0 + NB_ATTENTE_B_1 + NB_ATTENTE_B_2 + NB_ATTENTE_B_3 + NB_ATTENTE_B_4 + NB_ATTENTE_B_5 + NB_ATTENTE_B_6 + NB_ATTENTE_B_7 + NB_ATTENTE_B_8 + NB_ATTENTE_B_9 + NB_ATTENTE_B_10 = 1
invariant :SORTI_A_0 + ROUTE_A_0 + ATTENTE_A_0 + SUR_PONT_A_0 = 10
invariant :COMPTEUR_0 + COMPTEUR_1 + COMPTEUR_2 + COMPTEUR_3 + COMPTEUR_4 + COMPTEUR_5 + COMPTEUR_6 + COMPTEUR_7 + COMPTEUR_8 + COMPTEUR_9 + COMPTEUR_10 = 1
invariant :NB_ATTENTE_A_0 + NB_ATTENTE_A_1 + NB_ATTENTE_A_2 + NB_ATTENTE_A_3 + NB_ATTENTE_A_4 + NB_ATTENTE_A_5 + NB_ATTENTE_A_6 + NB_ATTENTE_A_7 + NB_ATTENTE_A_8 + NB_ATTENTE_A_9 + NB_ATTENTE_A_10 = 1
invariant :CAPACITE_0 + SUR_PONT_A_0 + -1'ATTENTE_B_0 + -1'ROUTE_B_0 + -1'SORTI_B_0 = 0
invariant :CONTROLEUR_0 + CONTROLEUR_1 + CHOIX_0 + CHOIX_1 + VIDANGE_0 + VIDANGE_1 = 1
Reverse transition relation is NOT exact ! Due to transitions enregistrement_A, liberation_A, basculement, liberation_B, enregistrement_B, altern_cpt, timeout_A, timeout_B, Intersection with reachable at each step enabled. (destroyed/reverse/intersect/total) :0/3/8/11
Computing Next relation with stutter on 20 deadlock states
1 unique states visited
0 strongly connected components in search stack
0 transitions explored
1 items max in DFS search stack
2110 ticks for the emptiness check
Model ,|S| ,Time ,Mem(kb) ,fin. SDD ,fin. DDD ,peak SDD ,peak DDD ,SDD Hom ,SDD cache peak ,DDD Hom ,DDD cachepeak ,SHom cache
STATS,0,21.1328,226340,1,0,42,986138,42,15,1583,1.03319e+06,30
no accepting run found
Formula 0 is TRUE no accepting run found.
FORMULA BridgeAndVehicles-COL-V10P10N10-LTLCardinality-00 TRUE TECHNIQUES DECISION_DIAGRAMS TOPOLOGICAL USE_NUPN
Checking formula 1 : !((G(G(G(X("(SUR_PONT_A_0>=3)"))))))
Formula 1 simplified : !GX"(SUR_PONT_A_0>=3)"
Computing Next relation with stutter on 20 deadlock states
Running compilation step : CommandLine [args=[gcc, -c, -I/home/mcc/BenchKit//lts_install_dir//include, -I., -std=c99, -fPIC, -O3, model.c], workingDir=/home/mcc/execution]
Compilation finished in 6503 ms.
Running link step : CommandLine [args=[gcc, -shared, -o, gal.so, model.o], workingDir=/home/mcc/execution]
Link finished in 64 ms.
Running LTSmin : CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=1, --when, --ltl, []([]([](X((LTLAP1==true))))), --buchi-type=spotba], workingDir=/home/mcc/execution]
LTSmin run took 53 ms.
FORMULA BridgeAndVehicles-COL-V10P10N10-LTLCardinality-01 FALSE TECHNIQUES PARTIAL_ORDER EXPLICIT LTSMIN SAT_SMT
Running LTSmin : CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=1, --when, --ltl, X([](((LTLAP2==true))U((LTLAP3==true)))), --buchi-type=spotba], workingDir=/home/mcc/execution]
LTSmin run took 12177 ms.
FORMULA BridgeAndVehicles-COL-V10P10N10-LTLCardinality-02 FALSE TECHNIQUES PARTIAL_ORDER EXPLICIT LTSMIN SAT_SMT
Running LTSmin : CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=1, --when, --ltl, X((LTLAP4==true)), --buchi-type=spotba], workingDir=/home/mcc/execution]
LTSmin run took 47 ms.
FORMULA BridgeAndVehicles-COL-V10P10N10-LTLCardinality-03 TRUE TECHNIQUES PARTIAL_ORDER EXPLICIT LTSMIN SAT_SMT
Running LTSmin : CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=1, --when, --ltl, [](X(X(<>((LTLAP4==true))))), --buchi-type=spotba], workingDir=/home/mcc/execution]
LTSmin run took 76 ms.
FORMULA BridgeAndVehicles-COL-V10P10N10-LTLCardinality-04 FALSE TECHNIQUES PARTIAL_ORDER EXPLICIT LTSMIN SAT_SMT
Running LTSmin : CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=1, -p, --pins-guards, --when, --ltl, []([]((LTLAP5==true))), --buchi-type=spotba], workingDir=/home/mcc/execution]
LTSmin run took 132 ms.
FORMULA BridgeAndVehicles-COL-V10P10N10-LTLCardinality-05 FALSE TECHNIQUES PARTIAL_ORDER EXPLICIT LTSMIN SAT_SMT
Running LTSmin : CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=1, --when, --ltl, (<>(X((LTLAP6==true))))U(((LTLAP7==true))U((LTLAP8==true))), --buchi-type=spotba], workingDir=/home/mcc/execution]
LTSmin run took 59 ms.
FORMULA BridgeAndVehicles-COL-V10P10N10-LTLCardinality-06 TRUE TECHNIQUES PARTIAL_ORDER EXPLICIT LTSMIN SAT_SMT
Running LTSmin : CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=1, --when, --ltl, X((LTLAP9==true)), --buchi-type=spotba], workingDir=/home/mcc/execution]
LTSmin run took 62 ms.
FORMULA BridgeAndVehicles-COL-V10P10N10-LTLCardinality-07 FALSE TECHNIQUES PARTIAL_ORDER EXPLICIT LTSMIN SAT_SMT
Running LTSmin : CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=1, -p, --pins-guards, --when, --ltl, <>(((LTLAP10==true))U([]((LTLAP11==true)))), --buchi-type=spotba], workingDir=/home/mcc/execution]
LTSmin run took 15026 ms.
FORMULA BridgeAndVehicles-COL-V10P10N10-LTLCardinality-08 TRUE TECHNIQUES PARTIAL_ORDER EXPLICIT LTSMIN SAT_SMT
Running LTSmin : CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=1, -p, --pins-guards, --when, --ltl, (LTLAP12==true), --buchi-type=spotba], workingDir=/home/mcc/execution]
LTSmin run took 136 ms.
FORMULA BridgeAndVehicles-COL-V10P10N10-LTLCardinality-09 TRUE TECHNIQUES PARTIAL_ORDER EXPLICIT LTSMIN SAT_SMT
Running LTSmin : CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=1, --when, --ltl, X((LTLAP13==true)), --buchi-type=spotba], workingDir=/home/mcc/execution]
LTSmin run took 36 ms.
FORMULA BridgeAndVehicles-COL-V10P10N10-LTLCardinality-10 FALSE TECHNIQUES PARTIAL_ORDER EXPLICIT LTSMIN SAT_SMT
Running LTSmin : CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=1, -p, --pins-guards, --when, --ltl, (LTLAP14==true), --buchi-type=spotba], workingDir=/home/mcc/execution]
LTSmin run took 91 ms.
FORMULA BridgeAndVehicles-COL-V10P10N10-LTLCardinality-11 TRUE TECHNIQUES PARTIAL_ORDER EXPLICIT LTSMIN SAT_SMT
Running LTSmin : CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=1, -p, --pins-guards, --when, --ltl, (((LTLAP15==true))U((LTLAP16==true)))U(<>(<>((LTLAP3==true)))), --buchi-type=spotba], workingDir=/home/mcc/execution]
LTSmin run took 828 ms.
FORMULA BridgeAndVehicles-COL-V10P10N10-LTLCardinality-12 TRUE TECHNIQUES PARTIAL_ORDER EXPLICIT LTSMIN SAT_SMT
Running LTSmin : CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=1, -p, --pins-guards, --when, --ltl, <>(<>(<>((LTLAP17==true)))), --buchi-type=spotba], workingDir=/home/mcc/execution]
LTSmin run took 10078 ms.
FORMULA BridgeAndVehicles-COL-V10P10N10-LTLCardinality-13 TRUE TECHNIQUES PARTIAL_ORDER EXPLICIT LTSMIN SAT_SMT
Running LTSmin : CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=1, -p, --pins-guards, --when, --ltl, (LTLAP1==true), --buchi-type=spotba], workingDir=/home/mcc/execution]
LTSmin run took 163 ms.
FORMULA BridgeAndVehicles-COL-V10P10N10-LTLCardinality-14 FALSE TECHNIQUES PARTIAL_ORDER EXPLICIT LTSMIN SAT_SMT
Running LTSmin : CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=1, --when, --ltl, <>(X(X([]((LTLAP18==true))))), --buchi-type=spotba], workingDir=/home/mcc/execution]
LTSmin run took 35 ms.
FORMULA BridgeAndVehicles-COL-V10P10N10-LTLCardinality-15 FALSE TECHNIQUES PARTIAL_ORDER EXPLICIT LTSMIN SAT_SMT
ITS tools runner thread asked to quit. Dying gracefully.

BK_STOP 1527595218470

--------------------
content from stderr:

+ export BINDIR=/home/mcc/BenchKit/
+ BINDIR=/home/mcc/BenchKit/
++ pwd
+ export MODEL=/home/mcc/execution
+ MODEL=/home/mcc/execution
+ /home/mcc/BenchKit//runeclipse.sh /home/mcc/execution LTLCardinality -its -ltsminpath /home/mcc/BenchKit//lts_install_dir/ -louvain -smt
+ ulimit -s 65536
+ [[ -z '' ]]
+ export LTSMIN_MEM_SIZE=8589934592
+ LTSMIN_MEM_SIZE=8589934592
+ /home/mcc/BenchKit//itstools/its-tools -consoleLog -data /home/mcc/execution/workspace -pnfolder /home/mcc/execution -examination LTLCardinality -z3path /home/mcc/BenchKit//z3/bin/z3 -yices2path /home/mcc/BenchKit//yices/bin/yices -its -ltsminpath /home/mcc/BenchKit//lts_install_dir/ -louvain -smt -vmargs -Dosgi.locking=none -Declipse.stateSaveDelayInterval=-1 -Dosgi.configuration.area=/tmp/.eclipse -Xss8m -Xms40m -Xmx8192m -Dfile.encoding=UTF-8 -Dosgi.requiredJavaVersion=1.6
May 29, 2018 11:58:53 AM fr.lip6.move.gal.application.Application start
INFO: Running its-tools with arguments : [-pnfolder, /home/mcc/execution, -examination, LTLCardinality, -z3path, /home/mcc/BenchKit//z3/bin/z3, -yices2path, /home/mcc/BenchKit//yices/bin/yices, -its, -ltsminpath, /home/mcc/BenchKit//lts_install_dir/, -louvain, -smt]
May 29, 2018 11:58:53 AM fr.lip6.move.gal.application.MccTranslator transformPNML
INFO: Parsing pnml file : /home/mcc/execution/model.pnml
May 29, 2018 11:58:53 AM fr.lip6.move.gal.pnml.togal.PnmlToGalTransformer transform
INFO: Detected file is not PT type :http://www.pnml.org/version-2009/grammar/symmetricnet
May 29, 2018 11:58:54 AM fr.lip6.move.gal.pnml.togal.PnmlToGalTransformer transform
INFO: Load time of PNML (colored model parsed with PNMLFW) : 1287 ms
May 29, 2018 11:58:54 AM fr.lip6.move.gal.pnml.togal.HLGALTransformer handlePage
INFO: Transformed 15 places.
May 29, 2018 11:58:54 AM fr.lip6.move.gal.pnml.togal.HLGALTransformer handlePage
INFO: Computed order using colors.
May 29, 2018 11:58:54 AM fr.lip6.move.gal.pnml.togal.HLGALTransformer handlePage
INFO: sort/places :sens->CONTROLEUR,CHOIX,VIDANGE,
compteur->COMPTEUR,
Dot->CAPACITE,SORTI_A,ROUTE_A,ATTENTE_A,SUR_PONT_A,SUR_PONT_B,ATTENTE_B,ROUTE_B,SORTI_B,
voitureA->NB_ATTENTE_A,
voitureB->NB_ATTENTE_B,

May 29, 2018 11:58:54 AM fr.lip6.move.gal.pnml.togal.HLGALTransformer handlePage
INFO: Transformed 11 transitions.
May 29, 2018 11:58:54 AM fr.lip6.move.gal.pnml.togal.PnmlToGalTransformer transform
INFO: Computed order based on color domains.
May 29, 2018 11:58:54 AM fr.lip6.move.serialization.SerializationUtil systemToFile
INFO: Time to serialize gal into /home/mcc/execution/model.pnml.img.gal : 13 ms
May 29, 2018 11:58:54 AM fr.lip6.move.gal.instantiate.Instantiator instantiateParameters
INFO: On-the-fly reduction of False transitions avoided exploring 39.0 instantiations of transitions. Total transitions/syncs built is 118
May 29, 2018 11:58:54 AM fr.lip6.move.gal.instantiate.GALRewriter flatten
INFO: Flatten gal took : 104 ms
May 29, 2018 11:58:55 AM fr.lip6.move.serialization.SerializationUtil systemToFile
INFO: Time to serialize gal into /home/mcc/execution/LTLCardinality.pnml.gal : 8 ms
May 29, 2018 11:58:55 AM fr.lip6.move.serialization.SerializationUtil serializePropertiesForITSLTLTools
INFO: Time to serialize properties into /home/mcc/execution/LTLCardinality.ltl : 6 ms
May 29, 2018 11:58:55 AM fr.lip6.move.gal.semantics.DeterministicNextBuilder getDeterministicNext
INFO: Input system was not deterministic with 11 transitions. Expanding to a total of 351 deterministic transitions.
May 29, 2018 11:58:55 AM fr.lip6.move.gal.semantics.DeterministicNextBuilder getDeterministicNext
INFO: Determinization took 8 ms.
May 29, 2018 11:58:55 AM fr.lip6.move.gal.gal2smt.bmc.KInductionSolver computeAndDeclareInvariants
INFO: Computed 7 place invariants in 40 ms
May 29, 2018 11:58:56 AM fr.lip6.move.gal.gal2smt.bmc.KInductionSolver init
INFO: Proved 48 variables to be positive in 385 ms
May 29, 2018 11:58:56 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver computeAblingMatrix
INFO: Computing symmetric may disable matrix : 288 transitions.
May 29, 2018 11:58:56 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of disable matrix completed :0/288 took 0 ms. Total solver calls (SAT/UNSAT): 0(0/0)
May 29, 2018 11:58:56 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of Complete disable matrix. took 90 ms. Total solver calls (SAT/UNSAT): 0(0/0)
May 29, 2018 11:58:56 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver computeAblingMatrix
INFO: Computing symmetric may enable matrix : 288 transitions.
May 29, 2018 11:58:56 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of Complete enable matrix. took 19 ms. Total solver calls (SAT/UNSAT): 0(0/0)
May 29, 2018 11:59:02 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver computeCoEnablingMatrix
INFO: Computing symmetric co enabling matrix : 288 transitions.
May 29, 2018 11:59:03 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(0/288) took 251 ms. Total solver calls (SAT/UNSAT): 241(111/130)
May 29, 2018 11:59:06 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(18/288) took 3472 ms. Total solver calls (SAT/UNSAT): 4533(288/4245)
May 29, 2018 11:59:09 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(35/288) took 6495 ms. Total solver calls (SAT/UNSAT): 8457(657/7800)
May 29, 2018 11:59:12 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(56/288) took 9608 ms. Total solver calls (SAT/UNSAT): 13518(657/12861)
May 29, 2018 11:59:15 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(78/288) took 12850 ms. Total solver calls (SAT/UNSAT): 18347(657/17690)
May 29, 2018 11:59:18 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(104/288) took 15944 ms. Total solver calls (SAT/UNSAT): 23430(657/22773)
May 29, 2018 11:59:22 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(133/288) took 19027 ms. Total solver calls (SAT/UNSAT): 28302(657/27645)
May 29, 2018 11:59:25 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(161/288) took 22057 ms. Total solver calls (SAT/UNSAT): 32208(657/31551)
May 29, 2018 11:59:28 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(199/288) took 25109 ms. Total solver calls (SAT/UNSAT): 36255(657/35598)
May 29, 2018 11:59:31 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(263/288) took 28129 ms. Total solver calls (SAT/UNSAT): 39807(657/39150)
May 29, 2018 11:59:31 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of Finished co-enabling matrix. took 28726 ms. Total solver calls (SAT/UNSAT): 40083(657/39426)
May 29, 2018 11:59:31 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver computeDoNotAccord
INFO: Computing Do-Not-Accords matrix : 288 transitions.
May 29, 2018 11:59:32 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of Completed DNA matrix. took 602 ms. Total solver calls (SAT/UNSAT): 45(0/45)
May 29, 2018 11:59:32 AM fr.lip6.move.gal.gal2pins.Gal2PinsTransformerNext transform
INFO: Built C files in 37042ms conformant to PINS in folder :/home/mcc/execution

Sequence of Actions to be Executed by the VM

This is useful if one wants to reexecute the tool in the VM from the submitted image disk.

set -x
# this is for BenchKit: configuration of major elements for the test
export BK_INPUT="BridgeAndVehicles-COL-V10P10N10"
export BK_EXAMINATION="LTLCardinality"
export BK_TOOL="itstoolsl"
export BK_RESULT_DIR="/tmp/BK_RESULTS/OUTPUTS"
export BK_TIME_CONFINEMENT="3600"
export BK_MEMORY_CONFINEMENT="16384"

# this is specific to your benchmark or test

export BIN_DIR="$HOME/BenchKit/bin"

# remove the execution directoty if it exists (to avoid increse of .vmdk images)
if [ -d execution ] ; then
rm -rf execution
fi

tar xzf /home/mcc/BenchKit/INPUTS/BridgeAndVehicles-COL-V10P10N10.tgz
mv BridgeAndVehicles-COL-V10P10N10 execution
cd execution
pwd
ls -lh

# this is for BenchKit: explicit launching of the test
echo "====================================================================="
echo " Generated by BenchKit 2-3637"
echo " Executing tool itstoolsl"
echo " Input is BridgeAndVehicles-COL-V10P10N10, examination is LTLCardinality"
echo " Time confinement is $BK_TIME_CONFINEMENT seconds"
echo " Memory confinement is 16384 MBytes"
echo " Number of cores is 4"
echo " Run identifier is r225-ebro-152732379500035"
echo "====================================================================="
echo
echo "--------------------"
echo "content from stdout:"
echo
echo "=== Data for post analysis generated by BenchKit (invocation template)"
echo
if [ "LTLCardinality" = "UpperBounds" ] ; then
echo "The expected result is a vector of positive values"
echo NUM_VECTOR
elif [ "LTLCardinality" != "StateSpace" ] ; then
echo "The expected result is a vector of booleans"
echo BOOL_VECTOR
else
echo "no data necessary for post analysis"
fi
echo
if [ -f "LTLCardinality.txt" ] ; then
echo "here is the order used to build the result vector(from text file)"
for x in $(grep Property LTLCardinality.txt | cut -d ' ' -f 2 | sort -u) ; do
echo "FORMULA_NAME $x"
done
elif [ -f "LTLCardinality.xml" ] ; then # for cunf (txt files deleted;-)
echo echo "here is the order used to build the result vector(from xml file)"
for x in $(grep '' LTLCardinality.xml | cut -d '>' -f 2 | cut -d '<' -f 1 | sort -u) ; do
echo "FORMULA_NAME $x"
done
fi
echo
echo "=== Now, execution of the tool begins"
echo
echo -n "BK_START "
date -u +%s%3N
echo
timeout -s 9 $BK_TIME_CONFINEMENT bash -c "/home/mcc/BenchKit/BenchKit_head.sh 2> STDERR ; echo ; echo -n \"BK_STOP \" ; date -u +%s%3N"
if [ $? -eq 137 ] ; then
echo
echo "BK_TIME_CONFINEMENT_REACHED"
fi
echo
echo "--------------------"
echo "content from stderr:"
echo
cat STDERR ;