Execution Chart

We display below the execution chart for this examination (boot time has been removed).

Trace from the execution

Waiting for the VM to be ready (probing ssh)
.....................
/home/mcc/execution
total 184K
-rw-r--r-- 1 mcc users 4.2K May 15 18:54 CTLCardinality.txt
-rw-r--r-- 1 mcc users 25K May 15 18:54 CTLCardinality.xml
-rw-r--r-- 1 mcc users 2.5K May 15 18:54 CTLFireability.txt
-rw-r--r-- 1 mcc users 15K May 15 18:54 CTLFireability.xml
-rw-r--r-- 1 mcc users 4.0K May 15 18:49 GenericPropertiesDefinition.xml
-rw-r--r-- 1 mcc users 6.2K May 15 18:49 GenericPropertiesVerdict.xml
-rw-r--r-- 1 mcc users 2.4K May 26 09:26 LTLCardinality.txt
-rw-r--r-- 1 mcc users 9.5K May 26 09:26 LTLCardinality.xml
-rw-r--r-- 1 mcc users 2.0K May 26 09:26 LTLFireability.txt
-rw-r--r-- 1 mcc users 8.9K May 26 09:26 LTLFireability.xml
-rw-r--r-- 1 mcc users 3.2K May 15 18:54 ReachabilityCardinality.txt
-rw-r--r-- 1 mcc users 15K May 15 18:54 ReachabilityCardinality.xml
-rw-r--r-- 1 mcc users 115 May 15 18:54 ReachabilityDeadlock.txt
-rw-r--r-- 1 mcc users 353 May 15 18:54 ReachabilityDeadlock.xml
-rw-r--r-- 1 mcc users 3.3K May 15 18:54 ReachabilityFireability.txt
-rw-r--r-- 1 mcc users 20K May 15 18:54 ReachabilityFireability.xml
-rw-r--r-- 1 mcc users 1.7K May 15 18:54 UpperBounds.txt
-rw-r--r-- 1 mcc users 3.8K May 15 18:54 UpperBounds.xml
-rw-r--r-- 1 mcc users 6 May 15 18:49 equiv_col
-rw-r--r-- 1 mcc users 7 May 15 18:49 instance
-rw-r--r-- 1 mcc users 6 May 15 18:49 iscolored
-rw-r--r-- 1 mcc users 11K May 15 18:49 model.pnml
=====================================================================
Generated by BenchKit 2-3637
Executing tool itstools
Input is CircadianClock-PT-000100, examination is LTLFireability
Time confinement is 3600 seconds
Memory confinement is 16384 MBytes
Number of cores is 4
Run identifier is r224-ebro-152732378800142
=====================================================================

--------------------
content from stdout:

=== Data for post analysis generated by BenchKit (invocation template)

The expected result is a vector of booleans
BOOL_VECTOR

here is the order used to build the result vector(from text file)
FORMULA_NAME CircadianClock-PT-000100-LTLFireability-00
FORMULA_NAME CircadianClock-PT-000100-LTLFireability-01
FORMULA_NAME CircadianClock-PT-000100-LTLFireability-02
FORMULA_NAME CircadianClock-PT-000100-LTLFireability-03
FORMULA_NAME CircadianClock-PT-000100-LTLFireability-04
FORMULA_NAME CircadianClock-PT-000100-LTLFireability-05
FORMULA_NAME CircadianClock-PT-000100-LTLFireability-06
FORMULA_NAME CircadianClock-PT-000100-LTLFireability-07
FORMULA_NAME CircadianClock-PT-000100-LTLFireability-08
FORMULA_NAME CircadianClock-PT-000100-LTLFireability-09
FORMULA_NAME CircadianClock-PT-000100-LTLFireability-10
FORMULA_NAME CircadianClock-PT-000100-LTLFireability-11
FORMULA_NAME CircadianClock-PT-000100-LTLFireability-12
FORMULA_NAME CircadianClock-PT-000100-LTLFireability-13
FORMULA_NAME CircadianClock-PT-000100-LTLFireability-14
FORMULA_NAME CircadianClock-PT-000100-LTLFireability-15

=== Now, execution of the tool begins

BK_START 1527577089878

Using solver Z3 to compute partial order matrices.
Built C files in :
/home/mcc/execution
Invoking ITS tools like this :CommandLine [args=[/home/mcc/BenchKit/itstools/plugins/fr.lip6.move.gal.itstools.binaries_1.0.0.201805151631/bin/its-ltl-linux64, --gc-threshold, 2000000, -i, /home/mcc/execution/LTLFireability.pnml.gal, -t, CGAL, -LTL, /home/mcc/execution/LTLFireability.ltl, -c, -stutter-deadlock], workingDir=/home/mcc/execution]

its-ltl command run as :

/home/mcc/BenchKit/itstools/plugins/fr.lip6.move.gal.itstools.binaries_1.0.0.201805151631/bin/its-ltl-linux64 --gc-threshold 2000000 -i /home/mcc/execution/LTLFireability.pnml.gal -t CGAL -LTL /home/mcc/execution/LTLFireability.ltl -c -stutter-deadlock
Read 16 LTL properties
Checking formula 0 : !((G("((dr_a>=1)&&(mr_cap>=1))")))
Formula 0 simplified : !G"((dr_a>=1)&&(mr_cap>=1))"
Presburger conditions satisfied. Using coverability to approximate state space in K-Induction.
Normalized transition count is 14
// Phase 1: matrix 14 rows 14 cols
invariant :da + da_a = 1
invariant :mr + mr_cap = 100
invariant :a + a_cap = 100
invariant :dr + dr_a = 1
invariant :ma + ma_cap = 100
invariant :c + c_cap = 100
invariant :r + r_cap = 100
Reverse transition relation is exact ! Faster fixpoint algorithm enabled.
Running compilation step : CommandLine [args=[gcc, -c, -I/home/mcc/BenchKit//lts_install_dir//include, -I., -std=c99, -fPIC, -O3, model.c], workingDir=/home/mcc/execution]
Compilation finished in 803 ms.
Running link step : CommandLine [args=[gcc, -shared, -o, gal.so, model.o], workingDir=/home/mcc/execution]
Link finished in 66 ms.
Running LTSmin : CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=1, -p, --pins-guards, --when, --ltl, []((LTLAP0==true)), --buchi-type=spotba], workingDir=/home/mcc/execution]
LTSmin run took 62 ms.
FORMULA CircadianClock-PT-000100-LTLFireability-00 FALSE TECHNIQUES PARTIAL_ORDER EXPLICIT LTSMIN SAT_SMT
Running LTSmin : CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=1, -p, --pins-guards, --when, --ltl, (LTLAP1==true), --buchi-type=spotba], workingDir=/home/mcc/execution]
LTSmin run took 46 ms.
FORMULA CircadianClock-PT-000100-LTLFireability-01 FALSE TECHNIQUES PARTIAL_ORDER EXPLICIT LTSMIN SAT_SMT
Running LTSmin : CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=1, -p, --pins-guards, --when, --ltl, (LTLAP2==true), --buchi-type=spotba], workingDir=/home/mcc/execution]
LTSmin run took 56 ms.
FORMULA CircadianClock-PT-000100-LTLFireability-02 FALSE TECHNIQUES PARTIAL_ORDER EXPLICIT LTSMIN SAT_SMT
Running LTSmin : CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=1, --when, --ltl, X(<>(<>(((LTLAP3==true))U((LTLAP4==true))))), --buchi-type=spotba], workingDir=/home/mcc/execution]
LTSmin run took 29 ms.
FORMULA CircadianClock-PT-000100-LTLFireability-03 FALSE TECHNIQUES PARTIAL_ORDER EXPLICIT LTSMIN SAT_SMT
Running LTSmin : CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=1, --when, --ltl, []((<>((LTLAP5==true)))U(X(X((LTLAP6==true))))), --buchi-type=spotba], workingDir=/home/mcc/execution]
LTSmin run took 27 ms.
FORMULA CircadianClock-PT-000100-LTLFireability-04 FALSE TECHNIQUES PARTIAL_ORDER EXPLICIT LTSMIN SAT_SMT
Running LTSmin : CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=1, -p, --pins-guards, --when, --ltl, (LTLAP3==true), --buchi-type=spotba], workingDir=/home/mcc/execution]
LTSmin run took 37 ms.
FORMULA CircadianClock-PT-000100-LTLFireability-05 FALSE TECHNIQUES PARTIAL_ORDER EXPLICIT LTSMIN SAT_SMT
Running LTSmin : CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=1, -p, --pins-guards, --when, --ltl, ([](<>((LTLAP7==true))))U([](<>([]((LTLAP8==true))))), --buchi-type=spotba], workingDir=/home/mcc/execution]
3 unique states visited
3 strongly connected components in search stack
3 transitions explored
3 items max in DFS search stack
403 ticks for the emptiness check
Model ,|S| ,Time ,Mem(kb) ,fin. SDD ,fin. DDD ,peak SDD ,peak DDD ,SDD Hom ,SDD cache peak ,DDD Hom ,DDD cachepeak ,SHom cache
STATS,0,4.07003,55364,1,0,6,237949,23,0,1345,264174,20
an accepting run exists (use option '-e' to print it)
Formula 0 is FALSE accepting run found.
FORMULA CircadianClock-PT-000100-LTLFireability-00 FALSE TECHNIQUES DECISION_DIAGRAMS TOPOLOGICAL
Checking formula 1 : !(("((dr_a>=1)&&(a_cap>=1))"))
Formula 1 simplified : !"((dr_a>=1)&&(a_cap>=1))"
3 unique states visited
3 strongly connected components in search stack
3 transitions explored
3 items max in DFS search stack
0 ticks for the emptiness check
Model ,|S| ,Time ,Mem(kb) ,fin. SDD ,fin. DDD ,peak SDD ,peak DDD ,SDD Hom ,SDD cache peak ,DDD Hom ,DDD cachepeak ,SHom cache
STATS,0,4.0709,55364,1,0,6,237949,26,0,1348,264174,22
an accepting run exists (use option '-e' to print it)
Formula 1 is FALSE accepting run found.
FORMULA CircadianClock-PT-000100-LTLFireability-01 FALSE TECHNIQUES DECISION_DIAGRAMS TOPOLOGICAL
Checking formula 2 : !(("(ma>=1)"))
Formula 2 simplified : !"(ma>=1)"
3 unique states visited
3 strongly connected components in search stack
3 transitions explored
3 items max in DFS search stack
0 ticks for the emptiness check
Model ,|S| ,Time ,Mem(kb) ,fin. SDD ,fin. DDD ,peak SDD ,peak DDD ,SDD Hom ,SDD cache peak ,DDD Hom ,DDD cachepeak ,SHom cache
STATS,0,4.07121,55364,1,0,6,237949,29,0,1349,264175,24
an accepting run exists (use option '-e' to print it)
Formula 2 is FALSE accepting run found.
FORMULA CircadianClock-PT-000100-LTLFireability-02 FALSE TECHNIQUES DECISION_DIAGRAMS TOPOLOGICAL
Checking formula 3 : !((X(F(F(("(a>=1)")U("((da_a>=1)&&(a_cap>=1))"))))))
Formula 3 simplified : !XF("(a>=1)" U "((da_a>=1)&&(a_cap>=1))")
LTSmin run took 45 ms.
FORMULA CircadianClock-PT-000100-LTLFireability-06 FALSE TECHNIQUES PARTIAL_ORDER EXPLICIT LTSMIN SAT_SMT
Running LTSmin : CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=1, -p, --pins-guards, --when, --ltl, <>([]((LTLAP0==true))), --buchi-type=spotba], workingDir=/home/mcc/execution]
LTSmin run took 41 ms.
FORMULA CircadianClock-PT-000100-LTLFireability-07 FALSE TECHNIQUES PARTIAL_ORDER EXPLICIT LTSMIN SAT_SMT
Running LTSmin : CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=1, --when, --ltl, X(<>((LTLAP9==true))), --buchi-type=spotba], workingDir=/home/mcc/execution]
LTSmin run took 29 ms.
FORMULA CircadianClock-PT-000100-LTLFireability-08 FALSE TECHNIQUES PARTIAL_ORDER EXPLICIT LTSMIN SAT_SMT
Running LTSmin : CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=1, --when, --ltl, <>([]([](X([]((LTLAP10==true)))))), --buchi-type=spotba], workingDir=/home/mcc/execution]
LTSmin run took 28 ms.
FORMULA CircadianClock-PT-000100-LTLFireability-09 FALSE TECHNIQUES PARTIAL_ORDER EXPLICIT LTSMIN SAT_SMT
Running LTSmin : CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=1, -p, --pins-guards, --when, --ltl, []((LTLAP6==true)), --buchi-type=spotba], workingDir=/home/mcc/execution]
LTSmin run took 218 ms.
FORMULA CircadianClock-PT-000100-LTLFireability-10 FALSE TECHNIQUES PARTIAL_ORDER EXPLICIT LTSMIN SAT_SMT
Running LTSmin : CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=1, -p, --pins-guards, --when, --ltl, [](([](<>((LTLAP11==true))))U(<>([]((LTLAP8==true))))), --buchi-type=spotba], workingDir=/home/mcc/execution]
LTSmin run took 30 ms.
FORMULA CircadianClock-PT-000100-LTLFireability-11 FALSE TECHNIQUES PARTIAL_ORDER EXPLICIT LTSMIN SAT_SMT
Running LTSmin : CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=1, --when, --ltl, <>([]((X((LTLAP0==true)))U(<>((LTLAP9==true))))), --buchi-type=spotba], workingDir=/home/mcc/execution]
LTSmin run took 24 ms.
FORMULA CircadianClock-PT-000100-LTLFireability-12 FALSE TECHNIQUES PARTIAL_ORDER EXPLICIT LTSMIN SAT_SMT
Running LTSmin : CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=1, --when, --ltl, X(((LTLAP4==true))U(((LTLAP6==true))U((LTLAP12==true)))), --buchi-type=spotba], workingDir=/home/mcc/execution]
LTSmin run took 24 ms.
FORMULA CircadianClock-PT-000100-LTLFireability-13 FALSE TECHNIQUES PARTIAL_ORDER EXPLICIT LTSMIN SAT_SMT
Running LTSmin : CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=1, --when, --ltl, (<>(<>(X((LTLAP7==true)))))U((<>((LTLAP11==true)))U(X((LTLAP13==true)))), --buchi-type=spotba], workingDir=/home/mcc/execution]
LTSmin run took 25 ms.
FORMULA CircadianClock-PT-000100-LTLFireability-14 FALSE TECHNIQUES PARTIAL_ORDER EXPLICIT LTSMIN SAT_SMT
Running LTSmin : CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=1, --when, --ltl, [](X(<>((LTLAP14==true)))), --buchi-type=spotba], workingDir=/home/mcc/execution]
LTSmin run took 43 ms.
FORMULA CircadianClock-PT-000100-LTLFireability-15 FALSE TECHNIQUES PARTIAL_ORDER EXPLICIT LTSMIN SAT_SMT
ITS tools runner thread asked to quit. Dying gracefully.

BK_STOP 1527577099026

--------------------
content from stderr:

+ export BINDIR=/home/mcc/BenchKit/
+ BINDIR=/home/mcc/BenchKit/
++ pwd
+ export MODEL=/home/mcc/execution
+ MODEL=/home/mcc/execution
+ /home/mcc/BenchKit//runeclipse.sh /home/mcc/execution LTLFireability -its -ltsminpath /home/mcc/BenchKit//lts_install_dir/ -smt
+ ulimit -s 65536
+ [[ -z '' ]]
+ export LTSMIN_MEM_SIZE=8589934592
+ LTSMIN_MEM_SIZE=8589934592
+ /home/mcc/BenchKit//itstools/its-tools -consoleLog -data /home/mcc/execution/workspace -pnfolder /home/mcc/execution -examination LTLFireability -z3path /home/mcc/BenchKit//z3/bin/z3 -yices2path /home/mcc/BenchKit//yices/bin/yices -its -ltsminpath /home/mcc/BenchKit//lts_install_dir/ -smt -vmargs -Dosgi.locking=none -Declipse.stateSaveDelayInterval=-1 -Dosgi.configuration.area=/tmp/.eclipse -Xss8m -Xms40m -Xmx8192m -Dfile.encoding=UTF-8 -Dosgi.requiredJavaVersion=1.6
May 29, 2018 6:58:13 AM fr.lip6.move.gal.application.Application start
INFO: Running its-tools with arguments : [-pnfolder, /home/mcc/execution, -examination, LTLFireability, -z3path, /home/mcc/BenchKit//z3/bin/z3, -yices2path, /home/mcc/BenchKit//yices/bin/yices, -its, -ltsminpath, /home/mcc/BenchKit//lts_install_dir/, -smt]
May 29, 2018 6:58:13 AM fr.lip6.move.gal.application.MccTranslator transformPNML
INFO: Parsing pnml file : /home/mcc/execution/model.pnml
May 29, 2018 6:58:13 AM fr.lip6.move.gal.nupn.PTNetReader loadFromXML
INFO: Load time of PNML (sax parser for PT used): 48 ms
May 29, 2018 6:58:13 AM fr.lip6.move.gal.pnml.togal.PTGALTransformer handlePage
INFO: Transformed 14 places.
May 29, 2018 6:58:13 AM fr.lip6.move.gal.pnml.togal.PTGALTransformer handlePage
INFO: Transformed 16 transitions.
May 29, 2018 6:58:13 AM fr.lip6.move.serialization.SerializationUtil systemToFile
INFO: Time to serialize gal into /home/mcc/execution/model.pnml.img.gal : 22 ms
May 29, 2018 6:58:13 AM fr.lip6.move.gal.instantiate.GALRewriter flatten
INFO: Flatten gal took : 44 ms
May 29, 2018 6:58:13 AM fr.lip6.move.serialization.SerializationUtil systemToFile
INFO: Time to serialize gal into /home/mcc/execution/LTLFireability.pnml.gal : 2 ms
May 29, 2018 6:58:13 AM fr.lip6.move.serialization.SerializationUtil serializePropertiesForITSLTLTools
INFO: Time to serialize properties into /home/mcc/execution/LTLFireability.ltl : 2 ms
May 29, 2018 6:58:14 AM fr.lip6.move.gal.semantics.DeterministicNextBuilder getDeterministicNext
INFO: Input system was already deterministic with 16 transitions.
May 29, 2018 6:58:14 AM fr.lip6.move.gal.gal2smt.bmc.KInductionSolver computeAndDeclareInvariants
INFO: Computed 7 place invariants in 10 ms
May 29, 2018 6:58:14 AM fr.lip6.move.gal.gal2smt.bmc.KInductionSolver init
INFO: Proved 14 variables to be positive in 178 ms
May 29, 2018 6:58:14 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver computeAblingMatrix
INFO: Computing symmetric may disable matrix : 16 transitions.
May 29, 2018 6:58:14 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of disable matrix completed :0/16 took 1 ms. Total solver calls (SAT/UNSAT): 0(0/0)
May 29, 2018 6:58:14 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of Complete disable matrix. took 2 ms. Total solver calls (SAT/UNSAT): 0(0/0)
May 29, 2018 6:58:14 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver computeAblingMatrix
INFO: Computing symmetric may enable matrix : 16 transitions.
May 29, 2018 6:58:14 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of Complete enable matrix. took 1 ms. Total solver calls (SAT/UNSAT): 0(0/0)
May 29, 2018 6:58:16 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver computeCoEnablingMatrix
INFO: Computing symmetric co enabling matrix : 16 transitions.
May 29, 2018 6:58:16 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of Finished co-enabling matrix. took 632 ms. Total solver calls (SAT/UNSAT): 47(39/8)
May 29, 2018 6:58:16 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver computeDoNotAccord
INFO: Computing Do-Not-Accords matrix : 16 transitions.
May 29, 2018 6:58:16 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of Completed DNA matrix. took 90 ms. Total solver calls (SAT/UNSAT): 22(0/22)
May 29, 2018 6:58:16 AM fr.lip6.move.gal.gal2pins.Gal2PinsTransformerNext transform
INFO: Built C files in 2841ms conformant to PINS in folder :/home/mcc/execution

Sequence of Actions to be Executed by the VM

This is useful if one wants to reexecute the tool in the VM from the submitted image disk.

set -x
# this is for BenchKit: configuration of major elements for the test
export BK_INPUT="CircadianClock-PT-000100"
export BK_EXAMINATION="LTLFireability"
export BK_TOOL="itstools"
export BK_RESULT_DIR="/tmp/BK_RESULTS/OUTPUTS"
export BK_TIME_CONFINEMENT="3600"
export BK_MEMORY_CONFINEMENT="16384"

# this is specific to your benchmark or test

export BIN_DIR="$HOME/BenchKit/bin"

# remove the execution directoty if it exists (to avoid increse of .vmdk images)
if [ -d execution ] ; then
rm -rf execution
fi

tar xzf /home/mcc/BenchKit/INPUTS/CircadianClock-PT-000100.tgz
mv CircadianClock-PT-000100 execution
cd execution
pwd
ls -lh

# this is for BenchKit: explicit launching of the test
echo "====================================================================="
echo " Generated by BenchKit 2-3637"
echo " Executing tool itstools"
echo " Input is CircadianClock-PT-000100, examination is LTLFireability"
echo " Time confinement is $BK_TIME_CONFINEMENT seconds"
echo " Memory confinement is 16384 MBytes"
echo " Number of cores is 4"
echo " Run identifier is r224-ebro-152732378800142"
echo "====================================================================="
echo
echo "--------------------"
echo "content from stdout:"
echo
echo "=== Data for post analysis generated by BenchKit (invocation template)"
echo
if [ "LTLFireability" = "UpperBounds" ] ; then
echo "The expected result is a vector of positive values"
echo NUM_VECTOR
elif [ "LTLFireability" != "StateSpace" ] ; then
echo "The expected result is a vector of booleans"
echo BOOL_VECTOR
else
echo "no data necessary for post analysis"
fi
echo
if [ -f "LTLFireability.txt" ] ; then
echo "here is the order used to build the result vector(from text file)"
for x in $(grep Property LTLFireability.txt | cut -d ' ' -f 2 | sort -u) ; do
echo "FORMULA_NAME $x"
done
elif [ -f "LTLFireability.xml" ] ; then # for cunf (txt files deleted;-)
echo echo "here is the order used to build the result vector(from xml file)"
for x in $(grep '' LTLFireability.xml | cut -d '>' -f 2 | cut -d '<' -f 1 | sort -u) ; do
echo "FORMULA_NAME $x"
done
fi
echo
echo "=== Now, execution of the tool begins"
echo
echo -n "BK_START "
date -u +%s%3N
echo
timeout -s 9 $BK_TIME_CONFINEMENT bash -c "/home/mcc/BenchKit/BenchKit_head.sh 2> STDERR ; echo ; echo -n \"BK_STOP \" ; date -u +%s%3N"
if [ $? -eq 137 ] ; then
echo
echo "BK_TIME_CONFINEMENT_REACHED"
fi
echo
echo "--------------------"
echo "content from stderr:"
echo
cat STDERR ;