fond
Model Checking Contest 2018
8th edition, Bratislava, Slovakia, June 26, 2018
Execution of r224-ebro-152732378700067
Last Updated
June 26, 2018

About the Execution of ITS-Tools for BridgeAndVehicles-COL-V80P50N10

Execution Summary
Max Memory
Used (MB)
Time wait (ms) CPU Usage (ms) I/O Wait (ms) Computed Result Execution
Status
15753.080 3600000.00 7242183.00 756.30 FTTF?TFF?FFFT?F? normal

Execution Chart

We display below the execution chart for this examination (boot time has been removed).

Trace from the execution

Waiting for the VM to be ready (probing ssh)
.....................
/home/mcc/execution
total 232K
-rw-r--r-- 1 mcc users 4.4K May 15 18:54 CTLCardinality.txt
-rw-r--r-- 1 mcc users 23K May 15 18:54 CTLCardinality.xml
-rw-r--r-- 1 mcc users 3.6K May 15 18:54 CTLFireability.txt
-rw-r--r-- 1 mcc users 22K May 15 18:54 CTLFireability.xml
-rw-r--r-- 1 mcc users 4.0K May 15 18:49 GenericPropertiesDefinition.xml
-rw-r--r-- 1 mcc users 6.1K May 15 18:49 GenericPropertiesVerdict.xml
-rw-r--r-- 1 mcc users 2.5K May 26 09:26 LTLCardinality.txt
-rw-r--r-- 1 mcc users 8.9K May 26 09:26 LTLCardinality.xml
-rw-r--r-- 1 mcc users 2.3K May 26 09:26 LTLFireability.txt
-rw-r--r-- 1 mcc users 9.9K May 26 09:26 LTLFireability.xml
-rw-r--r-- 1 mcc users 4.2K May 15 18:54 ReachabilityCardinality.txt
-rw-r--r-- 1 mcc users 19K May 15 18:54 ReachabilityCardinality.xml
-rw-r--r-- 1 mcc users 122 May 15 18:54 ReachabilityDeadlock.txt
-rw-r--r-- 1 mcc users 360 May 15 18:54 ReachabilityDeadlock.xml
-rw-r--r-- 1 mcc users 3.4K May 15 18:54 ReachabilityFireability.txt
-rw-r--r-- 1 mcc users 17K May 15 18:54 ReachabilityFireability.xml
-rw-r--r-- 1 mcc users 1.9K May 15 18:54 UpperBounds.txt
-rw-r--r-- 1 mcc users 3.9K May 15 18:54 UpperBounds.xml
-rw-r--r-- 1 mcc users 5 May 15 18:49 equiv_pt
-rw-r--r-- 1 mcc users 10 May 15 18:49 instance
-rw-r--r-- 1 mcc users 5 May 15 18:49 iscolored
-rw-r--r-- 1 mcc users 45K May 15 18:49 model.pnml
=====================================================================
Generated by BenchKit 2-3637
Executing tool itstools
Input is BridgeAndVehicles-COL-V80P50N10, examination is LTLCardinality
Time confinement is 3600 seconds
Memory confinement is 16384 MBytes
Number of cores is 4
Run identifier is r224-ebro-152732378700067
=====================================================================


--------------------
content from stdout:

=== Data for post analysis generated by BenchKit (invocation template)

The expected result is a vector of booleans
BOOL_VECTOR

here is the order used to build the result vector(from text file)
FORMULA_NAME BridgeAndVehicles-COL-V80P50N10-LTLCardinality-00
FORMULA_NAME BridgeAndVehicles-COL-V80P50N10-LTLCardinality-01
FORMULA_NAME BridgeAndVehicles-COL-V80P50N10-LTLCardinality-02
FORMULA_NAME BridgeAndVehicles-COL-V80P50N10-LTLCardinality-03
FORMULA_NAME BridgeAndVehicles-COL-V80P50N10-LTLCardinality-04
FORMULA_NAME BridgeAndVehicles-COL-V80P50N10-LTLCardinality-05
FORMULA_NAME BridgeAndVehicles-COL-V80P50N10-LTLCardinality-06
FORMULA_NAME BridgeAndVehicles-COL-V80P50N10-LTLCardinality-07
FORMULA_NAME BridgeAndVehicles-COL-V80P50N10-LTLCardinality-08
FORMULA_NAME BridgeAndVehicles-COL-V80P50N10-LTLCardinality-09
FORMULA_NAME BridgeAndVehicles-COL-V80P50N10-LTLCardinality-10
FORMULA_NAME BridgeAndVehicles-COL-V80P50N10-LTLCardinality-11
FORMULA_NAME BridgeAndVehicles-COL-V80P50N10-LTLCardinality-12
FORMULA_NAME BridgeAndVehicles-COL-V80P50N10-LTLCardinality-13
FORMULA_NAME BridgeAndVehicles-COL-V80P50N10-LTLCardinality-14
FORMULA_NAME BridgeAndVehicles-COL-V80P50N10-LTLCardinality-15

=== Now, execution of the tool begins

BK_START 1527561453850

02:37:37.593 [main] ERROR PNML validation - The rng grammar file can't be accessed : www.pnml.org
02:37:37.597 [main] ERROR import - Grammar file errors have been raised, the validation can't be done, process will continue without Grammar validation
Using solver Z3 to compute partial order matrices.
Built C files in :
/home/mcc/execution
Invoking ITS tools like this :CommandLine [args=[/home/mcc/BenchKit/itstools/plugins/fr.lip6.move.gal.itstools.binaries_1.0.0.201805151631/bin/its-ltl-linux64, --gc-threshold, 2000000, -i, /home/mcc/execution/LTLCardinality.pnml.gal, -t, CGAL, -LTL, /home/mcc/execution/LTLCardinality.ltl, -c, -stutter-deadlock], workingDir=/home/mcc/execution]

its-ltl command run as :

/home/mcc/BenchKit/itstools/plugins/fr.lip6.move.gal.itstools.binaries_1.0.0.201805151631/bin/its-ltl-linux64 --gc-threshold 2000000 -i /home/mcc/execution/LTLCardinality.pnml.gal -t CGAL -LTL /home/mcc/execution/LTLCardinality.ltl -c -stutter-deadlock
Read 16 LTL properties
Checking formula 0 : !((F(G("(ROUTE_A_0>=3)"))))
Formula 0 simplified : !FG"(ROUTE_A_0>=3)"
Running compilation step : CommandLine [args=[gcc, -c, -I/home/mcc/BenchKit//lts_install_dir//include, -I., -std=c99, -fPIC, -O3, model.c], workingDir=/home/mcc/execution]
Compilation finished in 33150 ms.
Running link step : CommandLine [args=[gcc, -shared, -o, gal.so, model.o], workingDir=/home/mcc/execution]
Link finished in 101 ms.
Running LTSmin : CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=1, -p, --pins-guards, --when, --ltl, <>([]((LTLAP0==true))), --buchi-type=spotba], workingDir=/home/mcc/execution]
LTSmin run took 25917 ms.
FORMULA BridgeAndVehicles-COL-V80P50N10-LTLCardinality-00 FALSE TECHNIQUES PARTIAL_ORDER EXPLICIT LTSMIN SAT_SMT
Running LTSmin : CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=1, -p, --pins-guards, --when, --ltl, (LTLAP1==true), --buchi-type=spotba], workingDir=/home/mcc/execution]
LTSmin run took 11349 ms.
FORMULA BridgeAndVehicles-COL-V80P50N10-LTLCardinality-01 TRUE TECHNIQUES PARTIAL_ORDER EXPLICIT LTSMIN SAT_SMT
Running LTSmin : CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=1, -p, --pins-guards, --when, --ltl, <>(<>(<>(<>((LTLAP2==true))))), --buchi-type=spotba], workingDir=/home/mcc/execution]
LTSmin run took 11266 ms.
FORMULA BridgeAndVehicles-COL-V80P50N10-LTLCardinality-02 TRUE TECHNIQUES PARTIAL_ORDER EXPLICIT LTSMIN SAT_SMT
Running LTSmin : CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=1, -p, --pins-guards, --when, --ltl, (LTLAP3==true), --buchi-type=spotba], workingDir=/home/mcc/execution]
LTSmin run took 27417 ms.
FORMULA BridgeAndVehicles-COL-V80P50N10-LTLCardinality-03 FALSE TECHNIQUES PARTIAL_ORDER EXPLICIT LTSMIN SAT_SMT
Running LTSmin : CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=1, --when, --ltl, <>(X(<>([]((LTLAP4==true))))), --buchi-type=spotba], workingDir=/home/mcc/execution]
WARNING : LTSmin timed out (>225 s) on command CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=1, --when, --ltl, <>(X(<>([]((LTLAP4==true))))), --buchi-type=spotba], workingDir=/home/mcc/execution]
Running LTSmin : CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=1, --when, --ltl, (<>(X((LTLAP5==true))))U(X(<>((LTLAP6==true)))), --buchi-type=spotba], workingDir=/home/mcc/execution]
LTSmin run took 109 ms.
FORMULA BridgeAndVehicles-COL-V80P50N10-LTLCardinality-05 TRUE TECHNIQUES PARTIAL_ORDER EXPLICIT LTSMIN SAT_SMT
Running LTSmin : CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=1, --when, --ltl, X(<>(<>((LTLAP7==true)))), --buchi-type=spotba], workingDir=/home/mcc/execution]
LTSmin run took 453 ms.
FORMULA BridgeAndVehicles-COL-V80P50N10-LTLCardinality-06 FALSE TECHNIQUES PARTIAL_ORDER EXPLICIT LTSMIN SAT_SMT
Running LTSmin : CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=1, -p, --pins-guards, --when, --ltl, (LTLAP8==true), --buchi-type=spotba], workingDir=/home/mcc/execution]
LTSmin run took 26774 ms.
FORMULA BridgeAndVehicles-COL-V80P50N10-LTLCardinality-07 FALSE TECHNIQUES PARTIAL_ORDER EXPLICIT LTSMIN SAT_SMT
Running LTSmin : CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=1, --when, --ltl, X(<>([](<>((LTLAP9==true))))), --buchi-type=spotba], workingDir=/home/mcc/execution]
WARNING : LTSmin timed out (>225 s) on command CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=1, --when, --ltl, X(<>([](<>((LTLAP9==true))))), --buchi-type=spotba], workingDir=/home/mcc/execution]
Running LTSmin : CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=1, -p, --pins-guards, --when, --ltl, (LTLAP10==true), --buchi-type=spotba], workingDir=/home/mcc/execution]
LTSmin run took 23543 ms.
FORMULA BridgeAndVehicles-COL-V80P50N10-LTLCardinality-09 FALSE TECHNIQUES PARTIAL_ORDER EXPLICIT LTSMIN SAT_SMT
Running LTSmin : CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=1, -p, --pins-guards, --when, --ltl, ((LTLAP11==true))U((LTLAP11==true)), --buchi-type=spotba], workingDir=/home/mcc/execution]
LTSmin run took 17449 ms.
FORMULA BridgeAndVehicles-COL-V80P50N10-LTLCardinality-10 FALSE TECHNIQUES PARTIAL_ORDER EXPLICIT LTSMIN SAT_SMT
Running LTSmin : CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=1, -p, --pins-guards, --when, --ltl, (LTLAP12==true), --buchi-type=spotba], workingDir=/home/mcc/execution]
LTSmin run took 18186 ms.
FORMULA BridgeAndVehicles-COL-V80P50N10-LTLCardinality-11 FALSE TECHNIQUES PARTIAL_ORDER EXPLICIT LTSMIN SAT_SMT
Running LTSmin : CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=1, -p, --pins-guards, --when, --ltl, (LTLAP13==true), --buchi-type=spotba], workingDir=/home/mcc/execution]
LTSmin run took 11274 ms.
FORMULA BridgeAndVehicles-COL-V80P50N10-LTLCardinality-12 TRUE TECHNIQUES PARTIAL_ORDER EXPLICIT LTSMIN SAT_SMT
Running LTSmin : CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=1, --when, --ltl, [](<>(X([]((LTLAP14==true))))), --buchi-type=spotba], workingDir=/home/mcc/execution]
WARNING : LTSmin timed out (>225 s) on command CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=1, --when, --ltl, [](<>(X([]((LTLAP14==true))))), --buchi-type=spotba], workingDir=/home/mcc/execution]
Running LTSmin : CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=1, --when, --ltl, <>([](X(X((LTLAP15==true))))), --buchi-type=spotba], workingDir=/home/mcc/execution]
LTSmin run took 454 ms.
FORMULA BridgeAndVehicles-COL-V80P50N10-LTLCardinality-14 FALSE TECHNIQUES PARTIAL_ORDER EXPLICIT LTSMIN SAT_SMT
Running LTSmin : CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=1, --when, --ltl, X(<>([]((LTLAP16==true)))), --buchi-type=spotba], workingDir=/home/mcc/execution]
WARNING : LTSmin timed out (>225 s) on command CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=1, --when, --ltl, X(<>([]((LTLAP16==true)))), --buchi-type=spotba], workingDir=/home/mcc/execution]
Retrying LTSmin with larger timeout 1800 s
Running LTSmin : CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=1, --when, --ltl, <>(X(<>([]((LTLAP4==true))))), --buchi-type=spotba], workingDir=/home/mcc/execution]
WARNING : LTSmin timed out (>1800 s) on command CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=1, --when, --ltl, <>(X(<>([]((LTLAP4==true))))), --buchi-type=spotba], workingDir=/home/mcc/execution]
Running LTSmin : CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=1, --when, --ltl, X(<>([](<>((LTLAP9==true))))), --buchi-type=spotba], workingDir=/home/mcc/execution]

BK_TIME_CONFINEMENT_REACHED

--------------------
content from stderr:

+ export BINDIR=/home/mcc/BenchKit/
+ BINDIR=/home/mcc/BenchKit/
++ pwd
+ export MODEL=/home/mcc/execution
+ MODEL=/home/mcc/execution
+ /home/mcc/BenchKit//runeclipse.sh /home/mcc/execution LTLCardinality -its -ltsminpath /home/mcc/BenchKit//lts_install_dir/ -smt
+ ulimit -s 65536
+ [[ -z '' ]]
+ export LTSMIN_MEM_SIZE=8589934592
+ LTSMIN_MEM_SIZE=8589934592
+ /home/mcc/BenchKit//itstools/its-tools -consoleLog -data /home/mcc/execution/workspace -pnfolder /home/mcc/execution -examination LTLCardinality -z3path /home/mcc/BenchKit//z3/bin/z3 -yices2path /home/mcc/BenchKit//yices/bin/yices -its -ltsminpath /home/mcc/BenchKit//lts_install_dir/ -smt -vmargs -Dosgi.locking=none -Declipse.stateSaveDelayInterval=-1 -Dosgi.configuration.area=/tmp/.eclipse -Xss8m -Xms40m -Xmx8192m -Dfile.encoding=UTF-8 -Dosgi.requiredJavaVersion=1.6
May 29, 2018 2:37:36 AM fr.lip6.move.gal.application.Application start
INFO: Running its-tools with arguments : [-pnfolder, /home/mcc/execution, -examination, LTLCardinality, -z3path, /home/mcc/BenchKit//z3/bin/z3, -yices2path, /home/mcc/BenchKit//yices/bin/yices, -its, -ltsminpath, /home/mcc/BenchKit//lts_install_dir/, -smt]
May 29, 2018 2:37:36 AM fr.lip6.move.gal.application.MccTranslator transformPNML
INFO: Parsing pnml file : /home/mcc/execution/model.pnml
May 29, 2018 2:37:37 AM fr.lip6.move.gal.pnml.togal.PnmlToGalTransformer transform
INFO: Detected file is not PT type :http://www.pnml.org/version-2009/grammar/symmetricnet
May 29, 2018 2:37:38 AM fr.lip6.move.gal.pnml.togal.PnmlToGalTransformer transform
INFO: Load time of PNML (colored model parsed with PNMLFW) : 1290 ms
May 29, 2018 2:37:38 AM fr.lip6.move.gal.pnml.togal.HLGALTransformer handlePage
INFO: Transformed 15 places.
May 29, 2018 2:37:38 AM fr.lip6.move.gal.pnml.togal.HLGALTransformer handlePage
INFO: Computed order using colors.
May 29, 2018 2:37:38 AM fr.lip6.move.gal.pnml.togal.HLGALTransformer handlePage
INFO: sort/places :sens->CONTROLEUR,CHOIX,VIDANGE,
compteur->COMPTEUR,
Dot->CAPACITE,SORTI_A,ROUTE_A,ATTENTE_A,SUR_PONT_A,SUR_PONT_B,ATTENTE_B,ROUTE_B,SORTI_B,
voitureA->NB_ATTENTE_A,
voitureB->NB_ATTENTE_B,

May 29, 2018 2:37:38 AM fr.lip6.move.gal.pnml.togal.HLGALTransformer handlePage
INFO: Transformed 11 transitions.
May 29, 2018 2:37:38 AM fr.lip6.move.gal.pnml.togal.PnmlToGalTransformer transform
INFO: Computed order based on color domains.
May 29, 2018 2:37:38 AM fr.lip6.move.serialization.SerializationUtil systemToFile
INFO: Time to serialize gal into /home/mcc/execution/model.pnml.img.gal : 11 ms
May 29, 2018 2:37:38 AM fr.lip6.move.gal.instantiate.Instantiator instantiateParameters
INFO: On-the-fly reduction of False transitions avoided exploring 179.0 instantiations of transitions. Total transitions/syncs built is 538
May 29, 2018 2:37:38 AM fr.lip6.move.gal.instantiate.GALRewriter flatten
INFO: Flatten gal took : 219 ms
May 29, 2018 2:37:39 AM fr.lip6.move.serialization.SerializationUtil systemToFile
INFO: Time to serialize gal into /home/mcc/execution/LTLCardinality.pnml.gal : 21 ms
May 29, 2018 2:37:39 AM fr.lip6.move.serialization.SerializationUtil serializePropertiesForITSLTLTools
INFO: Time to serialize properties into /home/mcc/execution/LTLCardinality.ltl : 12 ms
May 29, 2018 2:37:40 AM fr.lip6.move.gal.semantics.DeterministicNextBuilder getDeterministicNext
INFO: Input system was not deterministic with 11 transitions. Expanding to a total of 2311 deterministic transitions.
May 29, 2018 2:37:40 AM fr.lip6.move.gal.semantics.DeterministicNextBuilder getDeterministicNext
INFO: Determinization took 13 ms.
May 29, 2018 2:37:40 AM fr.lip6.move.gal.gal2pins.Gal2PinsTransformerNext transform
INFO: Too many transitions (2108) to apply POR reductions. Disabling POR matrices.
May 29, 2018 2:37:40 AM fr.lip6.move.gal.gal2pins.Gal2PinsTransformerNext transform
INFO: Built C files in 930ms conformant to PINS in folder :/home/mcc/execution

Sequence of Actions to be Executed by the VM

This is useful if one wants to reexecute the tool in the VM from the submitted image disk.

set -x
# this is for BenchKit: configuration of major elements for the test
export BK_INPUT="BridgeAndVehicles-COL-V80P50N10"
export BK_EXAMINATION="LTLCardinality"
export BK_TOOL="itstools"
export BK_RESULT_DIR="/tmp/BK_RESULTS/OUTPUTS"
export BK_TIME_CONFINEMENT="3600"
export BK_MEMORY_CONFINEMENT="16384"

# this is specific to your benchmark or test

export BIN_DIR="$HOME/BenchKit/bin"

# remove the execution directoty if it exists (to avoid increse of .vmdk images)
if [ -d execution ] ; then
rm -rf execution
fi

tar xzf /home/mcc/BenchKit/INPUTS/BridgeAndVehicles-COL-V80P50N10.tgz
mv BridgeAndVehicles-COL-V80P50N10 execution
cd execution
pwd
ls -lh

# this is for BenchKit: explicit launching of the test
echo "====================================================================="
echo " Generated by BenchKit 2-3637"
echo " Executing tool itstools"
echo " Input is BridgeAndVehicles-COL-V80P50N10, examination is LTLCardinality"
echo " Time confinement is $BK_TIME_CONFINEMENT seconds"
echo " Memory confinement is 16384 MBytes"
echo " Number of cores is 4"
echo " Run identifier is r224-ebro-152732378700067"
echo "====================================================================="
echo
echo "--------------------"
echo "content from stdout:"
echo
echo "=== Data for post analysis generated by BenchKit (invocation template)"
echo
if [ "LTLCardinality" = "UpperBounds" ] ; then
echo "The expected result is a vector of positive values"
echo NUM_VECTOR
elif [ "LTLCardinality" != "StateSpace" ] ; then
echo "The expected result is a vector of booleans"
echo BOOL_VECTOR
else
echo "no data necessary for post analysis"
fi
echo
if [ -f "LTLCardinality.txt" ] ; then
echo "here is the order used to build the result vector(from text file)"
for x in $(grep Property LTLCardinality.txt | cut -d ' ' -f 2 | sort -u) ; do
echo "FORMULA_NAME $x"
done
elif [ -f "LTLCardinality.xml" ] ; then # for cunf (txt files deleted;-)
echo echo "here is the order used to build the result vector(from xml file)"
for x in $(grep '' LTLCardinality.xml | cut -d '>' -f 2 | cut -d '<' -f 1 | sort -u) ; do
echo "FORMULA_NAME $x"
done
fi
echo
echo "=== Now, execution of the tool begins"
echo
echo -n "BK_START "
date -u +%s%3N
echo
timeout -s 9 $BK_TIME_CONFINEMENT bash -c "/home/mcc/BenchKit/BenchKit_head.sh 2> STDERR ; echo ; echo -n \"BK_STOP \" ; date -u +%s%3N"
if [ $? -eq 137 ] ; then
echo
echo "BK_TIME_CONFINEMENT_REACHED"
fi
echo
echo "--------------------"
echo "content from stderr:"
echo
cat STDERR ;