Execution Chart

We display below the execution chart for this examination (boot time has been removed).

Trace from the execution

Waiting for the VM to be ready (probing ssh)
.....................
/home/mcc/execution
total 216K
-rw-r--r-- 1 mcc users 4.4K May 15 18:54 CTLCardinality.txt
-rw-r--r-- 1 mcc users 23K May 15 18:54 CTLCardinality.xml
-rw-r--r-- 1 mcc users 2.9K May 15 18:54 CTLFireability.txt
-rw-r--r-- 1 mcc users 15K May 15 18:54 CTLFireability.xml
-rw-r--r-- 1 mcc users 4.0K May 15 18:49 GenericPropertiesDefinition.xml
-rw-r--r-- 1 mcc users 6.1K May 15 18:49 GenericPropertiesVerdict.xml
-rw-r--r-- 1 mcc users 2.5K May 26 09:26 LTLCardinality.txt
-rw-r--r-- 1 mcc users 9.5K May 26 09:26 LTLCardinality.xml
-rw-r--r-- 1 mcc users 2.2K May 26 09:26 LTLFireability.txt
-rw-r--r-- 1 mcc users 8.3K May 26 09:26 LTLFireability.xml
-rw-r--r-- 1 mcc users 3.8K May 15 18:54 ReachabilityCardinality.txt
-rw-r--r-- 1 mcc users 17K May 15 18:54 ReachabilityCardinality.xml
-rw-r--r-- 1 mcc users 122 May 15 18:54 ReachabilityDeadlock.txt
-rw-r--r-- 1 mcc users 360 May 15 18:54 ReachabilityDeadlock.xml
-rw-r--r-- 1 mcc users 3.8K May 15 18:54 ReachabilityFireability.txt
-rw-r--r-- 1 mcc users 19K May 15 18:54 ReachabilityFireability.xml
-rw-r--r-- 1 mcc users 1.9K May 15 18:54 UpperBounds.txt
-rw-r--r-- 1 mcc users 3.9K May 15 18:54 UpperBounds.xml
-rw-r--r-- 1 mcc users 5 May 15 18:49 equiv_pt
-rw-r--r-- 1 mcc users 10 May 15 18:49 instance
-rw-r--r-- 1 mcc users 5 May 15 18:49 iscolored
-rw-r--r-- 1 mcc users 42K May 15 18:49 model.pnml
=====================================================================
Generated by BenchKit 2-3637
Executing tool itstools
Input is BridgeAndVehicles-COL-V50P50N20, examination is LTLFireability
Time confinement is 3600 seconds
Memory confinement is 16384 MBytes
Number of cores is 4
Run identifier is r224-ebro-152732378700058
=====================================================================

--------------------
content from stdout:

=== Data for post analysis generated by BenchKit (invocation template)

The expected result is a vector of booleans
BOOL_VECTOR

here is the order used to build the result vector(from text file)
FORMULA_NAME BridgeAndVehicles-COL-V50P50N20-LTLFireability-00
FORMULA_NAME BridgeAndVehicles-COL-V50P50N20-LTLFireability-01
FORMULA_NAME BridgeAndVehicles-COL-V50P50N20-LTLFireability-02
FORMULA_NAME BridgeAndVehicles-COL-V50P50N20-LTLFireability-03
FORMULA_NAME BridgeAndVehicles-COL-V50P50N20-LTLFireability-04
FORMULA_NAME BridgeAndVehicles-COL-V50P50N20-LTLFireability-05
FORMULA_NAME BridgeAndVehicles-COL-V50P50N20-LTLFireability-06
FORMULA_NAME BridgeAndVehicles-COL-V50P50N20-LTLFireability-07
FORMULA_NAME BridgeAndVehicles-COL-V50P50N20-LTLFireability-08
FORMULA_NAME BridgeAndVehicles-COL-V50P50N20-LTLFireability-09
FORMULA_NAME BridgeAndVehicles-COL-V50P50N20-LTLFireability-10
FORMULA_NAME BridgeAndVehicles-COL-V50P50N20-LTLFireability-11
FORMULA_NAME BridgeAndVehicles-COL-V50P50N20-LTLFireability-12
FORMULA_NAME BridgeAndVehicles-COL-V50P50N20-LTLFireability-13
FORMULA_NAME BridgeAndVehicles-COL-V50P50N20-LTLFireability-14
FORMULA_NAME BridgeAndVehicles-COL-V50P50N20-LTLFireability-15

=== Now, execution of the tool begins

BK_START 1527557605132

01:33:28.725 [main] ERROR PNML validation - The rng grammar file can't be accessed : www.pnml.org
01:33:28.729 [main] ERROR import - Grammar file errors have been raised, the validation can't be done, process will continue without Grammar validation
Using solver Z3 to compute partial order matrices.
Built C files in :
/home/mcc/execution
Invoking ITS tools like this :CommandLine [args=[/home/mcc/BenchKit/itstools/plugins/fr.lip6.move.gal.itstools.binaries_1.0.0.201805151631/bin/its-ltl-linux64, --gc-threshold, 2000000, -i, /home/mcc/execution/LTLFireability.pnml.gal, -t, CGAL, -LTL, /home/mcc/execution/LTLFireability.ltl, -c, -stutter-deadlock], workingDir=/home/mcc/execution]

its-ltl command run as :

/home/mcc/BenchKit/itstools/plugins/fr.lip6.move.gal.itstools.binaries_1.0.0.201805151631/bin/its-ltl-linux64 --gc-threshold 2000000 -i /home/mcc/execution/LTLFireability.pnml.gal -t CGAL -LTL /home/mcc/execution/LTLFireability.ltl -c -stutter-deadlock
Read 16 LTL properties
Checking formula 0 : !((G(("(((((((((((((((((((((((((((((((((((((((((((((((((((((CAPACITE.CAPACITE_0>=1)&&(sens1.CONTROLEUR_1>=1))&&(ATTENTE_B.ATTENTE_B_0>=1))&&(voitureB1.NB_ATTENTE_B_1>=1))||((((CAPACITE.CAPACITE_0>=1)&&(sens1.CONTROLEUR_1>=1))&&(ATTENTE_B.ATTENTE_B_0>=1))&&(voitureB2.NB_ATTENTE_B_2>=1)))||((((CAPACITE.CAPACITE_0>=1)&&(sens1.CONTROLEUR_1>=1))&&(ATTENTE_B.ATTENTE_B_0>=1))&&(voitureB3.NB_ATTENTE_B_3>=1)))||((((CAPACITE.CAPACITE_0>=1)&&(sens1.CONTROLEUR_1>=1))&&(ATTENTE_B.ATTENTE_B_0>=1))&&(voitureB4.NB_ATTENTE_B_4>=1)))||((((CAPACITE.CAPACITE_0>=1)&&(sens1.CONTROLEUR_1>=1))&&(ATTENTE_B.ATTENTE_B_0>=1))&&(voitureB5.NB_ATTENTE_B_5>=1)))||((((CAPACITE.CAPACITE_0>=1)&&(sens1.CONTROLEUR_1>=1))&&(ATTENTE_B.ATTENTE_B_0>=1))&&(voitureB6.NB_ATTENTE_B_6>=1)))||((((CAPACITE.CAPACITE_0>=1)&&(sens1.CONTROLEUR_1>=1))&&(ATTENTE_B.ATTENTE_B_0>=1))&&(voitureB7.NB_ATTENTE_B_7>=1)))||((((CAPACITE.CAPACITE_0>=1)&&(sens1.CONTROLEUR_1>=1))&&(ATTENTE_B.ATTENTE_B_0>=1))&&(voitureB8.NB_ATTENTE_B_8>=1)))||((((CAPACITE.CAPACITE_0>=1)&&(sens1.CONTROLEUR_1>=1))&&(ATTENTE_B.ATTENTE_B_0>=1))&&(voitureB9.NB_ATTENTE_B_9>=1)))||((((CAPACITE.CAPACITE_0>=1)&&(sens1.CONTROLEUR_1>=1))&&(ATTENTE_B.ATTENTE_B_0>=1))&&(voitureB10.NB_ATTENTE_B_10>=1)))||((((CAPACITE.CAPACITE_0>=1)&&(sens1.CONTROLEUR_1>=1))&&(ATTENTE_B.ATTENTE_B_0>=1))&&(voitureB11.NB_ATTENTE_B_11>=1)))||((((CAPACITE.CAPACITE_0>=1)&&(sens1.CONTROLEUR_1>=1))&&(ATTENTE_B.ATTENTE_B_0>=1))&&(voitureB12.NB_ATTENTE_B_12>=1)))||((((CAPACITE.CAPACITE_0>=1)&&(sens1.CONTROLEUR_1>=1))&&(ATTENTE_B.ATTENTE_B_0>=1))&&(voitureB13.NB_ATTENTE_B_13>=1)))||((((CAPACITE.CAPACITE_0>=1)&&(sens1.CONTROLEUR_1>=1))&&(ATTENTE_B.ATTENTE_B_0>=1))&&(voitureB14.NB_ATTENTE_B_14>=1)))||((((CAPACITE.CAPACITE_0>=1)&&(sens1.CONTROLEUR_1>=1))&&(ATTENTE_B.ATTENTE_B_0>=1))&&(voitureB15.NB_ATTENTE_B_15>=1)))||((((CAPACITE.CAPACITE_0>=1)&&(sens1.CONTROLEUR_1>=1))&&(ATTENTE_B.ATTENTE_B_0>=1))&&(voitureB16.NB_ATTENTE_B_16>=1)))||((((CAPACITE.CAPACITE_0>=1)&&(sens1.CONTROLEUR_1>=1))&&(ATTENTE_B.ATTENTE_B_0>=1))&&(voitureB17.NB_ATTENTE_B_17>=1)))||((((CAPACITE.CAPACITE_0>=1)&&(sens1.CONTROLEUR_1>=1))&&(ATTENTE_B.ATTENTE_B_0>=1))&&(voitureB18.NB_ATTENTE_B_18>=1)))||((((CAPACITE.CAPACITE_0>=1)&&(sens1.CONTROLEUR_1>=1))&&(ATTENTE_B.ATTENTE_B_0>=1))&&(voitureB19.NB_ATTENTE_B_19>=1)))||((((CAPACITE.CAPACITE_0>=1)&&(sens1.CONTROLEUR_1>=1))&&(ATTENTE_B.ATTENTE_B_0>=1))&&(voitureB20.NB_ATTENTE_B_20>=1)))||((((CAPACITE.CAPACITE_0>=1)&&(sens1.CONTROLEUR_1>=1))&&(ATTENTE_B.ATTENTE_B_0>=1))&&(voitureB21.NB_ATTENTE_B_21>=1)))||((((CAPACITE.CAPACITE_0>=1)&&(sens1.CONTROLEUR_1>=1))&&(ATTENTE_B.ATTENTE_B_0>=1))&&(voitureB22.NB_ATTENTE_B_22>=1)))||((((CAPACITE.CAPACITE_0>=1)&&(sens1.CONTROLEUR_1>=1))&&(ATTENTE_B.ATTENTE_B_0>=1))&&(voitureB23.NB_ATTENTE_B_23>=1)))||((((CAPACITE.CAPACITE_0>=1)&&(sens1.CONTROLEUR_1>=1))&&(ATTENTE_B.ATTENTE_B_0>=1))&&(voitureB24.NB_ATTENTE_B_24>=1)))||((((CAPACITE.CAPACITE_0>=1)&&(sens1.CONTROLEUR_1>=1))&&(ATTENTE_B.ATTENTE_B_0>=1))&&(voitureB25.NB_ATTENTE_B_25>=1)))||((((CAPACITE.CAPACITE_0>=1)&&(sens1.CONTROLEUR_1>=1))&&(ATTENTE_B.ATTENTE_B_0>=1))&&(voitureB26.NB_ATTENTE_B_26>=1)))||((((CAPACITE.CAPACITE_0>=1)&&(sens1.CONTROLEUR_1>=1))&&(ATTENTE_B.ATTENTE_B_0>=1))&&(voitureB27.NB_ATTENTE_B_27>=1)))||((((CAPACITE.CAPACITE_0>=1)&&(sens1.CONTROLEUR_1>=1))&&(ATTENTE_B.ATTENTE_B_0>=1))&&(voitureB28.NB_ATTENTE_B_28>=1)))||((((CAPACITE.CAPACITE_0>=1)&&(sens1.CONTROLEUR_1>=1))&&(ATTENTE_B.ATTENTE_B_0>=1))&&(voitureB29.NB_ATTENTE_B_29>=1)))||((((CAPACITE.CAPACITE_0>=1)&&(sens1.CONTROLEUR_1>=1))&&(ATTENTE_B.ATTENTE_B_0>=1))&&(voitureB30.NB_ATTENTE_B_30>=1)))||((((CAPACITE.CAPACITE_0>=1)&&(sens1.CONTROLEUR_1>=1))&&(ATTENTE_B.ATTENTE_B_0>=1))&&(voitureB31.NB_ATTENTE_B_31>=1)))||((((CAPACITE.CAPACITE_0>=1)&&(sens1.CONTROLEUR_1>=1))&&(ATTENTE_B.ATTENTE_B_0>=1))&&(voitureB32.NB_ATTENTE_B_32>=1)))||((((CAPACITE.CAPACITE_0>=1)&&(sens1.CONTROLEUR_1>=1))&&(ATTENTE_B.ATTENTE_B_0>=1))&&(voitureB33.NB_ATTENTE_B_33>=1)))||((((CAPACITE.CAPACITE_0>=1)&&(sens1.CONTROLEUR_1>=1))&&(ATTENTE_B.ATTENTE_B_0>=1))&&(voitureB34.NB_ATTENTE_B_34>=1)))||((((CAPACITE.CAPACITE_0>=1)&&(sens1.CONTROLEUR_1>=1))&&(ATTENTE_B.ATTENTE_B_0>=1))&&(voitureB35.NB_ATTENTE_B_35>=1)))||((((CAPACITE.CAPACITE_0>=1)&&(sens1.CONTROLEUR_1>=1))&&(ATTENTE_B.ATTENTE_B_0>=1))&&(voitureB36.NB_ATTENTE_B_36>=1)))||((((CAPACITE.CAPACITE_0>=1)&&(sens1.CONTROLEUR_1>=1))&&(ATTENTE_B.ATTENTE_B_0>=1))&&(voitureB37.NB_ATTENTE_B_37>=1)))||((((CAPACITE.CAPACITE_0>=1)&&(sens1.CONTROLEUR_1>=1))&&(ATTENTE_B.ATTENTE_B_0>=1))&&(voitureB38.NB_ATTENTE_B_38>=1)))||((((CAPACITE.CAPACITE_0>=1)&&(sens1.CONTROLEUR_1>=1))&&(ATTENTE_B.ATTENTE_B_0>=1))&&(voitureB39.NB_ATTENTE_B_39>=1)))||((((CAPACITE.CAPACITE_0>=1)&&(sens1.CONTROLEUR_1>=1))&&(ATTENTE_B.ATTENTE_B_0>=1))&&(voitureB40.NB_ATTENTE_B_40>=1)))||((((CAPACITE.CAPACITE_0>=1)&&(sens1.CONTROLEUR_1>=1))&&(ATTENTE_B.ATTENTE_B_0>=1))&&(voitureB41.NB_ATTENTE_B_41>=1)))||((((CAPACITE.CAPACITE_0>=1)&&(sens1.CONTROLEUR_1>=1))&&(ATTENTE_B.ATTENTE_B_0>=1))&&(voitureB42.NB_ATTENTE_B_42>=1)))||((((CAPACITE.CAPACITE_0>=1)&&(sens1.CONTROLEUR_1>=1))&&(ATTENTE_B.ATTENTE_B_0>=1))&&(voitureB43.NB_ATTENTE_B_43>=1)))||((((CAPACITE.CAPACITE_0>=1)&&(sens1.CONTROLEUR_1>=1))&&(ATTENTE_B.ATTENTE_B_0>=1))&&(voitureB44.NB_ATTENTE_B_44>=1)))||((((CAPACITE.CAPACITE_0>=1)&&(sens1.CONTROLEUR_1>=1))&&(ATTENTE_B.ATTENTE_B_0>=1))&&(voitureB45.NB_ATTENTE_B_45>=1)))||((((CAPACITE.CAPACITE_0>=1)&&(sens1.CONTROLEUR_1>=1))&&(ATTENTE_B.ATTENTE_B_0>=1))&&(voitureB46.NB_ATTENTE_B_46>=1)))||((((CAPACITE.CAPACITE_0>=1)&&(sens1.CONTROLEUR_1>=1))&&(ATTENTE_B.ATTENTE_B_0>=1))&&(voitureB47.NB_ATTENTE_B_47>=1)))||((((CAPACITE.CAPACITE_0>=1)&&(sens1.CONTROLEUR_1>=1))&&(ATTENTE_B.ATTENTE_B_0>=1))&&(voitureB48.NB_ATTENTE_B_48>=1)))||((((CAPACITE.CAPACITE_0>=1)&&(sens1.CONTROLEUR_1>=1))&&(ATTENTE_B.ATTENTE_B_0>=1))&&(voitureB49.NB_ATTENTE_B_49>=1)))||((((CAPACITE.CAPACITE_0>=1)&&(sens1.CONTROLEUR_1>=1))&&(ATTENTE_B.ATTENTE_B_0>=1))&&(voitureB50.NB_ATTENTE_B_50>=1)))")U(X("(((compteur20.COMPTEUR_20>=1)&&(sens0.CHOIX_0>=1))||((compteur20.COMPTEUR_20>=1)&&(sens1.CHOIX_1>=1)))")))))
Formula 0 simplified : !G("(((((((((((((((((((((((((((((((((((((((((((((((((((((CAPACITE.CAPACITE_0>=1)&&(sens1.CONTROLEUR_1>=1))&&(ATTENTE_B.ATTENTE_B_0>=1))&&(voitureB1.NB_ATTENTE_B_1>=1))||((((CAPACITE.CAPACITE_0>=1)&&(sens1.CONTROLEUR_1>=1))&&(ATTENTE_B.ATTENTE_B_0>=1))&&(voitureB2.NB_ATTENTE_B_2>=1)))||((((CAPACITE.CAPACITE_0>=1)&&(sens1.CONTROLEUR_1>=1))&&(ATTENTE_B.ATTENTE_B_0>=1))&&(voitureB3.NB_ATTENTE_B_3>=1)))||((((CAPACITE.CAPACITE_0>=1)&&(sens1.CONTROLEUR_1>=1))&&(ATTENTE_B.ATTENTE_B_0>=1))&&(voitureB4.NB_ATTENTE_B_4>=1)))||((((CAPACITE.CAPACITE_0>=1)&&(sens1.CONTROLEUR_1>=1))&&(ATTENTE_B.ATTENTE_B_0>=1))&&(voitureB5.NB_ATTENTE_B_5>=1)))||((((CAPACITE.CAPACITE_0>=1)&&(sens1.CONTROLEUR_1>=1))&&(ATTENTE_B.ATTENTE_B_0>=1))&&(voitureB6.NB_ATTENTE_B_6>=1)))||((((CAPACITE.CAPACITE_0>=1)&&(sens1.CONTROLEUR_1>=1))&&(ATTENTE_B.ATTENTE_B_0>=1))&&(voitureB7.NB_ATTENTE_B_7>=1)))||((((CAPACITE.CAPACITE_0>=1)&&(sens1.CONTROLEUR_1>=1))&&(ATTENTE_B.ATTENTE_B_0>=1))&&(voitureB8.NB_ATTENTE_B_8>=1)))||((((CAPACITE.CAPACITE_0>=1)&&(sens1.CONTROLEUR_1>=1))&&(ATTENTE_B.ATTENTE_B_0>=1))&&(voitureB9.NB_ATTENTE_B_9>=1)))||((((CAPACITE.CAPACITE_0>=1)&&(sens1.CONTROLEUR_1>=1))&&(ATTENTE_B.ATTENTE_B_0>=1))&&(voitureB10.NB_ATTENTE_B_10>=1)))||((((CAPACITE.CAPACITE_0>=1)&&(sens1.CONTROLEUR_1>=1))&&(ATTENTE_B.ATTENTE_B_0>=1))&&(voitureB11.NB_ATTENTE_B_11>=1)))||((((CAPACITE.CAPACITE_0>=1)&&(sens1.CONTROLEUR_1>=1))&&(ATTENTE_B.ATTENTE_B_0>=1))&&(voitureB12.NB_ATTENTE_B_12>=1)))||((((CAPACITE.CAPACITE_0>=1)&&(sens1.CONTROLEUR_1>=1))&&(ATTENTE_B.ATTENTE_B_0>=1))&&(voitureB13.NB_ATTENTE_B_13>=1)))||((((CAPACITE.CAPACITE_0>=1)&&(sens1.CONTROLEUR_1>=1))&&(ATTENTE_B.ATTENTE_B_0>=1))&&(voitureB14.NB_ATTENTE_B_14>=1)))||((((CAPACITE.CAPACITE_0>=1)&&(sens1.CONTROLEUR_1>=1))&&(ATTENTE_B.ATTENTE_B_0>=1))&&(voitureB15.NB_ATTENTE_B_15>=1)))||((((CAPACITE.CAPACITE_0>=1)&&(sens1.CONTROLEUR_1>=1))&&(ATTENTE_B.ATTENTE_B_0>=1))&&(voitureB16.NB_ATTENTE_B_16>=1)))||((((CAPACITE.CAPACITE_0>=1)&&(sens1.CONTROLEUR_1>=1))&&(ATTENTE_B.ATTENTE_B_0>=1))&&(voitureB17.NB_ATTENTE_B_17>=1)))||((((CAPACITE.CAPACITE_0>=1)&&(sens1.CONTROLEUR_1>=1))&&(ATTENTE_B.ATTENTE_B_0>=1))&&(voitureB18.NB_ATTENTE_B_18>=1)))||((((CAPACITE.CAPACITE_0>=1)&&(sens1.CONTROLEUR_1>=1))&&(ATTENTE_B.ATTENTE_B_0>=1))&&(voitureB19.NB_ATTENTE_B_19>=1)))||((((CAPACITE.CAPACITE_0>=1)&&(sens1.CONTROLEUR_1>=1))&&(ATTENTE_B.ATTENTE_B_0>=1))&&(voitureB20.NB_ATTENTE_B_20>=1)))||((((CAPACITE.CAPACITE_0>=1)&&(sens1.CONTROLEUR_1>=1))&&(ATTENTE_B.ATTENTE_B_0>=1))&&(voitureB21.NB_ATTENTE_B_21>=1)))||((((CAPACITE.CAPACITE_0>=1)&&(sens1.CONTROLEUR_1>=1))&&(ATTENTE_B.ATTENTE_B_0>=1))&&(voitureB22.NB_ATTENTE_B_22>=1)))||((((CAPACITE.CAPACITE_0>=1)&&(sens1.CONTROLEUR_1>=1))&&(ATTENTE_B.ATTENTE_B_0>=1))&&(voitureB23.NB_ATTENTE_B_23>=1)))||((((CAPACITE.CAPACITE_0>=1)&&(sens1.CONTROLEUR_1>=1))&&(ATTENTE_B.ATTENTE_B_0>=1))&&(voitureB24.NB_ATTENTE_B_24>=1)))||((((CAPACITE.CAPACITE_0>=1)&&(sens1.CONTROLEUR_1>=1))&&(ATTENTE_B.ATTENTE_B_0>=1))&&(voitureB25.NB_ATTENTE_B_25>=1)))||((((CAPACITE.CAPACITE_0>=1)&&(sens1.CONTROLEUR_1>=1))&&(ATTENTE_B.ATTENTE_B_0>=1))&&(voitureB26.NB_ATTENTE_B_26>=1)))||((((CAPACITE.CAPACITE_0>=1)&&(sens1.CONTROLEUR_1>=1))&&(ATTENTE_B.ATTENTE_B_0>=1))&&(voitureB27.NB_ATTENTE_B_27>=1)))||((((CAPACITE.CAPACITE_0>=1)&&(sens1.CONTROLEUR_1>=1))&&(ATTENTE_B.ATTENTE_B_0>=1))&&(voitureB28.NB_ATTENTE_B_28>=1)))||((((CAPACITE.CAPACITE_0>=1)&&(sens1.CONTROLEUR_1>=1))&&(ATTENTE_B.ATTENTE_B_0>=1))&&(voitureB29.NB_ATTENTE_B_29>=1)))||((((CAPACITE.CAPACITE_0>=1)&&(sens1.CONTROLEUR_1>=1))&&(ATTENTE_B.ATTENTE_B_0>=1))&&(voitureB30.NB_ATTENTE_B_30>=1)))||((((CAPACITE.CAPACITE_0>=1)&&(sens1.CONTROLEUR_1>=1))&&(ATTENTE_B.ATTENTE_B_0>=1))&&(voitureB31.NB_ATTENTE_B_31>=1)))||((((CAPACITE.CAPACITE_0>=1)&&(sens1.CONTROLEUR_1>=1))&&(ATTENTE_B.ATTENTE_B_0>=1))&&(voitureB32.NB_ATTENTE_B_32>=1)))||((((CAPACITE.CAPACITE_0>=1)&&(sens1.CONTROLEUR_1>=1))&&(ATTENTE_B.ATTENTE_B_0>=1))&&(voitureB33.NB_ATTENTE_B_33>=1)))||((((CAPACITE.CAPACITE_0>=1)&&(sens1.CONTROLEUR_1>=1))&&(ATTENTE_B.ATTENTE_B_0>=1))&&(voitureB34.NB_ATTENTE_B_34>=1)))||((((CAPACITE.CAPACITE_0>=1)&&(sens1.CONTROLEUR_1>=1))&&(ATTENTE_B.ATTENTE_B_0>=1))&&(voitureB35.NB_ATTENTE_B_35>=1)))||((((CAPACITE.CAPACITE_0>=1)&&(sens1.CONTROLEUR_1>=1))&&(ATTENTE_B.ATTENTE_B_0>=1))&&(voitureB36.NB_ATTENTE_B_36>=1)))||((((CAPACITE.CAPACITE_0>=1)&&(sens1.CONTROLEUR_1>=1))&&(ATTENTE_B.ATTENTE_B_0>=1))&&(voitureB37.NB_ATTENTE_B_37>=1)))||((((CAPACITE.CAPACITE_0>=1)&&(sens1.CONTROLEUR_1>=1))&&(ATTENTE_B.ATTENTE_B_0>=1))&&(voitureB38.NB_ATTENTE_B_38>=1)))||((((CAPACITE.CAPACITE_0>=1)&&(sens1.CONTROLEUR_1>=1))&&(ATTENTE_B.ATTENTE_B_0>=1))&&(voitureB39.NB_ATTENTE_B_39>=1)))||((((CAPACITE.CAPACITE_0>=1)&&(sens1.CONTROLEUR_1>=1))&&(ATTENTE_B.ATTENTE_B_0>=1))&&(voitureB40.NB_ATTENTE_B_40>=1)))||((((CAPACITE.CAPACITE_0>=1)&&(sens1.CONTROLEUR_1>=1))&&(ATTENTE_B.ATTENTE_B_0>=1))&&(voitureB41.NB_ATTENTE_B_41>=1)))||((((CAPACITE.CAPACITE_0>=1)&&(sens1.CONTROLEUR_1>=1))&&(ATTENTE_B.ATTENTE_B_0>=1))&&(voitureB42.NB_ATTENTE_B_42>=1)))||((((CAPACITE.CAPACITE_0>=1)&&(sens1.CONTROLEUR_1>=1))&&(ATTENTE_B.ATTENTE_B_0>=1))&&(voitureB43.NB_ATTENTE_B_43>=1)))||((((CAPACITE.CAPACITE_0>=1)&&(sens1.CONTROLEUR_1>=1))&&(ATTENTE_B.ATTENTE_B_0>=1))&&(voitureB44.NB_ATTENTE_B_44>=1)))||((((CAPACITE.CAPACITE_0>=1)&&(sens1.CONTROLEUR_1>=1))&&(ATTENTE_B.ATTENTE_B_0>=1))&&(voitureB45.NB_ATTENTE_B_45>=1)))||((((CAPACITE.CAPACITE_0>=1)&&(sens1.CONTROLEUR_1>=1))&&(ATTENTE_B.ATTENTE_B_0>=1))&&(voitureB46.NB_ATTENTE_B_46>=1)))||((((CAPACITE.CAPACITE_0>=1)&&(sens1.CONTROLEUR_1>=1))&&(ATTENTE_B.ATTENTE_B_0>=1))&&(voitureB47.NB_ATTENTE_B_47>=1)))||((((CAPACITE.CAPACITE_0>=1)&&(sens1.CONTROLEUR_1>=1))&&(ATTENTE_B.ATTENTE_B_0>=1))&&(voitureB48.NB_ATTENTE_B_48>=1)))||((((CAPACITE.CAPACITE_0>=1)&&(sens1.CONTROLEUR_1>=1))&&(ATTENTE_B.ATTENTE_B_0>=1))&&(voitureB49.NB_ATTENTE_B_49>=1)))||((((CAPACITE.CAPACITE_0>=1)&&(sens1.CONTROLEUR_1>=1))&&(ATTENTE_B.ATTENTE_B_0>=1))&&(voitureB50.NB_ATTENTE_B_50>=1)))" U X"(((compteur20.COMPTEUR_20>=1)&&(sens0.CHOIX_0>=1))||((compteur20.COMPTEUR_20>=1)&&(sens1.CHOIX_1>=1)))")
built 359 ordering constraints for composite.
Running compilation step : CommandLine [args=[gcc, -c, -I/home/mcc/BenchKit//lts_install_dir//include, -I., -std=c99, -fPIC, -O3, model.c], workingDir=/home/mcc/execution]
Compilation finished in 40160 ms.
Running link step : CommandLine [args=[gcc, -shared, -o, gal.so, model.o], workingDir=/home/mcc/execution]
Link finished in 89 ms.
Running LTSmin : CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=1, --when, --ltl, [](((LTLAP0==true))U(X((LTLAP1==true)))), --buchi-type=spotba], workingDir=/home/mcc/execution]
LTSmin run took 349 ms.
FORMULA BridgeAndVehicles-COL-V50P50N20-LTLFireability-00 FALSE TECHNIQUES PARTIAL_ORDER EXPLICIT LTSMIN SAT_SMT
Running LTSmin : CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=1, -p, --pins-guards, --when, --ltl, []([](((LTLAP2==true))U((LTLAP3==true)))), --buchi-type=spotba], workingDir=/home/mcc/execution]
LTSmin run took 13730 ms.
FORMULA BridgeAndVehicles-COL-V50P50N20-LTLFireability-01 FALSE TECHNIQUES PARTIAL_ORDER EXPLICIT LTSMIN SAT_SMT
Running LTSmin : CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=1, --when, --ltl, <>(X(X(<>((LTLAP4==true))))), --buchi-type=spotba], workingDir=/home/mcc/execution]
LTSmin run took 64 ms.
FORMULA BridgeAndVehicles-COL-V50P50N20-LTLFireability-02 TRUE TECHNIQUES PARTIAL_ORDER EXPLICIT LTSMIN SAT_SMT
Running LTSmin : CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=1, --when, --ltl, [](<>((X((LTLAP5==true)))U([]((LTLAP6==true))))), --buchi-type=spotba], workingDir=/home/mcc/execution]
LTSmin run took 303 ms.
FORMULA BridgeAndVehicles-COL-V50P50N20-LTLFireability-03 FALSE TECHNIQUES PARTIAL_ORDER EXPLICIT LTSMIN SAT_SMT
Running LTSmin : CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=1, -p, --pins-guards, --when, --ltl, <>(<>(((LTLAP5==true))U(<>((LTLAP3==true))))), --buchi-type=spotba], workingDir=/home/mcc/execution]
WARNING : LTSmin timed out (>225 s) on command CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=1, -p, --pins-guards, --when, --ltl, <>(<>(((LTLAP5==true))U(<>((LTLAP3==true))))), --buchi-type=spotba], workingDir=/home/mcc/execution]
Running LTSmin : CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=1, -p, --pins-guards, --when, --ltl, (LTLAP0==true), --buchi-type=spotba], workingDir=/home/mcc/execution]
LTSmin run took 15269 ms.
FORMULA BridgeAndVehicles-COL-V50P50N20-LTLFireability-05 FALSE TECHNIQUES PARTIAL_ORDER EXPLICIT LTSMIN SAT_SMT
Running LTSmin : CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=1, -p, --pins-guards, --when, --ltl, <>((LTLAP7==true)), --buchi-type=spotba], workingDir=/home/mcc/execution]
WARNING : LTSmin timed out (>225 s) on command CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=1, -p, --pins-guards, --when, --ltl, <>((LTLAP7==true)), --buchi-type=spotba], workingDir=/home/mcc/execution]
Running LTSmin : CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=1, -p, --pins-guards, --when, --ltl, [](([](<>((LTLAP4==true))))U(((LTLAP4==true))U((LTLAP1==true)))), --buchi-type=spotba], workingDir=/home/mcc/execution]
LTSmin run took 11653 ms.
FORMULA BridgeAndVehicles-COL-V50P50N20-LTLFireability-07 FALSE TECHNIQUES PARTIAL_ORDER EXPLICIT LTSMIN SAT_SMT
Running LTSmin : CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=1, -p, --pins-guards, --when, --ltl, [](<>((LTLAP1==true))), --buchi-type=spotba], workingDir=/home/mcc/execution]
WARNING : LTSmin timed out (>225 s) on command CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=1, -p, --pins-guards, --when, --ltl, [](<>((LTLAP1==true))), --buchi-type=spotba], workingDir=/home/mcc/execution]
Running LTSmin : CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=1, -p, --pins-guards, --when, --ltl, []((LTLAP4==true)), --buchi-type=spotba], workingDir=/home/mcc/execution]
LTSmin run took 14431 ms.
FORMULA BridgeAndVehicles-COL-V50P50N20-LTLFireability-09 FALSE TECHNIQUES PARTIAL_ORDER EXPLICIT LTSMIN SAT_SMT
Running LTSmin : CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=1, -p, --pins-guards, --when, --ltl, ((LTLAP8==true))U((LTLAP0==true)), --buchi-type=spotba], workingDir=/home/mcc/execution]
LTSmin run took 14373 ms.
FORMULA BridgeAndVehicles-COL-V50P50N20-LTLFireability-10 FALSE TECHNIQUES PARTIAL_ORDER EXPLICIT LTSMIN SAT_SMT
Running LTSmin : CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=1, -p, --pins-guards, --when, --ltl, (LTLAP0==true), --buchi-type=spotba], workingDir=/home/mcc/execution]
LTSmin run took 15172 ms.
FORMULA BridgeAndVehicles-COL-V50P50N20-LTLFireability-11 FALSE TECHNIQUES PARTIAL_ORDER EXPLICIT LTSMIN SAT_SMT
Running LTSmin : CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=1, --when, --ltl, X((LTLAP6==true)), --buchi-type=spotba], workingDir=/home/mcc/execution]
LTSmin run took 380 ms.
FORMULA BridgeAndVehicles-COL-V50P50N20-LTLFireability-12 FALSE TECHNIQUES PARTIAL_ORDER EXPLICIT LTSMIN SAT_SMT
Running LTSmin : CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=1, --when, --ltl, []([](X(<>(<>((LTLAP4==true)))))), --buchi-type=spotba], workingDir=/home/mcc/execution]
WARNING : LTSmin timed out (>225 s) on command CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=1, --when, --ltl, []([](X(<>(<>((LTLAP4==true)))))), --buchi-type=spotba], workingDir=/home/mcc/execution]
Running LTSmin : CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=1, --when, --ltl, X(<>([]([]([]((LTLAP0==true)))))), --buchi-type=spotba], workingDir=/home/mcc/execution]
LTSmin run took 368 ms.
FORMULA BridgeAndVehicles-COL-V50P50N20-LTLFireability-14 FALSE TECHNIQUES PARTIAL_ORDER EXPLICIT LTSMIN SAT_SMT
Running LTSmin : CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=1, -p, --pins-guards, --when, --ltl, <>(<>((LTLAP2==true))), --buchi-type=spotba], workingDir=/home/mcc/execution]
LTSmin run took 5524 ms.
FORMULA BridgeAndVehicles-COL-V50P50N20-LTLFireability-15 TRUE TECHNIQUES PARTIAL_ORDER EXPLICIT LTSMIN SAT_SMT
Retrying LTSmin with larger timeout 1800 s
Running LTSmin : CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=1, -p, --pins-guards, --when, --ltl, <>(<>(((LTLAP5==true))U(<>((LTLAP3==true))))), --buchi-type=spotba], workingDir=/home/mcc/execution]
WARNING : LTSmin timed out (>1800 s) on command CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=1, -p, --pins-guards, --when, --ltl, <>(<>(((LTLAP5==true))U(<>((LTLAP3==true))))), --buchi-type=spotba], workingDir=/home/mcc/execution]
Running LTSmin : CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=1, -p, --pins-guards, --when, --ltl, <>((LTLAP7==true)), --buchi-type=spotba], workingDir=/home/mcc/execution]
WARNING : LTS min runner thread failed on error :java.lang.RuntimeException: Unexpected exception when executing ltsmin :CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=1, -p, --pins-guards, --when, --ltl, <>((LTLAP7==true)), --buchi-type=spotba], workingDir=/home/mcc/execution]
255
sparsehash FATAL ERROR: failed to allocate 33 groups

BK_STOP 1527560878594

--------------------
content from stderr:

+ export BINDIR=/home/mcc/BenchKit/
+ BINDIR=/home/mcc/BenchKit/
++ pwd
+ export MODEL=/home/mcc/execution
+ MODEL=/home/mcc/execution
+ /home/mcc/BenchKit//runeclipse.sh /home/mcc/execution LTLFireability -its -ltsminpath /home/mcc/BenchKit//lts_install_dir/ -smt
+ ulimit -s 65536
+ [[ -z '' ]]
+ export LTSMIN_MEM_SIZE=8589934592
+ LTSMIN_MEM_SIZE=8589934592
+ /home/mcc/BenchKit//itstools/its-tools -consoleLog -data /home/mcc/execution/workspace -pnfolder /home/mcc/execution -examination LTLFireability -z3path /home/mcc/BenchKit//z3/bin/z3 -yices2path /home/mcc/BenchKit//yices/bin/yices -its -ltsminpath /home/mcc/BenchKit//lts_install_dir/ -smt -vmargs -Dosgi.locking=none -Declipse.stateSaveDelayInterval=-1 -Dosgi.configuration.area=/tmp/.eclipse -Xss8m -Xms40m -Xmx8192m -Dfile.encoding=UTF-8 -Dosgi.requiredJavaVersion=1.6
May 29, 2018 1:33:28 AM fr.lip6.move.gal.application.Application start
INFO: Running its-tools with arguments : [-pnfolder, /home/mcc/execution, -examination, LTLFireability, -z3path, /home/mcc/BenchKit//z3/bin/z3, -yices2path, /home/mcc/BenchKit//yices/bin/yices, -its, -ltsminpath, /home/mcc/BenchKit//lts_install_dir/, -smt]
May 29, 2018 1:33:28 AM fr.lip6.move.gal.application.MccTranslator transformPNML
INFO: Parsing pnml file : /home/mcc/execution/model.pnml
May 29, 2018 1:33:28 AM fr.lip6.move.gal.pnml.togal.PnmlToGalTransformer transform
INFO: Detected file is not PT type :http://www.pnml.org/version-2009/grammar/symmetricnet
May 29, 2018 1:33:29 AM fr.lip6.move.gal.pnml.togal.PnmlToGalTransformer transform
INFO: Load time of PNML (colored model parsed with PNMLFW) : 1328 ms
May 29, 2018 1:33:29 AM fr.lip6.move.gal.pnml.togal.HLGALTransformer handlePage
INFO: Transformed 15 places.
May 29, 2018 1:33:29 AM fr.lip6.move.gal.pnml.togal.HLGALTransformer handlePage
INFO: Computed order using colors.
May 29, 2018 1:33:29 AM fr.lip6.move.gal.pnml.togal.HLGALTransformer handlePage
INFO: sort/places :sens->CONTROLEUR,CHOIX,VIDANGE,
compteur->COMPTEUR,
Dot->CAPACITE,SORTI_A,ROUTE_A,ATTENTE_A,SUR_PONT_A,SUR_PONT_B,ATTENTE_B,ROUTE_B,SORTI_B,
voitureA->NB_ATTENTE_A,
voitureB->NB_ATTENTE_B,

May 29, 2018 1:33:29 AM fr.lip6.move.gal.pnml.togal.HLGALTransformer handlePage
INFO: Transformed 11 transitions.
May 29, 2018 1:33:29 AM fr.lip6.move.gal.pnml.togal.PnmlToGalTransformer transform
INFO: Computed order based on color domains.
May 29, 2018 1:33:29 AM fr.lip6.move.serialization.SerializationUtil systemToFile
INFO: Time to serialize gal into /home/mcc/execution/model.pnml.img.gal : 13 ms
May 29, 2018 1:33:32 AM fr.lip6.move.gal.application.MccTranslator applyOrder
INFO: Applying decomposition
May 29, 2018 1:33:32 AM fr.lip6.move.gal.instantiate.CompositeBuilder decomposeWithOrder
INFO: Decomposing Gal with order
May 29, 2018 1:33:32 AM fr.lip6.move.gal.instantiate.Instantiator instantiateParameters
INFO: On-the-fly reduction of False transitions avoided exploring 129.0 instantiations of transitions. Total transitions/syncs built is 388
May 29, 2018 1:33:32 AM fr.lip6.move.gal.instantiate.GALRewriter flatten
INFO: Flatten gal took : 218 ms
May 29, 2018 1:33:34 AM fr.lip6.move.gal.instantiate.CompositeBuilder rewriteArraysToAllowPartition
INFO: Rewriting arrays NB_ATTENTE_A, NB_ATTENTE_B, CONTROLEUR, CHOIX, COMPTEUR, VIDANGE to variables to allow decomposition.
May 29, 2018 1:33:35 AM fr.lip6.move.gal.instantiate.Instantiator fuseIsomorphicEffects
INFO: Removed a total of 285 redundant transitions.
May 29, 2018 1:33:39 AM fr.lip6.move.serialization.SerializationUtil systemToFile
INFO: Time to serialize gal into /home/mcc/execution/LTLFireability.pnml.gal : 48 ms
May 29, 2018 1:33:39 AM fr.lip6.move.serialization.SerializationUtil serializePropertiesForITSLTLTools
INFO: Time to serialize properties into /home/mcc/execution/LTLFireability.ltl : 192 ms
May 29, 2018 1:33:40 AM fr.lip6.move.gal.semantics.DeterministicNextBuilder getDeterministicNext
INFO: Input system was not deterministic with 11 transitions. Expanding to a total of 2521 deterministic transitions.
May 29, 2018 1:33:40 AM fr.lip6.move.gal.semantics.DeterministicNextBuilder getDeterministicNext
INFO: Determinization took 35 ms.
May 29, 2018 1:33:40 AM fr.lip6.move.gal.gal2pins.Gal2PinsTransformerNext transform
INFO: Too many transitions (2348) to apply POR reductions. Disabling POR matrices.
May 29, 2018 1:33:41 AM fr.lip6.move.gal.gal2pins.Gal2PinsTransformerNext transform
INFO: Built C files in 1407ms conformant to PINS in folder :/home/mcc/execution
pins2lts-mc, 0.000: Registering PINS so language module
pins2lts-mc, 0.000, ** error **: out of memory trying to get 4294967296
java.lang.RuntimeException: Unexpected exception when executing ltsmin :CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=1, -p, --pins-guards, --when, --ltl, <>((LTLAP7==true)), --buchi-type=spotba], workingDir=/home/mcc/execution]
255
at fr.lip6.move.gal.application.LTSminRunner.checkProperty(LTSminRunner.java:167)
at fr.lip6.move.gal.application.LTSminRunner.access$9(LTSminRunner.java:122)
at fr.lip6.move.gal.application.LTSminRunner$1.run(LTSminRunner.java:98)
at java.lang.Thread.run(Thread.java:748)
ITS-tools command line returned an error code 1

Sequence of Actions to be Executed by the VM

This is useful if one wants to reexecute the tool in the VM from the submitted image disk.

set -x
# this is for BenchKit: configuration of major elements for the test
export BK_INPUT="BridgeAndVehicles-COL-V50P50N20"
export BK_EXAMINATION="LTLFireability"
export BK_TOOL="itstools"
export BK_RESULT_DIR="/tmp/BK_RESULTS/OUTPUTS"
export BK_TIME_CONFINEMENT="3600"
export BK_MEMORY_CONFINEMENT="16384"

# this is specific to your benchmark or test

export BIN_DIR="$HOME/BenchKit/bin"

# remove the execution directoty if it exists (to avoid increse of .vmdk images)
if [ -d execution ] ; then
rm -rf execution
fi

tar xzf /home/mcc/BenchKit/INPUTS/BridgeAndVehicles-COL-V50P50N20.tgz
mv BridgeAndVehicles-COL-V50P50N20 execution
cd execution
pwd
ls -lh

# this is for BenchKit: explicit launching of the test
echo "====================================================================="
echo " Generated by BenchKit 2-3637"
echo " Executing tool itstools"
echo " Input is BridgeAndVehicles-COL-V50P50N20, examination is LTLFireability"
echo " Time confinement is $BK_TIME_CONFINEMENT seconds"
echo " Memory confinement is 16384 MBytes"
echo " Number of cores is 4"
echo " Run identifier is r224-ebro-152732378700058"
echo "====================================================================="
echo
echo "--------------------"
echo "content from stdout:"
echo
echo "=== Data for post analysis generated by BenchKit (invocation template)"
echo
if [ "LTLFireability" = "UpperBounds" ] ; then
echo "The expected result is a vector of positive values"
echo NUM_VECTOR
elif [ "LTLFireability" != "StateSpace" ] ; then
echo "The expected result is a vector of booleans"
echo BOOL_VECTOR
else
echo "no data necessary for post analysis"
fi
echo
if [ -f "LTLFireability.txt" ] ; then
echo "here is the order used to build the result vector(from text file)"
for x in $(grep Property LTLFireability.txt | cut -d ' ' -f 2 | sort -u) ; do
echo "FORMULA_NAME $x"
done
elif [ -f "LTLFireability.xml" ] ; then # for cunf (txt files deleted;-)
echo echo "here is the order used to build the result vector(from xml file)"
for x in $(grep '' LTLFireability.xml | cut -d '>' -f 2 | cut -d '<' -f 1 | sort -u) ; do
echo "FORMULA_NAME $x"
done
fi
echo
echo "=== Now, execution of the tool begins"
echo
echo -n "BK_START "
date -u +%s%3N
echo
timeout -s 9 $BK_TIME_CONFINEMENT bash -c "/home/mcc/BenchKit/BenchKit_head.sh 2> STDERR ; echo ; echo -n \"BK_STOP \" ; date -u +%s%3N"
if [ $? -eq 137 ] ; then
echo
echo "BK_TIME_CONFINEMENT_REACHED"
fi
echo
echo "--------------------"
echo "content from stderr:"
echo
cat STDERR ;