About the Execution of ITS-Tools for BridgeAndVehicles-COL-V20P10N10
Execution Summary | |||||
Max Memory Used (MB) |
Time wait (ms) | CPU Usage (ms) | I/O Wait (ms) | Computed Result | Execution Status |
15754.590 | 3600000.00 | 5942145.00 | 913.90 | TFFFFFTFFTFFT?FF | normal |
Execution Chart
We display below the execution chart for this examination (boot time has been removed).
Trace from the execution
Waiting for the VM to be ready (probing ssh)
.....................
/home/mcc/execution
total 208K
-rw-r--r-- 1 mcc users 4.1K May 15 18:54 CTLCardinality.txt
-rw-r--r-- 1 mcc users 21K May 15 18:54 CTLCardinality.xml
-rw-r--r-- 1 mcc users 3.2K May 15 18:54 CTLFireability.txt
-rw-r--r-- 1 mcc users 17K May 15 18:54 CTLFireability.xml
-rw-r--r-- 1 mcc users 4.0K May 15 18:49 GenericPropertiesDefinition.xml
-rw-r--r-- 1 mcc users 6.1K May 15 18:49 GenericPropertiesVerdict.xml
-rw-r--r-- 1 mcc users 2.8K May 26 09:26 LTLCardinality.txt
-rw-r--r-- 1 mcc users 12K May 26 09:26 LTLCardinality.xml
-rw-r--r-- 1 mcc users 2.1K May 26 09:26 LTLFireability.txt
-rw-r--r-- 1 mcc users 7.9K May 26 09:26 LTLFireability.xml
-rw-r--r-- 1 mcc users 4.0K May 15 18:54 ReachabilityCardinality.txt
-rw-r--r-- 1 mcc users 18K May 15 18:54 ReachabilityCardinality.xml
-rw-r--r-- 1 mcc users 122 May 15 18:54 ReachabilityDeadlock.txt
-rw-r--r-- 1 mcc users 360 May 15 18:54 ReachabilityDeadlock.xml
-rw-r--r-- 1 mcc users 3.2K May 15 18:54 ReachabilityFireability.txt
-rw-r--r-- 1 mcc users 15K May 15 18:54 ReachabilityFireability.xml
-rw-r--r-- 1 mcc users 1.9K May 15 18:54 UpperBounds.txt
-rw-r--r-- 1 mcc users 4.0K May 15 18:54 UpperBounds.xml
-rw-r--r-- 1 mcc users 5 May 15 18:49 equiv_pt
-rw-r--r-- 1 mcc users 10 May 15 18:49 instance
-rw-r--r-- 1 mcc users 5 May 15 18:49 iscolored
-rw-r--r-- 1 mcc users 39K May 15 18:49 model.pnml
=====================================================================
Generated by BenchKit 2-3637
Executing tool itstools
Input is BridgeAndVehicles-COL-V20P10N10, examination is LTLCardinality
Time confinement is 3600 seconds
Memory confinement is 16384 MBytes
Number of cores is 4
Run identifier is r224-ebro-152732378700037
=====================================================================
--------------------
content from stdout:
=== Data for post analysis generated by BenchKit (invocation template)
The expected result is a vector of booleans
BOOL_VECTOR
here is the order used to build the result vector(from text file)
FORMULA_NAME BridgeAndVehicles-COL-V20P10N10-LTLCardinality-00
FORMULA_NAME BridgeAndVehicles-COL-V20P10N10-LTLCardinality-01
FORMULA_NAME BridgeAndVehicles-COL-V20P10N10-LTLCardinality-02
FORMULA_NAME BridgeAndVehicles-COL-V20P10N10-LTLCardinality-03
FORMULA_NAME BridgeAndVehicles-COL-V20P10N10-LTLCardinality-04
FORMULA_NAME BridgeAndVehicles-COL-V20P10N10-LTLCardinality-05
FORMULA_NAME BridgeAndVehicles-COL-V20P10N10-LTLCardinality-06
FORMULA_NAME BridgeAndVehicles-COL-V20P10N10-LTLCardinality-07
FORMULA_NAME BridgeAndVehicles-COL-V20P10N10-LTLCardinality-08
FORMULA_NAME BridgeAndVehicles-COL-V20P10N10-LTLCardinality-09
FORMULA_NAME BridgeAndVehicles-COL-V20P10N10-LTLCardinality-10
FORMULA_NAME BridgeAndVehicles-COL-V20P10N10-LTLCardinality-11
FORMULA_NAME BridgeAndVehicles-COL-V20P10N10-LTLCardinality-12
FORMULA_NAME BridgeAndVehicles-COL-V20P10N10-LTLCardinality-13
FORMULA_NAME BridgeAndVehicles-COL-V20P10N10-LTLCardinality-14
FORMULA_NAME BridgeAndVehicles-COL-V20P10N10-LTLCardinality-15
=== Now, execution of the tool begins
BK_START 1527549458979
23:17:43.329 [main] ERROR PNML validation - The rng grammar file can't be accessed : www.pnml.org
23:17:43.333 [main] ERROR import - Grammar file errors have been raised, the validation can't be done, process will continue without Grammar validation
Using solver Z3 to compute partial order matrices.
Built C files in :
/home/mcc/execution
Invoking ITS tools like this :CommandLine [args=[/home/mcc/BenchKit/itstools/plugins/fr.lip6.move.gal.itstools.binaries_1.0.0.201805151631/bin/its-ltl-linux64, --gc-threshold, 2000000, -i, /home/mcc/execution/LTLCardinality.pnml.gal, -t, CGAL, -LTL, /home/mcc/execution/LTLCardinality.ltl, -c, -stutter-deadlock], workingDir=/home/mcc/execution]
its-ltl command run as :
/home/mcc/BenchKit/itstools/plugins/fr.lip6.move.gal.itstools.binaries_1.0.0.201805151631/bin/its-ltl-linux64 --gc-threshold 2000000 -i /home/mcc/execution/LTLCardinality.pnml.gal -t CGAL -LTL /home/mcc/execution/LTLCardinality.ltl -c -stutter-deadlock
Read 16 LTL properties
Checking formula 0 : !(("(((((((((((COMPTEUR_0+COMPTEUR_1)+COMPTEUR_2)+COMPTEUR_3)+COMPTEUR_4)+COMPTEUR_5)+COMPTEUR_6)+COMPTEUR_7)+COMPTEUR_8)+COMPTEUR_9)+COMPTEUR_10)>=1)"))
Formula 0 simplified : !"(((((((((((COMPTEUR_0+COMPTEUR_1)+COMPTEUR_2)+COMPTEUR_3)+COMPTEUR_4)+COMPTEUR_5)+COMPTEUR_6)+COMPTEUR_7)+COMPTEUR_8)+COMPTEUR_9)+COMPTEUR_10)>=1)"
Presburger conditions satisfied. Using coverability to approximate state space in K-Induction.
Normalized transition count is 130
// Phase 1: matrix 130 rows 68 cols
invariant :CAPACITE_0 + SUR_PONT_A_0 + -1'ATTENTE_B_0 + -1'ROUTE_B_0 + -1'SORTI_B_0 = -10
invariant :COMPTEUR_0 + COMPTEUR_1 + COMPTEUR_2 + COMPTEUR_3 + COMPTEUR_4 + COMPTEUR_5 + COMPTEUR_6 + COMPTEUR_7 + COMPTEUR_8 + COMPTEUR_9 + COMPTEUR_10 = 1
invariant :SORTI_A_0 + ROUTE_A_0 + ATTENTE_A_0 + SUR_PONT_A_0 = 20
invariant :CONTROLEUR_0 + CONTROLEUR_1 + CHOIX_0 + CHOIX_1 + VIDANGE_0 + VIDANGE_1 = 1
invariant :NB_ATTENTE_B_0 + NB_ATTENTE_B_1 + NB_ATTENTE_B_2 + NB_ATTENTE_B_3 + NB_ATTENTE_B_4 + NB_ATTENTE_B_5 + NB_ATTENTE_B_6 + NB_ATTENTE_B_7 + NB_ATTENTE_B_8 + NB_ATTENTE_B_9 + NB_ATTENTE_B_10 + NB_ATTENTE_B_11 + NB_ATTENTE_B_12 + NB_ATTENTE_B_13 + NB_ATTENTE_B_14 + NB_ATTENTE_B_15 + NB_ATTENTE_B_16 + NB_ATTENTE_B_17 + NB_ATTENTE_B_18 + NB_ATTENTE_B_19 + NB_ATTENTE_B_20 = 1
invariant :SUR_PONT_B_0 + ATTENTE_B_0 + ROUTE_B_0 + SORTI_B_0 = 20
invariant :NB_ATTENTE_A_0 + NB_ATTENTE_A_1 + NB_ATTENTE_A_2 + NB_ATTENTE_A_3 + NB_ATTENTE_A_4 + NB_ATTENTE_A_5 + NB_ATTENTE_A_6 + NB_ATTENTE_A_7 + NB_ATTENTE_A_8 + NB_ATTENTE_A_9 + NB_ATTENTE_A_10 + NB_ATTENTE_A_11 + NB_ATTENTE_A_12 + NB_ATTENTE_A_13 + NB_ATTENTE_A_14 + NB_ATTENTE_A_15 + NB_ATTENTE_A_16 + NB_ATTENTE_A_17 + NB_ATTENTE_A_18 + NB_ATTENTE_A_19 + NB_ATTENTE_A_20 = 1
Running compilation step : CommandLine [args=[gcc, -c, -I/home/mcc/BenchKit//lts_install_dir//include, -I., -std=c99, -fPIC, -O3, model.c], workingDir=/home/mcc/execution]
Compilation finished in 12873 ms.
Running link step : CommandLine [args=[gcc, -shared, -o, gal.so, model.o], workingDir=/home/mcc/execution]
Link finished in 82 ms.
Running LTSmin : CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=1, -p, --pins-guards, --when, --ltl, (LTLAP0==true), --buchi-type=spotba], workingDir=/home/mcc/execution]
LTSmin run took 378 ms.
FORMULA BridgeAndVehicles-COL-V20P10N10-LTLCardinality-00 TRUE TECHNIQUES PARTIAL_ORDER EXPLICIT LTSMIN SAT_SMT
Running LTSmin : CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=1, --when, --ltl, [](X((LTLAP1==true))), --buchi-type=spotba], workingDir=/home/mcc/execution]
LTSmin run took 65 ms.
FORMULA BridgeAndVehicles-COL-V20P10N10-LTLCardinality-01 FALSE TECHNIQUES PARTIAL_ORDER EXPLICIT LTSMIN SAT_SMT
Running LTSmin : CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=1, --when, --ltl, X(((LTLAP2==true))U(X((LTLAP3==true)))), --buchi-type=spotba], workingDir=/home/mcc/execution]
LTSmin run took 106 ms.
FORMULA BridgeAndVehicles-COL-V20P10N10-LTLCardinality-02 FALSE TECHNIQUES PARTIAL_ORDER EXPLICIT LTSMIN SAT_SMT
Running LTSmin : CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=1, --when, --ltl, (X([]((LTLAP4==true))))U([](<>((LTLAP5==true)))), --buchi-type=spotba], workingDir=/home/mcc/execution]
LTSmin run took 640 ms.
FORMULA BridgeAndVehicles-COL-V20P10N10-LTLCardinality-03 FALSE TECHNIQUES PARTIAL_ORDER EXPLICIT LTSMIN SAT_SMT
Running LTSmin : CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=1, -p, --pins-guards, --when, --ltl, ([](<>((LTLAP6==true))))U((LTLAP7==true)), --buchi-type=spotba], workingDir=/home/mcc/execution]
LTSmin run took 385 ms.
FORMULA BridgeAndVehicles-COL-V20P10N10-LTLCardinality-04 FALSE TECHNIQUES PARTIAL_ORDER EXPLICIT LTSMIN SAT_SMT
Running LTSmin : CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=1, -p, --pins-guards, --when, --ltl, []([]([]([]((LTLAP8==true))))), --buchi-type=spotba], workingDir=/home/mcc/execution]
LTSmin run took 383 ms.
FORMULA BridgeAndVehicles-COL-V20P10N10-LTLCardinality-05 FALSE TECHNIQUES PARTIAL_ORDER EXPLICIT LTSMIN SAT_SMT
Running LTSmin : CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=1, --when, --ltl, X((LTLAP9==true)), --buchi-type=spotba], workingDir=/home/mcc/execution]
LTSmin run took 41 ms.
FORMULA BridgeAndVehicles-COL-V20P10N10-LTLCardinality-06 TRUE TECHNIQUES PARTIAL_ORDER EXPLICIT LTSMIN SAT_SMT
Running LTSmin : CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=1, --when, --ltl, X(X(X((LTLAP10==true)))), --buchi-type=spotba], workingDir=/home/mcc/execution]
LTSmin run took 70 ms.
FORMULA BridgeAndVehicles-COL-V20P10N10-LTLCardinality-07 FALSE TECHNIQUES PARTIAL_ORDER EXPLICIT LTSMIN SAT_SMT
Running LTSmin : CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=1, -p, --pins-guards, --when, --ltl, <>((LTLAP11==true)), --buchi-type=spotba], workingDir=/home/mcc/execution]
LTSmin run took 501 ms.
FORMULA BridgeAndVehicles-COL-V20P10N10-LTLCardinality-08 FALSE TECHNIQUES PARTIAL_ORDER EXPLICIT LTSMIN SAT_SMT
Running LTSmin : CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=1, -p, --pins-guards, --when, --ltl, (LTLAP12==true), --buchi-type=spotba], workingDir=/home/mcc/execution]
LTSmin run took 329 ms.
FORMULA BridgeAndVehicles-COL-V20P10N10-LTLCardinality-09 TRUE TECHNIQUES PARTIAL_ORDER EXPLICIT LTSMIN SAT_SMT
Running LTSmin : CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=1, -p, --pins-guards, --when, --ltl, (((LTLAP13==true))U((LTLAP14==true)))U((LTLAP15==true)), --buchi-type=spotba], workingDir=/home/mcc/execution]
LTSmin run took 427 ms.
FORMULA BridgeAndVehicles-COL-V20P10N10-LTLCardinality-10 FALSE TECHNIQUES PARTIAL_ORDER EXPLICIT LTSMIN SAT_SMT
Running LTSmin : CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=1, -p, --pins-guards, --when, --ltl, (LTLAP16==true), --buchi-type=spotba], workingDir=/home/mcc/execution]
LTSmin run took 402 ms.
FORMULA BridgeAndVehicles-COL-V20P10N10-LTLCardinality-11 FALSE TECHNIQUES PARTIAL_ORDER EXPLICIT LTSMIN SAT_SMT
Running LTSmin : CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=1, --when, --ltl, (<>([]((LTLAP17==true))))U(X(<>((LTLAP18==true)))), --buchi-type=spotba], workingDir=/home/mcc/execution]
LTSmin run took 41 ms.
FORMULA BridgeAndVehicles-COL-V20P10N10-LTLCardinality-12 TRUE TECHNIQUES PARTIAL_ORDER EXPLICIT LTSMIN SAT_SMT
Running LTSmin : CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=1, -p, --pins-guards, --when, --ltl, (((LTLAP19==true))U((LTLAP20==true)))U([](<>((LTLAP21==true)))), --buchi-type=spotba], workingDir=/home/mcc/execution]
Reverse transition relation is NOT exact ! Due to transitions enregistrement_A, liberation_A, basculement, liberation_B, enregistrement_B, altern_cpt, timeout_A, timeout_B, Intersection with reachable at each step enabled. (destroyed/reverse/intersect/total) :0/3/8/11
Computing Next relation with stutter on 20 deadlock states
1 unique states visited
0 strongly connected components in search stack
0 transitions explored
1 items max in DFS search stack
27604 ticks for the emptiness check
Model ,|S| ,Time ,Mem(kb) ,fin. SDD ,fin. DDD ,peak SDD ,peak DDD ,SDD Hom ,SDD cache peak ,DDD Hom ,DDD cachepeak ,SHom cache
STATS,0,276.126,2125548,1,0,42,1.23856e+07,42,15,2337,9.33387e+06,30
no accepting run found
Formula 0 is TRUE no accepting run found.
FORMULA BridgeAndVehicles-COL-V20P10N10-LTLCardinality-00 TRUE TECHNIQUES DECISION_DIAGRAMS TOPOLOGICAL USE_NUPN
Checking formula 1 : !((G(X("((CONTROLEUR_0+CONTROLEUR_1)>=1)"))))
Formula 1 simplified : !GX"((CONTROLEUR_0+CONTROLEUR_1)>=1)"
Computing Next relation with stutter on 20 deadlock states
WARNING : LTSmin timed out (>225 s) on command CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=1, -p, --pins-guards, --when, --ltl, (((LTLAP19==true))U((LTLAP20==true)))U([](<>((LTLAP21==true)))), --buchi-type=spotba], workingDir=/home/mcc/execution]
Running LTSmin : CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=1, --when, --ltl, (<>((LTLAP22==true)))U(X(X((LTLAP23==true)))), --buchi-type=spotba], workingDir=/home/mcc/execution]
LTSmin run took 69 ms.
FORMULA BridgeAndVehicles-COL-V20P10N10-LTLCardinality-14 FALSE TECHNIQUES PARTIAL_ORDER EXPLICIT LTSMIN SAT_SMT
Running LTSmin : CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=1, --when, --ltl, X((LTLAP7==true)), --buchi-type=spotba], workingDir=/home/mcc/execution]
LTSmin run took 89 ms.
FORMULA BridgeAndVehicles-COL-V20P10N10-LTLCardinality-15 FALSE TECHNIQUES PARTIAL_ORDER EXPLICIT LTSMIN SAT_SMT
Retrying LTSmin with larger timeout 1800 s
Running LTSmin : CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=1, -p, --pins-guards, --when, --ltl, (((LTLAP19==true))U((LTLAP20==true)))U([](<>((LTLAP21==true)))), --buchi-type=spotba], workingDir=/home/mcc/execution]
4 unique states visited
4 strongly connected components in search stack
4 transitions explored
4 items max in DFS search stack
111965 ticks for the emptiness check
Model ,|S| ,Time ,Mem(kb) ,fin. SDD ,fin. DDD ,peak SDD ,peak DDD ,SDD Hom ,SDD cache peak ,DDD Hom ,DDD cachepeak ,SHom cache
STATS,0,1395.78,4733336,1,0,178,3.07362e+07,18,230,1235,2.0172e+07,354
an accepting run exists (use option '-e' to print it)
Formula 1 is FALSE accepting run found.
FORMULA BridgeAndVehicles-COL-V20P10N10-LTLCardinality-01 FALSE TECHNIQUES DECISION_DIAGRAMS TOPOLOGICAL USE_NUPN
Checking formula 2 : !((X(("(ATTENTE_B_0>=2)")U(X("(((((((((((((((((((((NB_ATTENTE_A_0+NB_ATTENTE_A_1)+NB_ATTENTE_A_2)+NB_ATTENTE_A_3)+NB_ATTENTE_A_4)+NB_ATTENTE_A_5)+NB_ATTENTE_A_6)+NB_ATTENTE_A_7)+NB_ATTENTE_A_8)+NB_ATTENTE_A_9)+NB_ATTENTE_A_10)+NB_ATTENTE_A_11)+NB_ATTENTE_A_12)+NB_ATTENTE_A_13)+NB_ATTENTE_A_14)+NB_ATTENTE_A_15)+NB_ATTENTE_A_16)+NB_ATTENTE_A_17)+NB_ATTENTE_A_18)+NB_ATTENTE_A_19)+NB_ATTENTE_A_20)>=2)")))))
Formula 2 simplified : !X("(ATTENTE_B_0>=2)" U X"(((((((((((((((((((((NB_ATTENTE_A_0+NB_ATTENTE_A_1)+NB_ATTENTE_A_2)+NB_ATTENTE_A_3)+NB_ATTENTE_A_4)+NB_ATTENTE_A_5)+NB_ATTENTE_A_6)+NB_ATTENTE_A_7)+NB_ATTENTE_A_8)+NB_ATTENTE_A_9)+NB_ATTENTE_A_10)+NB_ATTENTE_A_11)+NB_ATTENTE_A_12)+NB_ATTENTE_A_13)+NB_ATTENTE_A_14)+NB_ATTENTE_A_15)+NB_ATTENTE_A_16)+NB_ATTENTE_A_17)+NB_ATTENTE_A_18)+NB_ATTENTE_A_19)+NB_ATTENTE_A_20)>=2)")
Computing Next relation with stutter on 20 deadlock states
WARNING : LTSmin timed out (>1800 s) on command CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=1, -p, --pins-guards, --when, --ltl, (((LTLAP19==true))U((LTLAP20==true)))U([](<>((LTLAP21==true)))), --buchi-type=spotba], workingDir=/home/mcc/execution]
5 unique states visited
5 strongly connected components in search stack
5 transitions explored
5 items max in DFS search stack
97339 ticks for the emptiness check
Model ,|S| ,Time ,Mem(kb) ,fin. SDD ,fin. DDD ,peak SDD ,peak DDD ,SDD Hom ,SDD cache peak ,DDD Hom ,DDD cachepeak ,SHom cache
STATS,0,2369.17,6045428,1,0,248,3.93959e+07,19,370,1298,2.58621e+07,564
an accepting run exists (use option '-e' to print it)
Formula 2 is FALSE accepting run found.
FORMULA BridgeAndVehicles-COL-V20P10N10-LTLCardinality-02 FALSE TECHNIQUES DECISION_DIAGRAMS TOPOLOGICAL USE_NUPN
Checking formula 3 : !(((X(G("(SUR_PONT_B_0>=2)")))U(G(F("(ROUTE_A_0>=1)")))))
Formula 3 simplified : !(XG"(SUR_PONT_B_0>=2)" U GF"(ROUTE_A_0>=1)")
Computing Next relation with stutter on 20 deadlock states
BK_TIME_CONFINEMENT_REACHED
--------------------
content from stderr:
+ export BINDIR=/home/mcc/BenchKit/
+ BINDIR=/home/mcc/BenchKit/
++ pwd
+ export MODEL=/home/mcc/execution
+ MODEL=/home/mcc/execution
+ /home/mcc/BenchKit//runeclipse.sh /home/mcc/execution LTLCardinality -its -ltsminpath /home/mcc/BenchKit//lts_install_dir/ -smt
+ ulimit -s 65536
+ [[ -z '' ]]
+ export LTSMIN_MEM_SIZE=8589934592
+ LTSMIN_MEM_SIZE=8589934592
+ /home/mcc/BenchKit//itstools/its-tools -consoleLog -data /home/mcc/execution/workspace -pnfolder /home/mcc/execution -examination LTLCardinality -z3path /home/mcc/BenchKit//z3/bin/z3 -yices2path /home/mcc/BenchKit//yices/bin/yices -its -ltsminpath /home/mcc/BenchKit//lts_install_dir/ -smt -vmargs -Dosgi.locking=none -Declipse.stateSaveDelayInterval=-1 -Dosgi.configuration.area=/tmp/.eclipse -Xss8m -Xms40m -Xmx8192m -Dfile.encoding=UTF-8 -Dosgi.requiredJavaVersion=1.6
May 28, 2018 11:17:42 PM fr.lip6.move.gal.application.Application start
INFO: Running its-tools with arguments : [-pnfolder, /home/mcc/execution, -examination, LTLCardinality, -z3path, /home/mcc/BenchKit//z3/bin/z3, -yices2path, /home/mcc/BenchKit//yices/bin/yices, -its, -ltsminpath, /home/mcc/BenchKit//lts_install_dir/, -smt]
May 28, 2018 11:17:42 PM fr.lip6.move.gal.application.MccTranslator transformPNML
INFO: Parsing pnml file : /home/mcc/execution/model.pnml
May 28, 2018 11:17:42 PM fr.lip6.move.gal.pnml.togal.PnmlToGalTransformer transform
INFO: Detected file is not PT type :http://www.pnml.org/version-2009/grammar/symmetricnet
May 28, 2018 11:17:44 PM fr.lip6.move.gal.pnml.togal.PnmlToGalTransformer transform
INFO: Load time of PNML (colored model parsed with PNMLFW) : 1327 ms
May 28, 2018 11:17:44 PM fr.lip6.move.gal.pnml.togal.HLGALTransformer handlePage
INFO: Transformed 15 places.
May 28, 2018 11:17:44 PM fr.lip6.move.gal.pnml.togal.HLGALTransformer handlePage
INFO: Computed order using colors.
May 28, 2018 11:17:44 PM fr.lip6.move.gal.pnml.togal.HLGALTransformer handlePage
INFO: sort/places :sens->CONTROLEUR,CHOIX,VIDANGE,
compteur->COMPTEUR,
Dot->CAPACITE,SORTI_A,ROUTE_A,ATTENTE_A,SUR_PONT_A,SUR_PONT_B,ATTENTE_B,ROUTE_B,SORTI_B,
voitureA->NB_ATTENTE_A,
voitureB->NB_ATTENTE_B,
May 28, 2018 11:17:44 PM fr.lip6.move.gal.pnml.togal.HLGALTransformer handlePage
INFO: Transformed 11 transitions.
May 28, 2018 11:17:44 PM fr.lip6.move.gal.pnml.togal.PnmlToGalTransformer transform
INFO: Computed order based on color domains.
May 28, 2018 11:17:44 PM fr.lip6.move.serialization.SerializationUtil systemToFile
INFO: Time to serialize gal into /home/mcc/execution/model.pnml.img.gal : 11 ms
May 28, 2018 11:17:44 PM fr.lip6.move.gal.instantiate.Instantiator instantiateParameters
INFO: On-the-fly reduction of False transitions avoided exploring 59.0 instantiations of transitions. Total transitions/syncs built is 178
May 28, 2018 11:17:44 PM fr.lip6.move.gal.instantiate.GALRewriter flatten
INFO: Flatten gal took : 207 ms
May 28, 2018 11:17:44 PM fr.lip6.move.serialization.SerializationUtil systemToFile
INFO: Time to serialize gal into /home/mcc/execution/LTLCardinality.pnml.gal : 16 ms
May 28, 2018 11:17:44 PM fr.lip6.move.serialization.SerializationUtil serializePropertiesForITSLTLTools
INFO: Time to serialize properties into /home/mcc/execution/LTLCardinality.ltl : 2 ms
May 28, 2018 11:17:45 PM fr.lip6.move.gal.semantics.DeterministicNextBuilder getDeterministicNext
INFO: Input system was not deterministic with 11 transitions. Expanding to a total of 631 deterministic transitions.
May 28, 2018 11:17:45 PM fr.lip6.move.gal.semantics.DeterministicNextBuilder getDeterministicNext
INFO: Determinization took 8 ms.
May 28, 2018 11:17:46 PM fr.lip6.move.gal.gal2smt.bmc.KInductionSolver computeAndDeclareInvariants
INFO: Computed 7 place invariants in 89 ms
May 28, 2018 11:17:47 PM fr.lip6.move.gal.gal2smt.bmc.KInductionSolver init
INFO: Proved 68 variables to be positive in 883 ms
May 28, 2018 11:17:47 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver computeAblingMatrix
INFO: Computing symmetric may disable matrix : 548 transitions.
May 28, 2018 11:17:47 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of disable matrix completed :0/548 took 1 ms. Total solver calls (SAT/UNSAT): 0(0/0)
May 28, 2018 11:17:47 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of Complete disable matrix. took 145 ms. Total solver calls (SAT/UNSAT): 0(0/0)
May 28, 2018 11:17:47 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver computeAblingMatrix
INFO: Computing symmetric may enable matrix : 548 transitions.
May 28, 2018 11:17:47 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of Complete enable matrix. took 87 ms. Total solver calls (SAT/UNSAT): 0(0/0)
May 28, 2018 11:18:14 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver computeCoEnablingMatrix
INFO: Computing symmetric co enabling matrix : 548 transitions.
May 28, 2018 11:18:16 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(0/548) took 2340 ms. Total solver calls (SAT/UNSAT): 481(221/260)
May 28, 2018 11:18:20 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(3/548) took 6316 ms. Total solver calls (SAT/UNSAT): 1918(260/1658)
May 28, 2018 11:18:24 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(5/548) took 9840 ms. Total solver calls (SAT/UNSAT): 2871(286/2585)
May 28, 2018 11:18:27 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(9/548) took 13051 ms. Total solver calls (SAT/UNSAT): 4765(338/4427)
May 28, 2018 11:18:30 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(13/548) took 16395 ms. Total solver calls (SAT/UNSAT): 6643(390/6253)
May 28, 2018 11:18:33 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(19/548) took 19709 ms. Total solver calls (SAT/UNSAT): 9430(468/8962)
May 28, 2018 11:18:37 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(23/548) took 22967 ms. Total solver calls (SAT/UNSAT): 11003(548/10455)
May 28, 2018 11:18:41 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(29/548) took 27688 ms. Total solver calls (SAT/UNSAT): 14126(560/13566)
May 28, 2018 11:18:45 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(33/548) took 31008 ms. Total solver calls (SAT/UNSAT): 16188(568/15620)
May 28, 2018 11:18:49 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(37/548) took 35636 ms. Total solver calls (SAT/UNSAT): 18234(576/17658)
May 28, 2018 11:18:53 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(41/548) took 38735 ms. Total solver calls (SAT/UNSAT): 20264(584/19680)
May 28, 2018 11:18:56 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(46/548) took 41899 ms. Total solver calls (SAT/UNSAT): 22251(918/21333)
May 28, 2018 11:18:59 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(49/548) took 44907 ms. Total solver calls (SAT/UNSAT): 23682(1011/22671)
May 28, 2018 11:19:02 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(53/548) took 48602 ms. Total solver calls (SAT/UNSAT): 25576(1135/24441)
May 28, 2018 11:19:06 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(58/548) took 51838 ms. Total solver calls (SAT/UNSAT): 27921(1290/26631)
May 28, 2018 11:19:09 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(62/548) took 54994 ms. Total solver calls (SAT/UNSAT): 29779(1414/28365)
May 28, 2018 11:19:12 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(67/548) took 58030 ms. Total solver calls (SAT/UNSAT): 32123(1507/30616)
May 28, 2018 11:19:15 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(73/548) took 61087 ms. Total solver calls (SAT/UNSAT): 34982(1507/33475)
May 28, 2018 11:19:18 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(78/548) took 64359 ms. Total solver calls (SAT/UNSAT): 37337(1507/35830)
May 28, 2018 11:19:22 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(80/548) took 67828 ms. Total solver calls (SAT/UNSAT): 38272(1507/36765)
May 28, 2018 11:19:25 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(85/548) took 70914 ms. Total solver calls (SAT/UNSAT): 40592(1507/39085)
May 28, 2018 11:19:28 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(93/548) took 73941 ms. Total solver calls (SAT/UNSAT): 44252(1507/42745)
May 28, 2018 11:19:31 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(101/548) took 76946 ms. Total solver calls (SAT/UNSAT): 47848(1507/46341)
May 28, 2018 11:19:34 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(108/548) took 79999 ms. Total solver calls (SAT/UNSAT): 50942(1507/49435)
May 28, 2018 11:19:37 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(113/548) took 83511 ms. Total solver calls (SAT/UNSAT): 53122(1507/51615)
May 28, 2018 11:19:40 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(122/548) took 86686 ms. Total solver calls (SAT/UNSAT): 56983(1507/55476)
May 28, 2018 11:19:45 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(129/548) took 90927 ms. Total solver calls (SAT/UNSAT): 59930(1507/58423)
May 28, 2018 11:19:48 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(132/548) took 94391 ms. Total solver calls (SAT/UNSAT): 61178(1507/59671)
May 28, 2018 11:19:51 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(136/548) took 97516 ms. Total solver calls (SAT/UNSAT): 62828(1507/61321)
May 28, 2018 11:19:54 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(143/548) took 100676 ms. Total solver calls (SAT/UNSAT): 65677(1507/64170)
May 28, 2018 11:19:58 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(147/548) took 103923 ms. Total solver calls (SAT/UNSAT): 67283(1507/65776)
May 28, 2018 11:20:01 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(153/548) took 107120 ms. Total solver calls (SAT/UNSAT): 69662(1507/68155)
May 28, 2018 11:20:04 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(161/548) took 110670 ms. Total solver calls (SAT/UNSAT): 72778(1507/71271)
May 28, 2018 11:20:08 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(165/548) took 114000 ms. Total solver calls (SAT/UNSAT): 74312(1507/72805)
May 28, 2018 11:20:11 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(172/548) took 117073 ms. Total solver calls (SAT/UNSAT): 76958(1507/75451)
May 28, 2018 11:20:14 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(184/548) took 120171 ms. Total solver calls (SAT/UNSAT): 81380(1507/79873)
May 28, 2018 11:20:17 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(199/548) took 123237 ms. Total solver calls (SAT/UNSAT): 86705(1507/85198)
May 28, 2018 11:20:20 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(215/548) took 126379 ms. Total solver calls (SAT/UNSAT): 92137(1507/90630)
May 28, 2018 11:20:23 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(230/548) took 129421 ms. Total solver calls (SAT/UNSAT): 96997(1507/95490)
May 28, 2018 11:20:26 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(244/548) took 132426 ms. Total solver calls (SAT/UNSAT): 101330(1507/99823)
May 28, 2018 11:20:29 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(262/548) took 135521 ms. Total solver calls (SAT/UNSAT): 106613(1507/105106)
May 28, 2018 11:20:32 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(281/548) took 138629 ms. Total solver calls (SAT/UNSAT): 111838(1507/110331)
May 28, 2018 11:20:35 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(301/548) took 141717 ms. Total solver calls (SAT/UNSAT): 116948(1507/115441)
May 28, 2018 11:20:39 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(323/548) took 144748 ms. Total solver calls (SAT/UNSAT): 122107(1507/120600)
May 28, 2018 11:20:42 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(349/548) took 147804 ms. Total solver calls (SAT/UNSAT): 127580(1507/126073)
May 28, 2018 11:20:45 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(378/548) took 150877 ms. Total solver calls (SAT/UNSAT): 132887(1507/131380)
May 28, 2018 11:20:48 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(411/548) took 153936 ms. Total solver calls (SAT/UNSAT): 137903(1507/136396)
May 28, 2018 11:20:51 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(447/548) took 157092 ms. Total solver calls (SAT/UNSAT): 142133(1507/140626)
May 28, 2018 11:20:54 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(470/548) took 160477 ms. Total solver calls (SAT/UNSAT): 144157(1507/142650)
May 28, 2018 11:20:57 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(510/548) took 163508 ms. Total solver calls (SAT/UNSAT): 146417(1507/144910)
May 28, 2018 11:20:58 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of Finished co-enabling matrix. took 164591 ms. Total solver calls (SAT/UNSAT): 147083(1507/145576)
May 28, 2018 11:20:58 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver computeDoNotAccord
INFO: Computing Do-Not-Accords matrix : 548 transitions.
May 28, 2018 11:21:00 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of Completed DNA matrix. took 1731 ms. Total solver calls (SAT/UNSAT): 85(0/85)
May 28, 2018 11:21:00 PM fr.lip6.move.gal.gal2pins.Gal2PinsTransformerNext transform
INFO: Built C files in 195596ms conformant to PINS in folder :/home/mcc/execution
Sequence of Actions to be Executed by the VM
This is useful if one wants to reexecute the tool in the VM from the submitted image disk.
set -x
# this is for BenchKit: configuration of major elements for the test
export BK_INPUT="BridgeAndVehicles-COL-V20P10N10"
export BK_EXAMINATION="LTLCardinality"
export BK_TOOL="itstools"
export BK_RESULT_DIR="/tmp/BK_RESULTS/OUTPUTS"
export BK_TIME_CONFINEMENT="3600"
export BK_MEMORY_CONFINEMENT="16384"
# this is specific to your benchmark or test
export BIN_DIR="$HOME/BenchKit/bin"
# remove the execution directoty if it exists (to avoid increse of .vmdk images)
if [ -d execution ] ; then
rm -rf execution
fi
tar xzf /home/mcc/BenchKit/INPUTS/BridgeAndVehicles-COL-V20P10N10.tgz
mv BridgeAndVehicles-COL-V20P10N10 execution
cd execution
pwd
ls -lh
# this is for BenchKit: explicit launching of the test
echo "====================================================================="
echo " Generated by BenchKit 2-3637"
echo " Executing tool itstools"
echo " Input is BridgeAndVehicles-COL-V20P10N10, examination is LTLCardinality"
echo " Time confinement is $BK_TIME_CONFINEMENT seconds"
echo " Memory confinement is 16384 MBytes"
echo " Number of cores is 4"
echo " Run identifier is r224-ebro-152732378700037"
echo "====================================================================="
echo
echo "--------------------"
echo "content from stdout:"
echo
echo "=== Data for post analysis generated by BenchKit (invocation template)"
echo
if [ "LTLCardinality" = "UpperBounds" ] ; then
echo "The expected result is a vector of positive values"
echo NUM_VECTOR
elif [ "LTLCardinality" != "StateSpace" ] ; then
echo "The expected result is a vector of booleans"
echo BOOL_VECTOR
else
echo "no data necessary for post analysis"
fi
echo
if [ -f "LTLCardinality.txt" ] ; then
echo "here is the order used to build the result vector(from text file)"
for x in $(grep Property LTLCardinality.txt | cut -d ' ' -f 2 | sort -u) ; do
echo "FORMULA_NAME $x"
done
elif [ -f "LTLCardinality.xml" ] ; then # for cunf (txt files deleted;-)
echo echo "here is the order used to build the result vector(from xml file)"
for x in $(grep '
echo "FORMULA_NAME $x"
done
fi
echo
echo "=== Now, execution of the tool begins"
echo
echo -n "BK_START "
date -u +%s%3N
echo
timeout -s 9 $BK_TIME_CONFINEMENT bash -c "/home/mcc/BenchKit/BenchKit_head.sh 2> STDERR ; echo ; echo -n \"BK_STOP \" ; date -u +%s%3N"
if [ $? -eq 137 ] ; then
echo
echo "BK_TIME_CONFINEMENT_REACHED"
fi
echo
echo "--------------------"
echo "content from stderr:"
echo
cat STDERR ;