fond
Model Checking Contest 2018
8th edition, Bratislava, Slovakia, June 26, 2018
Execution of r224-ebro-152732378700033
Last Updated
June 26, 2018

About the Execution of ITS-Tools for BridgeAndVehicles-COL-V04P05N02

Execution Summary
Max Memory
Used (MB)
Time wait (ms) CPU Usage (ms) I/O Wait (ms) Computed Result Execution
Status
15754.550 17948.00 42600.00 311.50 FFTTTFFFFFFTTTFT normal

Execution Chart

We display below the execution chart for this examination (boot time has been removed).

Trace from the execution

Waiting for the VM to be ready (probing ssh)
...................
/home/mcc/execution
total 224K
-rw-r--r-- 1 mcc users 4.4K May 15 18:54 CTLCardinality.txt
-rw-r--r-- 1 mcc users 23K May 15 18:54 CTLCardinality.xml
-rw-r--r-- 1 mcc users 3.1K May 15 18:54 CTLFireability.txt
-rw-r--r-- 1 mcc users 17K May 15 18:54 CTLFireability.xml
-rw-r--r-- 1 mcc users 4.0K May 15 18:49 GenericPropertiesDefinition.xml
-rw-r--r-- 1 mcc users 6.1K May 15 18:49 GenericPropertiesVerdict.xml
-rw-r--r-- 1 mcc users 2.7K May 26 09:26 LTLCardinality.txt
-rw-r--r-- 1 mcc users 11K May 26 09:26 LTLCardinality.xml
-rw-r--r-- 1 mcc users 2.2K May 26 09:26 LTLFireability.txt
-rw-r--r-- 1 mcc users 8.3K May 26 09:26 LTLFireability.xml
-rw-r--r-- 1 mcc users 3.9K May 15 18:54 ReachabilityCardinality.txt
-rw-r--r-- 1 mcc users 18K May 15 18:54 ReachabilityCardinality.xml
-rw-r--r-- 1 mcc users 122 May 15 18:54 ReachabilityDeadlock.txt
-rw-r--r-- 1 mcc users 360 May 15 18:54 ReachabilityDeadlock.xml
-rw-r--r-- 1 mcc users 4.1K May 15 18:54 ReachabilityFireability.txt
-rw-r--r-- 1 mcc users 22K May 15 18:54 ReachabilityFireability.xml
-rw-r--r-- 1 mcc users 1.9K May 15 18:54 UpperBounds.txt
-rw-r--r-- 1 mcc users 4.0K May 15 18:54 UpperBounds.xml
-rw-r--r-- 1 mcc users 5 May 15 18:49 equiv_pt
-rw-r--r-- 1 mcc users 10 May 15 18:49 instance
-rw-r--r-- 1 mcc users 5 May 15 18:49 iscolored
-rw-r--r-- 1 mcc users 37K May 15 18:49 model.pnml
=====================================================================
Generated by BenchKit 2-3637
Executing tool itstools
Input is BridgeAndVehicles-COL-V04P05N02, examination is LTLCardinality
Time confinement is 3600 seconds
Memory confinement is 16384 MBytes
Number of cores is 4
Run identifier is r224-ebro-152732378700033
=====================================================================


--------------------
content from stdout:

=== Data for post analysis generated by BenchKit (invocation template)

The expected result is a vector of booleans
BOOL_VECTOR

here is the order used to build the result vector(from text file)
FORMULA_NAME BridgeAndVehicles-COL-V04P05N02-LTLCardinality-00
FORMULA_NAME BridgeAndVehicles-COL-V04P05N02-LTLCardinality-01
FORMULA_NAME BridgeAndVehicles-COL-V04P05N02-LTLCardinality-02
FORMULA_NAME BridgeAndVehicles-COL-V04P05N02-LTLCardinality-03
FORMULA_NAME BridgeAndVehicles-COL-V04P05N02-LTLCardinality-04
FORMULA_NAME BridgeAndVehicles-COL-V04P05N02-LTLCardinality-05
FORMULA_NAME BridgeAndVehicles-COL-V04P05N02-LTLCardinality-06
FORMULA_NAME BridgeAndVehicles-COL-V04P05N02-LTLCardinality-07
FORMULA_NAME BridgeAndVehicles-COL-V04P05N02-LTLCardinality-08
FORMULA_NAME BridgeAndVehicles-COL-V04P05N02-LTLCardinality-09
FORMULA_NAME BridgeAndVehicles-COL-V04P05N02-LTLCardinality-10
FORMULA_NAME BridgeAndVehicles-COL-V04P05N02-LTLCardinality-11
FORMULA_NAME BridgeAndVehicles-COL-V04P05N02-LTLCardinality-12
FORMULA_NAME BridgeAndVehicles-COL-V04P05N02-LTLCardinality-13
FORMULA_NAME BridgeAndVehicles-COL-V04P05N02-LTLCardinality-14
FORMULA_NAME BridgeAndVehicles-COL-V04P05N02-LTLCardinality-15

=== Now, execution of the tool begins

BK_START 1527549287001

23:14:51.025 [main] ERROR PNML validation - The rng grammar file can't be accessed : www.pnml.org
23:14:51.029 [main] ERROR import - Grammar file errors have been raised, the validation can't be done, process will continue without Grammar validation
Using solver Z3 to compute partial order matrices.
Built C files in :
/home/mcc/execution
Invoking ITS tools like this :CommandLine [args=[/home/mcc/BenchKit/itstools/plugins/fr.lip6.move.gal.itstools.binaries_1.0.0.201805151631/bin/its-ltl-linux64, --gc-threshold, 2000000, -i, /home/mcc/execution/LTLCardinality.pnml.gal, -t, CGAL, -LTL, /home/mcc/execution/LTLCardinality.ltl, -c, -stutter-deadlock], workingDir=/home/mcc/execution]

its-ltl command run as :

/home/mcc/BenchKit/itstools/plugins/fr.lip6.move.gal.itstools.binaries_1.0.0.201805151631/bin/its-ltl-linux64 --gc-threshold 2000000 -i /home/mcc/execution/LTLCardinality.pnml.gal -t CGAL -LTL /home/mcc/execution/LTLCardinality.ltl -c -stutter-deadlock
Read 16 LTL properties
Checking formula 0 : !((X(G(G("(SORTI_A_0<=((COMPTEUR_0+COMPTEUR_1)+COMPTEUR_2))")))))
Formula 0 simplified : !XG"(SORTI_A_0<=((COMPTEUR_0+COMPTEUR_1)+COMPTEUR_2))"
Presburger conditions satisfied. Using coverability to approximate state space in K-Induction.
Normalized transition count is 34
// Phase 1: matrix 34 rows 28 cols
invariant :CONTROLEUR_0 + CONTROLEUR_1 + CHOIX_0 + CHOIX_1 + VIDANGE_0 + VIDANGE_1 = 1
invariant :SUR_PONT_B_0 + ATTENTE_B_0 + ROUTE_B_0 + SORTI_B_0 = 4
invariant :NB_ATTENTE_B_0 + NB_ATTENTE_B_1 + NB_ATTENTE_B_2 + NB_ATTENTE_B_3 + NB_ATTENTE_B_4 = 1
invariant :CAPACITE_0 + SUR_PONT_A_0 + -1'ATTENTE_B_0 + -1'ROUTE_B_0 + -1'SORTI_B_0 = 1
invariant :SORTI_A_0 + ROUTE_A_0 + ATTENTE_A_0 + SUR_PONT_A_0 = 4
invariant :COMPTEUR_0 + COMPTEUR_1 + COMPTEUR_2 = 1
invariant :NB_ATTENTE_A_0 + NB_ATTENTE_A_1 + NB_ATTENTE_A_2 + NB_ATTENTE_A_3 + NB_ATTENTE_A_4 = 1
Reverse transition relation is NOT exact ! Due to transitions enregistrement_A, liberation_A, basculement, liberation_B, enregistrement_B, altern_cpt, timeout_A, timeout_B, Intersection with reachable at each step enabled. (destroyed/reverse/intersect/total) :0/3/8/11
Computing Next relation with stutter on 4 deadlock states
4 unique states visited
4 strongly connected components in search stack
4 transitions explored
4 items max in DFS search stack
221 ticks for the emptiness check
Model ,|S| ,Time ,Mem(kb) ,fin. SDD ,fin. DDD ,peak SDD ,peak DDD ,SDD Hom ,SDD cache peak ,DDD Hom ,DDD cachepeak ,SHom cache
STATS,0,2.28859,47548,1,0,205,177797,51,183,882,164820,377
an accepting run exists (use option '-e' to print it)
Formula 0 is FALSE accepting run found.
FORMULA BridgeAndVehicles-COL-V04P05N02-LTLCardinality-00 FALSE TECHNIQUES DECISION_DIAGRAMS TOPOLOGICAL USE_NUPN
Checking formula 1 : !(((F(X("(ROUTE_B_0>=1)")))U(G(F("(ROUTE_A_0>=2)")))))
Formula 1 simplified : !(FX"(ROUTE_B_0>=1)" U GF"(ROUTE_A_0>=2)")
Computing Next relation with stutter on 4 deadlock states
60 unique states visited
60 strongly connected components in search stack
61 transitions explored
60 items max in DFS search stack
145 ticks for the emptiness check
Model ,|S| ,Time ,Mem(kb) ,fin. SDD ,fin. DDD ,peak SDD ,peak DDD ,SDD Hom ,SDD cache peak ,DDD Hom ,DDD cachepeak ,SHom cache
STATS,0,3.73554,75932,1,0,335,313962,60,381,884,305708,960
an accepting run exists (use option '-e' to print it)
Formula 1 is FALSE accepting run found.
FORMULA BridgeAndVehicles-COL-V04P05N02-LTLCardinality-01 FALSE TECHNIQUES DECISION_DIAGRAMS TOPOLOGICAL USE_NUPN
Checking formula 2 : !(("(SUR_PONT_A_0<=CAPACITE_0)"))
Formula 2 simplified : !"(SUR_PONT_A_0<=CAPACITE_0)"
Computing Next relation with stutter on 4 deadlock states
1 unique states visited
0 strongly connected components in search stack
0 transitions explored
1 items max in DFS search stack
0 ticks for the emptiness check
Model ,|S| ,Time ,Mem(kb) ,fin. SDD ,fin. DDD ,peak SDD ,peak DDD ,SDD Hom ,SDD cache peak ,DDD Hom ,DDD cachepeak ,SHom cache
STATS,0,3.73626,75932,1,0,335,313962,63,381,888,305709,962
no accepting run found
Formula 2 is TRUE no accepting run found.
FORMULA BridgeAndVehicles-COL-V04P05N02-LTLCardinality-02 TRUE TECHNIQUES DECISION_DIAGRAMS TOPOLOGICAL USE_NUPN
Checking formula 3 : !(("(SUR_PONT_A_0<=ATTENTE_B_0)"))
Formula 3 simplified : !"(SUR_PONT_A_0<=ATTENTE_B_0)"
Computing Next relation with stutter on 4 deadlock states
1 unique states visited
0 strongly connected components in search stack
0 transitions explored
1 items max in DFS search stack
0 ticks for the emptiness check
Model ,|S| ,Time ,Mem(kb) ,fin. SDD ,fin. DDD ,peak SDD ,peak DDD ,SDD Hom ,SDD cache peak ,DDD Hom ,DDD cachepeak ,SHom cache
STATS,0,3.73719,76196,1,0,335,313962,66,381,891,305709,964
no accepting run found
Formula 3 is TRUE no accepting run found.
FORMULA BridgeAndVehicles-COL-V04P05N02-LTLCardinality-03 TRUE TECHNIQUES DECISION_DIAGRAMS TOPOLOGICAL USE_NUPN
Checking formula 4 : !(((X("(ATTENTE_B_0<=(CHOIX_0+CHOIX_1))"))U(G(G("((CHOIX_0+CHOIX_1)<=((((NB_ATTENTE_B_0+NB_ATTENTE_B_1)+NB_ATTENTE_B_2)+NB_ATTENTE_B_3)+NB_ATTENTE_B_4))")))))
Formula 4 simplified : !(X"(ATTENTE_B_0<=(CHOIX_0+CHOIX_1))" U G"((CHOIX_0+CHOIX_1)<=((((NB_ATTENTE_B_0+NB_ATTENTE_B_1)+NB_ATTENTE_B_2)+NB_ATTENTE_B_3)+NB_ATTENTE_B_4))")
Computing Next relation with stutter on 4 deadlock states
Running compilation step : CommandLine [args=[gcc, -c, -I/home/mcc/BenchKit//lts_install_dir//include, -I., -std=c99, -fPIC, -O3, model.c], workingDir=/home/mcc/execution]
Compilation finished in 5237 ms.
Running link step : CommandLine [args=[gcc, -shared, -o, gal.so, model.o], workingDir=/home/mcc/execution]
830 unique states visited
0 strongly connected components in search stack
882 transitions explored
59 items max in DFS search stack
745 ticks for the emptiness check
Model ,|S| ,Time ,Mem(kb) ,fin. SDD ,fin. DDD ,peak SDD ,peak DDD ,SDD Hom ,SDD cache peak ,DDD Hom ,DDD cachepeak ,SHom cache
STATS,0,11.187,158944,1,0,4009,728770,88,4182,936,929388,10254
no accepting run found
Formula 4 is TRUE no accepting run found.
FORMULA BridgeAndVehicles-COL-V04P05N02-LTLCardinality-04 TRUE TECHNIQUES DECISION_DIAGRAMS TOPOLOGICAL USE_NUPN
Checking formula 5 : !((G(X(("(SORTI_A_0>=1)")U("(SUR_PONT_B_0>=1)")))))
Formula 5 simplified : !GX("(SORTI_A_0>=1)" U "(SUR_PONT_B_0>=1)")
Computing Next relation with stutter on 4 deadlock states
59 unique states visited
59 strongly connected components in search stack
60 transitions explored
59 items max in DFS search stack
0 ticks for the emptiness check
Model ,|S| ,Time ,Mem(kb) ,fin. SDD ,fin. DDD ,peak SDD ,peak DDD ,SDD Hom ,SDD cache peak ,DDD Hom ,DDD cachepeak ,SHom cache
STATS,0,11.1897,159412,1,0,4009,728770,100,4182,943,929388,10259
an accepting run exists (use option '-e' to print it)
Formula 5 is FALSE accepting run found.
FORMULA BridgeAndVehicles-COL-V04P05N02-LTLCardinality-05 FALSE TECHNIQUES DECISION_DIAGRAMS TOPOLOGICAL USE_NUPN
Checking formula 6 : !((F((G("(((COMPTEUR_0+COMPTEUR_1)+COMPTEUR_2)<=(CONTROLEUR_0+CONTROLEUR_1))"))U(X("((CONTROLEUR_0+CONTROLEUR_1)>=3)")))))
Formula 6 simplified : !F(G"(((COMPTEUR_0+COMPTEUR_1)+COMPTEUR_2)<=(CONTROLEUR_0+CONTROLEUR_1))" U X"((CONTROLEUR_0+CONTROLEUR_1)>=3)")
Computing Next relation with stutter on 4 deadlock states
Link finished in 77 ms.
Running LTSmin : CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=1, --when, --ltl, <>(([]((LTLAP9==true)))U(X((LTLAP10==true)))), --buchi-type=spotba], workingDir=/home/mcc/execution]
3 unique states visited
3 strongly connected components in search stack
3 transitions explored
3 items max in DFS search stack
12 ticks for the emptiness check
Model ,|S| ,Time ,Mem(kb) ,fin. SDD ,fin. DDD ,peak SDD ,peak DDD ,SDD Hom ,SDD cache peak ,DDD Hom ,DDD cachepeak ,SHom cache
STATS,0,11.317,161524,1,0,4044,734020,109,4259,947,940051,10578
an accepting run exists (use option '-e' to print it)
Formula 6 is FALSE accepting run found.
FORMULA BridgeAndVehicles-COL-V04P05N02-LTLCardinality-06 FALSE TECHNIQUES DECISION_DIAGRAMS TOPOLOGICAL USE_NUPN
Checking formula 7 : !((G((X("(ROUTE_A_0>=3)"))U("(((COMPTEUR_0+COMPTEUR_1)+COMPTEUR_2)>=2)"))))
Formula 7 simplified : !G(X"(ROUTE_A_0>=3)" U "(((COMPTEUR_0+COMPTEUR_1)+COMPTEUR_2)>=2)")
Computing Next relation with stutter on 4 deadlock states
LTSmin run took 69 ms.
FORMULA BridgeAndVehicles-COL-V04P05N02-LTLCardinality-06 FALSE TECHNIQUES PARTIAL_ORDER EXPLICIT LTSMIN SAT_SMT
Running LTSmin : CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=1, --when, --ltl, []((X((LTLAP11==true)))U((LTLAP12==true))), --buchi-type=spotba], workingDir=/home/mcc/execution]
61 unique states visited
61 strongly connected components in search stack
62 transitions explored
61 items max in DFS search stack
7 ticks for the emptiness check
Model ,|S| ,Time ,Mem(kb) ,fin. SDD ,fin. DDD ,peak SDD ,peak DDD ,SDD Hom ,SDD cache peak ,DDD Hom ,DDD cachepeak ,SHom cache
STATS,0,11.394,162552,1,0,4044,734679,115,4259,955,941284,10696
an accepting run exists (use option '-e' to print it)
Formula 7 is FALSE accepting run found.
FORMULA BridgeAndVehicles-COL-V04P05N02-LTLCardinality-07 FALSE TECHNIQUES DECISION_DIAGRAMS TOPOLOGICAL USE_NUPN
Checking formula 8 : !((X(F(G(G("(SUR_PONT_A_0>=2)"))))))
Formula 8 simplified : !XFG"(SUR_PONT_A_0>=2)"
Computing Next relation with stutter on 4 deadlock states
LTSmin run took 39 ms.
FORMULA BridgeAndVehicles-COL-V04P05N02-LTLCardinality-07 FALSE TECHNIQUES PARTIAL_ORDER EXPLICIT LTSMIN SAT_SMT
Running LTSmin : CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=1, --when, --ltl, X(<>([]([]((LTLAP13==true))))), --buchi-type=spotba], workingDir=/home/mcc/execution]
LTSmin run took 26 ms.
FORMULA BridgeAndVehicles-COL-V04P05N02-LTLCardinality-08 FALSE TECHNIQUES PARTIAL_ORDER EXPLICIT LTSMIN SAT_SMT
Running LTSmin : CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=1, -p, --pins-guards, --when, --ltl, (LTLAP14==true), --buchi-type=spotba], workingDir=/home/mcc/execution]
LTSmin run took 29 ms.
FORMULA BridgeAndVehicles-COL-V04P05N02-LTLCardinality-09 FALSE TECHNIQUES PARTIAL_ORDER EXPLICIT LTSMIN SAT_SMT
Running LTSmin : CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=1, --when, --ltl, X((LTLAP15==true)), --buchi-type=spotba], workingDir=/home/mcc/execution]
LTSmin run took 26 ms.
FORMULA BridgeAndVehicles-COL-V04P05N02-LTLCardinality-10 FALSE TECHNIQUES PARTIAL_ORDER EXPLICIT LTSMIN SAT_SMT
Running LTSmin : CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=1, -p, --pins-guards, --when, --ltl, (LTLAP16==true), --buchi-type=spotba], workingDir=/home/mcc/execution]
LTSmin run took 24 ms.
FORMULA BridgeAndVehicles-COL-V04P05N02-LTLCardinality-11 TRUE TECHNIQUES PARTIAL_ORDER EXPLICIT LTSMIN SAT_SMT
Running LTSmin : CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=1, --when, --ltl, <>(X((LTLAP17==true))), --buchi-type=spotba], workingDir=/home/mcc/execution]
LTSmin run took 39 ms.
FORMULA BridgeAndVehicles-COL-V04P05N02-LTLCardinality-12 TRUE TECHNIQUES PARTIAL_ORDER EXPLICIT LTSMIN SAT_SMT
Running LTSmin : CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=1, -p, --pins-guards, --when, --ltl, (<>((LTLAP8==true)))U([](<>((LTLAP18==true)))), --buchi-type=spotba], workingDir=/home/mcc/execution]
LTSmin run took 134 ms.
FORMULA BridgeAndVehicles-COL-V04P05N02-LTLCardinality-13 TRUE TECHNIQUES PARTIAL_ORDER EXPLICIT LTSMIN SAT_SMT
Running LTSmin : CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=1, --when, --ltl, X(X(X([]((LTLAP19==true))))), --buchi-type=spotba], workingDir=/home/mcc/execution]
LTSmin run took 63 ms.
FORMULA BridgeAndVehicles-COL-V04P05N02-LTLCardinality-14 FALSE TECHNIQUES PARTIAL_ORDER EXPLICIT LTSMIN SAT_SMT
Running LTSmin : CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=1, --when, --ltl, ([](X((LTLAP20==true))))U((LTLAP21==true)), --buchi-type=spotba], workingDir=/home/mcc/execution]
LTSmin run took 26 ms.
FORMULA BridgeAndVehicles-COL-V04P05N02-LTLCardinality-15 TRUE TECHNIQUES PARTIAL_ORDER EXPLICIT LTSMIN SAT_SMT
ITS tools runner thread asked to quit. Dying gracefully.

BK_STOP 1527549304949

--------------------
content from stderr:

+ export BINDIR=/home/mcc/BenchKit/
+ BINDIR=/home/mcc/BenchKit/
++ pwd
+ export MODEL=/home/mcc/execution
+ MODEL=/home/mcc/execution
+ /home/mcc/BenchKit//runeclipse.sh /home/mcc/execution LTLCardinality -its -ltsminpath /home/mcc/BenchKit//lts_install_dir/ -smt
+ ulimit -s 65536
+ [[ -z '' ]]
+ export LTSMIN_MEM_SIZE=8589934592
+ LTSMIN_MEM_SIZE=8589934592
+ /home/mcc/BenchKit//itstools/its-tools -consoleLog -data /home/mcc/execution/workspace -pnfolder /home/mcc/execution -examination LTLCardinality -z3path /home/mcc/BenchKit//z3/bin/z3 -yices2path /home/mcc/BenchKit//yices/bin/yices -its -ltsminpath /home/mcc/BenchKit//lts_install_dir/ -smt -vmargs -Dosgi.locking=none -Declipse.stateSaveDelayInterval=-1 -Dosgi.configuration.area=/tmp/.eclipse -Xss8m -Xms40m -Xmx8192m -Dfile.encoding=UTF-8 -Dosgi.requiredJavaVersion=1.6
May 28, 2018 11:14:50 PM fr.lip6.move.gal.application.Application start
INFO: Running its-tools with arguments : [-pnfolder, /home/mcc/execution, -examination, LTLCardinality, -z3path, /home/mcc/BenchKit//z3/bin/z3, -yices2path, /home/mcc/BenchKit//yices/bin/yices, -its, -ltsminpath, /home/mcc/BenchKit//lts_install_dir/, -smt]
May 28, 2018 11:14:50 PM fr.lip6.move.gal.application.MccTranslator transformPNML
INFO: Parsing pnml file : /home/mcc/execution/model.pnml
May 28, 2018 11:14:50 PM fr.lip6.move.gal.pnml.togal.PnmlToGalTransformer transform
INFO: Detected file is not PT type :http://www.pnml.org/version-2009/grammar/symmetricnet
May 28, 2018 11:14:51 PM fr.lip6.move.gal.pnml.togal.PnmlToGalTransformer transform
INFO: Load time of PNML (colored model parsed with PNMLFW) : 1431 ms
May 28, 2018 11:14:51 PM fr.lip6.move.gal.pnml.togal.HLGALTransformer handlePage
INFO: Transformed 15 places.
May 28, 2018 11:14:51 PM fr.lip6.move.gal.pnml.togal.HLGALTransformer handlePage
INFO: Computed order using colors.
May 28, 2018 11:14:51 PM fr.lip6.move.gal.pnml.togal.HLGALTransformer handlePage
INFO: sort/places :sens->CONTROLEUR,CHOIX,VIDANGE,
compteur->COMPTEUR,
Dot->CAPACITE,SORTI_A,ROUTE_A,ATTENTE_A,SUR_PONT_A,SUR_PONT_B,ATTENTE_B,ROUTE_B,SORTI_B,
voitureA->NB_ATTENTE_A,
voitureB->NB_ATTENTE_B,

May 28, 2018 11:14:51 PM fr.lip6.move.gal.pnml.togal.HLGALTransformer handlePage
INFO: Transformed 11 transitions.
May 28, 2018 11:14:51 PM fr.lip6.move.gal.pnml.togal.PnmlToGalTransformer transform
INFO: Computed order based on color domains.
May 28, 2018 11:14:51 PM fr.lip6.move.serialization.SerializationUtil systemToFile
INFO: Time to serialize gal into /home/mcc/execution/model.pnml.img.gal : 11 ms
May 28, 2018 11:14:52 PM fr.lip6.move.gal.instantiate.Instantiator instantiateParameters
INFO: On-the-fly reduction of False transitions avoided exploring 19.0 instantiations of transitions. Total transitions/syncs built is 58
May 28, 2018 11:14:52 PM fr.lip6.move.gal.instantiate.GALRewriter flatten
INFO: Flatten gal took : 189 ms
May 28, 2018 11:14:52 PM fr.lip6.move.serialization.SerializationUtil systemToFile
INFO: Time to serialize gal into /home/mcc/execution/LTLCardinality.pnml.gal : 10 ms
May 28, 2018 11:14:52 PM fr.lip6.move.serialization.SerializationUtil serializePropertiesForITSLTLTools
INFO: Time to serialize properties into /home/mcc/execution/LTLCardinality.ltl : 1 ms
May 28, 2018 11:14:52 PM fr.lip6.move.gal.semantics.DeterministicNextBuilder getDeterministicNext
INFO: Input system was not deterministic with 11 transitions. Expanding to a total of 79 deterministic transitions.
May 28, 2018 11:14:52 PM fr.lip6.move.gal.semantics.DeterministicNextBuilder getDeterministicNext
INFO: Determinization took 7 ms.
May 28, 2018 11:14:53 PM fr.lip6.move.gal.gal2smt.bmc.KInductionSolver computeAndDeclareInvariants
INFO: Computed 7 place invariants in 34 ms
May 28, 2018 11:14:53 PM fr.lip6.move.gal.gal2smt.bmc.KInductionSolver init
INFO: Proved 28 variables to be positive in 407 ms
May 28, 2018 11:14:53 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver computeAblingMatrix
INFO: Computing symmetric may disable matrix : 52 transitions.
May 28, 2018 11:14:53 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of disable matrix completed :0/52 took 1 ms. Total solver calls (SAT/UNSAT): 0(0/0)
May 28, 2018 11:14:53 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of Complete disable matrix. took 7 ms. Total solver calls (SAT/UNSAT): 0(0/0)
May 28, 2018 11:14:53 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver computeAblingMatrix
INFO: Computing symmetric may enable matrix : 52 transitions.
May 28, 2018 11:14:53 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of Complete enable matrix. took 20 ms. Total solver calls (SAT/UNSAT): 0(0/0)
May 28, 2018 11:14:56 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver computeCoEnablingMatrix
INFO: Computing symmetric co enabling matrix : 52 transitions.
May 28, 2018 11:14:56 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(3/52) took 197 ms. Total solver calls (SAT/UNSAT): 126(28/98)
May 28, 2018 11:14:58 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of Finished co-enabling matrix. took 1897 ms. Total solver calls (SAT/UNSAT): 1139(115/1024)
May 28, 2018 11:14:58 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver computeDoNotAccord
INFO: Computing Do-Not-Accords matrix : 52 transitions.
May 28, 2018 11:14:58 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of Completed DNA matrix. took 391 ms. Total solver calls (SAT/UNSAT): 21(0/21)
May 28, 2018 11:14:58 PM fr.lip6.move.gal.gal2pins.Gal2PinsTransformerNext transform
INFO: Built C files in 6018ms conformant to PINS in folder :/home/mcc/execution

Sequence of Actions to be Executed by the VM

This is useful if one wants to reexecute the tool in the VM from the submitted image disk.

set -x
# this is for BenchKit: configuration of major elements for the test
export BK_INPUT="BridgeAndVehicles-COL-V04P05N02"
export BK_EXAMINATION="LTLCardinality"
export BK_TOOL="itstools"
export BK_RESULT_DIR="/tmp/BK_RESULTS/OUTPUTS"
export BK_TIME_CONFINEMENT="3600"
export BK_MEMORY_CONFINEMENT="16384"

# this is specific to your benchmark or test

export BIN_DIR="$HOME/BenchKit/bin"

# remove the execution directoty if it exists (to avoid increse of .vmdk images)
if [ -d execution ] ; then
rm -rf execution
fi

tar xzf /home/mcc/BenchKit/INPUTS/BridgeAndVehicles-COL-V04P05N02.tgz
mv BridgeAndVehicles-COL-V04P05N02 execution
cd execution
pwd
ls -lh

# this is for BenchKit: explicit launching of the test
echo "====================================================================="
echo " Generated by BenchKit 2-3637"
echo " Executing tool itstools"
echo " Input is BridgeAndVehicles-COL-V04P05N02, examination is LTLCardinality"
echo " Time confinement is $BK_TIME_CONFINEMENT seconds"
echo " Memory confinement is 16384 MBytes"
echo " Number of cores is 4"
echo " Run identifier is r224-ebro-152732378700033"
echo "====================================================================="
echo
echo "--------------------"
echo "content from stdout:"
echo
echo "=== Data for post analysis generated by BenchKit (invocation template)"
echo
if [ "LTLCardinality" = "UpperBounds" ] ; then
echo "The expected result is a vector of positive values"
echo NUM_VECTOR
elif [ "LTLCardinality" != "StateSpace" ] ; then
echo "The expected result is a vector of booleans"
echo BOOL_VECTOR
else
echo "no data necessary for post analysis"
fi
echo
if [ -f "LTLCardinality.txt" ] ; then
echo "here is the order used to build the result vector(from text file)"
for x in $(grep Property LTLCardinality.txt | cut -d ' ' -f 2 | sort -u) ; do
echo "FORMULA_NAME $x"
done
elif [ -f "LTLCardinality.xml" ] ; then # for cunf (txt files deleted;-)
echo echo "here is the order used to build the result vector(from xml file)"
for x in $(grep '' LTLCardinality.xml | cut -d '>' -f 2 | cut -d '<' -f 1 | sort -u) ; do
echo "FORMULA_NAME $x"
done
fi
echo
echo "=== Now, execution of the tool begins"
echo
echo -n "BK_START "
date -u +%s%3N
echo
timeout -s 9 $BK_TIME_CONFINEMENT bash -c "/home/mcc/BenchKit/BenchKit_head.sh 2> STDERR ; echo ; echo -n \"BK_STOP \" ; date -u +%s%3N"
if [ $? -eq 137 ] ; then
echo
echo "BK_TIME_CONFINEMENT_REACHED"
fi
echo
echo "--------------------"
echo "content from stderr:"
echo
cat STDERR ;