About the Execution of ITS-Tools.L for SimpleLoadBal-PT-10
Execution Summary | |||||
Max Memory Used (MB) |
Time wait (ms) | CPU Usage (ms) | I/O Wait (ms) | Computed Result | Execution Status |
15752.080 | 146644.00 | 299104.00 | 634.80 | FFFFFFFFFFFTFFTT | normal |
Execution Chart
We display below the execution chart for this examination (boot time has been removed).
Trace from the execution
Waiting for the VM to be ready (probing ssh)
.................
/home/mcc/execution
total 700K
-rw-r--r-- 1 mcc users 3.9K May 15 18:54 CTLCardinality.txt
-rw-r--r-- 1 mcc users 18K May 15 18:54 CTLCardinality.xml
-rw-r--r-- 1 mcc users 2.8K May 15 18:54 CTLFireability.txt
-rw-r--r-- 1 mcc users 15K May 15 18:54 CTLFireability.xml
-rw-r--r-- 1 mcc users 4.0K May 15 18:50 GenericPropertiesDefinition.xml
-rw-r--r-- 1 mcc users 6.4K May 15 18:50 GenericPropertiesVerdict.xml
-rw-r--r-- 1 mcc users 2.8K May 26 09:27 LTLCardinality.txt
-rw-r--r-- 1 mcc users 12K May 26 09:27 LTLCardinality.xml
-rw-r--r-- 1 mcc users 2.2K May 26 09:27 LTLFireability.txt
-rw-r--r-- 1 mcc users 9.3K May 26 09:27 LTLFireability.xml
-rw-r--r-- 1 mcc users 4.9K May 15 18:54 ReachabilityCardinality.txt
-rw-r--r-- 1 mcc users 23K May 15 18:54 ReachabilityCardinality.xml
-rw-r--r-- 1 mcc users 110 May 15 18:54 ReachabilityDeadlock.txt
-rw-r--r-- 1 mcc users 348 May 15 18:54 ReachabilityDeadlock.xml
-rw-r--r-- 1 mcc users 3.4K May 15 18:54 ReachabilityFireability.txt
-rw-r--r-- 1 mcc users 15K May 15 18:54 ReachabilityFireability.xml
-rw-r--r-- 1 mcc users 1.8K May 15 18:54 UpperBounds.txt
-rw-r--r-- 1 mcc users 3.9K May 15 18:54 UpperBounds.xml
-rw-r--r-- 1 mcc users 6 May 15 18:50 equiv_col
-rw-r--r-- 1 mcc users 3 May 15 18:50 instance
-rw-r--r-- 1 mcc users 6 May 15 18:50 iscolored
-rw-r--r-- 1 mcc users 530K May 15 18:50 model.pnml
=====================================================================
Generated by BenchKit 2-3637
Executing tool itstoolsl
Input is SimpleLoadBal-PT-10, examination is LTLCardinality
Time confinement is 3600 seconds
Memory confinement is 16384 MBytes
Number of cores is 4
Run identifier is r213-smll-152732264600583
=====================================================================
--------------------
content from stdout:
=== Data for post analysis generated by BenchKit (invocation template)
The expected result is a vector of booleans
BOOL_VECTOR
here is the order used to build the result vector(from text file)
FORMULA_NAME SimpleLoadBal-PT-10-LTLCardinality-00
FORMULA_NAME SimpleLoadBal-PT-10-LTLCardinality-01
FORMULA_NAME SimpleLoadBal-PT-10-LTLCardinality-02
FORMULA_NAME SimpleLoadBal-PT-10-LTLCardinality-03
FORMULA_NAME SimpleLoadBal-PT-10-LTLCardinality-04
FORMULA_NAME SimpleLoadBal-PT-10-LTLCardinality-05
FORMULA_NAME SimpleLoadBal-PT-10-LTLCardinality-06
FORMULA_NAME SimpleLoadBal-PT-10-LTLCardinality-07
FORMULA_NAME SimpleLoadBal-PT-10-LTLCardinality-08
FORMULA_NAME SimpleLoadBal-PT-10-LTLCardinality-09
FORMULA_NAME SimpleLoadBal-PT-10-LTLCardinality-10
FORMULA_NAME SimpleLoadBal-PT-10-LTLCardinality-11
FORMULA_NAME SimpleLoadBal-PT-10-LTLCardinality-12
FORMULA_NAME SimpleLoadBal-PT-10-LTLCardinality-13
FORMULA_NAME SimpleLoadBal-PT-10-LTLCardinality-14
FORMULA_NAME SimpleLoadBal-PT-10-LTLCardinality-15
=== Now, execution of the tool begins
BK_START 1527865798495
Using solver Z3 to compute partial order matrices.
Built C files in :
/home/mcc/execution
Invoking ITS tools like this :CommandLine [args=[/home/mcc/BenchKit/itstools/plugins/fr.lip6.move.gal.itstools.binaries_1.0.0.201805241334/bin/its-ltl-linux64, --gc-threshold, 2000000, -i, /home/mcc/execution/LTLCardinality.pnml.gal, -t, CGAL, -LTL, /home/mcc/execution/LTLCardinality.ltl, -c, -stutter-deadlock], workingDir=/home/mcc/execution]
its-ltl command run as :
/home/mcc/BenchKit/itstools/plugins/fr.lip6.move.gal.itstools.binaries_1.0.0.201805241334/bin/its-ltl-linux64 --gc-threshold 2000000 -i /home/mcc/execution/LTLCardinality.pnml.gal -t CGAL -LTL /home/mcc/execution/LTLCardinality.ltl -c -stutter-deadlock
Read 16 LTL properties
Checking formula 0 : !((F(F(("(P_lb_load_2_1<=P_lb_idle_1)")U("(P_client_ack_10>=3)")))))
Formula 0 simplified : !F("(P_lb_load_2_1<=P_lb_idle_1)" U "(P_client_ack_10>=3)")
Presburger conditions satisfied. Using coverability to approximate state space in K-Induction.
Normalized transition count is 475
// Phase 1: matrix 475 rows 104 cols
invariant :P_client_idle_8 + P_client_waiting_8 = 1
invariant :P_server_idle_2 + P_server_waiting_2 + P_server_processed_2 = 1
invariant :-1'P_client_waiting_8 + P_client_request_8 + P_client_ack_8 + P_server_request_8_1 + P_server_request_8_2 + P_lb_routing_1_8 = 0
invariant :P_client_idle_6 + P_client_waiting_6 = 1
invariant :-1'P_server_waiting_1 + P_server_notification_1 + P_server_notification_ack_1 = 0
invariant :P_client_idle_1 + P_client_waiting_1 = 1
invariant :-1'P_client_waiting_5 + P_client_request_5 + P_client_ack_5 + P_server_request_5_1 + P_server_request_5_2 + P_lb_routing_1_5 = 0
invariant :P_client_idle_9 + P_client_waiting_9 = 1
invariant :-1'P_client_waiting_9 + P_client_request_9 + P_client_ack_9 + P_server_request_9_1 + P_server_request_9_2 + P_lb_routing_1_9 = 0
invariant :P_client_idle_2 + P_client_waiting_2 = 1
invariant :P_client_waiting_1 + P_client_waiting_2 + P_client_waiting_3 + P_client_waiting_4 + P_client_waiting_5 + P_client_waiting_6 + P_client_waiting_7 + P_client_waiting_8 + P_client_waiting_9 + P_client_waiting_10 + -1'P_client_request_1 + -1'P_client_request_2 + -1'P_client_request_3 + -1'P_client_request_4 + -1'P_client_request_5 + -1'P_client_request_6 + -1'P_client_request_7 + -1'P_client_request_8 + -1'P_client_request_9 + -1'P_client_request_10 + -1'P_client_ack_1 + -1'P_client_ack_2 + -1'P_client_ack_3 + -1'P_client_ack_4 + -1'P_client_ack_5 + -1'P_client_ack_6 + -1'P_client_ack_7 + -1'P_client_ack_8 + -1'P_client_ack_9 + -1'P_client_ack_10 + P_server_waiting_1 + P_server_processed_1 + -1'P_server_notification_ack_1 + -1'P_server_request_1_2 + -1'P_server_request_2_2 + -1'P_server_request_3_2 + -1'P_server_request_4_2 + -1'P_server_request_5_2 + -1'P_server_request_6_2 + -1'P_server_request_7_2 + -1'P_server_request_8_2 + -1'P_server_request_9_2 + -1'P_server_request_10_2 + -1'P_lb_routing_1_1 + -1'P_lb_routing_1_2 + -1'P_lb_routing_1_3 + -1'P_lb_routing_1_4 + -1'P_lb_routing_1_5 + -1'P_lb_routing_1_6 + -1'P_lb_routing_1_7 + -1'P_lb_routing_1_8 + -1'P_lb_routing_1_9 + -1'P_lb_routing_1_10 + 4'P_lb_load_1_0 + 3'P_lb_load_1_1 + 2'P_lb_load_1_2 + P_lb_load_1_3 + -1'P_lb_load_1_5 + -2'P_lb_load_1_6 + -3'P_lb_load_1_7 + -4'P_lb_load_1_8 + -5'P_lb_load_1_9 + -6'P_lb_load_1_10 = 4
invariant :-1'P_client_waiting_10 + P_client_request_10 + P_client_ack_10 + P_server_request_10_1 + P_server_request_10_2 + P_lb_routing_1_10 = 0
invariant :-1'P_client_waiting_1 + P_client_request_1 + P_client_ack_1 + P_server_request_1_1 + P_server_request_1_2 + P_lb_routing_1_1 = 0
invariant :-1'P_client_waiting_1 + -1'P_client_waiting_2 + -1'P_client_waiting_3 + -1'P_client_waiting_4 + -1'P_client_waiting_5 + -1'P_client_waiting_6 + -1'P_client_waiting_7 + -1'P_client_waiting_8 + -1'P_client_waiting_9 + -1'P_client_waiting_10 + P_client_request_1 + P_client_request_2 + P_client_request_3 + P_client_request_4 + P_client_request_5 + P_client_request_6 + P_client_request_7 + P_client_request_8 + P_client_request_9 + P_client_request_10 + P_client_ack_1 + P_client_ack_2 + P_client_ack_3 + P_client_ack_4 + P_client_ack_5 + P_client_ack_6 + P_client_ack_7 + P_client_ack_8 + P_client_ack_9 + P_client_ack_10 + -1'P_server_waiting_1 + -1'P_server_processed_1 + P_server_notification_ack_1 + P_server_request_1_2 + P_server_request_2_2 + P_server_request_3_2 + P_server_request_4_2 + P_server_request_5_2 + P_server_request_6_2 + P_server_request_7_2 + P_server_request_8_2 + P_server_request_9_2 + P_server_request_10_2 + P_lb_routing_1_1 + P_lb_routing_1_2 + P_lb_routing_1_3 + P_lb_routing_1_4 + P_lb_routing_1_5 + P_lb_routing_1_6 + P_lb_routing_1_7 + P_lb_routing_1_8 + P_lb_routing_1_9 + P_lb_routing_1_10 + -3'P_lb_load_1_0 + -2'P_lb_load_1_1 + -1'P_lb_load_1_2 + P_lb_load_1_4 + 2'P_lb_load_1_5 + 3'P_lb_load_1_6 + 4'P_lb_load_1_7 + 5'P_lb_load_1_8 + 6'P_lb_load_1_9 + 7'P_lb_load_1_10 = -3
invariant :P_client_idle_7 + P_client_waiting_7 = 1
invariant :-1'P_client_waiting_4 + P_client_request_4 + P_client_ack_4 + P_server_request_4_1 + P_server_request_4_2 + P_lb_routing_1_4 = 0
invariant :P_lb_idle_1 + P_lb_routing_1_1 + P_lb_routing_1_2 + P_lb_routing_1_3 + P_lb_routing_1_4 + P_lb_routing_1_5 + P_lb_routing_1_6 + P_lb_routing_1_7 + P_lb_routing_1_8 + P_lb_routing_1_9 + P_lb_routing_1_10 + P_lb_balancing_1 = 1
invariant :P_client_idle_3 + P_client_waiting_3 = 1
invariant :-1'P_client_waiting_7 + P_client_request_7 + P_client_ack_7 + P_server_request_7_1 + P_server_request_7_2 + P_lb_routing_1_7 = 0
invariant :P_server_idle_1 + P_server_waiting_1 + P_server_processed_1 = 1
invariant :P_server_waiting_2 + P_server_processed_2 + -1'P_server_notification_ack_2 + P_server_request_1_2 + P_server_request_2_2 + P_server_request_3_2 + P_server_request_4_2 + P_server_request_5_2 + P_server_request_6_2 + P_server_request_7_2 + P_server_request_8_2 + P_server_request_9_2 + P_server_request_10_2 + 9'P_lb_load_2_0 + 8'P_lb_load_2_1 + 7'P_lb_load_2_2 + 6'P_lb_load_2_3 + 5'P_lb_load_2_4 + 4'P_lb_load_2_5 + 3'P_lb_load_2_6 + 2'P_lb_load_2_7 + P_lb_load_2_8 + -1'P_lb_load_2_10 = 9
invariant :-1'P_server_waiting_2 + -1'P_server_processed_2 + P_server_notification_ack_2 + -1'P_server_request_1_2 + -1'P_server_request_2_2 + -1'P_server_request_3_2 + -1'P_server_request_4_2 + -1'P_server_request_5_2 + -1'P_server_request_6_2 + -1'P_server_request_7_2 + -1'P_server_request_8_2 + -1'P_server_request_9_2 + -1'P_server_request_10_2 + -8'P_lb_load_2_0 + -7'P_lb_load_2_1 + -6'P_lb_load_2_2 + -5'P_lb_load_2_3 + -4'P_lb_load_2_4 + -3'P_lb_load_2_5 + -2'P_lb_load_2_6 + -1'P_lb_load_2_7 + P_lb_load_2_9 + 2'P_lb_load_2_10 = -8
invariant :-1'P_client_waiting_2 + P_client_request_2 + P_client_ack_2 + P_server_request_2_1 + P_server_request_2_2 + P_lb_routing_1_2 = 0
invariant :-1'P_server_waiting_2 + P_server_notification_2 + P_server_notification_ack_2 = 0
invariant :-1'P_client_waiting_3 + P_client_request_3 + P_client_ack_3 + P_server_request_3_1 + P_server_request_3_2 + P_lb_routing_1_3 = 0
invariant :-1'P_client_waiting_6 + P_client_request_6 + P_client_ack_6 + P_server_request_6_1 + P_server_request_6_2 + P_lb_routing_1_6 = 0
invariant :P_client_idle_10 + P_client_waiting_10 = 1
invariant :P_client_idle_5 + P_client_waiting_5 = 1
invariant :P_client_idle_4 + P_client_waiting_4 = 1
Reverse transition relation is NOT exact ! Due to transitions T_server_process_1, T_server_process_2, T_server_process_3, T_server_process_4, T_server_process_5, T_server_process_6, T_server_process_7, T_server_process_8, T_server_process_9, T_server_process_10, T_server_process_11, T_server_process_12, T_server_process_13, T_server_process_14, T_server_process_15, T_server_process_16, T_server_process_17, T_server_process_18, T_server_process_19, T_server_process_20, T_lb_idle_receive_notification_2, T_lb_idle_receive_notification_3, T_lb_idle_receive_notification_4, T_lb_idle_receive_notification_5, T_lb_idle_receive_notification_6, T_lb_idle_receive_notification_7, T_lb_idle_receive_notification_13, T_lb_idle_receive_notification_14, T_lb_idle_receive_notification_15, T_lb_idle_receive_notification_16, T_lb_idle_receive_notification_17, T_lb_idle_receive_notification_18, T_lb_no_balance_72, T_lb_balance_to_1_501, T_lb_balance_to_1_502, T_lb_balance_to_1_503, T_lb_balance_to_1_504, T_lb_balance_to_1_505, T_lb_balance_to_1_506, T_lb_balance_to_1_507, T_lb_balance_to_1_508, T_lb_balance_to_1_509, T_lb_balance_to_1_510, T_lb_balancing_receive_notification_7, T_lb_balancing_receive_notification_17, T_lb_balancing_receive_notification_18, Intersection with reachable at each step enabled. (destroyed/reverse/intersect/total) :229/330/46/605
Running compilation step : CommandLine [args=[gcc, -c, -I/home/mcc/BenchKit//lts_install_dir//include, -I., -std=c99, -fPIC, -O3, model.c], workingDir=/home/mcc/execution]
Compilation finished in 10971 ms.
Running link step : CommandLine [args=[gcc, -shared, -o, gal.so, model.o], workingDir=/home/mcc/execution]
Link finished in 58 ms.
Running LTSmin : CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=1, -p, --pins-guards, --when, --ltl, <>(<>(((LTLAP0==true))U((LTLAP1==true)))), --buchi-type=spotba], workingDir=/home/mcc/execution]
LTSmin run took 358 ms.
FORMULA SimpleLoadBal-PT-10-LTLCardinality-00 FALSE TECHNIQUES PARTIAL_ORDER EXPLICIT LTSMIN SAT_SMT
Running LTSmin : CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=1, -p, --pins-guards, --when, --ltl, <>(<>([]([]((LTLAP2==true))))), --buchi-type=spotba], workingDir=/home/mcc/execution]
LTSmin run took 319 ms.
FORMULA SimpleLoadBal-PT-10-LTLCardinality-01 FALSE TECHNIQUES PARTIAL_ORDER EXPLICIT LTSMIN SAT_SMT
Running LTSmin : CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=1, -p, --pins-guards, --when, --ltl, <>((<>((LTLAP3==true)))U((LTLAP4==true))), --buchi-type=spotba], workingDir=/home/mcc/execution]
LTSmin run took 330 ms.
FORMULA SimpleLoadBal-PT-10-LTLCardinality-02 FALSE TECHNIQUES PARTIAL_ORDER EXPLICIT LTSMIN SAT_SMT
Running LTSmin : CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=1, --when, --ltl, <>(X(<>([]((LTLAP5==true))))), --buchi-type=spotba], workingDir=/home/mcc/execution]
LTSmin run took 245 ms.
FORMULA SimpleLoadBal-PT-10-LTLCardinality-03 FALSE TECHNIQUES PARTIAL_ORDER EXPLICIT LTSMIN SAT_SMT
Running LTSmin : CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=1, --when, --ltl, <>(X([]([]((LTLAP6==true))))), --buchi-type=spotba], workingDir=/home/mcc/execution]
LTSmin run took 34 ms.
FORMULA SimpleLoadBal-PT-10-LTLCardinality-04 FALSE TECHNIQUES PARTIAL_ORDER EXPLICIT LTSMIN SAT_SMT
Running LTSmin : CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=1, -p, --pins-guards, --when, --ltl, [](([]((LTLAP7==true)))U([]((LTLAP8==true)))), --buchi-type=spotba], workingDir=/home/mcc/execution]
LTSmin run took 357 ms.
FORMULA SimpleLoadBal-PT-10-LTLCardinality-05 FALSE TECHNIQUES PARTIAL_ORDER EXPLICIT LTSMIN SAT_SMT
Running LTSmin : CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=1, --when, --ltl, [](X(<>([]((LTLAP9==true))))), --buchi-type=spotba], workingDir=/home/mcc/execution]
LTSmin run took 32 ms.
FORMULA SimpleLoadBal-PT-10-LTLCardinality-06 FALSE TECHNIQUES PARTIAL_ORDER EXPLICIT LTSMIN SAT_SMT
Running LTSmin : CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=1, --when, --ltl, []((X((LTLAP10==true)))U([]((LTLAP11==true)))), --buchi-type=spotba], workingDir=/home/mcc/execution]
LTSmin run took 40 ms.
FORMULA SimpleLoadBal-PT-10-LTLCardinality-07 FALSE TECHNIQUES PARTIAL_ORDER EXPLICIT LTSMIN SAT_SMT
Running LTSmin : CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=1, --when, --ltl, X(([]((LTLAP12==true)))U((LTLAP13==true))), --buchi-type=spotba], workingDir=/home/mcc/execution]
LTSmin run took 138 ms.
FORMULA SimpleLoadBal-PT-10-LTLCardinality-08 FALSE TECHNIQUES PARTIAL_ORDER EXPLICIT LTSMIN SAT_SMT
Running LTSmin : CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=1, -p, --pins-guards, --when, --ltl, [](((LTLAP14==true))U((LTLAP15==true))), --buchi-type=spotba], workingDir=/home/mcc/execution]
LTSmin run took 314 ms.
FORMULA SimpleLoadBal-PT-10-LTLCardinality-09 FALSE TECHNIQUES PARTIAL_ORDER EXPLICIT LTSMIN SAT_SMT
Running LTSmin : CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=1, -p, --pins-guards, --when, --ltl, (LTLAP16==true), --buchi-type=spotba], workingDir=/home/mcc/execution]
LTSmin run took 326 ms.
FORMULA SimpleLoadBal-PT-10-LTLCardinality-10 FALSE TECHNIQUES PARTIAL_ORDER EXPLICIT LTSMIN SAT_SMT
Running LTSmin : CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=1, --when, --ltl, X((LTLAP17==true)), --buchi-type=spotba], workingDir=/home/mcc/execution]
LTSmin run took 24 ms.
FORMULA SimpleLoadBal-PT-10-LTLCardinality-11 TRUE TECHNIQUES PARTIAL_ORDER EXPLICIT LTSMIN SAT_SMT
Running LTSmin : CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=1, --when, --ltl, X((LTLAP18==true)), --buchi-type=spotba], workingDir=/home/mcc/execution]
LTSmin run took 70 ms.
FORMULA SimpleLoadBal-PT-10-LTLCardinality-12 FALSE TECHNIQUES PARTIAL_ORDER EXPLICIT LTSMIN SAT_SMT
Running LTSmin : CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=1, --when, --ltl, X([](<>((LTLAP19==true)))), --buchi-type=spotba], workingDir=/home/mcc/execution]
LTSmin run took 396 ms.
FORMULA SimpleLoadBal-PT-10-LTLCardinality-13 FALSE TECHNIQUES PARTIAL_ORDER EXPLICIT LTSMIN SAT_SMT
Running LTSmin : CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=1, -p, --pins-guards, --when, --ltl, <>(<>(((LTLAP20==true))U((LTLAP21==true)))), --buchi-type=spotba], workingDir=/home/mcc/execution]
LTSmin run took 302 ms.
FORMULA SimpleLoadBal-PT-10-LTLCardinality-14 TRUE TECHNIQUES PARTIAL_ORDER EXPLICIT LTSMIN SAT_SMT
Running LTSmin : CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=1, --when, --ltl, X(<>(((LTLAP22==true))U((LTLAP23==true)))), --buchi-type=spotba], workingDir=/home/mcc/execution]
LTSmin run took 24 ms.
FORMULA SimpleLoadBal-PT-10-LTLCardinality-15 TRUE TECHNIQUES PARTIAL_ORDER EXPLICIT LTSMIN SAT_SMT
ITS tools runner thread asked to quit. Dying gracefully.
BK_STOP 1527865945139
--------------------
content from stderr:
+ export BINDIR=/home/mcc/BenchKit/
+ BINDIR=/home/mcc/BenchKit/
++ pwd
+ export MODEL=/home/mcc/execution
+ MODEL=/home/mcc/execution
+ /home/mcc/BenchKit//runeclipse.sh /home/mcc/execution LTLCardinality -its -ltsminpath /home/mcc/BenchKit//lts_install_dir/ -louvain -smt
+ ulimit -s 65536
+ [[ -z '' ]]
+ export LTSMIN_MEM_SIZE=8589934592
+ LTSMIN_MEM_SIZE=8589934592
+ /home/mcc/BenchKit//itstools/its-tools -consoleLog -data /home/mcc/execution/workspace -pnfolder /home/mcc/execution -examination LTLCardinality -z3path /home/mcc/BenchKit//z3/bin/z3 -yices2path /home/mcc/BenchKit//yices/bin/yices -its -ltsminpath /home/mcc/BenchKit//lts_install_dir/ -louvain -smt -vmargs -Dosgi.locking=none -Declipse.stateSaveDelayInterval=-1 -Dosgi.configuration.area=/tmp/.eclipse -Xss8m -Xms40m -Xmx8192m -Dfile.encoding=UTF-8 -Dosgi.requiredJavaVersion=1.6
Jun 01, 2018 3:10:00 PM fr.lip6.move.gal.application.Application start
INFO: Running its-tools with arguments : [-pnfolder, /home/mcc/execution, -examination, LTLCardinality, -z3path, /home/mcc/BenchKit//z3/bin/z3, -yices2path, /home/mcc/BenchKit//yices/bin/yices, -its, -ltsminpath, /home/mcc/BenchKit//lts_install_dir/, -louvain, -smt]
Jun 01, 2018 3:10:00 PM fr.lip6.move.gal.application.MccTranslator transformPNML
INFO: Parsing pnml file : /home/mcc/execution/model.pnml
Jun 01, 2018 3:10:00 PM fr.lip6.move.gal.nupn.PTNetReader loadFromXML
INFO: Load time of PNML (sax parser for PT used): 147 ms
Jun 01, 2018 3:10:00 PM fr.lip6.move.gal.pnml.togal.PTGALTransformer handlePage
INFO: Transformed 104 places.
Jun 01, 2018 3:10:01 PM fr.lip6.move.gal.pnml.togal.PTGALTransformer handlePage
INFO: Transformed 605 transitions.
Jun 01, 2018 3:10:01 PM fr.lip6.move.serialization.SerializationUtil systemToFile
INFO: Time to serialize gal into /home/mcc/execution/model.pnml.img.gal : 46 ms
Jun 01, 2018 3:10:01 PM fr.lip6.move.gal.instantiate.GALRewriter flatten
INFO: Flatten gal took : 345 ms
Jun 01, 2018 3:10:01 PM fr.lip6.move.serialization.SerializationUtil systemToFile
INFO: Time to serialize gal into /home/mcc/execution/LTLCardinality.pnml.gal : 8 ms
Jun 01, 2018 3:10:01 PM fr.lip6.move.serialization.SerializationUtil serializePropertiesForITSLTLTools
INFO: Time to serialize properties into /home/mcc/execution/LTLCardinality.ltl : 2 ms
Jun 01, 2018 3:10:01 PM fr.lip6.move.gal.semantics.DeterministicNextBuilder getDeterministicNext
INFO: Input system was already deterministic with 605 transitions.
Jun 01, 2018 3:10:02 PM fr.lip6.move.gal.gal2smt.bmc.KInductionSolver computeAndDeclareInvariants
INFO: Computed 29 place invariants in 107 ms
Jun 01, 2018 3:10:03 PM fr.lip6.move.gal.gal2smt.bmc.NextBMCSolver checkSat
WARNING: SMT solver unexpectedly returned 'unknown' answer, retrying.
Jun 01, 2018 3:10:03 PM fr.lip6.move.gal.gal2smt.bmc.KInductionSolver init
INFO: Proved 104 variables to be positive in 1514 ms
Jun 01, 2018 3:10:03 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver computeAblingMatrix
INFO: Computing symmetric may disable matrix : 605 transitions.
Jun 01, 2018 3:10:03 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of disable matrix completed :0/605 took 0 ms. Total solver calls (SAT/UNSAT): 0(0/0)
Jun 01, 2018 3:10:04 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of Complete disable matrix. took 114 ms. Total solver calls (SAT/UNSAT): 0(0/0)
Jun 01, 2018 3:10:04 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver computeAblingMatrix
INFO: Computing symmetric may enable matrix : 605 transitions.
Jun 01, 2018 3:10:04 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of Complete enable matrix. took 41 ms. Total solver calls (SAT/UNSAT): 0(0/0)
Jun 01, 2018 3:10:06 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver computeCoEnablingMatrix
INFO: Computing symmetric co enabling matrix : 605 transitions.
Jun 01, 2018 3:10:08 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(10/605) took 1035 ms. Total solver calls (SAT/UNSAT): 573(512/61)
Jun 01, 2018 3:10:11 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(13/605) took 4940 ms. Total solver calls (SAT/UNSAT): 2256(2042/214)
Jun 01, 2018 3:10:15 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(16/605) took 8663 ms. Total solver calls (SAT/UNSAT): 3930(3563/367)
Jun 01, 2018 3:10:19 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(19/605) took 12060 ms. Total solver calls (SAT/UNSAT): 5595(5075/520)
Jun 01, 2018 3:10:22 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(31/605) took 15615 ms. Total solver calls (SAT/UNSAT): 7307(6763/544)
Jun 01, 2018 3:10:27 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(34/605) took 20169 ms. Total solver calls (SAT/UNSAT): 9020(8470/550)
Jun 01, 2018 3:10:31 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(37/605) took 24610 ms. Total solver calls (SAT/UNSAT): 10724(10168/556)
Jun 01, 2018 3:10:35 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(40/605) took 28543 ms. Total solver calls (SAT/UNSAT): 12397(11836/561)
Jun 01, 2018 3:10:38 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(43/605) took 31841 ms. Total solver calls (SAT/UNSAT): 14001(13399/602)
Jun 01, 2018 3:10:42 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(52/605) took 35048 ms. Total solver calls (SAT/UNSAT): 19005(13624/5381)
Jun 01, 2018 3:10:45 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(64/605) took 38293 ms. Total solver calls (SAT/UNSAT): 25551(13644/11907)
Jun 01, 2018 3:10:48 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(77/605) took 41456 ms. Total solver calls (SAT/UNSAT): 32480(13650/18830)
Jun 01, 2018 3:10:51 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(90/605) took 44530 ms. Total solver calls (SAT/UNSAT): 39240(13653/25587)
Jun 01, 2018 3:10:54 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(103/605) took 47609 ms. Total solver calls (SAT/UNSAT): 45831(13656/32175)
Jun 01, 2018 3:10:57 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(117/605) took 50805 ms. Total solver calls (SAT/UNSAT): 52740(13662/39078)
Jun 01, 2018 3:11:00 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(131/605) took 53853 ms. Total solver calls (SAT/UNSAT): 59453(13666/45787)
Jun 01, 2018 3:11:04 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(146/605) took 57050 ms. Total solver calls (SAT/UNSAT): 66428(13668/52760)
Jun 01, 2018 3:11:07 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(161/605) took 60188 ms. Total solver calls (SAT/UNSAT): 73178(13674/59504)
Jun 01, 2018 3:11:10 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(176/605) took 63231 ms. Total solver calls (SAT/UNSAT): 79703(13680/66023)
Jun 01, 2018 3:11:13 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(192/605) took 66330 ms. Total solver calls (SAT/UNSAT): 86415(13686/72729)
Jun 01, 2018 3:11:16 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(208/605) took 69479 ms. Total solver calls (SAT/UNSAT): 92871(13686/79185)
Jun 01, 2018 3:11:19 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(225/605) took 72612 ms. Total solver calls (SAT/UNSAT): 99450(13692/85758)
Jun 01, 2018 3:11:22 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(242/605) took 75632 ms. Total solver calls (SAT/UNSAT): 105740(13698/92042)
Jun 01, 2018 3:11:25 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(260/605) took 78673 ms. Total solver calls (SAT/UNSAT): 112085(13704/98381)
Jun 01, 2018 3:11:28 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(279/605) took 81719 ms. Total solver calls (SAT/UNSAT): 118431(13704/104727)
Jun 01, 2018 3:11:31 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(299/605) took 84799 ms. Total solver calls (SAT/UNSAT): 124721(13704/111017)
Jun 01, 2018 3:11:34 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(320/605) took 87832 ms. Total solver calls (SAT/UNSAT): 130895(13704/117191)
Jun 01, 2018 3:11:37 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(343/605) took 90919 ms. Total solver calls (SAT/UNSAT): 137151(13704/123447)
Jun 01, 2018 3:11:40 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(366/605) took 93966 ms. Total solver calls (SAT/UNSAT): 142878(13817/129061)
Jun 01, 2018 3:11:44 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(387/605) took 97175 ms. Total solver calls (SAT/UNSAT): 147645(14024/133621)
Jun 01, 2018 3:11:47 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(406/605) took 100311 ms. Total solver calls (SAT/UNSAT): 151578(14226/137352)
Jun 01, 2018 3:11:50 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(428/605) took 103331 ms. Total solver calls (SAT/UNSAT): 155681(14365/141316)
Jun 01, 2018 3:11:53 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(451/605) took 106440 ms. Total solver calls (SAT/UNSAT): 159453(14513/144940)
Jun 01, 2018 3:11:56 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(477/605) took 109573 ms. Total solver calls (SAT/UNSAT): 163080(14682/148398)
Jun 01, 2018 3:11:59 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(506/605) took 112639 ms. Total solver calls (SAT/UNSAT): 166328(14876/151452)
Jun 01, 2018 3:12:02 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(526/605) took 115793 ms. Total solver calls (SAT/UNSAT): 168078(15168/152910)
Jun 01, 2018 3:12:05 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(559/605) took 118827 ms. Total solver calls (SAT/UNSAT): 170091(15387/154704)
Jun 01, 2018 3:12:08 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of Finished co-enabling matrix. took 121755 ms. Total solver calls (SAT/UNSAT): 171081(15743/155338)
Jun 01, 2018 3:12:08 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver computeDoNotAccord
INFO: Computing Do-Not-Accords matrix : 605 transitions.
Jun 01, 2018 3:12:09 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of Completed DNA matrix. took 706 ms. Total solver calls (SAT/UNSAT): 540(0/540)
Jun 01, 2018 3:12:09 PM fr.lip6.move.gal.gal2pins.Gal2PinsTransformerNext transform
INFO: Built C files in 127926ms conformant to PINS in folder :/home/mcc/execution
Sequence of Actions to be Executed by the VM
This is useful if one wants to reexecute the tool in the VM from the submitted image disk.
set -x
# this is for BenchKit: configuration of major elements for the test
export BK_INPUT="SimpleLoadBal-PT-10"
export BK_EXAMINATION="LTLCardinality"
export BK_TOOL="itstoolsl"
export BK_RESULT_DIR="/tmp/BK_RESULTS/OUTPUTS"
export BK_TIME_CONFINEMENT="3600"
export BK_MEMORY_CONFINEMENT="16384"
# this is specific to your benchmark or test
export BIN_DIR="$HOME/BenchKit/bin"
# remove the execution directoty if it exists (to avoid increse of .vmdk images)
if [ -d execution ] ; then
rm -rf execution
fi
tar xzf /home/mcc/BenchKit/INPUTS/SimpleLoadBal-PT-10.tgz
mv SimpleLoadBal-PT-10 execution
cd execution
pwd
ls -lh
# this is for BenchKit: explicit launching of the test
echo "====================================================================="
echo " Generated by BenchKit 2-3637"
echo " Executing tool itstoolsl"
echo " Input is SimpleLoadBal-PT-10, examination is LTLCardinality"
echo " Time confinement is $BK_TIME_CONFINEMENT seconds"
echo " Memory confinement is 16384 MBytes"
echo " Number of cores is 4"
echo " Run identifier is r213-smll-152732264600583"
echo "====================================================================="
echo
echo "--------------------"
echo "content from stdout:"
echo
echo "=== Data for post analysis generated by BenchKit (invocation template)"
echo
if [ "LTLCardinality" = "UpperBounds" ] ; then
echo "The expected result is a vector of positive values"
echo NUM_VECTOR
elif [ "LTLCardinality" != "StateSpace" ] ; then
echo "The expected result is a vector of booleans"
echo BOOL_VECTOR
else
echo "no data necessary for post analysis"
fi
echo
if [ -f "LTLCardinality.txt" ] ; then
echo "here is the order used to build the result vector(from text file)"
for x in $(grep Property LTLCardinality.txt | cut -d ' ' -f 2 | sort -u) ; do
echo "FORMULA_NAME $x"
done
elif [ -f "LTLCardinality.xml" ] ; then # for cunf (txt files deleted;-)
echo echo "here is the order used to build the result vector(from xml file)"
for x in $(grep '
echo "FORMULA_NAME $x"
done
fi
echo
echo "=== Now, execution of the tool begins"
echo
echo -n "BK_START "
date -u +%s%3N
echo
timeout -s 9 $BK_TIME_CONFINEMENT bash -c "/home/mcc/BenchKit/BenchKit_head.sh 2> STDERR ; echo ; echo -n \"BK_STOP \" ; date -u +%s%3N"
if [ $? -eq 137 ] ; then
echo
echo "BK_TIME_CONFINEMENT_REACHED"
fi
echo
echo "--------------------"
echo "content from stderr:"
echo
cat STDERR ;