Execution Chart

We display below the execution chart for this examination (boot time has been removed).

Trace from the execution

Waiting for the VM to be ready (probing ssh)
..................
/home/mcc/execution
total 804K
-rw-r--r-- 1 mcc users 6.2K May 15 18:54 CTLCardinality.txt
-rw-r--r-- 1 mcc users 28K May 15 18:54 CTLCardinality.xml
-rw-r--r-- 1 mcc users 16K May 15 18:54 CTLFireability.txt
-rw-r--r-- 1 mcc users 62K May 15 18:54 CTLFireability.xml
-rw-r--r-- 1 mcc users 4.0K May 15 18:50 GenericPropertiesDefinition.xml
-rw-r--r-- 1 mcc users 6.0K May 15 18:50 GenericPropertiesVerdict.xml
-rw-r--r-- 1 mcc users 3.3K May 26 09:27 LTLCardinality.txt
-rw-r--r-- 1 mcc users 14K May 26 09:27 LTLCardinality.xml
-rw-r--r-- 1 mcc users 4.7K May 26 09:27 LTLFireability.txt
-rw-r--r-- 1 mcc users 19K May 26 09:27 LTLFireability.xml
-rw-r--r-- 1 mcc users 7.7K May 15 18:54 ReachabilityCardinality.txt
-rw-r--r-- 1 mcc users 32K May 15 18:54 ReachabilityCardinality.xml
-rw-r--r-- 1 mcc users 104 May 15 18:54 ReachabilityDeadlock.txt
-rw-r--r-- 1 mcc users 342 May 15 18:54 ReachabilityDeadlock.xml
-rw-r--r-- 1 mcc users 22K May 15 18:54 ReachabilityFireability.txt
-rw-r--r-- 1 mcc users 83K May 15 18:54 ReachabilityFireability.xml
-rw-r--r-- 1 mcc users 2.5K May 15 18:54 UpperBounds.txt
-rw-r--r-- 1 mcc users 5.7K May 15 18:54 UpperBounds.xml
-rw-r--r-- 1 mcc users 5 May 15 18:50 equiv_col
-rw-r--r-- 1 mcc users 3 May 15 18:50 instance
-rw-r--r-- 1 mcc users 6 May 15 18:50 iscolored
-rw-r--r-- 1 mcc users 448K May 15 18:50 model.pnml
=====================================================================
Generated by BenchKit 2-3637
Executing tool itstoolsl
Input is SafeBus-PT-06, examination is LTLFireability
Time confinement is 3600 seconds
Memory confinement is 16384 MBytes
Number of cores is 4
Run identifier is r213-smll-152732264600532
=====================================================================

--------------------
content from stdout:

=== Data for post analysis generated by BenchKit (invocation template)

The expected result is a vector of booleans
BOOL_VECTOR

here is the order used to build the result vector(from text file)
FORMULA_NAME SafeBus-PT-06-LTLFireability-00
FORMULA_NAME SafeBus-PT-06-LTLFireability-01
FORMULA_NAME SafeBus-PT-06-LTLFireability-02
FORMULA_NAME SafeBus-PT-06-LTLFireability-03
FORMULA_NAME SafeBus-PT-06-LTLFireability-04
FORMULA_NAME SafeBus-PT-06-LTLFireability-05
FORMULA_NAME SafeBus-PT-06-LTLFireability-06
FORMULA_NAME SafeBus-PT-06-LTLFireability-07
FORMULA_NAME SafeBus-PT-06-LTLFireability-08
FORMULA_NAME SafeBus-PT-06-LTLFireability-09
FORMULA_NAME SafeBus-PT-06-LTLFireability-10
FORMULA_NAME SafeBus-PT-06-LTLFireability-11
FORMULA_NAME SafeBus-PT-06-LTLFireability-12
FORMULA_NAME SafeBus-PT-06-LTLFireability-13
FORMULA_NAME SafeBus-PT-06-LTLFireability-14
FORMULA_NAME SafeBus-PT-06-LTLFireability-15

=== Now, execution of the tool begins

BK_START 1527841148632

Converted graph to binary with : CommandLine [args=[/home/mcc/BenchKit/itstools/plugins/fr.lip6.move.gal.louvain.binaries_1.0.0.201805241334/bin/convert-linux64, -i, /tmp/graph2012749152941568636.txt, -o, /tmp/graph2012749152941568636.bin, -w, /tmp/graph2012749152941568636.weights], workingDir=null]
Built communities with : CommandLine [args=[/home/mcc/BenchKit/itstools/plugins/fr.lip6.move.gal.louvain.binaries_1.0.0.201805241334/bin/louvain-linux64, /tmp/graph2012749152941568636.bin, -l, -1, -v, -w, /tmp/graph2012749152941568636.weights, -q, 0, -e, 0.001], workingDir=null]
Using solver Z3 to compute partial order matrices.
Built C files in :
/home/mcc/execution
Invoking ITS tools like this :CommandLine [args=[/home/mcc/BenchKit/itstools/plugins/fr.lip6.move.gal.itstools.binaries_1.0.0.201805241334/bin/its-ltl-linux64, --gc-threshold, 2000000, -i, /home/mcc/execution/LTLFireability.pnml.gal, -t, CGAL, -LTL, /home/mcc/execution/LTLFireability.ltl, -c, -stutter-deadlock], workingDir=/home/mcc/execution]

its-ltl command run as :

/home/mcc/BenchKit/itstools/plugins/fr.lip6.move.gal.itstools.binaries_1.0.0.201805241334/bin/its-ltl-linux64 --gc-threshold 2000000 -i /home/mcc/execution/LTLFireability.pnml.gal -t CGAL -LTL /home/mcc/execution/LTLFireability.ltl -c -stutter-deadlock
Read 16 LTL properties
Checking formula 0 : !((X(F(("(((((((i1.u4.RMC_1>=1)&&(i2.u13.wait_cable_1>=1))||((i1.u4.RMC_2>=1)&&(i2.u5.wait_cable_2>=1)))||((i1.u4.RMC_3>=1)&&(i2.u6.wait_cable_3>=1)))||((i1.u4.RMC_4>=1)&&(i2.u7.wait_cable_4>=1)))||((i1.u4.RMC_5>=1)&&(i2.u8.wait_cable_5>=1)))||((i1.u4.RMC_6>=1)&&(i2.u9.wait_cable_6>=1)))")U("(((((((i1.u4.cable_used_1>=1)&&(i0.u0.FMC_1>=1))||((i1.u4.cable_used_2>=1)&&(i0.u0.FMC_2>=1)))||((i1.u4.cable_used_3>=1)&&(i0.u0.FMC_3>=1)))||((i1.u4.cable_used_4>=1)&&(i0.u0.FMC_4>=1)))||((i1.u4.cable_used_5>=1)&&(i0.u0.FMC_5>=1)))||((i1.u4.cable_used_6>=1)&&(i0.u0.FMC_6>=1)))")))))
Formula 0 simplified : !XF("(((((((i1.u4.RMC_1>=1)&&(i2.u13.wait_cable_1>=1))||((i1.u4.RMC_2>=1)&&(i2.u5.wait_cable_2>=1)))||((i1.u4.RMC_3>=1)&&(i2.u6.wait_cable_3>=1)))||((i1.u4.RMC_4>=1)&&(i2.u7.wait_cable_4>=1)))||((i1.u4.RMC_5>=1)&&(i2.u8.wait_cable_5>=1)))||((i1.u4.RMC_6>=1)&&(i2.u9.wait_cable_6>=1)))" U "(((((((i1.u4.cable_used_1>=1)&&(i0.u0.FMC_1>=1))||((i1.u4.cable_used_2>=1)&&(i0.u0.FMC_2>=1)))||((i1.u4.cable_used_3>=1)&&(i0.u0.FMC_3>=1)))||((i1.u4.cable_used_4>=1)&&(i0.u0.FMC_4>=1)))||((i1.u4.cable_used_5>=1)&&(i0.u0.FMC_5>=1)))||((i1.u4.cable_used_6>=1)&&(i0.u0.FMC_6>=1)))")
built 6 ordering constraints for composite.
built 151 ordering constraints for composite.
built 258 ordering constraints for composite.
built 126 ordering constraints for composite.
Presburger conditions satisfied. Using coverability to approximate state space in K-Induction.
Normalized transition count is 242
// Phase 1: matrix 242 rows 138 cols
invariant :-1'i0:u0:FMC_2 + -1'i0:u1:wait_ack_2_1 + -1'i0:u1:wait_ack_2_3 + -1'i0:u1:wait_ack_2_4 + -1'i0:u1:wait_ack_2_5 + -1'i0:u1:wait_ack_2_6 + i1:u3:AMC_2_4 + i1:u3:AMC_2_5 + i1:u4:AMC_2_1 + i1:u4:AMC_2_2 + i1:u4:AMC_2_3 + i1:u4:AMC_2_6 + i1:u4:cable_used_2 + i1:u4:RMC_2 + -1'i2:u5:wait_cable_2 = 0
invariant :-1'i0:u0:FMC_6 + -1'i0:u1:wait_ack_6_1 + -1'i0:u1:wait_ack_6_2 + -1'i0:u1:wait_ack_6_3 + -1'i0:u1:wait_ack_6_4 + -1'i0:u1:wait_ack_6_5 + i1:u3:AMC_6_4 + i1:u3:AMC_6_5 + i1:u4:AMC_6_1 + i1:u4:AMC_6_2 + i1:u4:AMC_6_3 + i1:u4:AMC_6_6 + i1:u4:cable_used_6 + i1:u4:RMC_6 + -1'i2:u9:wait_cable_6 = 0
invariant :i0:u2:R_tout + i0:u2:S_tout = 1
invariant :i0:u0:FMC_5 + i0:u1:wait_ack_5_1 + i0:u1:wait_ack_5_2 + i0:u1:wait_ack_5_3 + i0:u1:wait_ack_5_4 + i0:u1:wait_ack_5_6 + i0:u1:PMC_5 + -1'i1:u4:cable_used_5 = 0
invariant :i0:u0:FMC_2 + i0:u1:wait_ack_2_1 + i0:u1:wait_ack_2_3 + i0:u1:wait_ack_2_4 + i0:u1:wait_ack_2_5 + i0:u1:wait_ack_2_6 + i0:u1:PMC_2 + -1'i1:u4:cable_used_2 = 0
invariant :-1'i0:u0:FMC_3 + -1'i0:u1:wait_ack_3_1 + -1'i0:u1:wait_ack_3_2 + -1'i0:u1:wait_ack_3_4 + -1'i0:u1:wait_ack_3_5 + -1'i0:u1:wait_ack_3_6 + i1:u3:AMC_3_4 + i1:u3:AMC_3_5 + i1:u4:AMC_3_1 + i1:u4:AMC_3_2 + i1:u4:AMC_3_3 + i1:u4:AMC_3_6 + i1:u4:cable_used_3 + i1:u4:RMC_3 + -1'i2:u6:wait_cable_3 = 0
invariant :i1:u3:Cpt2_6 + i1:u3:AMC_1_5 + i1:u3:AMC_2_5 + i1:u3:AMC_3_5 + i1:u3:AMC_4_5 + i1:u3:AMC_5_5 + i1:u3:AMC_6_5 + -1'i1:u4:AMC_1_6 + -1'i1:u4:AMC_2_6 + -1'i1:u4:AMC_3_6 + -1'i1:u4:AMC_4_6 + -1'i1:u4:AMC_5_6 + -1'i1:u4:AMC_6_6 + i2:u10:Cpt1_1 + i2:u11:Cpt1_2 + i2:u11:Cpt1_3 + i2:u12:Cpt1_4 + i2:u12:Cpt1_5 = 1
invariant :i1:u4:Cpt2_1 + -1'i1:u4:AMC_1_1 + -1'i1:u4:AMC_2_1 + -1'i1:u4:AMC_3_1 + -1'i1:u4:AMC_4_1 + -1'i1:u4:AMC_5_1 + -1'i1:u4:AMC_6_1 + i1:u4:AMC_1_6 + i1:u4:AMC_2_6 + i1:u4:AMC_3_6 + i1:u4:AMC_4_6 + i1:u4:AMC_5_6 + i1:u4:AMC_6_6 + -1'i2:u10:Cpt1_1 = 0
invariant :i0:u1:wait_ack_5_1 + i0:u1:wait_ack_5_2 + i0:u1:wait_ack_5_3 + i0:u1:wait_ack_5_4 + i0:u1:wait_ack_5_6 + i2:u8:listen_5 + i2:u8:wait_cable_5 + i2:u8:wait_msg_5 + i2:u8:loop_em_5 = 1
invariant :i0:u0:ACK + i0:u1:T_out + -1'i0:u1:wait_ack_2_1 + -1'i0:u1:wait_ack_3_1 + -1'i0:u1:wait_ack_4_1 + -1'i0:u1:wait_ack_5_1 + -1'i0:u1:wait_ack_6_1 + -1'i0:u1:wait_ack_1_2 + -1'i0:u1:wait_ack_3_2 + -1'i0:u1:wait_ack_4_2 + -1'i0:u1:wait_ack_5_2 + -1'i0:u1:wait_ack_6_2 + -1'i0:u1:wait_ack_1_3 + -1'i0:u1:wait_ack_2_3 + -1'i0:u1:wait_ack_4_3 + -1'i0:u1:wait_ack_5_3 + -1'i0:u1:wait_ack_6_3 + -1'i0:u1:wait_ack_1_4 + -1'i0:u1:wait_ack_2_4 + -1'i0:u1:wait_ack_3_4 + -1'i0:u1:wait_ack_5_4 + -1'i0:u1:wait_ack_6_4 + -1'i0:u1:wait_ack_1_5 + -1'i0:u1:wait_ack_2_5 + -1'i0:u1:wait_ack_3_5 + -1'i0:u1:wait_ack_4_5 + -1'i0:u1:wait_ack_6_5 + -1'i0:u1:wait_ack_1_6 + -1'i0:u1:wait_ack_2_6 + -1'i0:u1:wait_ack_3_6 + -1'i0:u1:wait_ack_4_6 + -1'i0:u1:wait_ack_5_6 + i0:u1:MSG_1 + i0:u1:MSG_2 + i0:u1:MSG_3 + i0:u1:MSG_4 + i0:u1:MSG_5 + i0:u1:MSG_6 = 0
invariant :i0:u0:FMC_2 + i0:u0:FMC_3 + i0:u0:FMC_4 + i0:u0:FMC_5 + i0:u0:FMC_6 + i1:u3:AMC_1_4 + i1:u3:AMC_1_5 + i1:u4:AMC_1_1 + i1:u4:AMC_1_2 + i1:u4:AMC_1_3 + i1:u4:AMC_1_6 + i1:u4:cable_used_1 + i1:u4:FMCb + i1:u4:RMC_1 + i2:u13:listen_1 + i2:u13:wait_msg_1 + i2:u13:loop_em_1 = 2
invariant :i1:u4:Cpt2_3 + i1:u4:AMC_1_2 + i1:u4:AMC_2_2 + i1:u4:AMC_3_2 + i1:u4:AMC_4_2 + i1:u4:AMC_5_2 + i1:u4:AMC_6_2 + -1'i1:u4:AMC_1_3 + -1'i1:u4:AMC_2_3 + -1'i1:u4:AMC_3_3 + -1'i1:u4:AMC_4_3 + -1'i1:u4:AMC_5_3 + -1'i1:u4:AMC_6_3 + -1'i2:u11:Cpt1_3 = 0
invariant :i0:u0:listen_2 + i0:u1:wait_ack_2_1 + i0:u1:wait_ack_2_3 + i0:u1:wait_ack_2_4 + i0:u1:wait_ack_2_5 + i0:u1:wait_ack_2_6 + i2:u5:wait_cable_2 + i2:u5:wait_msg_2 + i2:u5:loop_em_2 = 1
invariant :i0:u0:FMC_3 + i0:u0:FMC_4 + i0:u1:wait_ack_3_1 + i0:u1:wait_ack_4_1 + i0:u1:wait_ack_3_2 + i0:u1:wait_ack_4_2 + i0:u1:wait_ack_4_3 + i0:u1:wait_ack_3_4 + i0:u1:wait_ack_3_5 + i0:u1:wait_ack_4_5 + i0:u1:wait_ack_3_6 + i0:u1:wait_ack_4_6 + i0:u1:cable_free + -1'i1:u3:AMC_3_4 + -1'i1:u3:AMC_4_4 + -1'i1:u3:AMC_3_5 + -1'i1:u3:AMC_4_5 + -1'i1:u4:AMC_3_1 + -1'i1:u4:AMC_4_1 + -1'i1:u4:AMC_3_2 + -1'i1:u4:AMC_4_2 + -1'i1:u4:AMC_3_3 + -1'i1:u4:AMC_4_3 + -1'i1:u4:AMC_3_6 + -1'i1:u4:AMC_4_6 + i1:u4:cable_used_1 + i1:u4:cable_used_2 + i1:u4:cable_used_5 + i1:u4:cable_used_6 + -1'i1:u4:RMC_3 + -1'i1:u4:RMC_4 + i2:u6:wait_cable_3 + i2:u7:wait_cable_4 = 1
invariant :i1:u4:Cpt2_2 + i1:u4:AMC_1_1 + i1:u4:AMC_2_1 + i1:u4:AMC_3_1 + i1:u4:AMC_4_1 + i1:u4:AMC_5_1 + i1:u4:AMC_6_1 + -1'i1:u4:AMC_1_2 + -1'i1:u4:AMC_2_2 + -1'i1:u4:AMC_3_2 + -1'i1:u4:AMC_4_2 + -1'i1:u4:AMC_5_2 + -1'i1:u4:AMC_6_2 + -1'i2:u11:Cpt1_2 = 0
invariant :-1'i0:u0:FMC_4 + -1'i0:u1:wait_ack_4_1 + -1'i0:u1:wait_ack_4_2 + -1'i0:u1:wait_ack_4_3 + -1'i0:u1:wait_ack_4_5 + -1'i0:u1:wait_ack_4_6 + i1:u3:AMC_4_4 + i1:u3:AMC_4_5 + i1:u4:AMC_4_1 + i1:u4:AMC_4_2 + i1:u4:AMC_4_3 + i1:u4:AMC_4_6 + i1:u4:cable_used_4 + i1:u4:RMC_4 + -1'i2:u7:wait_cable_4 = 0
invariant :-1'i0:u0:FMC_2 + -1'i0:u0:FMC_3 + -1'i0:u0:FMC_4 + -1'i0:u0:FMC_5 + -1'i0:u0:FMC_6 + i0:u1:wait_ack_1_2 + i0:u1:wait_ack_1_3 + i0:u1:wait_ack_1_4 + i0:u1:wait_ack_1_5 + i0:u1:wait_ack_1_6 + i0:u1:PMC_1 + -1'i1:u4:cable_used_1 + -1'i1:u4:FMCb = -1
invariant :i0:u0:FMC_6 + i0:u1:wait_ack_6_1 + i0:u1:wait_ack_6_2 + i0:u1:wait_ack_6_3 + i0:u1:wait_ack_6_4 + i0:u1:wait_ack_6_5 + i0:u1:PMC_6 + -1'i1:u4:cable_used_6 = 0
invariant :i0:u0:FMC_1 + i0:u0:FMC_2 + i0:u0:FMC_3 + i0:u0:FMC_4 + i0:u0:FMC_5 + i0:u0:FMC_6 + i1:u4:FMCb = 1
invariant :i0:u0:listen_6 + i0:u1:wait_ack_6_1 + i0:u1:wait_ack_6_2 + i0:u1:wait_ack_6_3 + i0:u1:wait_ack_6_4 + i0:u1:wait_ack_6_5 + i2:u9:wait_cable_6 + i2:u9:wait_msg_6 + i2:u9:loop_em_6 = 1
invariant :i0:u1:PMC_3 + i1:u3:AMC_3_4 + i1:u3:AMC_3_5 + i1:u4:AMC_3_1 + i1:u4:AMC_3_2 + i1:u4:AMC_3_3 + i1:u4:AMC_3_6 + i1:u4:RMC_3 + -1'i2:u6:wait_cable_3 = 0
invariant :i1:u3:Cpt2_5 + i1:u3:AMC_1_4 + i1:u3:AMC_2_4 + i1:u3:AMC_3_4 + i1:u3:AMC_4_4 + i1:u3:AMC_5_4 + i1:u3:AMC_6_4 + -1'i1:u3:AMC_1_5 + -1'i1:u3:AMC_2_5 + -1'i1:u3:AMC_3_5 + -1'i1:u3:AMC_4_5 + -1'i1:u3:AMC_5_5 + -1'i1:u3:AMC_6_5 + -1'i2:u12:Cpt1_5 = 0
invariant :-1'i1:u3:AMC_1_4 + -1'i1:u3:AMC_2_4 + -1'i1:u3:AMC_3_4 + -1'i1:u3:AMC_4_4 + -1'i1:u3:AMC_5_4 + -1'i1:u3:AMC_6_4 + i1:u4:Cpt2_4 + i1:u4:AMC_1_3 + i1:u4:AMC_2_3 + i1:u4:AMC_3_3 + i1:u4:AMC_4_3 + i1:u4:AMC_5_3 + i1:u4:AMC_6_3 + -1'i2:u12:Cpt1_4 = 0
invariant :i2:u10:Cpt1_1 + i2:u10:Cpt1_6 + i2:u11:Cpt1_2 + i2:u11:Cpt1_3 + i2:u12:Cpt1_4 + i2:u12:Cpt1_5 = 1
invariant :i0:u1:PMC_4 + i1:u3:AMC_4_4 + i1:u3:AMC_4_5 + i1:u4:AMC_4_1 + i1:u4:AMC_4_2 + i1:u4:AMC_4_3 + i1:u4:AMC_4_6 + i1:u4:RMC_4 + -1'i2:u7:wait_cable_4 = 0
invariant :i0:u0:listen_4 + i0:u1:wait_ack_4_1 + i0:u1:wait_ack_4_2 + i0:u1:wait_ack_4_3 + i0:u1:wait_ack_4_5 + i0:u1:wait_ack_4_6 + i2:u7:wait_cable_4 + i2:u7:wait_msg_4 + i2:u7:loop_em_4 = 1
invariant :i0:u0:listen_3 + i0:u1:wait_ack_3_1 + i0:u1:wait_ack_3_2 + i0:u1:wait_ack_3_4 + i0:u1:wait_ack_3_5 + i0:u1:wait_ack_3_6 + i2:u6:wait_cable_3 + i2:u6:wait_msg_3 + i2:u6:loop_em_3 = 1
invariant :i0:u1:wait_ack_1_2 + i0:u1:wait_ack_1_3 + i0:u1:wait_ack_1_4 + i0:u1:wait_ack_1_5 + i0:u1:wait_ack_1_6 + i2:u13:listen_1 + i2:u13:wait_cable_1 + i2:u13:wait_msg_1 + i2:u13:loop_em_1 = 1
invariant :-1'i0:u0:FMC_5 + i1:u3:AMC_5_4 + i1:u3:AMC_5_5 + i1:u4:AMC_5_1 + i1:u4:AMC_5_2 + i1:u4:AMC_5_3 + i1:u4:AMC_5_6 + i1:u4:cable_used_5 + i1:u4:RMC_5 + i2:u8:listen_5 + i2:u8:wait_msg_5 + i2:u8:loop_em_5 = 1
Running compilation step : CommandLine [args=[gcc, -c, -I/home/mcc/BenchKit//lts_install_dir//include, -I., -std=c99, -fPIC, -O3, model.c], workingDir=/home/mcc/execution]
Compilation finished in 8805 ms.
Running link step : CommandLine [args=[gcc, -shared, -o, gal.so, model.o], workingDir=/home/mcc/execution]
Link finished in 61 ms.
Running LTSmin : CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=1, --when, --ltl, X(<>(((LTLAP0==true))U((LTLAP1==true)))), --buchi-type=spotba], workingDir=/home/mcc/execution]
LTSmin run took 57855 ms.
FORMULA SafeBus-PT-06-LTLFireability-00 TRUE TECHNIQUES PARTIAL_ORDER EXPLICIT LTSMIN SAT_SMT
Running LTSmin : CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=1, --when, --ltl, []((<>(<>((LTLAP2==true))))U([](X((LTLAP3==true))))), --buchi-type=spotba], workingDir=/home/mcc/execution]
LTSmin run took 177 ms.
FORMULA SafeBus-PT-06-LTLFireability-01 FALSE TECHNIQUES PARTIAL_ORDER EXPLICIT LTSMIN SAT_SMT
Running LTSmin : CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=1, --when, --ltl, (X((LTLAP4==true)))U([](<>((LTLAP5==true)))), --buchi-type=spotba], workingDir=/home/mcc/execution]
LTSmin run took 98 ms.
FORMULA SafeBus-PT-06-LTLFireability-02 FALSE TECHNIQUES PARTIAL_ORDER EXPLICIT LTSMIN SAT_SMT
Running LTSmin : CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=1, --when, --ltl, (X((LTLAP6==true)))U((LTLAP7==true)), --buchi-type=spotba], workingDir=/home/mcc/execution]
LTSmin run took 43 ms.
FORMULA SafeBus-PT-06-LTLFireability-03 FALSE TECHNIQUES PARTIAL_ORDER EXPLICIT LTSMIN SAT_SMT
Running LTSmin : CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=1, --when, --ltl, X(((LTLAP1==true))U(X(X((LTLAP6==true))))), --buchi-type=spotba], workingDir=/home/mcc/execution]
LTSmin run took 36 ms.
FORMULA SafeBus-PT-06-LTLFireability-04 FALSE TECHNIQUES PARTIAL_ORDER EXPLICIT LTSMIN SAT_SMT
Running LTSmin : CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=1, --when, --ltl, X([]((<>((LTLAP4==true)))U(X((LTLAP0==true))))), --buchi-type=spotba], workingDir=/home/mcc/execution]
LTSmin run took 54 ms.
FORMULA SafeBus-PT-06-LTLFireability-05 FALSE TECHNIQUES PARTIAL_ORDER EXPLICIT LTSMIN SAT_SMT
Running LTSmin : CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=1, -p, --pins-guards, --when, --ltl, (LTLAP7==true), --buchi-type=spotba], workingDir=/home/mcc/execution]
LTSmin run took 271 ms.
FORMULA SafeBus-PT-06-LTLFireability-06 FALSE TECHNIQUES PARTIAL_ORDER EXPLICIT LTSMIN SAT_SMT
Running LTSmin : CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=1, -p, --pins-guards, --when, --ltl, []([]((LTLAP8==true))), --buchi-type=spotba], workingDir=/home/mcc/execution]
LTSmin run took 249 ms.
FORMULA SafeBus-PT-06-LTLFireability-07 FALSE TECHNIQUES PARTIAL_ORDER EXPLICIT LTSMIN SAT_SMT
Running LTSmin : CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=1, --when, --ltl, X(<>([]([]([]((LTLAP9==true)))))), --buchi-type=spotba], workingDir=/home/mcc/execution]
LTSmin run took 29 ms.
FORMULA SafeBus-PT-06-LTLFireability-08 FALSE TECHNIQUES PARTIAL_ORDER EXPLICIT LTSMIN SAT_SMT
Running LTSmin : CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=1, --when, --ltl, ([](X([]((LTLAP10==true)))))U(<>((LTLAP11==true))), --buchi-type=spotba], workingDir=/home/mcc/execution]
LTSmin run took 37 ms.
FORMULA SafeBus-PT-06-LTLFireability-09 FALSE TECHNIQUES PARTIAL_ORDER EXPLICIT LTSMIN SAT_SMT
Running LTSmin : CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=1, --when, --ltl, <>(X((LTLAP12==true))), --buchi-type=spotba], workingDir=/home/mcc/execution]
LTSmin run took 40 ms.
FORMULA SafeBus-PT-06-LTLFireability-10 FALSE TECHNIQUES PARTIAL_ORDER EXPLICIT LTSMIN SAT_SMT
Running LTSmin : CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=1, --when, --ltl, ((LTLAP13==true))U(X(((LTLAP14==true))U((LTLAP15==true)))), --buchi-type=spotba], workingDir=/home/mcc/execution]
LTSmin run took 29 ms.
FORMULA SafeBus-PT-06-LTLFireability-11 FALSE TECHNIQUES PARTIAL_ORDER EXPLICIT LTSMIN SAT_SMT
Running LTSmin : CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=1, --when, --ltl, ([]((LTLAP16==true)))U([](X(X((LTLAP17==true))))), --buchi-type=spotba], workingDir=/home/mcc/execution]
LTSmin run took 37 ms.
FORMULA SafeBus-PT-06-LTLFireability-12 FALSE TECHNIQUES PARTIAL_ORDER EXPLICIT LTSMIN SAT_SMT
Running LTSmin : CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=1, --when, --ltl, X([]([]([]([]((LTLAP18==true)))))), --buchi-type=spotba], workingDir=/home/mcc/execution]
LTSmin run took 39 ms.
FORMULA SafeBus-PT-06-LTLFireability-13 FALSE TECHNIQUES PARTIAL_ORDER EXPLICIT LTSMIN SAT_SMT
Running LTSmin : CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=1, -p, --pins-guards, --when, --ltl, <>((LTLAP19==true)), --buchi-type=spotba], workingDir=/home/mcc/execution]
LTSmin run took 239 ms.
FORMULA SafeBus-PT-06-LTLFireability-14 FALSE TECHNIQUES PARTIAL_ORDER EXPLICIT LTSMIN SAT_SMT
Running LTSmin : CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=1, -p, --pins-guards, --when, --ltl, []((LTLAP20==true)), --buchi-type=spotba], workingDir=/home/mcc/execution]
LTSmin run took 238 ms.
FORMULA SafeBus-PT-06-LTLFireability-15 FALSE TECHNIQUES PARTIAL_ORDER EXPLICIT LTSMIN SAT_SMT
ITS tools runner thread asked to quit. Dying gracefully.

BK_STOP 1527841451842

--------------------
content from stderr:

+ export BINDIR=/home/mcc/BenchKit/
+ BINDIR=/home/mcc/BenchKit/
++ pwd
+ export MODEL=/home/mcc/execution
+ MODEL=/home/mcc/execution
+ /home/mcc/BenchKit//runeclipse.sh /home/mcc/execution LTLFireability -its -ltsminpath /home/mcc/BenchKit//lts_install_dir/ -louvain -smt
+ ulimit -s 65536
+ [[ -z '' ]]
+ export LTSMIN_MEM_SIZE=8589934592
+ LTSMIN_MEM_SIZE=8589934592
+ /home/mcc/BenchKit//itstools/its-tools -consoleLog -data /home/mcc/execution/workspace -pnfolder /home/mcc/execution -examination LTLFireability -z3path /home/mcc/BenchKit//z3/bin/z3 -yices2path /home/mcc/BenchKit//yices/bin/yices -its -ltsminpath /home/mcc/BenchKit//lts_install_dir/ -louvain -smt -vmargs -Dosgi.locking=none -Declipse.stateSaveDelayInterval=-1 -Dosgi.configuration.area=/tmp/.eclipse -Xss8m -Xms40m -Xmx8192m -Dfile.encoding=UTF-8 -Dosgi.requiredJavaVersion=1.6
Jun 01, 2018 8:19:10 AM fr.lip6.move.gal.application.Application start
INFO: Running its-tools with arguments : [-pnfolder, /home/mcc/execution, -examination, LTLFireability, -z3path, /home/mcc/BenchKit//z3/bin/z3, -yices2path, /home/mcc/BenchKit//yices/bin/yices, -its, -ltsminpath, /home/mcc/BenchKit//lts_install_dir/, -louvain, -smt]
Jun 01, 2018 8:19:10 AM fr.lip6.move.gal.application.MccTranslator transformPNML
INFO: Parsing pnml file : /home/mcc/execution/model.pnml
Jun 01, 2018 8:19:11 AM fr.lip6.move.gal.nupn.PTNetReader loadFromXML
INFO: Load time of PNML (sax parser for PT used): 139 ms
Jun 01, 2018 8:19:11 AM fr.lip6.move.gal.pnml.togal.PTGALTransformer handlePage
INFO: Transformed 144 places.
Jun 01, 2018 8:19:11 AM fr.lip6.move.gal.pnml.togal.PTGALTransformer handlePage
INFO: Transformed 451 transitions.
Jun 01, 2018 8:19:11 AM fr.lip6.move.serialization.SerializationUtil systemToFile
INFO: Time to serialize gal into /home/mcc/execution/model.pnml.img.gal : 37 ms
Jun 01, 2018 8:19:11 AM fr.lip6.move.gal.application.MccTranslator applyOrder
INFO: Applying decomposition
Jun 01, 2018 8:19:11 AM fr.lip6.move.gal.instantiate.DomainAnalyzer computeVariableDomains
INFO: Found a total of 6 fixed domain variables (out of 144 variables) in GAL type SafeBus_PT_06
Jun 01, 2018 8:19:11 AM fr.lip6.move.gal.instantiate.Simplifier printConstantVars
INFO: Found a total of 6 constant array cells/variables (out of 144 variables) in type SafeBus_PT_06
Jun 01, 2018 8:19:11 AM fr.lip6.move.gal.instantiate.Simplifier printConstantVars
INFO: msgl_3,msgl_2,msgl_5,msgl_1,msgl_6,msgl_4,
Jun 01, 2018 8:19:11 AM fr.lip6.move.gal.instantiate.Simplifier simplifyConstantVariables
INFO: Removed 6 constant variables :msgl_3=1, msgl_2=1, msgl_5=1, msgl_1=1, msgl_6=1, msgl_4=1
Jun 01, 2018 8:19:11 AM fr.lip6.move.gal.instantiate.Simplifier simplifyConstantVariables
INFO: Simplified 32 expressions due to constant valuations.
Jun 01, 2018 8:19:11 AM fr.lip6.move.gal.instantiate.GALRewriter flatten
INFO: Flatten gal took : 254 ms
Jun 01, 2018 8:19:11 AM fr.lip6.move.gal.instantiate.GALRewriter flatten
INFO: Flatten gal took : 131 ms
Begin: Fri Jun 1 08:19:12 2018

Computation of communities with the Newman-Girvan Modularity quality function

level 0:
start computation: Fri Jun 1 08:19:12 2018
network size: 138 nodes, 1736 links, 902 weight
quality increased from -0.0213188 to 0.317525
end computation: Fri Jun 1 08:19:12 2018
level 1:
start computation: Fri Jun 1 08:19:12 2018
network size: 14 nodes, 132 links, 902 weight
quality increased from 0.317525 to 0.379087
end computation: Fri Jun 1 08:19:12 2018
level 2:
start computation: Fri Jun 1 08:19:12 2018
network size: 3 nodes, 9 links, 902 weight
quality increased from 0.379087 to 0.379087
end computation: Fri Jun 1 08:19:12 2018
End: Fri Jun 1 08:19:12 2018
Total duration: 0 sec
0.379087
Jun 01, 2018 8:19:12 AM fr.lip6.move.gal.instantiate.CompositeBuilder decomposeWithOrder
INFO: Decomposing Gal with order
Jun 01, 2018 8:19:12 AM fr.lip6.move.gal.instantiate.GALRewriter flatten
INFO: Flatten gal took : 107 ms
Jun 01, 2018 8:19:12 AM fr.lip6.move.gal.instantiate.CompositeBuilder rewriteArraysToAllowPartition
INFO: Rewriting arrays to variables to allow decomposition.
Jun 01, 2018 8:19:12 AM fr.lip6.move.gal.instantiate.Instantiator fuseIsomorphicEffects
INFO: Removed a total of 472 redundant transitions.
Jun 01, 2018 8:19:12 AM fr.lip6.move.serialization.SerializationUtil systemToFile
INFO: Time to serialize gal into /home/mcc/execution/LTLFireability.pnml.gal : 15 ms
Jun 01, 2018 8:19:12 AM fr.lip6.move.serialization.SerializationUtil serializePropertiesForITSLTLTools
INFO: Time to serialize properties into /home/mcc/execution/LTLFireability.ltl : 6 ms
Jun 01, 2018 8:19:13 AM fr.lip6.move.gal.semantics.DeterministicNextBuilder getDeterministicNext
INFO: Input system was already deterministic with 451 transitions.
Jun 01, 2018 8:19:13 AM fr.lip6.move.gal.gal2smt.bmc.KInductionSolver computeAndDeclareInvariants
INFO: Computed 29 place invariants in 85 ms
Jun 01, 2018 8:19:14 AM fr.lip6.move.gal.gal2smt.bmc.KInductionSolver init
INFO: Proved 138 variables to be positive in 830 ms
Jun 01, 2018 8:19:14 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver computeAblingMatrix
INFO: Computing symmetric may disable matrix : 451 transitions.
Jun 01, 2018 8:19:14 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of disable matrix completed :0/451 took 1 ms. Total solver calls (SAT/UNSAT): 0(0/0)
Jun 01, 2018 8:19:14 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of Complete disable matrix. took 67 ms. Total solver calls (SAT/UNSAT): 0(0/0)
Jun 01, 2018 8:19:14 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver computeAblingMatrix
INFO: Computing symmetric may enable matrix : 451 transitions.
Jun 01, 2018 8:19:14 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of Complete enable matrix. took 38 ms. Total solver calls (SAT/UNSAT): 0(0/0)
Jun 01, 2018 8:19:24 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver computeCoEnablingMatrix
INFO: Computing symmetric co enabling matrix : 451 transitions.
Jun 01, 2018 8:19:24 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(0/451) took 83 ms. Total solver calls (SAT/UNSAT): 84(78/6)
Jun 01, 2018 8:19:27 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(5/451) took 3520 ms. Total solver calls (SAT/UNSAT): 1896(1183/713)
Jun 01, 2018 8:19:31 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(9/451) took 7372 ms. Total solver calls (SAT/UNSAT): 3354(2437/917)
Jun 01, 2018 8:19:35 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(12/451) took 10967 ms. Total solver calls (SAT/UNSAT): 4459(3410/1049)
Jun 01, 2018 8:19:38 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(15/451) took 14106 ms. Total solver calls (SAT/UNSAT): 5489(4304/1185)
Jun 01, 2018 8:19:41 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(19/451) took 17601 ms. Total solver calls (SAT/UNSAT): 6852(5204/1648)
Jun 01, 2018 8:19:44 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(23/451) took 20780 ms. Total solver calls (SAT/UNSAT): 8210(6190/2020)
Jun 01, 2018 8:19:48 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(27/451) took 24824 ms. Total solver calls (SAT/UNSAT): 9626(7299/2327)
Jun 01, 2018 8:19:52 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(31/451) took 28326 ms. Total solver calls (SAT/UNSAT): 11037(8116/2921)
Jun 01, 2018 8:19:55 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(34/451) took 31669 ms. Total solver calls (SAT/UNSAT): 12065(9093/2972)
Jun 01, 2018 8:19:59 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(38/451) took 35247 ms. Total solver calls (SAT/UNSAT): 13467(9970/3497)
Jun 01, 2018 8:20:02 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(41/451) took 38623 ms. Total solver calls (SAT/UNSAT): 14525(10777/3748)
Jun 01, 2018 8:20:06 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(44/451) took 42122 ms. Total solver calls (SAT/UNSAT): 15602(11685/3917)
Jun 01, 2018 8:20:09 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(47/451) took 45242 ms. Total solver calls (SAT/UNSAT): 16675(12640/4035)
Jun 01, 2018 8:20:13 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(51/451) took 49076 ms. Total solver calls (SAT/UNSAT): 18052(13878/4174)
Jun 01, 2018 8:20:16 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(55/451) took 52141 ms. Total solver calls (SAT/UNSAT): 19385(14802/4583)
Jun 01, 2018 8:20:20 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(59/451) took 55901 ms. Total solver calls (SAT/UNSAT): 20713(15802/4911)
Jun 01, 2018 8:20:24 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(63/451) took 59896 ms. Total solver calls (SAT/UNSAT): 22087(16900/5187)
Jun 01, 2018 8:20:27 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(67/451) took 63779 ms. Total solver calls (SAT/UNSAT): 23456(17712/5744)
Jun 01, 2018 8:20:31 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(70/451) took 67255 ms. Total solver calls (SAT/UNSAT): 24466(18674/5792)
Jun 01, 2018 8:20:34 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(74/451) took 70453 ms. Total solver calls (SAT/UNSAT): 25778(19516/6262)
Jun 01, 2018 8:20:38 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(77/451) took 73994 ms. Total solver calls (SAT/UNSAT): 26728(20243/6485)
Jun 01, 2018 8:20:41 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(80/451) took 77620 ms. Total solver calls (SAT/UNSAT): 27697(21061/6636)
Jun 01, 2018 8:20:45 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(83/451) took 80996 ms. Total solver calls (SAT/UNSAT): 28662(21922/6740)
Jun 01, 2018 8:20:48 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(86/451) took 84090 ms. Total solver calls (SAT/UNSAT): 29591(22741/6850)
Jun 01, 2018 8:20:51 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(90/451) took 87763 ms. Total solver calls (SAT/UNSAT): 30795(23655/7140)
Jun 01, 2018 8:20:55 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(94/451) took 91323 ms. Total solver calls (SAT/UNSAT): 31978(24548/7430)
Jun 01, 2018 8:20:59 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(98/451) took 95245 ms. Total solver calls (SAT/UNSAT): 33191(25498/7693)
Jun 01, 2018 8:21:02 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(102/451) took 98656 ms. Total solver calls (SAT/UNSAT): 34424(26259/8165)
Jun 01, 2018 8:21:06 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(105/451) took 102193 ms. Total solver calls (SAT/UNSAT): 35329(27054/8275)
Jun 01, 2018 8:21:09 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(110/451) took 105509 ms. Total solver calls (SAT/UNSAT): 36693(27953/8740)
Jun 01, 2018 8:21:13 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(117/451) took 109369 ms. Total solver calls (SAT/UNSAT): 38389(28840/9549)
Jun 01, 2018 8:21:16 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(121/451) took 112462 ms. Total solver calls (SAT/UNSAT): 39377(29685/9692)
Jun 01, 2018 8:21:20 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(125/451) took 115983 ms. Total solver calls (SAT/UNSAT): 40349(30574/9775)
Jun 01, 2018 8:21:23 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(129/451) took 119466 ms. Total solver calls (SAT/UNSAT): 41305(31436/9869)
Jun 01, 2018 8:21:26 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(133/451) took 122514 ms. Total solver calls (SAT/UNSAT): 42245(32232/10013)
Jun 01, 2018 8:21:29 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(137/451) took 125596 ms. Total solver calls (SAT/UNSAT): 43169(33070/10099)
Jun 01, 2018 8:21:33 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(140/451) took 129372 ms. Total solver calls (SAT/UNSAT): 43917(33730/10187)
Jun 01, 2018 8:21:36 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(144/451) took 132729 ms. Total solver calls (SAT/UNSAT): 44927(34655/10272)
Jun 01, 2018 8:21:40 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(149/451) took 136233 ms. Total solver calls (SAT/UNSAT): 46163(35738/10425)
Jun 01, 2018 8:21:43 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(158/451) took 139473 ms. Total solver calls (SAT/UNSAT): 47564(36866/10698)
Jun 01, 2018 8:21:46 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(163/451) took 142559 ms. Total solver calls (SAT/UNSAT): 48643(37727/10916)
Jun 01, 2018 8:21:50 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(169/451) took 146047 ms. Total solver calls (SAT/UNSAT): 49906(38724/11182)
Jun 01, 2018 8:21:53 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(174/451) took 149087 ms. Total solver calls (SAT/UNSAT): 50924(39518/11406)
Jun 01, 2018 8:21:56 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(180/451) took 152670 ms. Total solver calls (SAT/UNSAT): 52121(40460/11661)
Jun 01, 2018 8:22:00 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(186/451) took 156119 ms. Total solver calls (SAT/UNSAT): 53282(41372/11910)
Jun 01, 2018 8:22:03 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(209/451) took 159155 ms. Total solver calls (SAT/UNSAT): 55329(42720/12609)
Jun 01, 2018 8:22:06 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(228/451) took 162165 ms. Total solver calls (SAT/UNSAT): 57270(43828/13442)
Jun 01, 2018 8:22:09 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(239/451) took 165276 ms. Total solver calls (SAT/UNSAT): 58894(44745/14149)
Jun 01, 2018 8:22:12 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(261/451) took 168279 ms. Total solver calls (SAT/UNSAT): 60683(45588/15095)
Jun 01, 2018 8:22:15 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(283/451) took 171582 ms. Total solver calls (SAT/UNSAT): 62626(46446/16180)
Jun 01, 2018 8:22:18 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(298/451) took 174670 ms. Total solver calls (SAT/UNSAT): 64082(47485/16597)
Jun 01, 2018 8:22:21 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(318/451) took 177749 ms. Total solver calls (SAT/UNSAT): 65162(48309/16853)
Jun 01, 2018 8:22:24 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(338/451) took 180773 ms. Total solver calls (SAT/UNSAT): 66725(49710/17015)
Jun 01, 2018 8:22:28 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(351/451) took 184092 ms. Total solver calls (SAT/UNSAT): 67901(50625/17276)
Jun 01, 2018 8:22:31 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(359/451) took 187281 ms. Total solver calls (SAT/UNSAT): 68657(51213/17444)
Jun 01, 2018 8:22:34 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(372/451) took 190542 ms. Total solver calls (SAT/UNSAT): 69749(51997/17752)
Jun 01, 2018 8:22:37 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(385/451) took 193782 ms. Total solver calls (SAT/UNSAT): 70672(52714/17958)
Jun 01, 2018 8:22:41 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(396/451) took 196974 ms. Total solver calls (SAT/UNSAT): 71321(53261/18060)
Jun 01, 2018 8:22:44 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(417/451) took 200007 ms. Total solver calls (SAT/UNSAT): 72224(53922/18302)
Jun 01, 2018 8:22:46 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of Finished co-enabling matrix. took 202738 ms. Total solver calls (SAT/UNSAT): 72752(54366/18386)
Jun 01, 2018 8:22:46 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver computeDoNotAccord
INFO: Computing Do-Not-Accords matrix : 451 transitions.
Jun 01, 2018 8:23:02 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of Completed DNA matrix. took 15200 ms. Total solver calls (SAT/UNSAT): 11190(0/11190)
Jun 01, 2018 8:23:02 AM fr.lip6.move.gal.gal2pins.Gal2PinsTransformerNext transform
INFO: Built C files in 229339ms conformant to PINS in folder :/home/mcc/execution

Sequence of Actions to be Executed by the VM

This is useful if one wants to reexecute the tool in the VM from the submitted image disk.

set -x
# this is for BenchKit: configuration of major elements for the test
export BK_INPUT="SafeBus-PT-06"
export BK_EXAMINATION="LTLFireability"
export BK_TOOL="itstoolsl"
export BK_RESULT_DIR="/tmp/BK_RESULTS/OUTPUTS"
export BK_TIME_CONFINEMENT="3600"
export BK_MEMORY_CONFINEMENT="16384"

# this is specific to your benchmark or test

export BIN_DIR="$HOME/BenchKit/bin"

# remove the execution directoty if it exists (to avoid increse of .vmdk images)
if [ -d execution ] ; then
rm -rf execution
fi

tar xzf /home/mcc/BenchKit/INPUTS/SafeBus-PT-06.tgz
mv SafeBus-PT-06 execution
cd execution
pwd
ls -lh

# this is for BenchKit: explicit launching of the test
echo "====================================================================="
echo " Generated by BenchKit 2-3637"
echo " Executing tool itstoolsl"
echo " Input is SafeBus-PT-06, examination is LTLFireability"
echo " Time confinement is $BK_TIME_CONFINEMENT seconds"
echo " Memory confinement is 16384 MBytes"
echo " Number of cores is 4"
echo " Run identifier is r213-smll-152732264600532"
echo "====================================================================="
echo
echo "--------------------"
echo "content from stdout:"
echo
echo "=== Data for post analysis generated by BenchKit (invocation template)"
echo
if [ "LTLFireability" = "UpperBounds" ] ; then
echo "The expected result is a vector of positive values"
echo NUM_VECTOR
elif [ "LTLFireability" != "StateSpace" ] ; then
echo "The expected result is a vector of booleans"
echo BOOL_VECTOR
else
echo "no data necessary for post analysis"
fi
echo
if [ -f "LTLFireability.txt" ] ; then
echo "here is the order used to build the result vector(from text file)"
for x in $(grep Property LTLFireability.txt | cut -d ' ' -f 2 | sort -u) ; do
echo "FORMULA_NAME $x"
done
elif [ -f "LTLFireability.xml" ] ; then # for cunf (txt files deleted;-)
echo echo "here is the order used to build the result vector(from xml file)"
for x in $(grep '' LTLFireability.xml | cut -d '>' -f 2 | cut -d '<' -f 1 | sort -u) ; do
echo "FORMULA_NAME $x"
done
fi
echo
echo "=== Now, execution of the tool begins"
echo
echo -n "BK_START "
date -u +%s%3N
echo
timeout -s 9 $BK_TIME_CONFINEMENT bash -c "/home/mcc/BenchKit/BenchKit_head.sh 2> STDERR ; echo ; echo -n \"BK_STOP \" ; date -u +%s%3N"
if [ $? -eq 137 ] ; then
echo
echo "BK_TIME_CONFINEMENT_REACHED"
fi
echo
echo "--------------------"
echo "content from stderr:"
echo
cat STDERR ;