About the Execution of ITS-Tools.L for RobotManipulation-PT-00005
Execution Summary | |||||
Max Memory Used (MB) |
Time wait (ms) | CPU Usage (ms) | I/O Wait (ms) | Computed Result | Execution Status |
15753.410 | 9211.00 | 17193.00 | 409.10 | FTFFFFFFFTFTFFFF | normal |
Execution Chart
We display below the execution chart for this examination (boot time has been removed).
Trace from the execution
Waiting for the VM to be ready (probing ssh)
.....................
/home/mcc/execution
total 168K
-rw-r--r-- 1 mcc users 3.8K May 15 18:54 CTLCardinality.txt
-rw-r--r-- 1 mcc users 20K May 15 18:54 CTLCardinality.xml
-rw-r--r-- 1 mcc users 2.6K May 15 18:54 CTLFireability.txt
-rw-r--r-- 1 mcc users 15K May 15 18:54 CTLFireability.xml
-rw-r--r-- 1 mcc users 4.0K May 15 18:50 GenericPropertiesDefinition.xml
-rw-r--r-- 1 mcc users 6.2K May 15 18:50 GenericPropertiesVerdict.xml
-rw-r--r-- 1 mcc users 2.6K May 26 09:27 LTLCardinality.txt
-rw-r--r-- 1 mcc users 11K May 26 09:27 LTLCardinality.xml
-rw-r--r-- 1 mcc users 2.0K May 26 09:27 LTLFireability.txt
-rw-r--r-- 1 mcc users 8.0K May 26 09:27 LTLFireability.xml
-rw-r--r-- 1 mcc users 3.9K May 15 18:54 ReachabilityCardinality.txt
-rw-r--r-- 1 mcc users 19K May 15 18:54 ReachabilityCardinality.xml
-rw-r--r-- 1 mcc users 117 May 15 18:54 ReachabilityDeadlock.txt
-rw-r--r-- 1 mcc users 355 May 15 18:54 ReachabilityDeadlock.xml
-rw-r--r-- 1 mcc users 3.1K May 15 18:54 ReachabilityFireability.txt
-rw-r--r-- 1 mcc users 17K May 15 18:54 ReachabilityFireability.xml
-rw-r--r-- 1 mcc users 1.8K May 15 18:54 UpperBounds.txt
-rw-r--r-- 1 mcc users 3.8K May 15 18:54 UpperBounds.xml
-rw-r--r-- 1 mcc users 6 May 15 18:50 equiv_col
-rw-r--r-- 1 mcc users 6 May 15 18:50 instance
-rw-r--r-- 1 mcc users 6 May 15 18:50 iscolored
-rw-r--r-- 1 mcc users 6.4K May 15 18:50 model.pnml
=====================================================================
Generated by BenchKit 2-3637
Executing tool itstoolsl
Input is RobotManipulation-PT-00005, examination is LTLFireability
Time confinement is 3600 seconds
Memory confinement is 16384 MBytes
Number of cores is 4
Run identifier is r213-smll-152732264500470
=====================================================================
--------------------
content from stdout:
=== Data for post analysis generated by BenchKit (invocation template)
The expected result is a vector of booleans
BOOL_VECTOR
here is the order used to build the result vector(from text file)
FORMULA_NAME RobotManipulation-PT-00005-LTLFireability-00
FORMULA_NAME RobotManipulation-PT-00005-LTLFireability-01
FORMULA_NAME RobotManipulation-PT-00005-LTLFireability-02
FORMULA_NAME RobotManipulation-PT-00005-LTLFireability-03
FORMULA_NAME RobotManipulation-PT-00005-LTLFireability-04
FORMULA_NAME RobotManipulation-PT-00005-LTLFireability-05
FORMULA_NAME RobotManipulation-PT-00005-LTLFireability-06
FORMULA_NAME RobotManipulation-PT-00005-LTLFireability-07
FORMULA_NAME RobotManipulation-PT-00005-LTLFireability-08
FORMULA_NAME RobotManipulation-PT-00005-LTLFireability-09
FORMULA_NAME RobotManipulation-PT-00005-LTLFireability-10
FORMULA_NAME RobotManipulation-PT-00005-LTLFireability-11
FORMULA_NAME RobotManipulation-PT-00005-LTLFireability-12
FORMULA_NAME RobotManipulation-PT-00005-LTLFireability-13
FORMULA_NAME RobotManipulation-PT-00005-LTLFireability-14
FORMULA_NAME RobotManipulation-PT-00005-LTLFireability-15
=== Now, execution of the tool begins
BK_START 1527812133703
Converted graph to binary with : CommandLine [args=[/home/mcc/BenchKit/itstools/plugins/fr.lip6.move.gal.louvain.binaries_1.0.0.201805241334/bin/convert-linux64, -i, /tmp/graph4302862346775162203.txt, -o, /tmp/graph4302862346775162203.bin, -w, /tmp/graph4302862346775162203.weights], workingDir=null]
Built communities with : CommandLine [args=[/home/mcc/BenchKit/itstools/plugins/fr.lip6.move.gal.louvain.binaries_1.0.0.201805241334/bin/louvain-linux64, /tmp/graph4302862346775162203.bin, -l, -1, -v, -w, /tmp/graph4302862346775162203.weights, -q, 0, -e, 0.001], workingDir=null]
Using solver Z3 to compute partial order matrices.
Built C files in :
/home/mcc/execution
Invoking ITS tools like this :CommandLine [args=[/home/mcc/BenchKit/itstools/plugins/fr.lip6.move.gal.itstools.binaries_1.0.0.201805241334/bin/its-ltl-linux64, --gc-threshold, 2000000, -i, /home/mcc/execution/LTLFireability.pnml.gal, -t, CGAL, -LTL, /home/mcc/execution/LTLFireability.ltl, -c, -stutter-deadlock], workingDir=/home/mcc/execution]
its-ltl command run as :
/home/mcc/BenchKit/itstools/plugins/fr.lip6.move.gal.itstools.binaries_1.0.0.201805241334/bin/its-ltl-linux64 --gc-threshold 2000000 -i /home/mcc/execution/LTLFireability.pnml.gal -t CGAL -LTL /home/mcc/execution/LTLFireability.ltl -c -stutter-deadlock
Read 16 LTL properties
Checking formula 0 : !((G("((u0.r_active>=1)&&(u0.off>=1))")))
Formula 0 simplified : !G"((u0.r_active>=1)&&(u0.off>=1))"
built 3 ordering constraints for composite.
Presburger conditions satisfied. Using coverability to approximate state space in K-Induction.
// Phase 1: matrix 11 rows 15 cols
invariant :u2:initialize + u2:initialized + -1'u2:p_i2 = 0
invariant :u0:off + -1'u0:r_active + -1'u0:r_moving + -1'u2:p_i1 + u2:initialized + -1'u2:p_i2 = -11
invariant :u0:moved + u0:r_moving + u1:move + -1'u1:p_m = 0
invariant :u0:r_stopped + u0:r_active + u0:r_moving = 10
invariant :u1:access + -1'u2:p_rdy + -1'u2:p_i1 + -1'u2:p_i2 = -1
invariant :u1:p_sc + u1:p_m + u1:p_rel + u2:p_rdy + u2:p_i1 + u2:p_i2 = 11
Reverse transition relation is exact ! Faster fixpoint algorithm enabled.
3 unique states visited
3 strongly connected components in search stack
3 transitions explored
3 items max in DFS search stack
56 ticks for the emptiness check
Model ,|S| ,Time ,Mem(kb) ,fin. SDD ,fin. DDD ,peak SDD ,peak DDD ,SDD Hom ,SDD cache peak ,DDD Hom ,DDD cachepeak ,SHom cache
STATS,0,0.584105,29260,1,0,13971,14916,171,50811,217,92855,13910
an accepting run exists (use option '-e' to print it)
Formula 0 is FALSE accepting run found.
FORMULA RobotManipulation-PT-00005-LTLFireability-00 FALSE TECHNIQUES DECISION_DIAGRAMS TOPOLOGICAL USE_NUPN
Checking formula 1 : !(((G(("(u1.p_sc>=1)")U("((u2.p_rdy>=1)&&(u1.access>=1))")))U(X(F(F("(u2.p_rdy>=1)"))))))
Formula 1 simplified : !(G("(u1.p_sc>=1)" U "((u2.p_rdy>=1)&&(u1.access>=1))") U XF"(u2.p_rdy>=1)")
2 unique states visited
0 strongly connected components in search stack
1 transitions explored
2 items max in DFS search stack
6 ticks for the emptiness check
Model ,|S| ,Time ,Mem(kb) ,fin. SDD ,fin. DDD ,peak SDD ,peak DDD ,SDD Hom ,SDD cache peak ,DDD Hom ,DDD cachepeak ,SHom cache
STATS,0,0.647975,31532,1,0,15382,16297,188,55304,218,101692,15501
no accepting run found
Formula 1 is TRUE no accepting run found.
FORMULA RobotManipulation-PT-00005-LTLFireability-01 TRUE TECHNIQUES DECISION_DIAGRAMS TOPOLOGICAL USE_NUPN
Checking formula 2 : !((F("((u1.move>=1)&&(u0.r_active>=1))")))
Formula 2 simplified : !F"((u1.move>=1)&&(u0.r_active>=1))"
Running compilation step : CommandLine [args=[gcc, -c, -I/home/mcc/BenchKit//lts_install_dir//include, -I., -std=c99, -fPIC, -O3, model.c], workingDir=/home/mcc/execution]
Compilation finished in 536 ms.
Running link step : CommandLine [args=[gcc, -shared, -o, gal.so, model.o], workingDir=/home/mcc/execution]
Link finished in 49 ms.
Running LTSmin : CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=1, -p, --pins-guards, --when, --ltl, <>((LTLAP4==true)), --buchi-type=spotba], workingDir=/home/mcc/execution]
LTSmin run took 33 ms.
FORMULA RobotManipulation-PT-00005-LTLFireability-02 FALSE TECHNIQUES PARTIAL_ORDER EXPLICIT LTSMIN SAT_SMT
Running LTSmin : CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=1, --when, --ltl, [](([](<>((LTLAP5==true))))U(X([]((LTLAP3==true))))), --buchi-type=spotba], workingDir=/home/mcc/execution]
LTSmin run took 22 ms.
FORMULA RobotManipulation-PT-00005-LTLFireability-03 FALSE TECHNIQUES PARTIAL_ORDER EXPLICIT LTSMIN SAT_SMT
Running LTSmin : CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=1, -p, --pins-guards, --when, --ltl, <>(<>([]([](<>((LTLAP6==true)))))), --buchi-type=spotba], workingDir=/home/mcc/execution]
LTSmin run took 14 ms.
FORMULA RobotManipulation-PT-00005-LTLFireability-04 FALSE TECHNIQUES PARTIAL_ORDER EXPLICIT LTSMIN SAT_SMT
Running LTSmin : CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=1, -p, --pins-guards, --when, --ltl, <>([]([]((LTLAP3==true)))), --buchi-type=spotba], workingDir=/home/mcc/execution]
LTSmin run took 13 ms.
FORMULA RobotManipulation-PT-00005-LTLFireability-05 FALSE TECHNIQUES PARTIAL_ORDER EXPLICIT LTSMIN SAT_SMT
Running LTSmin : CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=1, -p, --pins-guards, --when, --ltl, (LTLAP3==true), --buchi-type=spotba], workingDir=/home/mcc/execution]
LTSmin run took 13 ms.
FORMULA RobotManipulation-PT-00005-LTLFireability-06 FALSE TECHNIQUES PARTIAL_ORDER EXPLICIT LTSMIN SAT_SMT
Running LTSmin : CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=1, --when, --ltl, []([](X([]((LTLAP7==true))))), --buchi-type=spotba], workingDir=/home/mcc/execution]
LTSmin run took 16 ms.
FORMULA RobotManipulation-PT-00005-LTLFireability-07 FALSE TECHNIQUES PARTIAL_ORDER EXPLICIT LTSMIN SAT_SMT
Running LTSmin : CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=1, -p, --pins-guards, --when, --ltl, (LTLAP0==true), --buchi-type=spotba], workingDir=/home/mcc/execution]
LTSmin run took 14 ms.
FORMULA RobotManipulation-PT-00005-LTLFireability-08 FALSE TECHNIQUES PARTIAL_ORDER EXPLICIT LTSMIN SAT_SMT
Running LTSmin : CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=1, --when, --ltl, <>(X(<>(((LTLAP8==true))U((LTLAP7==true))))), --buchi-type=spotba], workingDir=/home/mcc/execution]
LTSmin run took 12 ms.
FORMULA RobotManipulation-PT-00005-LTLFireability-09 TRUE TECHNIQUES PARTIAL_ORDER EXPLICIT LTSMIN SAT_SMT
Running LTSmin : CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=1, --when, --ltl, X(([](X((LTLAP1==true))))U([]((LTLAP6==true)))), --buchi-type=spotba], workingDir=/home/mcc/execution]
LTSmin run took 15 ms.
FORMULA RobotManipulation-PT-00005-LTLFireability-10 FALSE TECHNIQUES PARTIAL_ORDER EXPLICIT LTSMIN SAT_SMT
Running LTSmin : CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=1, --when, --ltl, [](X(<>(X((LTLAP2==true))))), --buchi-type=spotba], workingDir=/home/mcc/execution]
2 unique states visited
2 strongly connected components in search stack
2 transitions explored
2 items max in DFS search stack
171 ticks for the emptiness check
Model ,|S| ,Time ,Mem(kb) ,fin. SDD ,fin. DDD ,peak SDD ,peak DDD ,SDD Hom ,SDD cache peak ,DDD Hom ,DDD cachepeak ,SHom cache
STATS,0,2.36399,79844,1,0,20926,22013,207,400353,218,599567,23373
an accepting run exists (use option '-e' to print it)
Formula 2 is FALSE accepting run found.
FORMULA RobotManipulation-PT-00005-LTLFireability-02 FALSE TECHNIQUES DECISION_DIAGRAMS TOPOLOGICAL USE_NUPN
Checking formula 3 : !((G((G(F("(u0.r_moving>=1)")))U(X(G("(u2.p_rdy>=1)"))))))
Formula 3 simplified : !G(GF"(u0.r_moving>=1)" U XG"(u2.p_rdy>=1)")
4 unique states visited
4 strongly connected components in search stack
5 transitions explored
4 items max in DFS search stack
78 ticks for the emptiness check
Model ,|S| ,Time ,Mem(kb) ,fin. SDD ,fin. DDD ,peak SDD ,peak DDD ,SDD Hom ,SDD cache peak ,DDD Hom ,DDD cachepeak ,SHom cache
STATS,0,3.1441,100720,1,0,27632,25036,235,551010,219,760466,28337
an accepting run exists (use option '-e' to print it)
Formula 3 is FALSE accepting run found.
FORMULA RobotManipulation-PT-00005-LTLFireability-03 FALSE TECHNIQUES DECISION_DIAGRAMS TOPOLOGICAL USE_NUPN
Checking formula 4 : !((F(F(G(G(F("(u1.p_rel>=1)")))))))
Formula 4 simplified : !FGF"(u1.p_rel>=1)"
3 unique states visited
3 strongly connected components in search stack
4 transitions explored
3 items max in DFS search stack
6 ticks for the emptiness check
Model ,|S| ,Time ,Mem(kb) ,fin. SDD ,fin. DDD ,peak SDD ,peak DDD ,SDD Hom ,SDD cache peak ,DDD Hom ,DDD cachepeak ,SHom cache
STATS,0,3.20032,102292,1,0,29960,25518,253,557862,219,768021,29636
an accepting run exists (use option '-e' to print it)
Formula 4 is FALSE accepting run found.
FORMULA RobotManipulation-PT-00005-LTLFireability-04 FALSE TECHNIQUES DECISION_DIAGRAMS TOPOLOGICAL USE_NUPN
Checking formula 5 : !((F(G(G("(u2.p_rdy>=1)")))))
Formula 5 simplified : !FG"(u2.p_rdy>=1)"
LTSmin run took 2748 ms.
FORMULA RobotManipulation-PT-00005-LTLFireability-11 TRUE TECHNIQUES PARTIAL_ORDER EXPLICIT LTSMIN SAT_SMT
Running LTSmin : CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=1, -p, --pins-guards, --when, --ltl, ([]((LTLAP0==true)))U(<>((LTLAP1==true))), --buchi-type=spotba], workingDir=/home/mcc/execution]
LTSmin run took 14 ms.
FORMULA RobotManipulation-PT-00005-LTLFireability-12 FALSE TECHNIQUES PARTIAL_ORDER EXPLICIT LTSMIN SAT_SMT
Running LTSmin : CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=1, -p, --pins-guards, --when, --ltl, (LTLAP8==true), --buchi-type=spotba], workingDir=/home/mcc/execution]
LTSmin run took 20 ms.
FORMULA RobotManipulation-PT-00005-LTLFireability-13 FALSE TECHNIQUES PARTIAL_ORDER EXPLICIT LTSMIN SAT_SMT
Running LTSmin : CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=1, -p, --pins-guards, --when, --ltl, (LTLAP4==true), --buchi-type=spotba], workingDir=/home/mcc/execution]
LTSmin run took 13 ms.
FORMULA RobotManipulation-PT-00005-LTLFireability-14 FALSE TECHNIQUES PARTIAL_ORDER EXPLICIT LTSMIN SAT_SMT
Running LTSmin : CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=1, --when, --ltl, X((LTLAP1==true)), --buchi-type=spotba], workingDir=/home/mcc/execution]
LTSmin run took 30 ms.
FORMULA RobotManipulation-PT-00005-LTLFireability-15 FALSE TECHNIQUES PARTIAL_ORDER EXPLICIT LTSMIN SAT_SMT
ITS tools runner thread asked to quit. Dying gracefully.
BK_STOP 1527812142914
--------------------
content from stderr:
+ export BINDIR=/home/mcc/BenchKit/
+ BINDIR=/home/mcc/BenchKit/
++ pwd
+ export MODEL=/home/mcc/execution
+ MODEL=/home/mcc/execution
+ /home/mcc/BenchKit//runeclipse.sh /home/mcc/execution LTLFireability -its -ltsminpath /home/mcc/BenchKit//lts_install_dir/ -louvain -smt
+ ulimit -s 65536
+ [[ -z '' ]]
+ export LTSMIN_MEM_SIZE=8589934592
+ LTSMIN_MEM_SIZE=8589934592
+ /home/mcc/BenchKit//itstools/its-tools -consoleLog -data /home/mcc/execution/workspace -pnfolder /home/mcc/execution -examination LTLFireability -z3path /home/mcc/BenchKit//z3/bin/z3 -yices2path /home/mcc/BenchKit//yices/bin/yices -its -ltsminpath /home/mcc/BenchKit//lts_install_dir/ -louvain -smt -vmargs -Dosgi.locking=none -Declipse.stateSaveDelayInterval=-1 -Dosgi.configuration.area=/tmp/.eclipse -Xss8m -Xms40m -Xmx8192m -Dfile.encoding=UTF-8 -Dosgi.requiredJavaVersion=1.6
Jun 01, 2018 12:15:36 AM fr.lip6.move.gal.application.Application start
INFO: Running its-tools with arguments : [-pnfolder, /home/mcc/execution, -examination, LTLFireability, -z3path, /home/mcc/BenchKit//z3/bin/z3, -yices2path, /home/mcc/BenchKit//yices/bin/yices, -its, -ltsminpath, /home/mcc/BenchKit//lts_install_dir/, -louvain, -smt]
Jun 01, 2018 12:15:36 AM fr.lip6.move.gal.application.MccTranslator transformPNML
INFO: Parsing pnml file : /home/mcc/execution/model.pnml
Jun 01, 2018 12:15:36 AM fr.lip6.move.gal.nupn.PTNetReader loadFromXML
INFO: Load time of PNML (sax parser for PT used): 33 ms
Jun 01, 2018 12:15:36 AM fr.lip6.move.gal.pnml.togal.PTGALTransformer handlePage
INFO: Transformed 15 places.
Jun 01, 2018 12:15:36 AM fr.lip6.move.gal.pnml.togal.PTGALTransformer handlePage
INFO: Transformed 11 transitions.
Jun 01, 2018 12:15:36 AM fr.lip6.move.serialization.SerializationUtil systemToFile
INFO: Time to serialize gal into /home/mcc/execution/model.pnml.img.gal : 6 ms
Jun 01, 2018 12:15:36 AM fr.lip6.move.gal.application.MccTranslator applyOrder
INFO: Applying decomposition
Jun 01, 2018 12:15:36 AM fr.lip6.move.gal.instantiate.GALRewriter flatten
INFO: Flatten gal took : 24 ms
Jun 01, 2018 12:15:36 AM fr.lip6.move.gal.instantiate.GALRewriter flatten
INFO: Flatten gal took : 9 ms
Begin: Fri Jun 1 00:15:36 2018
Computation of communities with the Newman-Girvan Modularity quality function
level 0:
start computation: Fri Jun 1 00:15:36 2018
network size: 15 nodes, 44 links, 22 weight
quality increased from -0.0774793 to 0.393595
end computation: Fri Jun 1 00:15:36 2018
level 1:
start computation: Fri Jun 1 00:15:36 2018
network size: 3 nodes, 9 links, 22 weight
quality increased from 0.393595 to 0.393595
end computation: Fri Jun 1 00:15:36 2018
End: Fri Jun 1 00:15:36 2018
Total duration: 0 sec
0.393595
Jun 01, 2018 12:15:37 AM fr.lip6.move.gal.instantiate.CompositeBuilder decomposeWithOrder
INFO: Decomposing Gal with order
Jun 01, 2018 12:15:37 AM fr.lip6.move.gal.instantiate.GALRewriter flatten
INFO: Flatten gal took : 7 ms
Jun 01, 2018 12:15:37 AM fr.lip6.move.gal.instantiate.CompositeBuilder rewriteArraysToAllowPartition
INFO: Rewriting arrays to variables to allow decomposition.
Jun 01, 2018 12:15:37 AM fr.lip6.move.serialization.SerializationUtil systemToFile
INFO: Time to serialize gal into /home/mcc/execution/LTLFireability.pnml.gal : 2 ms
Jun 01, 2018 12:15:37 AM fr.lip6.move.serialization.SerializationUtil serializePropertiesForITSLTLTools
INFO: Time to serialize properties into /home/mcc/execution/LTLFireability.ltl : 1 ms
Jun 01, 2018 12:15:37 AM fr.lip6.move.gal.semantics.DeterministicNextBuilder getDeterministicNext
INFO: Input system was already deterministic with 11 transitions.
Jun 01, 2018 12:15:37 AM fr.lip6.move.gal.gal2smt.bmc.KInductionSolver computeAndDeclareInvariants
INFO: Computed 6 place invariants in 9 ms
Jun 01, 2018 12:15:37 AM fr.lip6.move.gal.gal2smt.bmc.KInductionSolver init
INFO: Proved 15 variables to be positive in 82 ms
Jun 01, 2018 12:15:37 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver computeAblingMatrix
INFO: Computing symmetric may disable matrix : 11 transitions.
Jun 01, 2018 12:15:37 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of disable matrix completed :0/11 took 0 ms. Total solver calls (SAT/UNSAT): 0(0/0)
Jun 01, 2018 12:15:37 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of Complete disable matrix. took 0 ms. Total solver calls (SAT/UNSAT): 0(0/0)
Jun 01, 2018 12:15:37 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver computeAblingMatrix
INFO: Computing symmetric may enable matrix : 11 transitions.
Jun 01, 2018 12:15:37 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of Complete enable matrix. took 0 ms. Total solver calls (SAT/UNSAT): 0(0/0)
Jun 01, 2018 12:15:37 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver computeCoEnablingMatrix
INFO: Computing symmetric co enabling matrix : 11 transitions.
Jun 01, 2018 12:15:38 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of Finished co-enabling matrix. took 278 ms. Total solver calls (SAT/UNSAT): 36(36/0)
Jun 01, 2018 12:15:38 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver computeDoNotAccord
INFO: Computing Do-Not-Accords matrix : 11 transitions.
Jun 01, 2018 12:15:38 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of Completed DNA matrix. took 84 ms. Total solver calls (SAT/UNSAT): 20(0/20)
Jun 01, 2018 12:15:38 AM fr.lip6.move.gal.gal2pins.Gal2PinsTransformerNext transform
INFO: Built C files in 898ms conformant to PINS in folder :/home/mcc/execution
Sequence of Actions to be Executed by the VM
This is useful if one wants to reexecute the tool in the VM from the submitted image disk.
set -x
# this is for BenchKit: configuration of major elements for the test
export BK_INPUT="RobotManipulation-PT-00005"
export BK_EXAMINATION="LTLFireability"
export BK_TOOL="itstoolsl"
export BK_RESULT_DIR="/tmp/BK_RESULTS/OUTPUTS"
export BK_TIME_CONFINEMENT="3600"
export BK_MEMORY_CONFINEMENT="16384"
# this is specific to your benchmark or test
export BIN_DIR="$HOME/BenchKit/bin"
# remove the execution directoty if it exists (to avoid increse of .vmdk images)
if [ -d execution ] ; then
rm -rf execution
fi
tar xzf /home/mcc/BenchKit/INPUTS/RobotManipulation-PT-00005.tgz
mv RobotManipulation-PT-00005 execution
cd execution
pwd
ls -lh
# this is for BenchKit: explicit launching of the test
echo "====================================================================="
echo " Generated by BenchKit 2-3637"
echo " Executing tool itstoolsl"
echo " Input is RobotManipulation-PT-00005, examination is LTLFireability"
echo " Time confinement is $BK_TIME_CONFINEMENT seconds"
echo " Memory confinement is 16384 MBytes"
echo " Number of cores is 4"
echo " Run identifier is r213-smll-152732264500470"
echo "====================================================================="
echo
echo "--------------------"
echo "content from stdout:"
echo
echo "=== Data for post analysis generated by BenchKit (invocation template)"
echo
if [ "LTLFireability" = "UpperBounds" ] ; then
echo "The expected result is a vector of positive values"
echo NUM_VECTOR
elif [ "LTLFireability" != "StateSpace" ] ; then
echo "The expected result is a vector of booleans"
echo BOOL_VECTOR
else
echo "no data necessary for post analysis"
fi
echo
if [ -f "LTLFireability.txt" ] ; then
echo "here is the order used to build the result vector(from text file)"
for x in $(grep Property LTLFireability.txt | cut -d ' ' -f 2 | sort -u) ; do
echo "FORMULA_NAME $x"
done
elif [ -f "LTLFireability.xml" ] ; then # for cunf (txt files deleted;-)
echo echo "here is the order used to build the result vector(from xml file)"
for x in $(grep '
echo "FORMULA_NAME $x"
done
fi
echo
echo "=== Now, execution of the tool begins"
echo
echo -n "BK_START "
date -u +%s%3N
echo
timeout -s 9 $BK_TIME_CONFINEMENT bash -c "/home/mcc/BenchKit/BenchKit_head.sh 2> STDERR ; echo ; echo -n \"BK_STOP \" ; date -u +%s%3N"
if [ $? -eq 137 ] ; then
echo
echo "BK_TIME_CONFINEMENT_REACHED"
fi
echo
echo "--------------------"
echo "content from stderr:"
echo
cat STDERR ;