About the Execution of ITS-Tools.L for DLCshifumi-PT-6a
Execution Summary | |||||
Max Memory Used (MB) |
Time wait (ms) | CPU Usage (ms) | I/O Wait (ms) | Computed Result | Execution Status |
15756.090 | 3600000.00 | 4518002.00 | 9780.00 | FFFF???????????? | normal |
Execution Chart
We display below the execution chart for this examination (boot time has been removed).
Trace from the execution
Waiting for the VM to be ready (probing ssh)
......................
/home/mcc/execution
total 7.0M
-rw-r--r-- 1 mcc users 3.8K May 15 18:54 CTLCardinality.txt
-rw-r--r-- 1 mcc users 22K May 15 18:54 CTLCardinality.xml
-rw-r--r-- 1 mcc users 2.5K May 15 18:54 CTLFireability.txt
-rw-r--r-- 1 mcc users 16K May 15 18:54 CTLFireability.xml
-rw-r--r-- 1 mcc users 4.0K May 15 18:50 GenericPropertiesDefinition.xml
-rw-r--r-- 1 mcc users 6.0K May 15 18:50 GenericPropertiesVerdict.xml
-rw-r--r-- 1 mcc users 2.3K May 26 09:26 LTLCardinality.txt
-rw-r--r-- 1 mcc users 11K May 26 09:26 LTLCardinality.xml
-rw-r--r-- 1 mcc users 1.8K May 26 09:26 LTLFireability.txt
-rw-r--r-- 1 mcc users 8.3K May 26 09:26 LTLFireability.xml
-rw-r--r-- 1 mcc users 3.5K May 15 18:54 ReachabilityCardinality.txt
-rw-r--r-- 1 mcc users 18K May 15 18:54 ReachabilityCardinality.xml
-rw-r--r-- 1 mcc users 107 May 15 18:54 ReachabilityDeadlock.txt
-rw-r--r-- 1 mcc users 345 May 15 18:54 ReachabilityDeadlock.xml
-rw-r--r-- 1 mcc users 2.6K May 15 18:54 ReachabilityFireability.txt
-rw-r--r-- 1 mcc users 15K May 15 18:54 ReachabilityFireability.xml
-rw-r--r-- 1 mcc users 1.6K May 15 18:54 UpperBounds.txt
-rw-r--r-- 1 mcc users 3.7K May 15 18:54 UpperBounds.xml
-rw-r--r-- 1 mcc users 6 May 15 18:50 equiv_col
-rw-r--r-- 1 mcc users 3 May 15 18:50 instance
-rw-r--r-- 1 mcc users 6 May 15 18:50 iscolored
-rw-r--r-- 1 mcc users 6.9M May 15 18:50 model.pnml
=====================================================================
Generated by BenchKit 2-3637
Executing tool itstoolsl
Input is DLCshifumi-PT-6a, examination is LTLFireability
Time confinement is 3600 seconds
Memory confinement is 16384 MBytes
Number of cores is 4
Run identifier is r213-smll-152732264100224
=====================================================================
--------------------
content from stdout:
=== Data for post analysis generated by BenchKit (invocation template)
The expected result is a vector of booleans
BOOL_VECTOR
here is the order used to build the result vector(from text file)
FORMULA_NAME DLCshifumi-PT-6a-LTLFireability-00
FORMULA_NAME DLCshifumi-PT-6a-LTLFireability-01
FORMULA_NAME DLCshifumi-PT-6a-LTLFireability-02
FORMULA_NAME DLCshifumi-PT-6a-LTLFireability-03
FORMULA_NAME DLCshifumi-PT-6a-LTLFireability-04
FORMULA_NAME DLCshifumi-PT-6a-LTLFireability-05
FORMULA_NAME DLCshifumi-PT-6a-LTLFireability-06
FORMULA_NAME DLCshifumi-PT-6a-LTLFireability-07
FORMULA_NAME DLCshifumi-PT-6a-LTLFireability-08
FORMULA_NAME DLCshifumi-PT-6a-LTLFireability-09
FORMULA_NAME DLCshifumi-PT-6a-LTLFireability-10
FORMULA_NAME DLCshifumi-PT-6a-LTLFireability-11
FORMULA_NAME DLCshifumi-PT-6a-LTLFireability-12
FORMULA_NAME DLCshifumi-PT-6a-LTLFireability-13
FORMULA_NAME DLCshifumi-PT-6a-LTLFireability-14
FORMULA_NAME DLCshifumi-PT-6a-LTLFireability-15
=== Now, execution of the tool begins
BK_START 1527908306143
Using solver Z3 to compute partial order matrices.
Built C files in :
/home/mcc/execution
Invoking ITS tools like this :CommandLine [args=[/home/mcc/BenchKit/itstools/plugins/fr.lip6.move.gal.itstools.binaries_1.0.0.201805241334/bin/its-ltl-linux64, --gc-threshold, 2000000, -i, /home/mcc/execution/LTLFireability.pnml.gal, -t, CGAL, -LTL, /home/mcc/execution/LTLFireability.ltl, -c, -stutter-deadlock], workingDir=/home/mcc/execution]
its-ltl command run as :
/home/mcc/BenchKit/itstools/plugins/fr.lip6.move.gal.itstools.binaries_1.0.0.201805241334/bin/its-ltl-linux64 --gc-threshold 2000000 -i /home/mcc/execution/LTLFireability.pnml.gal -t CGAL -LTL /home/mcc/execution/LTLFireability.ltl -c -stutter-deadlock
Read 16 LTL properties
Running compilation step : CommandLine [args=[gcc, -c, -I/home/mcc/BenchKit//lts_install_dir//include, -I., -std=c99, -fPIC, -O3, model.c], workingDir=/home/mcc/execution]
Checking formula 0 : !((G(G(X(X(X("((u1229.p2381>=1)&&(u154.p1078>=1))")))))))
Formula 0 simplified : !GXXX"((u1229.p2381>=1)&&(u154.p1078>=1))"
built 4453 ordering constraints for composite.
WARNING : LTS min runner thread failed on error :java.lang.RuntimeException: Compilation or link of executable timed out.java.util.concurrent.TimeoutException: Subprocess running CommandLine [args=[gcc, -c, -I/home/mcc/BenchKit//lts_install_dir//include, -I., -std=c99, -fPIC, -O3, model.c], workingDir=/home/mcc/execution] killed by timeout after 400 SECONDS
Reverse transition relation is exact ! Faster fixpoint algorithm enabled.
6 unique states visited
6 strongly connected components in search stack
6 transitions explored
6 items max in DFS search stack
145832 ticks for the emptiness check
Model ,|S| ,Time ,Mem(kb) ,fin. SDD ,fin. DDD ,peak SDD ,peak DDD ,SDD Hom ,SDD cache peak ,DDD Hom ,DDD cachepeak ,SHom cache
STATS,0,1467.22,7047272,1,0,4.61081e+06,9485,51851,5.93552e+06,241,7454,1155561
an accepting run exists (use option '-e' to print it)
Formula 0 is FALSE accepting run found.
FORMULA DLCshifumi-PT-6a-LTLFireability-00 FALSE TECHNIQUES DECISION_DIAGRAMS TOPOLOGICAL USE_NUPN
Checking formula 1 : !((F("((u187.p1314>=1)&&(u1507.p2659>=1))")))
Formula 1 simplified : !F"((u187.p1314>=1)&&(u1507.p2659>=1))"
2 unique states visited
2 strongly connected components in search stack
2 transitions explored
2 items max in DFS search stack
14592 ticks for the emptiness check
Model ,|S| ,Time ,Mem(kb) ,fin. SDD ,fin. DDD ,peak SDD ,peak DDD ,SDD Hom ,SDD cache peak ,DDD Hom ,DDD cachepeak ,SHom cache
STATS,0,1613.15,7047272,1,0,4.61081e+06,9485,73713,5.93552e+06,345,7454,2511604
an accepting run exists (use option '-e' to print it)
Formula 1 is FALSE accepting run found.
FORMULA DLCshifumi-PT-6a-LTLFireability-01 FALSE TECHNIQUES DECISION_DIAGRAMS TOPOLOGICAL USE_NUPN
Checking formula 2 : !((X("((u184.p1284>=1)&&(u401.p1553>=1))")))
Formula 2 simplified : !X"((u184.p1284>=1)&&(u401.p1553>=1))"
4 unique states visited
4 strongly connected components in search stack
4 transitions explored
4 items max in DFS search stack
7541 ticks for the emptiness check
Model ,|S| ,Time ,Mem(kb) ,fin. SDD ,fin. DDD ,peak SDD ,peak DDD ,SDD Hom ,SDD cache peak ,DDD Hom ,DDD cachepeak ,SHom cache
STATS,0,1688.57,7047272,1,0,4.61081e+06,9485,76244,5.93552e+06,345,7454,3581285
an accepting run exists (use option '-e' to print it)
Formula 2 is FALSE accepting run found.
FORMULA DLCshifumi-PT-6a-LTLFireability-02 FALSE TECHNIQUES DECISION_DIAGRAMS TOPOLOGICAL USE_NUPN
Checking formula 3 : !((X((X("((u185.p1296>=1)&&(u897.p2049>=1))"))U(("(u24.p167>=1)")U("(u1.p2>=1)")))))
Formula 3 simplified : !X(X"((u185.p1296>=1)&&(u897.p2049>=1))" U ("(u24.p167>=1)" U "(u1.p2>=1)"))
5 unique states visited
5 strongly connected components in search stack
5 transitions explored
5 items max in DFS search stack
563 ticks for the emptiness check
Model ,|S| ,Time ,Mem(kb) ,fin. SDD ,fin. DDD ,peak SDD ,peak DDD ,SDD Hom ,SDD cache peak ,DDD Hom ,DDD cachepeak ,SHom cache
STATS,0,1694.2,7048036,1,0,4.61081e+06,9485,76277,5.93552e+06,347,7454,4797067
an accepting run exists (use option '-e' to print it)
Formula 3 is FALSE accepting run found.
FORMULA DLCshifumi-PT-6a-LTLFireability-03 FALSE TECHNIQUES DECISION_DIAGRAMS TOPOLOGICAL USE_NUPN
Checking formula 4 : !(((F(G(G("((u154.p1075>=1)&&(u1228.p2380>=1))"))))U("((u114.p798>=1)&&(u1881.p3033>=1))")))
Formula 4 simplified : !(FG"((u154.p1075>=1)&&(u1228.p2380>=1))" U "((u114.p798>=1)&&(u1881.p3033>=1))")
BK_TIME_CONFINEMENT_REACHED
--------------------
content from stderr:
+ export BINDIR=/home/mcc/BenchKit/
+ BINDIR=/home/mcc/BenchKit/
++ pwd
+ export MODEL=/home/mcc/execution
+ MODEL=/home/mcc/execution
+ /home/mcc/BenchKit//runeclipse.sh /home/mcc/execution LTLFireability -its -ltsminpath /home/mcc/BenchKit//lts_install_dir/ -louvain -smt
+ ulimit -s 65536
+ [[ -z '' ]]
+ export LTSMIN_MEM_SIZE=8589934592
+ LTSMIN_MEM_SIZE=8589934592
+ /home/mcc/BenchKit//itstools/its-tools -consoleLog -data /home/mcc/execution/workspace -pnfolder /home/mcc/execution -examination LTLFireability -z3path /home/mcc/BenchKit//z3/bin/z3 -yices2path /home/mcc/BenchKit//yices/bin/yices -its -ltsminpath /home/mcc/BenchKit//lts_install_dir/ -louvain -smt -vmargs -Dosgi.locking=none -Declipse.stateSaveDelayInterval=-1 -Dosgi.configuration.area=/tmp/.eclipse -Xss8m -Xms40m -Xmx8192m -Dfile.encoding=UTF-8 -Dosgi.requiredJavaVersion=1.6
Jun 02, 2018 2:58:28 AM fr.lip6.move.gal.application.Application start
INFO: Running its-tools with arguments : [-pnfolder, /home/mcc/execution, -examination, LTLFireability, -z3path, /home/mcc/BenchKit//z3/bin/z3, -yices2path, /home/mcc/BenchKit//yices/bin/yices, -its, -ltsminpath, /home/mcc/BenchKit//lts_install_dir/, -louvain, -smt]
Jun 02, 2018 2:58:28 AM fr.lip6.move.gal.application.MccTranslator transformPNML
INFO: Parsing pnml file : /home/mcc/execution/model.pnml
Jun 02, 2018 2:58:29 AM fr.lip6.move.gal.nupn.PTNetReader loadFromXML
INFO: Load time of PNML (sax parser for PT used): 824 ms
Jun 02, 2018 2:58:29 AM fr.lip6.move.gal.pnml.togal.PTGALTransformer handlePage
INFO: Transformed 3568 places.
Jun 02, 2018 2:58:30 AM fr.lip6.move.gal.pnml.togal.PTGALTransformer handlePage
INFO: Transformed 25936 transitions.
Jun 02, 2018 2:58:30 AM fr.lip6.move.gal.pnml.togal.PnmlToGalTransformer transform
INFO: Found NUPN structural information;
Jun 02, 2018 2:58:30 AM fr.lip6.move.gal.application.MccTranslator applyOrder
INFO: Applying decomposition
Jun 02, 2018 2:58:35 AM fr.lip6.move.gal.instantiate.GALRewriter flatten
INFO: Flatten gal took : 4832 ms
Jun 02, 2018 2:58:38 AM fr.lip6.move.gal.instantiate.GALRewriter flatten
INFO: Flatten gal took : 3420 ms
Jun 02, 2018 2:58:38 AM fr.lip6.move.gal.instantiate.CompositeBuilder decomposeWithOrder
INFO: Decomposing Gal with order
Jun 02, 2018 2:58:42 AM fr.lip6.move.gal.instantiate.GALRewriter flatten
INFO: Flatten gal took : 3241 ms
Jun 02, 2018 2:58:42 AM fr.lip6.move.gal.instantiate.CompositeBuilder rewriteArraysToAllowPartition
INFO: Rewriting arrays to variables to allow decomposition.
Jun 02, 2018 2:58:49 AM fr.lip6.move.gal.instantiate.Instantiator fuseIsomorphicEffects
INFO: Removed a total of 43500 redundant transitions.
Jun 02, 2018 2:58:49 AM fr.lip6.move.serialization.SerializationUtil systemToFile
INFO: Time to serialize gal into /home/mcc/execution/LTLFireability.pnml.gal : 201 ms
Jun 02, 2018 2:58:49 AM fr.lip6.move.serialization.SerializationUtil serializePropertiesForITSLTLTools
INFO: Time to serialize properties into /home/mcc/execution/LTLFireability.ltl : 1 ms
Jun 02, 2018 2:58:51 AM fr.lip6.move.gal.semantics.CompositeNextBuilder getNextForLabel
INFO: Semantic construction discarded 2976 identical transitions.
Jun 02, 2018 2:58:51 AM fr.lip6.move.gal.semantics.DeterministicNextBuilder getDeterministicNext
INFO: Input system was already deterministic with 22960 transitions.
Jun 02, 2018 2:58:51 AM fr.lip6.move.gal.gal2pins.Gal2PinsTransformerNext transform
INFO: Too many transitions (22960) to apply POR reductions. Disabling POR matrices.
Jun 02, 2018 2:58:52 AM fr.lip6.move.gal.gal2pins.Gal2PinsTransformerNext transform
INFO: Built C files in 2706ms conformant to PINS in folder :/home/mcc/execution
java.lang.RuntimeException: Compilation or link of executable timed out.java.util.concurrent.TimeoutException: Subprocess running CommandLine [args=[gcc, -c, -I/home/mcc/BenchKit//lts_install_dir//include, -I., -std=c99, -fPIC, -O3, model.c], workingDir=/home/mcc/execution] killed by timeout after 400 SECONDS
at fr.lip6.move.gal.application.LTSminRunner$1.run(LTSminRunner.java:78)
at java.lang.Thread.run(Thread.java:748)
Sequence of Actions to be Executed by the VM
This is useful if one wants to reexecute the tool in the VM from the submitted image disk.
set -x
# this is for BenchKit: configuration of major elements for the test
export BK_INPUT="DLCshifumi-PT-6a"
export BK_EXAMINATION="LTLFireability"
export BK_TOOL="itstoolsl"
export BK_RESULT_DIR="/tmp/BK_RESULTS/OUTPUTS"
export BK_TIME_CONFINEMENT="3600"
export BK_MEMORY_CONFINEMENT="16384"
# this is specific to your benchmark or test
export BIN_DIR="$HOME/BenchKit/bin"
# remove the execution directoty if it exists (to avoid increse of .vmdk images)
if [ -d execution ] ; then
rm -rf execution
fi
tar xzf /home/mcc/BenchKit/INPUTS/DLCshifumi-PT-6a.tgz
mv DLCshifumi-PT-6a execution
cd execution
pwd
ls -lh
# this is for BenchKit: explicit launching of the test
echo "====================================================================="
echo " Generated by BenchKit 2-3637"
echo " Executing tool itstoolsl"
echo " Input is DLCshifumi-PT-6a, examination is LTLFireability"
echo " Time confinement is $BK_TIME_CONFINEMENT seconds"
echo " Memory confinement is 16384 MBytes"
echo " Number of cores is 4"
echo " Run identifier is r213-smll-152732264100224"
echo "====================================================================="
echo
echo "--------------------"
echo "content from stdout:"
echo
echo "=== Data for post analysis generated by BenchKit (invocation template)"
echo
if [ "LTLFireability" = "UpperBounds" ] ; then
echo "The expected result is a vector of positive values"
echo NUM_VECTOR
elif [ "LTLFireability" != "StateSpace" ] ; then
echo "The expected result is a vector of booleans"
echo BOOL_VECTOR
else
echo "no data necessary for post analysis"
fi
echo
if [ -f "LTLFireability.txt" ] ; then
echo "here is the order used to build the result vector(from text file)"
for x in $(grep Property LTLFireability.txt | cut -d ' ' -f 2 | sort -u) ; do
echo "FORMULA_NAME $x"
done
elif [ -f "LTLFireability.xml" ] ; then # for cunf (txt files deleted;-)
echo echo "here is the order used to build the result vector(from xml file)"
for x in $(grep '
echo "FORMULA_NAME $x"
done
fi
echo
echo "=== Now, execution of the tool begins"
echo
echo -n "BK_START "
date -u +%s%3N
echo
timeout -s 9 $BK_TIME_CONFINEMENT bash -c "/home/mcc/BenchKit/BenchKit_head.sh 2> STDERR ; echo ; echo -n \"BK_STOP \" ; date -u +%s%3N"
if [ $? -eq 137 ] ; then
echo
echo "BK_TIME_CONFINEMENT_REACHED"
fi
echo
echo "--------------------"
echo "content from stderr:"
echo
cat STDERR ;