Execution Chart

We display below the execution chart for this examination (boot time has been removed).

Trace from the execution

Waiting for the VM to be ready (probing ssh)
......................
/home/mcc/execution
total 208K
-rw-r--r-- 1 mcc users 2.8K May 15 18:54 CTLCardinality.txt
-rw-r--r-- 1 mcc users 15K May 15 18:54 CTLCardinality.xml
-rw-r--r-- 1 mcc users 2.5K May 15 18:54 CTLFireability.txt
-rw-r--r-- 1 mcc users 20K May 15 18:54 CTLFireability.xml
-rw-r--r-- 1 mcc users 4.0K May 15 18:50 GenericPropertiesDefinition.xml
-rw-r--r-- 1 mcc users 6.1K May 15 18:50 GenericPropertiesVerdict.xml
-rw-r--r-- 1 mcc users 2.2K May 26 09:26 LTLCardinality.txt
-rw-r--r-- 1 mcc users 9.6K May 26 09:26 LTLCardinality.xml
-rw-r--r-- 1 mcc users 1.7K May 26 09:26 LTLFireability.txt
-rw-r--r-- 1 mcc users 8.9K May 26 09:26 LTLFireability.xml
-rw-r--r-- 1 mcc users 3.2K May 15 18:54 ReachabilityCardinality.txt
-rw-r--r-- 1 mcc users 17K May 15 18:54 ReachabilityCardinality.xml
-rw-r--r-- 1 mcc users 101 May 15 18:54 ReachabilityDeadlock.txt
-rw-r--r-- 1 mcc users 339 May 15 18:54 ReachabilityDeadlock.xml
-rw-r--r-- 1 mcc users 2.5K May 15 18:54 ReachabilityFireability.txt
-rw-r--r-- 1 mcc users 17K May 15 18:54 ReachabilityFireability.xml
-rw-r--r-- 1 mcc users 1.5K May 15 18:54 UpperBounds.txt
-rw-r--r-- 1 mcc users 3.5K May 15 18:54 UpperBounds.xml
-rw-r--r-- 1 mcc users 6 May 15 18:50 equiv_col
-rw-r--r-- 1 mcc users 4 May 15 18:50 instance
-rw-r--r-- 1 mcc users 6 May 15 18:50 iscolored
-rw-r--r-- 1 mcc users 43K May 15 18:50 model.pnml
=====================================================================
Generated by BenchKit 2-3637
Executing tool itstoolsl
Input is DES-PT-10a, examination is LTLFireability
Time confinement is 3600 seconds
Memory confinement is 16384 MBytes
Number of cores is 4
Run identifier is r213-smll-152732264000140
=====================================================================

--------------------
content from stdout:

=== Data for post analysis generated by BenchKit (invocation template)

The expected result is a vector of booleans
BOOL_VECTOR

here is the order used to build the result vector(from text file)
FORMULA_NAME DES-PT-10a-LTLFireability-00
FORMULA_NAME DES-PT-10a-LTLFireability-01
FORMULA_NAME DES-PT-10a-LTLFireability-02
FORMULA_NAME DES-PT-10a-LTLFireability-03
FORMULA_NAME DES-PT-10a-LTLFireability-04
FORMULA_NAME DES-PT-10a-LTLFireability-05
FORMULA_NAME DES-PT-10a-LTLFireability-06
FORMULA_NAME DES-PT-10a-LTLFireability-07
FORMULA_NAME DES-PT-10a-LTLFireability-08
FORMULA_NAME DES-PT-10a-LTLFireability-09
FORMULA_NAME DES-PT-10a-LTLFireability-10
FORMULA_NAME DES-PT-10a-LTLFireability-11
FORMULA_NAME DES-PT-10a-LTLFireability-12
FORMULA_NAME DES-PT-10a-LTLFireability-13
FORMULA_NAME DES-PT-10a-LTLFireability-14
FORMULA_NAME DES-PT-10a-LTLFireability-15

=== Now, execution of the tool begins

BK_START 1527863696804

Using solver Z3 to compute partial order matrices.
Built C files in :
/home/mcc/execution
Invoking ITS tools like this :CommandLine [args=[/home/mcc/BenchKit/itstools/plugins/fr.lip6.move.gal.itstools.binaries_1.0.0.201805241334/bin/its-ltl-linux64, --gc-threshold, 2000000, -i, /home/mcc/execution/LTLFireability.pnml.gal, -t, CGAL, -LTL, /home/mcc/execution/LTLFireability.ltl, -c, -stutter-deadlock], workingDir=/home/mcc/execution]

its-ltl command run as :

/home/mcc/BenchKit/itstools/plugins/fr.lip6.move.gal.itstools.binaries_1.0.0.201805241334/bin/its-ltl-linux64 --gc-threshold 2000000 -i /home/mcc/execution/LTLFireability.pnml.gal -t CGAL -LTL /home/mcc/execution/LTLFireability.ltl -c -stutter-deadlock
Read 16 LTL properties
Checking formula 0 : !((X(X(G(X(G("((((((((u47.p127>=1)&&(u45.p123>=1))&&(u43.p119>=1))&&(u41.p115>=1))&&(u40.p113>=1))&&(u42.p117>=1))&&(u44.p121>=1))&&(u46.p125>=1))")))))))
Formula 0 simplified : !XXGXG"((((((((u47.p127>=1)&&(u45.p123>=1))&&(u43.p119>=1))&&(u41.p115>=1))&&(u40.p113>=1))&&(u42.p117>=1))&&(u44.p121>=1))&&(u46.p125>=1))"
built 49 ordering constraints for composite.
built 16 ordering constraints for composite.
built 14 ordering constraints for composite.
Presburger conditions satisfied. Using coverability to approximate state space in K-Induction.
// Phase 1: matrix 98 rows 155 cols
invariant :u27:p87 + -1'u31:p95 + u35:p103 + -1'u39:p111 + -1'u43:p119 + u47:p127 = 0
invariant :u62:p0 + i50:u53:p139 + i50:u53:p140 + i50:u54:p141 + i50:u54:p142 + i50:u60:p134 + i50:u60:p135 + i50:u60:p136 = 1
invariant :u24:p81 + -1'u31:p95 + u32:p97 + -1'u39:p111 + -1'u40:p113 + u47:p127 = 0
invariant :u30:p93 + -1'u31:p95 + u38:p109 + -1'u39:p111 + -1'u46:p125 + u47:p127 = 0
invariant :u48:p128 + u48:p129 + -1'u49:p130 + -1'u49:p131 = 0
invariant :u24:p80 + u31:p95 + -1'u32:p97 + u39:p111 + u40:p113 + -1'u47:p127 + u62:p0 = 1
invariant :u21:p74 + u21:p75 + u62:p0 = 1
invariant :u7:p45 + u7:p46 + u7:p47 + u62:p0 = 1
invariant :-10'u1:p1 + -1'u1:p2 + -2'u1:p3 + -3'u1:p4 + -4'u1:p5 + -5'u1:p6 + -6'u1:p7 + -7'u1:p8 + -8'u1:p9 + -9'u1:p10 + 10'u2:p11 + u2:p12 + 2'u2:p13 + 3'u2:p14 + 4'u2:p15 + 5'u2:p16 + 6'u2:p17 + 7'u2:p18 + 8'u2:p19 + 9'u2:p20 + u20:p73 + u22:p77 + u31:p95 + u39:p111 + -1'u47:p127 + -1'u49:p130 + u50:p133 + -3'u62:p0 + -1'i50:u52:p138 + -1'i50:u54:p142 + -1'i50:u60:p134 + -1'i50:u60:p136 + -1'i52:u58:p152 + -1'i52:u61:p150 = -3
invariant :u37:p106 + u37:p107 + u62:p0 = 1
invariant :u50:p132 + u50:p133 + u62:p0 = 1
invariant :u31:p94 + u31:p95 + u62:p0 = 1
invariant :u32:p96 + u32:p97 + u62:p0 = 1
invariant :u62:p0 + i52:u59:p153 + i52:u59:p154 + i52:u61:p150 = 1
invariant :20'u1:p1 + 2'u1:p2 + 4'u1:p3 + 6'u1:p4 + 8'u1:p5 + 10'u1:p6 + 12'u1:p7 + 14'u1:p8 + 16'u1:p9 + 18'u1:p10 + -20'u2:p11 + -2'u2:p12 + -4'u2:p13 + -6'u2:p14 + -8'u2:p15 + -10'u2:p16 + -12'u2:p17 + -14'u2:p18 + -16'u2:p19 + -18'u2:p20 + -1'u20:p73 + -1'u21:p75 + -1'u23:p79 + u56:p145 + u56:p149 + 4'u62:p0 + i50:u53:p140 + i50:u55:p144 + i50:u60:p134 + i50:u60:p136 + i52:u58:p152 + i52:u59:p154 + 2'i52:u61:p150 = 4
invariant :u44:p120 + u44:p121 + u49:p130 + u49:p131 + u62:p0 = 1
invariant :u28:p88 + u31:p95 + -1'u36:p105 + u39:p111 + u44:p121 + -1'u47:p127 + u62:p0 = 1
invariant :u46:p124 + u46:p125 + u49:p130 + u49:p131 + u62:p0 = 1
invariant :u25:p82 + u31:p95 + -1'u33:p99 + u39:p111 + u41:p115 + -1'u47:p127 + u62:p0 = 1
invariant :10'u1:p1 + u1:p2 + 2'u1:p3 + 3'u1:p4 + 4'u1:p5 + 5'u1:p6 + 6'u1:p7 + 7'u1:p8 + 8'u1:p9 + 9'u1:p10 + -10'u2:p11 + -1'u2:p12 + -2'u2:p13 + -3'u2:p14 + -4'u2:p15 + -5'u2:p16 + -6'u2:p17 + -7'u2:p18 + -8'u2:p19 + -9'u2:p20 + u8:p49 + -1'u9:p51 + -1'u21:p75 + -1'u23:p79 + u56:p145 + 2'u62:p0 + i50:u60:p136 + i52:u58:p152 + i52:u61:p150 = 2
invariant :u25:p83 + -1'u31:p95 + u33:p99 + -1'u39:p111 + -1'u41:p115 + u47:p127 = 0
invariant :u29:p90 + u31:p95 + -1'u37:p107 + u39:p111 + u45:p123 + -1'u47:p127 + u62:p0 = 1
invariant :u38:p108 + u38:p109 + u62:p0 = 1
invariant :u6:p43 + u6:p44 + u62:p0 = 1
invariant :u42:p116 + u42:p117 + u49:p130 + u49:p131 + u62:p0 = 1
invariant :u23:p78 + u23:p79 + u62:p0 = 1
invariant :u62:p0 + i52:u58:p151 + i52:u58:p152 + i52:u61:p150 = 1
invariant :20'u1:p1 + 2'u1:p2 + 4'u1:p3 + 6'u1:p4 + 8'u1:p5 + 10'u1:p6 + 12'u1:p7 + 14'u1:p8 + 16'u1:p9 + 18'u1:p10 + -10'u2:p11 + -1'u2:p12 + -2'u2:p13 + -3'u2:p14 + -4'u2:p15 + -5'u2:p16 + -6'u2:p17 + -7'u2:p18 + -8'u2:p19 + -9'u2:p20 + -10'u4:p31 + -1'u4:p32 + -2'u4:p33 + -3'u4:p34 + -4'u4:p35 + -5'u4:p36 + -6'u4:p37 + -7'u4:p38 + -8'u4:p39 + -9'u4:p40 + -1'u7:p47 + -1'u9:p51 + u11:p54 + -1'u14:p61 + -1'u15:p62 + u18:p69 + -1'u20:p73 + -1'u21:p75 + -1'u23:p79 + u48:p129 + -1'u49:p131 + -1'u50:p133 + u56:p145 + 2'u62:p0 + i50:u52:p138 + i50:u54:p142 + i50:u60:p134 + i50:u60:p136 + i52:u58:p152 + i52:u61:p150 = 2
invariant :u29:p91 + -1'u31:p95 + u37:p107 + -1'u39:p111 + -1'u45:p123 + u47:p127 = 0
invariant :10'u1:p1 + u1:p2 + 2'u1:p3 + 3'u1:p4 + 4'u1:p5 + 5'u1:p6 + 6'u1:p7 + 7'u1:p8 + 8'u1:p9 + 9'u1:p10 + -10'u2:p11 + -1'u2:p12 + -2'u2:p13 + -3'u2:p14 + -4'u2:p15 + -5'u2:p16 + -6'u2:p17 + -7'u2:p18 + -8'u2:p19 + -9'u2:p20 + -1'u20:p73 + u22:p76 + -1'u31:p95 + -1'u39:p111 + u47:p127 + u49:p130 + -1'u50:p133 + 4'u62:p0 + i50:u52:p138 + i50:u54:p142 + i50:u60:p134 + i50:u60:p136 + i52:u58:p152 + i52:u61:p150 = 4
invariant :u62:p0 + i50:u52:p137 + i50:u52:p138 + i50:u54:p141 + i50:u54:p142 + i50:u60:p134 + i50:u60:p135 + i50:u60:p136 = 1
invariant :-20'u1:p1 + -2'u1:p2 + -4'u1:p3 + -6'u1:p4 + -8'u1:p5 + -10'u1:p6 + -12'u1:p7 + -14'u1:p8 + -16'u1:p9 + -18'u1:p10 + 10'u2:p11 + u2:p12 + 2'u2:p13 + 3'u2:p14 + 4'u2:p15 + 5'u2:p16 + 6'u2:p17 + 7'u2:p18 + 8'u2:p19 + 9'u2:p20 + 10'u4:p31 + u4:p32 + 2'u4:p33 + 3'u4:p34 + 4'u4:p35 + 5'u4:p36 + 6'u4:p37 + 7'u4:p38 + 8'u4:p39 + 9'u4:p40 + u7:p47 + u9:p51 + u11:p53 + u14:p61 + u15:p62 + -1'u18:p69 + u20:p73 + u21:p75 + u23:p79 + -1'u48:p129 + u49:p131 + u50:p133 + -1'u56:p145 + -1'u62:p0 + -1'i50:u52:p138 + -1'i50:u54:p142 + -1'i50:u60:p134 + -1'i50:u60:p136 + -1'i52:u58:p152 + -1'i52:u61:p150 = -1
invariant :u30:p92 + u31:p95 + -1'u38:p109 + u39:p111 + u46:p125 + -1'u47:p127 + u62:p0 = 1
invariant :u35:p102 + u35:p103 + u62:p0 = 1
invariant :u40:p112 + u40:p113 + u49:p130 + u49:p131 + u62:p0 = 1
invariant :-10'u1:p1 + -1'u1:p2 + -2'u1:p3 + -3'u1:p4 + -4'u1:p5 + -5'u1:p6 + -6'u1:p7 + -7'u1:p8 + -8'u1:p9 + -9'u1:p10 + 10'u2:p11 + u2:p12 + 2'u2:p13 + 3'u2:p14 + 4'u2:p15 + 5'u2:p16 + 6'u2:p17 + 7'u2:p18 + 8'u2:p19 + 9'u2:p20 + u8:p48 + u9:p51 + u21:p75 + u23:p79 + -1'u56:p145 + -1'u62:p0 + -1'i50:u60:p136 + -1'i52:u58:p152 + -1'i52:u61:p150 = -1
invariant :u45:p122 + u45:p123 + u49:p130 + u49:p131 + u62:p0 = 1
invariant :u18:p68 + u18:p69 + u62:p0 = 1
invariant :u36:p104 + u36:p105 + u62:p0 = 1
invariant :u43:p118 + u43:p119 + u49:p130 + u49:p131 + u62:p0 = 1
invariant :u5:p41 + u5:p42 + u62:p0 = 1
invariant :u47:p126 + u47:p127 + u49:p130 + u49:p131 + u62:p0 = 1
invariant :u41:p114 + u41:p115 + u49:p130 + u49:p131 + u62:p0 = 1
invariant :u9:p50 + u9:p51 + u62:p0 = 1
invariant :u17:p66 + u17:p67 + u62:p0 = 1
invariant :u20:p72 + u20:p73 + u62:p0 = 1
invariant :u26:p84 + u31:p95 + -1'u34:p101 + u39:p111 + u42:p117 + -1'u47:p127 + u62:p0 = 1
invariant :-20'u1:p1 + -2'u1:p2 + -4'u1:p3 + -6'u1:p4 + -8'u1:p5 + -10'u1:p6 + -12'u1:p7 + -14'u1:p8 + -16'u1:p9 + -18'u1:p10 + 20'u2:p11 + 2'u2:p12 + 4'u2:p13 + 6'u2:p14 + 8'u2:p15 + 10'u2:p16 + 12'u2:p17 + 14'u2:p18 + 16'u2:p19 + 18'u2:p20 + u20:p73 + u21:p75 + u23:p79 + u56:p146 + u56:p147 + u56:p148 + -3'u62:p0 + -1'i50:u53:p140 + -1'i50:u55:p144 + -1'i50:u60:p134 + -1'i50:u60:p136 + -1'i52:u58:p152 + -1'i52:u59:p154 + -2'i52:u61:p150 = -3
invariant :u33:p98 + u33:p99 + u62:p0 = 1
invariant :u26:p85 + -1'u31:p95 + u34:p101 + -1'u39:p111 + -1'u42:p117 + u47:p127 = 0
invariant :-1'i50:u54:p141 + -1'i50:u54:p142 + i50:u55:p143 + i50:u55:p144 = 0
invariant :u34:p100 + u34:p101 + u62:p0 = 1
invariant :u10:p52 + u62:p0 = 1
invariant :u19:p70 + u19:p71 + u62:p0 = 1
invariant :u28:p89 + -1'u31:p95 + u36:p105 + -1'u39:p111 + -1'u44:p121 + u47:p127 = 0
invariant :u27:p86 + u31:p95 + -1'u35:p103 + u39:p111 + u43:p119 + -1'u47:p127 + u62:p0 = 1
invariant :u39:p110 + u39:p111 + u62:p0 = 1
Running compilation step : CommandLine [args=[gcc, -c, -I/home/mcc/BenchKit//lts_install_dir//include, -I., -std=c99, -fPIC, -O3, model.c], workingDir=/home/mcc/execution]
Compilation finished in 2719 ms.
Running link step : CommandLine [args=[gcc, -shared, -o, gal.so, model.o], workingDir=/home/mcc/execution]
Link finished in 41 ms.
Running LTSmin : CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=1, --when, --ltl, X(X([](X([]((LTLAP0==true)))))), --buchi-type=spotba], workingDir=/home/mcc/execution]
LTSmin run took 34 ms.
FORMULA DES-PT-10a-LTLFireability-00 FALSE TECHNIQUES PARTIAL_ORDER EXPLICIT LTSMIN SAT_SMT
Running LTSmin : CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=1, --when, --ltl, X([](<>(<>(<>((LTLAP1==true)))))), --buchi-type=spotba], workingDir=/home/mcc/execution]
LTSmin run took 17 ms.
FORMULA DES-PT-10a-LTLFireability-01 FALSE TECHNIQUES PARTIAL_ORDER EXPLICIT LTSMIN SAT_SMT
Running LTSmin : CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=1, --when, --ltl, X(<>(X(X(X((LTLAP2==true)))))), --buchi-type=spotba], workingDir=/home/mcc/execution]
LTSmin run took 16 ms.
FORMULA DES-PT-10a-LTLFireability-02 FALSE TECHNIQUES PARTIAL_ORDER EXPLICIT LTSMIN SAT_SMT
Running LTSmin : CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=1, -p, --pins-guards, --when, --ltl, [](<>((<>((LTLAP3==true)))U((LTLAP4==true)))), --buchi-type=spotba], workingDir=/home/mcc/execution]
LTSmin run took 25 ms.
FORMULA DES-PT-10a-LTLFireability-03 FALSE TECHNIQUES PARTIAL_ORDER EXPLICIT LTSMIN SAT_SMT
Running LTSmin : CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=1, -p, --pins-guards, --when, --ltl, []((((LTLAP5==true))U((LTLAP6==true)))U((LTLAP7==true))), --buchi-type=spotba], workingDir=/home/mcc/execution]
LTSmin run took 27 ms.
FORMULA DES-PT-10a-LTLFireability-04 FALSE TECHNIQUES PARTIAL_ORDER EXPLICIT LTSMIN SAT_SMT
Running LTSmin : CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=1, -p, --pins-guards, --when, --ltl, [](<>(([]((LTLAP8==true)))U([]((LTLAP9==true))))), --buchi-type=spotba], workingDir=/home/mcc/execution]
LTSmin run took 27 ms.
FORMULA DES-PT-10a-LTLFireability-05 FALSE TECHNIQUES PARTIAL_ORDER EXPLICIT LTSMIN SAT_SMT
Running LTSmin : CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=1, --when, --ltl, X(X(<>([](<>((LTLAP10==true)))))), --buchi-type=spotba], workingDir=/home/mcc/execution]
LTSmin run took 16 ms.
FORMULA DES-PT-10a-LTLFireability-06 FALSE TECHNIQUES PARTIAL_ORDER EXPLICIT LTSMIN SAT_SMT
Running LTSmin : CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=1, -p, --pins-guards, --when, --ltl, ((LTLAP7==true))U(([]((LTLAP11==true)))U([]((LTLAP12==true)))), --buchi-type=spotba], workingDir=/home/mcc/execution]
LTSmin run took 29 ms.
FORMULA DES-PT-10a-LTLFireability-07 FALSE TECHNIQUES PARTIAL_ORDER EXPLICIT LTSMIN SAT_SMT
Running LTSmin : CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=1, --when, --ltl, [](<>(X(((LTLAP13==true))U((LTLAP14==true))))), --buchi-type=spotba], workingDir=/home/mcc/execution]
LTSmin run took 90 ms.
FORMULA DES-PT-10a-LTLFireability-08 FALSE TECHNIQUES PARTIAL_ORDER EXPLICIT LTSMIN SAT_SMT
Running LTSmin : CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=1, --when, --ltl, [](X((<>((LTLAP4==true)))U((LTLAP15==true)))), --buchi-type=spotba], workingDir=/home/mcc/execution]
LTSmin run took 17 ms.
FORMULA DES-PT-10a-LTLFireability-09 FALSE TECHNIQUES PARTIAL_ORDER EXPLICIT LTSMIN SAT_SMT
Running LTSmin : CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=1, --when, --ltl, X(<>((LTLAP16==true))), --buchi-type=spotba], workingDir=/home/mcc/execution]
LTSmin run took 13 ms.
FORMULA DES-PT-10a-LTLFireability-10 TRUE TECHNIQUES PARTIAL_ORDER EXPLICIT LTSMIN SAT_SMT
Running LTSmin : CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=1, -p, --pins-guards, --when, --ltl, (LTLAP15==true), --buchi-type=spotba], workingDir=/home/mcc/execution]
LTSmin run took 25 ms.
FORMULA DES-PT-10a-LTLFireability-11 FALSE TECHNIQUES PARTIAL_ORDER EXPLICIT LTSMIN SAT_SMT
Running LTSmin : CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=1, -p, --pins-guards, --when, --ltl, <>((LTLAP6==true)), --buchi-type=spotba], workingDir=/home/mcc/execution]
LTSmin run took 24 ms.
FORMULA DES-PT-10a-LTLFireability-12 FALSE TECHNIQUES PARTIAL_ORDER EXPLICIT LTSMIN SAT_SMT
Running LTSmin : CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=1, --when, --ltl, X([](X(<>([]((LTLAP17==true)))))), --buchi-type=spotba], workingDir=/home/mcc/execution]
LTSmin run took 16 ms.
FORMULA DES-PT-10a-LTLFireability-13 FALSE TECHNIQUES PARTIAL_ORDER EXPLICIT LTSMIN SAT_SMT
Running LTSmin : CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=1, -p, --pins-guards, --when, --ltl, (<>((LTLAP4==true)))U([]([]((LTLAP18==true)))), --buchi-type=spotba], workingDir=/home/mcc/execution]
LTSmin run took 27 ms.
FORMULA DES-PT-10a-LTLFireability-14 FALSE TECHNIQUES PARTIAL_ORDER EXPLICIT LTSMIN SAT_SMT
Running LTSmin : CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=1, --when, --ltl, X((LTLAP19==true)), --buchi-type=spotba], workingDir=/home/mcc/execution]
LTSmin run took 16 ms.
FORMULA DES-PT-10a-LTLFireability-15 FALSE TECHNIQUES PARTIAL_ORDER EXPLICIT LTSMIN SAT_SMT
ITS tools runner thread asked to quit. Dying gracefully.

BK_STOP 1527863711487

--------------------
content from stderr:

+ export BINDIR=/home/mcc/BenchKit/
+ BINDIR=/home/mcc/BenchKit/
++ pwd
+ export MODEL=/home/mcc/execution
+ MODEL=/home/mcc/execution
+ /home/mcc/BenchKit//runeclipse.sh /home/mcc/execution LTLFireability -its -ltsminpath /home/mcc/BenchKit//lts_install_dir/ -louvain -smt
+ ulimit -s 65536
+ [[ -z '' ]]
+ export LTSMIN_MEM_SIZE=8589934592
+ LTSMIN_MEM_SIZE=8589934592
+ /home/mcc/BenchKit//itstools/its-tools -consoleLog -data /home/mcc/execution/workspace -pnfolder /home/mcc/execution -examination LTLFireability -z3path /home/mcc/BenchKit//z3/bin/z3 -yices2path /home/mcc/BenchKit//yices/bin/yices -its -ltsminpath /home/mcc/BenchKit//lts_install_dir/ -louvain -smt -vmargs -Dosgi.locking=none -Declipse.stateSaveDelayInterval=-1 -Dosgi.configuration.area=/tmp/.eclipse -Xss8m -Xms40m -Xmx8192m -Dfile.encoding=UTF-8 -Dosgi.requiredJavaVersion=1.6
Jun 01, 2018 2:34:59 PM fr.lip6.move.gal.application.Application start
INFO: Running its-tools with arguments : [-pnfolder, /home/mcc/execution, -examination, LTLFireability, -z3path, /home/mcc/BenchKit//z3/bin/z3, -yices2path, /home/mcc/BenchKit//yices/bin/yices, -its, -ltsminpath, /home/mcc/BenchKit//lts_install_dir/, -louvain, -smt]
Jun 01, 2018 2:34:59 PM fr.lip6.move.gal.application.MccTranslator transformPNML
INFO: Parsing pnml file : /home/mcc/execution/model.pnml
Jun 01, 2018 2:34:59 PM fr.lip6.move.gal.nupn.PTNetReader loadFromXML
INFO: Load time of PNML (sax parser for PT used): 77 ms
Jun 01, 2018 2:34:59 PM fr.lip6.move.gal.pnml.togal.PTGALTransformer handlePage
INFO: Transformed 155 places.
Jun 01, 2018 2:34:59 PM fr.lip6.move.gal.pnml.togal.PTGALTransformer handlePage
INFO: Transformed 112 transitions.
Jun 01, 2018 2:34:59 PM fr.lip6.move.gal.pnml.togal.PnmlToGalTransformer transform
INFO: Found NUPN structural information;
Jun 01, 2018 2:34:59 PM fr.lip6.move.serialization.SerializationUtil systemToFile
INFO: Time to serialize gal into /home/mcc/execution/model.pnml.img.gal : 16 ms
Jun 01, 2018 2:34:59 PM fr.lip6.move.gal.application.MccTranslator applyOrder
INFO: Applying decomposition
Jun 01, 2018 2:35:00 PM fr.lip6.move.gal.instantiate.GALRewriter flatten
INFO: Flatten gal took : 84 ms
Jun 01, 2018 2:35:00 PM fr.lip6.move.gal.instantiate.GALRewriter flatten
INFO: Flatten gal took : 44 ms
Jun 01, 2018 2:35:00 PM fr.lip6.move.gal.instantiate.CompositeBuilder decomposeWithOrder
INFO: Decomposing Gal with order
Jun 01, 2018 2:35:00 PM fr.lip6.move.gal.instantiate.GALRewriter flatten
INFO: Flatten gal took : 39 ms
Jun 01, 2018 2:35:00 PM fr.lip6.move.gal.instantiate.CompositeBuilder rewriteArraysToAllowPartition
INFO: Rewriting arrays to variables to allow decomposition.
Jun 01, 2018 2:35:00 PM fr.lip6.move.gal.instantiate.Instantiator fuseIsomorphicEffects
INFO: Removed a total of 115 redundant transitions.
Jun 01, 2018 2:35:00 PM fr.lip6.move.serialization.SerializationUtil systemToFile
INFO: Time to serialize gal into /home/mcc/execution/LTLFireability.pnml.gal : 9 ms
Jun 01, 2018 2:35:00 PM fr.lip6.move.serialization.SerializationUtil serializePropertiesForITSLTLTools
INFO: Time to serialize properties into /home/mcc/execution/LTLFireability.ltl : 2 ms
Jun 01, 2018 2:35:00 PM fr.lip6.move.gal.semantics.CompositeNextBuilder getNextForLabel
INFO: Semantic construction discarded 14 identical transitions.
Jun 01, 2018 2:35:00 PM fr.lip6.move.gal.semantics.DeterministicNextBuilder getDeterministicNext
INFO: Input system was already deterministic with 98 transitions.
Jun 01, 2018 2:35:00 PM fr.lip6.move.gal.gal2smt.bmc.KInductionSolver computeAndDeclareInvariants
INFO: Computed 57 place invariants in 61 ms
Jun 01, 2018 2:35:01 PM fr.lip6.move.gal.gal2smt.bmc.KInductionSolver init
INFO: Proved 155 variables to be positive in 408 ms
Jun 01, 2018 2:35:01 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver computeAblingMatrix
INFO: Computing symmetric may disable matrix : 98 transitions.
Jun 01, 2018 2:35:01 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of disable matrix completed :0/98 took 0 ms. Total solver calls (SAT/UNSAT): 0(0/0)
Jun 01, 2018 2:35:01 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of Complete disable matrix. took 15 ms. Total solver calls (SAT/UNSAT): 0(0/0)
Jun 01, 2018 2:35:01 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver computeAblingMatrix
INFO: Computing symmetric may enable matrix : 98 transitions.
Jun 01, 2018 2:35:01 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of Complete enable matrix. took 16 ms. Total solver calls (SAT/UNSAT): 0(0/0)
Jun 01, 2018 2:35:02 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver computeCoEnablingMatrix
INFO: Computing symmetric co enabling matrix : 98 transitions.
Jun 01, 2018 2:35:04 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(18/98) took 1996 ms. Total solver calls (SAT/UNSAT): 905(738/167)
Jun 01, 2018 2:35:06 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of Finished co-enabling matrix. took 3958 ms. Total solver calls (SAT/UNSAT): 1632(1336/296)
Jun 01, 2018 2:35:06 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver computeDoNotAccord
INFO: Computing Do-Not-Accords matrix : 98 transitions.
Jun 01, 2018 2:35:07 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of Completed DNA matrix. took 835 ms. Total solver calls (SAT/UNSAT): 41(0/41)
Jun 01, 2018 2:35:07 PM fr.lip6.move.gal.gal2pins.Gal2PinsTransformerNext transform
INFO: Built C files in 6664ms conformant to PINS in folder :/home/mcc/execution

Sequence of Actions to be Executed by the VM

This is useful if one wants to reexecute the tool in the VM from the submitted image disk.

set -x
# this is for BenchKit: configuration of major elements for the test
export BK_INPUT="DES-PT-10a"
export BK_EXAMINATION="LTLFireability"
export BK_TOOL="itstoolsl"
export BK_RESULT_DIR="/tmp/BK_RESULTS/OUTPUTS"
export BK_TIME_CONFINEMENT="3600"
export BK_MEMORY_CONFINEMENT="16384"

# this is specific to your benchmark or test

export BIN_DIR="$HOME/BenchKit/bin"

# remove the execution directoty if it exists (to avoid increse of .vmdk images)
if [ -d execution ] ; then
rm -rf execution
fi

tar xzf /home/mcc/BenchKit/INPUTS/DES-PT-10a.tgz
mv DES-PT-10a execution
cd execution
pwd
ls -lh

# this is for BenchKit: explicit launching of the test
echo "====================================================================="
echo " Generated by BenchKit 2-3637"
echo " Executing tool itstoolsl"
echo " Input is DES-PT-10a, examination is LTLFireability"
echo " Time confinement is $BK_TIME_CONFINEMENT seconds"
echo " Memory confinement is 16384 MBytes"
echo " Number of cores is 4"
echo " Run identifier is r213-smll-152732264000140"
echo "====================================================================="
echo
echo "--------------------"
echo "content from stdout:"
echo
echo "=== Data for post analysis generated by BenchKit (invocation template)"
echo
if [ "LTLFireability" = "UpperBounds" ] ; then
echo "The expected result is a vector of positive values"
echo NUM_VECTOR
elif [ "LTLFireability" != "StateSpace" ] ; then
echo "The expected result is a vector of booleans"
echo BOOL_VECTOR
else
echo "no data necessary for post analysis"
fi
echo
if [ -f "LTLFireability.txt" ] ; then
echo "here is the order used to build the result vector(from text file)"
for x in $(grep Property LTLFireability.txt | cut -d ' ' -f 2 | sort -u) ; do
echo "FORMULA_NAME $x"
done
elif [ -f "LTLFireability.xml" ] ; then # for cunf (txt files deleted;-)
echo echo "here is the order used to build the result vector(from xml file)"
for x in $(grep '' LTLFireability.xml | cut -d '>' -f 2 | cut -d '<' -f 1 | sort -u) ; do
echo "FORMULA_NAME $x"
done
fi
echo
echo "=== Now, execution of the tool begins"
echo
echo -n "BK_START "
date -u +%s%3N
echo
timeout -s 9 $BK_TIME_CONFINEMENT bash -c "/home/mcc/BenchKit/BenchKit_head.sh 2> STDERR ; echo ; echo -n \"BK_STOP \" ; date -u +%s%3N"
if [ $? -eq 137 ] ; then
echo
echo "BK_TIME_CONFINEMENT_REACHED"
fi
echo
echo "--------------------"
echo "content from stderr:"
echo
cat STDERR ;