fond
Model Checking Contest 2018
8th edition, Bratislava, Slovakia, June 26, 2018
Execution of r213-smll-152732264000136
Last Updated
June 26, 2018

About the Execution of ITS-Tools.L for DES-PT-05a

Execution Summary
Max Memory
Used (MB)
Time wait (ms) CPU Usage (ms) I/O Wait (ms) Computed Result Execution
Status
15754.790 238417.00 478480.00 957.70 FFTFFFFFFFFFFFFF normal

Execution Chart

We display below the execution chart for this examination (boot time has been removed).

Trace from the execution

Waiting for the VM to be ready (probing ssh)
.....................
/home/mcc/execution
total 196K
-rw-r--r-- 1 mcc users 3.4K May 15 18:54 CTLCardinality.txt
-rw-r--r-- 1 mcc users 20K May 15 18:54 CTLCardinality.xml
-rw-r--r-- 1 mcc users 2.2K May 15 18:54 CTLFireability.txt
-rw-r--r-- 1 mcc users 16K May 15 18:54 CTLFireability.xml
-rw-r--r-- 1 mcc users 4.0K May 15 18:50 GenericPropertiesDefinition.xml
-rw-r--r-- 1 mcc users 6.1K May 15 18:50 GenericPropertiesVerdict.xml
-rw-r--r-- 1 mcc users 2.3K May 26 09:26 LTLCardinality.txt
-rw-r--r-- 1 mcc users 10K May 26 09:26 LTLCardinality.xml
-rw-r--r-- 1 mcc users 1.7K May 26 09:26 LTLFireability.txt
-rw-r--r-- 1 mcc users 7.9K May 26 09:26 LTLFireability.xml
-rw-r--r-- 1 mcc users 3.6K May 15 18:54 ReachabilityCardinality.txt
-rw-r--r-- 1 mcc users 20K May 15 18:54 ReachabilityCardinality.xml
-rw-r--r-- 1 mcc users 101 May 15 18:54 ReachabilityDeadlock.txt
-rw-r--r-- 1 mcc users 339 May 15 18:54 ReachabilityDeadlock.xml
-rw-r--r-- 1 mcc users 2.3K May 15 18:54 ReachabilityFireability.txt
-rw-r--r-- 1 mcc users 14K May 15 18:54 ReachabilityFireability.xml
-rw-r--r-- 1 mcc users 1.5K May 15 18:54 UpperBounds.txt
-rw-r--r-- 1 mcc users 3.5K May 15 18:54 UpperBounds.xml
-rw-r--r-- 1 mcc users 6 May 15 18:50 equiv_col
-rw-r--r-- 1 mcc users 4 May 15 18:50 instance
-rw-r--r-- 1 mcc users 6 May 15 18:50 iscolored
-rw-r--r-- 1 mcc users 37K May 15 18:50 model.pnml
=====================================================================
Generated by BenchKit 2-3637
Executing tool itstoolsl
Input is DES-PT-05a, examination is LTLFireability
Time confinement is 3600 seconds
Memory confinement is 16384 MBytes
Number of cores is 4
Run identifier is r213-smll-152732264000136
=====================================================================


--------------------
content from stdout:

=== Data for post analysis generated by BenchKit (invocation template)

The expected result is a vector of booleans
BOOL_VECTOR

here is the order used to build the result vector(from text file)
FORMULA_NAME DES-PT-05a-LTLFireability-00
FORMULA_NAME DES-PT-05a-LTLFireability-01
FORMULA_NAME DES-PT-05a-LTLFireability-02
FORMULA_NAME DES-PT-05a-LTLFireability-03
FORMULA_NAME DES-PT-05a-LTLFireability-04
FORMULA_NAME DES-PT-05a-LTLFireability-05
FORMULA_NAME DES-PT-05a-LTLFireability-06
FORMULA_NAME DES-PT-05a-LTLFireability-07
FORMULA_NAME DES-PT-05a-LTLFireability-08
FORMULA_NAME DES-PT-05a-LTLFireability-09
FORMULA_NAME DES-PT-05a-LTLFireability-10
FORMULA_NAME DES-PT-05a-LTLFireability-11
FORMULA_NAME DES-PT-05a-LTLFireability-12
FORMULA_NAME DES-PT-05a-LTLFireability-13
FORMULA_NAME DES-PT-05a-LTLFireability-14
FORMULA_NAME DES-PT-05a-LTLFireability-15

=== Now, execution of the tool begins

BK_START 1527862650894

Using solver Z3 to compute partial order matrices.
Built C files in :
/home/mcc/execution
Invoking ITS tools like this :CommandLine [args=[/home/mcc/BenchKit/itstools/plugins/fr.lip6.move.gal.itstools.binaries_1.0.0.201805241334/bin/its-ltl-linux64, --gc-threshold, 2000000, -i, /home/mcc/execution/LTLFireability.pnml.gal, -t, CGAL, -LTL, /home/mcc/execution/LTLFireability.ltl, -c, -stutter-deadlock], workingDir=/home/mcc/execution]

its-ltl command run as :

/home/mcc/BenchKit/itstools/plugins/fr.lip6.move.gal.itstools.binaries_1.0.0.201805241334/bin/its-ltl-linux64 --gc-threshold 2000000 -i /home/mcc/execution/LTLFireability.pnml.gal -t CGAL -LTL /home/mcc/execution/LTLFireability.ltl -c -stutter-deadlock
Read 16 LTL properties
Checking formula 0 : !(("((u12.p37>=1)&&(u13.p38>=1))"))
Formula 0 simplified : !"((u12.p37>=1)&&(u13.p38>=1))"
built 49 ordering constraints for composite.
built 16 ordering constraints for composite.
built 9 ordering constraints for composite.
Presburger conditions satisfied. Using coverability to approximate state space in K-Induction.
// Phase 1: matrix 78 rows 135 cols
invariant :-5'u1:p1 + -1'u1:p2 + -2'u1:p3 + -3'u1:p4 + -4'u1:p5 + 5'u2:p6 + u2:p7 + 2'u2:p8 + 3'u2:p9 + 4'u2:p10 + u8:p28 + u9:p31 + u21:p55 + u23:p59 + -1'u56:p125 + -1'u62:p0 + -1'i50:u60:p116 + -1'i52:u58:p132 + -1'i52:u61:p130 = -1
invariant :10'u1:p1 + 2'u1:p2 + 4'u1:p3 + 6'u1:p4 + 8'u1:p5 + -5'u2:p6 + -1'u2:p7 + -2'u2:p8 + -3'u2:p9 + -4'u2:p10 + -5'u4:p16 + -1'u4:p17 + -2'u4:p18 + -3'u4:p19 + -4'u4:p20 + -1'u7:p27 + -1'u9:p31 + u11:p34 + -1'u14:p41 + -1'u15:p42 + u18:p49 + -1'u20:p53 + -1'u21:p55 + -1'u23:p59 + u48:p109 + -1'u49:p111 + -1'u50:p113 + u56:p125 + 2'u62:p0 + i50:u52:p118 + i50:u54:p122 + i50:u60:p114 + i50:u60:p116 + i52:u58:p132 + i52:u61:p130 = 2
invariant :u18:p48 + u18:p49 + u62:p0 = 1
invariant :u36:p84 + u36:p85 + u62:p0 = 1
invariant :u43:p98 + u43:p99 + u49:p110 + u49:p111 + u62:p0 = 1
invariant :u5:p21 + u5:p22 + u62:p0 = 1
invariant :u47:p106 + u47:p107 + u49:p110 + u49:p111 + u62:p0 = 1
invariant :5'u1:p1 + u1:p2 + 2'u1:p3 + 3'u1:p4 + 4'u1:p5 + -5'u2:p6 + -1'u2:p7 + -2'u2:p8 + -3'u2:p9 + -4'u2:p10 + -1'u20:p53 + u22:p56 + -1'u31:p75 + -1'u39:p91 + u47:p107 + u49:p110 + -1'u50:p113 + 4'u62:p0 + i50:u52:p118 + i50:u54:p122 + i50:u60:p114 + i50:u60:p116 + i52:u58:p132 + i52:u61:p130 = 4
invariant :u41:p94 + u41:p95 + u49:p110 + u49:p111 + u62:p0 = 1
invariant :5'u1:p1 + u1:p2 + 2'u1:p3 + 3'u1:p4 + 4'u1:p5 + -5'u2:p6 + -1'u2:p7 + -2'u2:p8 + -3'u2:p9 + -4'u2:p10 + u8:p29 + -1'u9:p31 + -1'u21:p55 + -1'u23:p59 + u56:p125 + 2'u62:p0 + i50:u60:p116 + i52:u58:p132 + i52:u61:p130 = 2
invariant :u9:p30 + u9:p31 + u62:p0 = 1
invariant :u17:p46 + u17:p47 + u62:p0 = 1
invariant :u20:p52 + u20:p53 + u62:p0 = 1
invariant :u26:p64 + u31:p75 + -1'u34:p81 + u39:p91 + u42:p97 + -1'u47:p107 + u62:p0 = 1
invariant :u33:p78 + u33:p79 + u62:p0 = 1
invariant :u44:p100 + u44:p101 + u49:p110 + u49:p111 + u62:p0 = 1
invariant :u34:p80 + u34:p81 + u62:p0 = 1
invariant :u19:p50 + u19:p51 + u62:p0 = 1
invariant :u27:p66 + u31:p75 + -1'u35:p83 + u39:p91 + u43:p99 + -1'u47:p107 + u62:p0 = 1
invariant :u26:p65 + -1'u31:p75 + u34:p81 + -1'u39:p91 + -1'u42:p97 + u47:p107 = 0
invariant :-5'u1:p1 + -1'u1:p2 + -2'u1:p3 + -3'u1:p4 + -4'u1:p5 + 5'u2:p6 + u2:p7 + 2'u2:p8 + 3'u2:p9 + 4'u2:p10 + u20:p53 + u22:p57 + u31:p75 + u39:p91 + -1'u47:p107 + -1'u49:p110 + u50:p113 + -3'u62:p0 + -1'i50:u52:p118 + -1'i50:u54:p122 + -1'i50:u60:p114 + -1'i50:u60:p116 + -1'i52:u58:p132 + -1'i52:u61:p130 = -3
invariant :-1'i50:u54:p121 + -1'i50:u54:p122 + i50:u55:p123 + i50:u55:p124 = 0
invariant :u39:p90 + u39:p91 + u62:p0 = 1
invariant :u10:p32 + u62:p0 = 1
invariant :u28:p69 + -1'u31:p75 + u36:p85 + -1'u39:p91 + -1'u44:p101 + u47:p107 = 0
invariant :u45:p102 + u45:p103 + u49:p110 + u49:p111 + u62:p0 = 1
invariant :10'u1:p1 + 2'u1:p2 + 4'u1:p3 + 6'u1:p4 + 8'u1:p5 + -10'u2:p6 + -2'u2:p7 + -4'u2:p8 + -6'u2:p9 + -8'u2:p10 + -1'u20:p53 + -1'u21:p55 + -1'u23:p59 + u56:p125 + u56:p129 + 4'u62:p0 + i50:u53:p120 + i50:u55:p124 + i50:u60:p114 + i50:u60:p116 + i52:u58:p132 + i52:u59:p134 + 2'i52:u61:p130 = 4
invariant :u29:p71 + -1'u31:p75 + u37:p87 + -1'u39:p91 + -1'u45:p103 + u47:p107 = 0
invariant :u62:p0 + i50:u52:p117 + i50:u52:p118 + i50:u54:p121 + i50:u54:p122 + i50:u60:p114 + i50:u60:p115 + i50:u60:p116 = 1
invariant :u24:p60 + u31:p75 + -1'u32:p77 + u39:p91 + u40:p93 + -1'u47:p107 + u62:p0 = 1
invariant :u21:p54 + u21:p55 + u62:p0 = 1
invariant :-10'u1:p1 + -2'u1:p2 + -4'u1:p3 + -6'u1:p4 + -8'u1:p5 + 5'u2:p6 + u2:p7 + 2'u2:p8 + 3'u2:p9 + 4'u2:p10 + 5'u4:p16 + u4:p17 + 2'u4:p18 + 3'u4:p19 + 4'u4:p20 + u7:p27 + u9:p31 + u11:p33 + u14:p41 + u15:p42 + -1'u18:p49 + u20:p53 + u21:p55 + u23:p59 + -1'u48:p109 + u49:p111 + u50:p113 + -1'u56:p125 + -1'u62:p0 + -1'i50:u52:p118 + -1'i50:u54:p122 + -1'i50:u60:p114 + -1'i50:u60:p116 + -1'i52:u58:p132 + -1'i52:u61:p130 = -1
invariant :u7:p25 + u7:p26 + u7:p27 + u62:p0 = 1
invariant :u27:p67 + -1'u31:p75 + u35:p83 + -1'u39:p91 + -1'u43:p99 + u47:p107 = 0
invariant :u62:p0 + i50:u53:p119 + i50:u53:p120 + i50:u54:p121 + i50:u54:p122 + i50:u60:p114 + i50:u60:p115 + i50:u60:p116 = 1
invariant :u24:p61 + -1'u31:p75 + u32:p77 + -1'u39:p91 + -1'u40:p93 + u47:p107 = 0
invariant :u30:p73 + -1'u31:p75 + u38:p89 + -1'u39:p91 + -1'u46:p105 + u47:p107 = 0
invariant :u37:p86 + u37:p87 + u62:p0 = 1
invariant :u50:p112 + u50:p113 + u62:p0 = 1
invariant :u31:p74 + u31:p75 + u62:p0 = 1
invariant :u48:p108 + u48:p109 + -1'u49:p110 + -1'u49:p111 = 0
invariant :u32:p76 + u32:p77 + u62:p0 = 1
invariant :u62:p0 + i52:u59:p133 + i52:u59:p134 + i52:u61:p130 = 1
invariant :u28:p68 + u31:p75 + -1'u36:p85 + u39:p91 + u44:p101 + -1'u47:p107 + u62:p0 = 1
invariant :u46:p104 + u46:p105 + u49:p110 + u49:p111 + u62:p0 = 1
invariant :u25:p62 + u31:p75 + -1'u33:p79 + u39:p91 + u41:p95 + -1'u47:p107 + u62:p0 = 1
invariant :u29:p70 + u31:p75 + -1'u37:p87 + u39:p91 + u45:p103 + -1'u47:p107 + u62:p0 = 1
invariant :u38:p88 + u38:p89 + u62:p0 = 1
invariant :u6:p23 + u6:p24 + u62:p0 = 1
invariant :u42:p96 + u42:p97 + u49:p110 + u49:p111 + u62:p0 = 1
invariant :u23:p58 + u23:p59 + u62:p0 = 1
invariant :-10'u1:p1 + -2'u1:p2 + -4'u1:p3 + -6'u1:p4 + -8'u1:p5 + 10'u2:p6 + 2'u2:p7 + 4'u2:p8 + 6'u2:p9 + 8'u2:p10 + u20:p53 + u21:p55 + u23:p59 + u56:p126 + u56:p127 + u56:p128 + -3'u62:p0 + -1'i50:u53:p120 + -1'i50:u55:p124 + -1'i50:u60:p114 + -1'i50:u60:p116 + -1'i52:u58:p132 + -1'i52:u59:p134 + -2'i52:u61:p130 = -3
invariant :u62:p0 + i52:u58:p131 + i52:u58:p132 + i52:u61:p130 = 1
invariant :u25:p63 + -1'u31:p75 + u33:p79 + -1'u39:p91 + -1'u41:p95 + u47:p107 = 0
invariant :u30:p72 + u31:p75 + -1'u38:p89 + u39:p91 + u46:p105 + -1'u47:p107 + u62:p0 = 1
invariant :u35:p82 + u35:p83 + u62:p0 = 1
invariant :u40:p92 + u40:p93 + u49:p110 + u49:p111 + u62:p0 = 1
Running compilation step : CommandLine [args=[gcc, -c, -I/home/mcc/BenchKit//lts_install_dir//include, -I., -std=c99, -fPIC, -O3, model.c], workingDir=/home/mcc/execution]
Compilation finished in 3010 ms.
Running link step : CommandLine [args=[gcc, -shared, -o, gal.so, model.o], workingDir=/home/mcc/execution]
Link finished in 51 ms.
Running LTSmin : CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=1, -p, --pins-guards, --when, --ltl, (LTLAP0==true), --buchi-type=spotba], workingDir=/home/mcc/execution]
LTSmin run took 37 ms.
FORMULA DES-PT-05a-LTLFireability-00 FALSE TECHNIQUES PARTIAL_ORDER EXPLICIT LTSMIN SAT_SMT
Running LTSmin : CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=1, -p, --pins-guards, --when, --ltl, [](<>(([]((LTLAP1==true)))U((LTLAP1==true)))), --buchi-type=spotba], workingDir=/home/mcc/execution]
LTSmin run took 37 ms.
FORMULA DES-PT-05a-LTLFireability-01 FALSE TECHNIQUES PARTIAL_ORDER EXPLICIT LTSMIN SAT_SMT
Running LTSmin : CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=1, -p, --pins-guards, --when, --ltl, <>((LTLAP2==true)), --buchi-type=spotba], workingDir=/home/mcc/execution]
LTSmin run took 68 ms.
FORMULA DES-PT-05a-LTLFireability-02 TRUE TECHNIQUES PARTIAL_ORDER EXPLICIT LTSMIN SAT_SMT
Running LTSmin : CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=1, --when, --ltl, X((<>(X((LTLAP3==true))))U(<>(X((LTLAP4==true))))), --buchi-type=spotba], workingDir=/home/mcc/execution]
Reverse transition relation is NOT exact ! Due to transitions t0, t1, t3, t4, t5, t11, t16, t21, t25, t30, t47, t48, t56, t59, t79, t81, t89, u5.t10, u6.t9, u7.t8, u12.t90, Intersection with reachable at each step enabled. (destroyed/reverse/intersect/total) :14/57/21/92
Computing Next relation with stutter on 36693 deadlock states
WARNING : LTSmin timed out (>225 s) on command CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=1, --when, --ltl, X((<>(X((LTLAP3==true))))U(<>(X((LTLAP4==true))))), --buchi-type=spotba], workingDir=/home/mcc/execution]
Running LTSmin : CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=1, --when, --ltl, ([](<>(X((LTLAP5==true)))))U(X([](X((LTLAP6==true))))), --buchi-type=spotba], workingDir=/home/mcc/execution]
LTSmin run took 22 ms.
FORMULA DES-PT-05a-LTLFireability-04 FALSE TECHNIQUES PARTIAL_ORDER EXPLICIT LTSMIN SAT_SMT
Running LTSmin : CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=1, --when, --ltl, (([]((LTLAP7==true)))U(X((LTLAP8==true))))U((<>((LTLAP2==true)))U(X((LTLAP9==true)))), --buchi-type=spotba], workingDir=/home/mcc/execution]
LTSmin run took 20 ms.
FORMULA DES-PT-05a-LTLFireability-05 FALSE TECHNIQUES PARTIAL_ORDER EXPLICIT LTSMIN SAT_SMT
Running LTSmin : CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=1, --when, --ltl, [](X([]((LTLAP10==true)))), --buchi-type=spotba], workingDir=/home/mcc/execution]
LTSmin run took 16 ms.
FORMULA DES-PT-05a-LTLFireability-06 FALSE TECHNIQUES PARTIAL_ORDER EXPLICIT LTSMIN SAT_SMT
Running LTSmin : CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=1, -p, --pins-guards, --when, --ltl, (LTLAP11==true), --buchi-type=spotba], workingDir=/home/mcc/execution]
LTSmin run took 21 ms.
FORMULA DES-PT-05a-LTLFireability-07 FALSE TECHNIQUES PARTIAL_ORDER EXPLICIT LTSMIN SAT_SMT
Running LTSmin : CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=1, -p, --pins-guards, --when, --ltl, ((LTLAP12==true))U([](<>(<>((LTLAP10==true))))), --buchi-type=spotba], workingDir=/home/mcc/execution]
LTSmin run took 22 ms.
FORMULA DES-PT-05a-LTLFireability-08 FALSE TECHNIQUES PARTIAL_ORDER EXPLICIT LTSMIN SAT_SMT
Running LTSmin : CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=1, --when, --ltl, <>([](X(X([]((LTLAP13==true)))))), --buchi-type=spotba], workingDir=/home/mcc/execution]
LTSmin run took 17 ms.
FORMULA DES-PT-05a-LTLFireability-09 FALSE TECHNIQUES PARTIAL_ORDER EXPLICIT LTSMIN SAT_SMT
Running LTSmin : CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=1, --when, --ltl, <>(X((LTLAP14==true))), --buchi-type=spotba], workingDir=/home/mcc/execution]
LTSmin run took 18 ms.
FORMULA DES-PT-05a-LTLFireability-10 FALSE TECHNIQUES PARTIAL_ORDER EXPLICIT LTSMIN SAT_SMT
Running LTSmin : CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=1, -p, --pins-guards, --when, --ltl, []((LTLAP11==true)), --buchi-type=spotba], workingDir=/home/mcc/execution]
LTSmin run took 22 ms.
FORMULA DES-PT-05a-LTLFireability-11 FALSE TECHNIQUES PARTIAL_ORDER EXPLICIT LTSMIN SAT_SMT
Running LTSmin : CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=1, --when, --ltl, X(X(X((LTLAP15==true)))), --buchi-type=spotba], workingDir=/home/mcc/execution]
LTSmin run took 19 ms.
FORMULA DES-PT-05a-LTLFireability-12 FALSE TECHNIQUES PARTIAL_ORDER EXPLICIT LTSMIN SAT_SMT
Running LTSmin : CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=1, -p, --pins-guards, --when, --ltl, (LTLAP16==true), --buchi-type=spotba], workingDir=/home/mcc/execution]
LTSmin run took 24 ms.
FORMULA DES-PT-05a-LTLFireability-13 FALSE TECHNIQUES PARTIAL_ORDER EXPLICIT LTSMIN SAT_SMT
Running LTSmin : CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=1, -p, --pins-guards, --when, --ltl, (LTLAP17==true), --buchi-type=spotba], workingDir=/home/mcc/execution]
LTSmin run took 24 ms.
FORMULA DES-PT-05a-LTLFireability-14 FALSE TECHNIQUES PARTIAL_ORDER EXPLICIT LTSMIN SAT_SMT
Running LTSmin : CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=1, --when, --ltl, X([](<>((LTLAP7==true)))), --buchi-type=spotba], workingDir=/home/mcc/execution]
LTSmin run took 18 ms.
FORMULA DES-PT-05a-LTLFireability-15 FALSE TECHNIQUES PARTIAL_ORDER EXPLICIT LTSMIN SAT_SMT
Retrying LTSmin with larger timeout 1800 s
Running LTSmin : CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=1, --when, --ltl, X((<>(X((LTLAP3==true))))U(<>(X((LTLAP4==true))))), --buchi-type=spotba], workingDir=/home/mcc/execution]
LTSmin run took 17 ms.
FORMULA DES-PT-05a-LTLFireability-03 FALSE TECHNIQUES PARTIAL_ORDER EXPLICIT LTSMIN SAT_SMT
ITS tools runner thread asked to quit. Dying gracefully.

BK_STOP 1527862889311

--------------------
content from stderr:

+ export BINDIR=/home/mcc/BenchKit/
+ BINDIR=/home/mcc/BenchKit/
++ pwd
+ export MODEL=/home/mcc/execution
+ MODEL=/home/mcc/execution
+ /home/mcc/BenchKit//runeclipse.sh /home/mcc/execution LTLFireability -its -ltsminpath /home/mcc/BenchKit//lts_install_dir/ -louvain -smt
+ ulimit -s 65536
+ [[ -z '' ]]
+ export LTSMIN_MEM_SIZE=8589934592
+ LTSMIN_MEM_SIZE=8589934592
+ /home/mcc/BenchKit//itstools/its-tools -consoleLog -data /home/mcc/execution/workspace -pnfolder /home/mcc/execution -examination LTLFireability -z3path /home/mcc/BenchKit//z3/bin/z3 -yices2path /home/mcc/BenchKit//yices/bin/yices -its -ltsminpath /home/mcc/BenchKit//lts_install_dir/ -louvain -smt -vmargs -Dosgi.locking=none -Declipse.stateSaveDelayInterval=-1 -Dosgi.configuration.area=/tmp/.eclipse -Xss8m -Xms40m -Xmx8192m -Dfile.encoding=UTF-8 -Dosgi.requiredJavaVersion=1.6
Jun 01, 2018 2:17:33 PM fr.lip6.move.gal.application.Application start
INFO: Running its-tools with arguments : [-pnfolder, /home/mcc/execution, -examination, LTLFireability, -z3path, /home/mcc/BenchKit//z3/bin/z3, -yices2path, /home/mcc/BenchKit//yices/bin/yices, -its, -ltsminpath, /home/mcc/BenchKit//lts_install_dir/, -louvain, -smt]
Jun 01, 2018 2:17:33 PM fr.lip6.move.gal.application.MccTranslator transformPNML
INFO: Parsing pnml file : /home/mcc/execution/model.pnml
Jun 01, 2018 2:17:33 PM fr.lip6.move.gal.nupn.PTNetReader loadFromXML
INFO: Load time of PNML (sax parser for PT used): 73 ms
Jun 01, 2018 2:17:33 PM fr.lip6.move.gal.pnml.togal.PTGALTransformer handlePage
INFO: Transformed 135 places.
Jun 01, 2018 2:17:33 PM fr.lip6.move.gal.pnml.togal.PTGALTransformer handlePage
INFO: Transformed 92 transitions.
Jun 01, 2018 2:17:33 PM fr.lip6.move.gal.pnml.togal.PnmlToGalTransformer transform
INFO: Found NUPN structural information;
Jun 01, 2018 2:17:33 PM fr.lip6.move.serialization.SerializationUtil systemToFile
INFO: Time to serialize gal into /home/mcc/execution/model.pnml.img.gal : 15 ms
Jun 01, 2018 2:17:33 PM fr.lip6.move.gal.application.MccTranslator applyOrder
INFO: Applying decomposition
Jun 01, 2018 2:17:33 PM fr.lip6.move.gal.instantiate.GALRewriter flatten
INFO: Flatten gal took : 77 ms
Jun 01, 2018 2:17:33 PM fr.lip6.move.gal.instantiate.GALRewriter flatten
INFO: Flatten gal took : 39 ms
Jun 01, 2018 2:17:33 PM fr.lip6.move.gal.instantiate.CompositeBuilder decomposeWithOrder
INFO: Decomposing Gal with order
Jun 01, 2018 2:17:33 PM fr.lip6.move.gal.instantiate.GALRewriter flatten
INFO: Flatten gal took : 44 ms
Jun 01, 2018 2:17:33 PM fr.lip6.move.gal.instantiate.CompositeBuilder rewriteArraysToAllowPartition
INFO: Rewriting arrays to variables to allow decomposition.
Jun 01, 2018 2:17:33 PM fr.lip6.move.gal.instantiate.Instantiator fuseIsomorphicEffects
INFO: Removed a total of 80 redundant transitions.
Jun 01, 2018 2:17:34 PM fr.lip6.move.serialization.SerializationUtil systemToFile
INFO: Time to serialize gal into /home/mcc/execution/LTLFireability.pnml.gal : 10 ms
Jun 01, 2018 2:17:34 PM fr.lip6.move.serialization.SerializationUtil serializePropertiesForITSLTLTools
INFO: Time to serialize properties into /home/mcc/execution/LTLFireability.ltl : 1 ms
Jun 01, 2018 2:17:34 PM fr.lip6.move.gal.semantics.CompositeNextBuilder getNextForLabel
INFO: Semantic construction discarded 14 identical transitions.
Jun 01, 2018 2:17:34 PM fr.lip6.move.gal.semantics.DeterministicNextBuilder getDeterministicNext
INFO: Input system was already deterministic with 78 transitions.
Jun 01, 2018 2:17:34 PM fr.lip6.move.gal.gal2smt.bmc.KInductionSolver computeAndDeclareInvariants
INFO: Computed 57 place invariants in 41 ms
Jun 01, 2018 2:17:34 PM fr.lip6.move.gal.gal2smt.bmc.KInductionSolver init
INFO: Proved 135 variables to be positive in 354 ms
Jun 01, 2018 2:17:34 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver computeAblingMatrix
INFO: Computing symmetric may disable matrix : 78 transitions.
Jun 01, 2018 2:17:34 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of disable matrix completed :0/78 took 1 ms. Total solver calls (SAT/UNSAT): 0(0/0)
Jun 01, 2018 2:17:34 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of Complete disable matrix. took 5 ms. Total solver calls (SAT/UNSAT): 0(0/0)
Jun 01, 2018 2:17:34 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver computeAblingMatrix
INFO: Computing symmetric may enable matrix : 78 transitions.
Jun 01, 2018 2:17:34 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of Complete enable matrix. took 5 ms. Total solver calls (SAT/UNSAT): 0(0/0)
Jun 01, 2018 2:17:35 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver computeCoEnablingMatrix
INFO: Computing symmetric co enabling matrix : 78 transitions.
Jun 01, 2018 2:17:37 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(46/78) took 2034 ms. Total solver calls (SAT/UNSAT): 834(623/211)
Jun 01, 2018 2:17:38 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of Finished co-enabling matrix. took 2502 ms. Total solver calls (SAT/UNSAT): 877(646/231)
Jun 01, 2018 2:17:38 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver computeDoNotAccord
INFO: Computing Do-Not-Accords matrix : 78 transitions.
Jun 01, 2018 2:17:39 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of Completed DNA matrix. took 744 ms. Total solver calls (SAT/UNSAT): 41(0/41)
Jun 01, 2018 2:17:39 PM fr.lip6.move.gal.gal2pins.Gal2PinsTransformerNext transform
INFO: Built C files in 5008ms conformant to PINS in folder :/home/mcc/execution

Sequence of Actions to be Executed by the VM

This is useful if one wants to reexecute the tool in the VM from the submitted image disk.

set -x
# this is for BenchKit: configuration of major elements for the test
export BK_INPUT="DES-PT-05a"
export BK_EXAMINATION="LTLFireability"
export BK_TOOL="itstoolsl"
export BK_RESULT_DIR="/tmp/BK_RESULTS/OUTPUTS"
export BK_TIME_CONFINEMENT="3600"
export BK_MEMORY_CONFINEMENT="16384"

# this is specific to your benchmark or test

export BIN_DIR="$HOME/BenchKit/bin"

# remove the execution directoty if it exists (to avoid increse of .vmdk images)
if [ -d execution ] ; then
rm -rf execution
fi

tar xzf /home/mcc/BenchKit/INPUTS/DES-PT-05a.tgz
mv DES-PT-05a execution
cd execution
pwd
ls -lh

# this is for BenchKit: explicit launching of the test
echo "====================================================================="
echo " Generated by BenchKit 2-3637"
echo " Executing tool itstoolsl"
echo " Input is DES-PT-05a, examination is LTLFireability"
echo " Time confinement is $BK_TIME_CONFINEMENT seconds"
echo " Memory confinement is 16384 MBytes"
echo " Number of cores is 4"
echo " Run identifier is r213-smll-152732264000136"
echo "====================================================================="
echo
echo "--------------------"
echo "content from stdout:"
echo
echo "=== Data for post analysis generated by BenchKit (invocation template)"
echo
if [ "LTLFireability" = "UpperBounds" ] ; then
echo "The expected result is a vector of positive values"
echo NUM_VECTOR
elif [ "LTLFireability" != "StateSpace" ] ; then
echo "The expected result is a vector of booleans"
echo BOOL_VECTOR
else
echo "no data necessary for post analysis"
fi
echo
if [ -f "LTLFireability.txt" ] ; then
echo "here is the order used to build the result vector(from text file)"
for x in $(grep Property LTLFireability.txt | cut -d ' ' -f 2 | sort -u) ; do
echo "FORMULA_NAME $x"
done
elif [ -f "LTLFireability.xml" ] ; then # for cunf (txt files deleted;-)
echo echo "here is the order used to build the result vector(from xml file)"
for x in $(grep '' LTLFireability.xml | cut -d '>' -f 2 | cut -d '<' -f 1 | sort -u) ; do
echo "FORMULA_NAME $x"
done
fi
echo
echo "=== Now, execution of the tool begins"
echo
echo -n "BK_START "
date -u +%s%3N
echo
timeout -s 9 $BK_TIME_CONFINEMENT bash -c "/home/mcc/BenchKit/BenchKit_head.sh 2> STDERR ; echo ; echo -n \"BK_STOP \" ; date -u +%s%3N"
if [ $? -eq 137 ] ; then
echo
echo "BK_TIME_CONFINEMENT_REACHED"
fi
echo
echo "--------------------"
echo "content from stderr:"
echo
cat STDERR ;