About the Execution of ITS-Tools.L for DES-PT-00a
Execution Summary | |||||
Max Memory Used (MB) |
Time wait (ms) | CPU Usage (ms) | I/O Wait (ms) | Computed Result | Execution Status |
15754.210 | 13515.00 | 28242.00 | 389.40 | FFFFFFFFTFFFFFFF | normal |
Execution Chart
We display below the execution chart for this examination (boot time has been removed).
Trace from the execution
Waiting for the VM to be ready (probing ssh)
....................
/home/mcc/execution
total 196K
-rw-r--r-- 1 mcc users 3.3K May 15 18:54 CTLCardinality.txt
-rw-r--r-- 1 mcc users 20K May 15 18:54 CTLCardinality.xml
-rw-r--r-- 1 mcc users 2.3K May 15 18:54 CTLFireability.txt
-rw-r--r-- 1 mcc users 17K May 15 18:54 CTLFireability.xml
-rw-r--r-- 1 mcc users 4.0K May 15 18:49 GenericPropertiesDefinition.xml
-rw-r--r-- 1 mcc users 6.1K May 15 18:49 GenericPropertiesVerdict.xml
-rw-r--r-- 1 mcc users 2.2K May 26 09:26 LTLCardinality.txt
-rw-r--r-- 1 mcc users 9.9K May 26 09:26 LTLCardinality.xml
-rw-r--r-- 1 mcc users 1.8K May 26 09:26 LTLFireability.txt
-rw-r--r-- 1 mcc users 11K May 26 09:26 LTLFireability.xml
-rw-r--r-- 1 mcc users 3.1K May 15 18:54 ReachabilityCardinality.txt
-rw-r--r-- 1 mcc users 17K May 15 18:54 ReachabilityCardinality.xml
-rw-r--r-- 1 mcc users 101 May 15 18:54 ReachabilityDeadlock.txt
-rw-r--r-- 1 mcc users 339 May 15 18:54 ReachabilityDeadlock.xml
-rw-r--r-- 1 mcc users 2.3K May 15 18:54 ReachabilityFireability.txt
-rw-r--r-- 1 mcc users 14K May 15 18:54 ReachabilityFireability.xml
-rw-r--r-- 1 mcc users 1.5K May 15 18:54 UpperBounds.txt
-rw-r--r-- 1 mcc users 3.5K May 15 18:54 UpperBounds.xml
-rw-r--r-- 1 mcc users 6 May 15 18:49 equiv_col
-rw-r--r-- 1 mcc users 4 May 15 18:49 instance
-rw-r--r-- 1 mcc users 6 May 15 18:49 iscolored
-rw-r--r-- 1 mcc users 31K May 15 18:49 model.pnml
=====================================================================
Generated by BenchKit 2-3637
Executing tool itstoolsl
Input is DES-PT-00a, examination is LTLFireability
Time confinement is 3600 seconds
Memory confinement is 16384 MBytes
Number of cores is 4
Run identifier is r213-smll-152732264000124
=====================================================================
--------------------
content from stdout:
=== Data for post analysis generated by BenchKit (invocation template)
The expected result is a vector of booleans
BOOL_VECTOR
here is the order used to build the result vector(from text file)
FORMULA_NAME DES-PT-00a-LTLFireability-00
FORMULA_NAME DES-PT-00a-LTLFireability-01
FORMULA_NAME DES-PT-00a-LTLFireability-02
FORMULA_NAME DES-PT-00a-LTLFireability-03
FORMULA_NAME DES-PT-00a-LTLFireability-04
FORMULA_NAME DES-PT-00a-LTLFireability-05
FORMULA_NAME DES-PT-00a-LTLFireability-06
FORMULA_NAME DES-PT-00a-LTLFireability-07
FORMULA_NAME DES-PT-00a-LTLFireability-08
FORMULA_NAME DES-PT-00a-LTLFireability-09
FORMULA_NAME DES-PT-00a-LTLFireability-10
FORMULA_NAME DES-PT-00a-LTLFireability-11
FORMULA_NAME DES-PT-00a-LTLFireability-12
FORMULA_NAME DES-PT-00a-LTLFireability-13
FORMULA_NAME DES-PT-00a-LTLFireability-14
FORMULA_NAME DES-PT-00a-LTLFireability-15
=== Now, execution of the tool begins
BK_START 1527855666544
Using solver Z3 to compute partial order matrices.
Built C files in :
/home/mcc/execution
Invoking ITS tools like this :CommandLine [args=[/home/mcc/BenchKit/itstools/plugins/fr.lip6.move.gal.itstools.binaries_1.0.0.201805241334/bin/its-ltl-linux64, --gc-threshold, 2000000, -i, /home/mcc/execution/LTLFireability.pnml.gal, -t, CGAL, -LTL, /home/mcc/execution/LTLFireability.ltl, -c, -stutter-deadlock], workingDir=/home/mcc/execution]
its-ltl command run as :
/home/mcc/BenchKit/itstools/plugins/fr.lip6.move.gal.itstools.binaries_1.0.0.201805241334/bin/its-ltl-linux64 --gc-threshold 2000000 -i /home/mcc/execution/LTLFireability.pnml.gal -t CGAL -LTL /home/mcc/execution/LTLFireability.ltl -c -stutter-deadlock
Read 16 LTL properties
Checking formula 0 : !((G("((u8.p17>=1)&&(u9.p18>=1))")))
Formula 0 simplified : !G"((u8.p17>=1)&&(u9.p18>=1))"
built 46 ordering constraints for composite.
built 16 ordering constraints for composite.
built 5 ordering constraints for composite.
Presburger conditions satisfied. Using coverability to approximate state space in K-Induction.
// Phase 1: matrix 62 rows 115 cols
invariant :u58:p0 + i48:u55:p113 + i48:u55:p114 + i48:u57:p110 = 1
invariant :u24:p48 + u27:p55 + -1'u32:p65 + u35:p71 + u40:p81 + -1'u43:p87 + u58:p0 = 1
invariant :u21:p42 + u27:p55 + -1'u29:p59 + u35:p71 + u37:p75 + -1'u43:p87 + u58:p0 = 1
invariant :u25:p50 + u27:p55 + -1'u33:p67 + u35:p71 + u41:p83 + -1'u43:p87 + u58:p0 = 1
invariant :u34:p68 + u34:p69 + u58:p0 = 1
invariant :u2:p3 + u2:p4 + u58:p0 = 1
invariant :u19:p38 + u19:p39 + u58:p0 = 1
invariant :u58:p0 + i48:u54:p111 + i48:u54:p112 + i48:u57:p110 = 1
invariant :u21:p43 + -1'u27:p55 + u29:p59 + -1'u35:p71 + -1'u37:p75 + u43:p87 = 0
invariant :-2'u4:p9 + 2'u5:p11 + -1'u16:p33 + u17:p35 + u19:p39 + u52:p106 + u52:p107 + u52:p108 + 2'u52:p109 + -1'i46:u48:p97 + -1'i46:u48:p98 + i46:u49:p100 + -1'i46:u50:p101 + -1'i46:u50:p102 + i46:u51:p104 + -1'i46:u56:p95 + -2'i46:u56:p96 + -1'i48:u54:p112 + i48:u55:p114 = 0
invariant :u26:p52 + u27:p55 + -1'u34:p69 + u35:p71 + u42:p85 + -1'u43:p87 + u58:p0 = 1
invariant :u31:p62 + u31:p63 + u58:p0 = 1
invariant :u6:p12 + u58:p0 = 1
invariant :u4:p8 + u4:p9 + u58:p0 = 1
invariant :2'u4:p9 + -2'u5:p11 + u16:p33 + -1'u17:p35 + -1'u19:p39 + 2'u52:p105 + u52:p106 + u52:p107 + u52:p108 + 2'u58:p0 + i46:u48:p97 + i46:u48:p98 + -1'i46:u49:p100 + i46:u50:p101 + i46:u50:p102 + -1'i46:u51:p104 + i46:u56:p95 + 2'i46:u56:p96 + i48:u54:p112 + -1'i48:u55:p114 = 2
invariant :u25:p51 + -1'u27:p55 + u33:p67 + -1'u35:p71 + -1'u41:p83 + u43:p87 = 0
invariant :u14:p28 + u14:p29 + u58:p0 = 1
invariant :u32:p64 + u32:p65 + u58:p0 = 1
invariant :u1:p1 + u1:p2 + u58:p0 = 1
invariant :u5:p10 + u5:p11 + u58:p0 = 1
invariant :u13:p26 + u13:p27 + u58:p0 = 1
invariant :u16:p32 + u16:p33 + u58:p0 = 1
invariant :u22:p44 + u27:p55 + -1'u30:p61 + u35:p71 + u38:p77 + -1'u43:p87 + u58:p0 = 1
invariant :u29:p58 + u29:p59 + u58:p0 = 1
invariant :u40:p80 + u40:p81 + u45:p90 + u45:p91 + u58:p0 = 1
invariant :u42:p84 + u42:p85 + u45:p90 + u45:p91 + u58:p0 = 1
invariant :u7:p13 + u7:p14 + u58:p0 = 1
invariant :u38:p76 + u38:p77 + u45:p90 + u45:p91 + u58:p0 = 1
invariant :u30:p60 + u30:p61 + u58:p0 = 1
invariant :u15:p30 + u15:p31 + u58:p0 = 1
invariant :u22:p45 + -1'u27:p55 + u30:p61 + -1'u35:p71 + -1'u38:p77 + u43:p87 = 0
invariant :-1'i46:u50:p101 + -1'i46:u50:p102 + i46:u51:p103 + i46:u51:p104 = 0
invariant :u16:p33 + -1'u17:p35 + 2'u18:p37 + -1'u19:p39 + 2'u27:p55 + 2'u35:p71 + -2'u43:p87 + -2'u45:p90 + 2'u46:p93 + -1'u52:p106 + -1'u52:p107 + -1'u52:p108 + -2'u58:p0 + i46:u48:p97 + -1'i46:u48:p98 + i46:u49:p100 + i46:u50:p101 + -1'i46:u50:p102 + i46:u51:p104 + i46:u56:p95 + -1'i48:u54:p112 + i48:u55:p114 = -2
invariant :u23:p46 + u27:p55 + -1'u31:p63 + u35:p71 + u39:p79 + -1'u43:p87 + u58:p0 = 1
invariant :-1'i46:u48:p97 + -1'i46:u48:p98 + i46:u49:p99 + i46:u49:p100 = 0
invariant :u36:p72 + u36:p73 + u45:p90 + u45:p91 + u58:p0 = 1
invariant :u35:p70 + u35:p71 + u58:p0 = 1
invariant :u18:p36 + u18:p37 + u58:p0 = 1
invariant :u24:p49 + -1'u27:p55 + u32:p65 + -1'u35:p71 + -1'u40:p81 + u43:p87 = 0
invariant :u58:p0 + i46:u48:p97 + i46:u48:p98 + i46:u50:p101 + i46:u50:p102 + i46:u56:p94 + i46:u56:p95 + i46:u56:p96 = 1
invariant :u41:p82 + u41:p83 + u45:p90 + u45:p91 + u58:p0 = 1
invariant :u39:p78 + u39:p79 + u45:p90 + u45:p91 + u58:p0 = 1
invariant :u43:p86 + u43:p87 + u45:p90 + u45:p91 + u58:p0 = 1
invariant :u20:p40 + u27:p55 + -1'u28:p57 + u35:p71 + u36:p73 + -1'u43:p87 + u58:p0 = 1
invariant :u17:p34 + u17:p35 + u58:p0 = 1
invariant :u23:p47 + -1'u27:p55 + u31:p63 + -1'u35:p71 + -1'u39:p79 + u43:p87 = 0
invariant :-1'u16:p33 + u17:p35 + -2'u18:p37 + u19:p39 + -2'u27:p55 + -2'u35:p71 + 2'u43:p87 + 2'u45:p90 + 2'u46:p92 + u52:p106 + u52:p107 + u52:p108 + 4'u58:p0 + -1'i46:u48:p97 + i46:u48:p98 + -1'i46:u49:p100 + -1'i46:u50:p101 + i46:u50:p102 + -1'i46:u51:p104 + -1'i46:u56:p95 + i48:u54:p112 + -1'i48:u55:p114 = 4
invariant :u20:p41 + -1'u27:p55 + u28:p57 + -1'u35:p71 + -1'u36:p73 + u43:p87 = 0
invariant :u3:p5 + u3:p6 + u3:p7 + u58:p0 = 1
invariant :u26:p53 + -1'u27:p55 + u34:p69 + -1'u35:p71 + -1'u42:p85 + u43:p87 = 0
invariant :u37:p74 + u37:p75 + u45:p90 + u45:p91 + u58:p0 = 1
invariant :u44:p88 + u44:p89 + -1'u45:p90 + -1'u45:p91 = 0
invariant :u33:p66 + u33:p67 + u58:p0 = 1
invariant :u27:p54 + u27:p55 + u58:p0 = 1
invariant :u28:p56 + u28:p57 + u58:p0 = 1
Running compilation step : CommandLine [args=[gcc, -c, -I/home/mcc/BenchKit//lts_install_dir//include, -I., -std=c99, -fPIC, -O3, model.c], workingDir=/home/mcc/execution]
Compilation finished in 2591 ms.
Running link step : CommandLine [args=[gcc, -shared, -o, gal.so, model.o], workingDir=/home/mcc/execution]
Link finished in 54 ms.
Running LTSmin : CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=1, -p, --pins-guards, --when, --ltl, []((LTLAP0==true)), --buchi-type=spotba], workingDir=/home/mcc/execution]
LTSmin run took 39 ms.
FORMULA DES-PT-00a-LTLFireability-00 FALSE TECHNIQUES PARTIAL_ORDER EXPLICIT LTSMIN SAT_SMT
Running LTSmin : CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=1, --when, --ltl, (X((LTLAP1==true)))U((LTLAP2==true)), --buchi-type=spotba], workingDir=/home/mcc/execution]
LTSmin run took 22 ms.
FORMULA DES-PT-00a-LTLFireability-01 FALSE TECHNIQUES PARTIAL_ORDER EXPLICIT LTSMIN SAT_SMT
Running LTSmin : CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=1, -p, --pins-guards, --when, --ltl, ((LTLAP3==true))U([]([]([]((LTLAP4==true))))), --buchi-type=spotba], workingDir=/home/mcc/execution]
LTSmin run took 28 ms.
FORMULA DES-PT-00a-LTLFireability-02 FALSE TECHNIQUES PARTIAL_ORDER EXPLICIT LTSMIN SAT_SMT
Running LTSmin : CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=1, --when, --ltl, ((<>((LTLAP5==true)))U([]((LTLAP6==true))))U((X((LTLAP2==true)))U([]((LTLAP7==true)))), --buchi-type=spotba], workingDir=/home/mcc/execution]
LTSmin run took 39 ms.
FORMULA DES-PT-00a-LTLFireability-03 FALSE TECHNIQUES PARTIAL_ORDER EXPLICIT LTSMIN SAT_SMT
Running LTSmin : CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=1, --when, --ltl, (X((LTLAP8==true)))U(X((LTLAP9==true))), --buchi-type=spotba], workingDir=/home/mcc/execution]
LTSmin run took 22 ms.
FORMULA DES-PT-00a-LTLFireability-04 FALSE TECHNIQUES PARTIAL_ORDER EXPLICIT LTSMIN SAT_SMT
Running LTSmin : CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=1, -p, --pins-guards, --when, --ltl, [](<>([](<>((LTLAP3==true))))), --buchi-type=spotba], workingDir=/home/mcc/execution]
LTSmin run took 89 ms.
FORMULA DES-PT-00a-LTLFireability-05 FALSE TECHNIQUES PARTIAL_ORDER EXPLICIT LTSMIN SAT_SMT
Running LTSmin : CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=1, --when, --ltl, X((X([]((LTLAP2==true))))U(<>((LTLAP10==true)))), --buchi-type=spotba], workingDir=/home/mcc/execution]
LTSmin run took 22 ms.
FORMULA DES-PT-00a-LTLFireability-06 FALSE TECHNIQUES PARTIAL_ORDER EXPLICIT LTSMIN SAT_SMT
Running LTSmin : CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=1, -p, --pins-guards, --when, --ltl, ((<>((LTLAP11==true)))U(<>((LTLAP2==true))))U((LTLAP12==true)), --buchi-type=spotba], workingDir=/home/mcc/execution]
LTSmin run took 30 ms.
FORMULA DES-PT-00a-LTLFireability-07 FALSE TECHNIQUES PARTIAL_ORDER EXPLICIT LTSMIN SAT_SMT
Running LTSmin : CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=1, -p, --pins-guards, --when, --ltl, <>((LTLAP13==true)), --buchi-type=spotba], workingDir=/home/mcc/execution]
LTSmin run took 24 ms.
FORMULA DES-PT-00a-LTLFireability-08 TRUE TECHNIQUES PARTIAL_ORDER EXPLICIT LTSMIN SAT_SMT
Running LTSmin : CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=1, -p, --pins-guards, --when, --ltl, (LTLAP14==true), --buchi-type=spotba], workingDir=/home/mcc/execution]
LTSmin run took 28 ms.
FORMULA DES-PT-00a-LTLFireability-09 FALSE TECHNIQUES PARTIAL_ORDER EXPLICIT LTSMIN SAT_SMT
Running LTSmin : CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=1, --when, --ltl, ((X((LTLAP15==true)))U([]((LTLAP16==true))))U(<>([](X((LTLAP9==true))))), --buchi-type=spotba], workingDir=/home/mcc/execution]
LTSmin run took 22 ms.
FORMULA DES-PT-00a-LTLFireability-10 FALSE TECHNIQUES PARTIAL_ORDER EXPLICIT LTSMIN SAT_SMT
Running LTSmin : CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=1, -p, --pins-guards, --when, --ltl, []((<>([]((LTLAP17==true))))U(<>((LTLAP18==true)))), --buchi-type=spotba], workingDir=/home/mcc/execution]
LTSmin run took 27 ms.
FORMULA DES-PT-00a-LTLFireability-11 FALSE TECHNIQUES PARTIAL_ORDER EXPLICIT LTSMIN SAT_SMT
Running LTSmin : CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=1, --when, --ltl, X((<>(<>((LTLAP19==true))))U(((LTLAP20==true))U((LTLAP0==true)))), --buchi-type=spotba], workingDir=/home/mcc/execution]
LTSmin run took 23 ms.
FORMULA DES-PT-00a-LTLFireability-12 FALSE TECHNIQUES PARTIAL_ORDER EXPLICIT LTSMIN SAT_SMT
Running LTSmin : CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=1, --when, --ltl, []([](X(X(X((LTLAP1==true)))))), --buchi-type=spotba], workingDir=/home/mcc/execution]
LTSmin run took 24 ms.
FORMULA DES-PT-00a-LTLFireability-13 FALSE TECHNIQUES PARTIAL_ORDER EXPLICIT LTSMIN SAT_SMT
Running LTSmin : CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=1, -p, --pins-guards, --when, --ltl, (LTLAP21==true), --buchi-type=spotba], workingDir=/home/mcc/execution]
LTSmin run took 27 ms.
FORMULA DES-PT-00a-LTLFireability-14 FALSE TECHNIQUES PARTIAL_ORDER EXPLICIT LTSMIN SAT_SMT
Running LTSmin : CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=1, -p, --pins-guards, --when, --ltl, ([](((LTLAP22==true))U((LTLAP23==true))))U(<>([]([]((LTLAP17==true))))), --buchi-type=spotba], workingDir=/home/mcc/execution]
LTSmin run took 27 ms.
FORMULA DES-PT-00a-LTLFireability-15 FALSE TECHNIQUES PARTIAL_ORDER EXPLICIT LTSMIN SAT_SMT
ITS tools runner thread asked to quit. Dying gracefully.
BK_STOP 1527855680059
--------------------
content from stderr:
+ export BINDIR=/home/mcc/BenchKit/
+ BINDIR=/home/mcc/BenchKit/
++ pwd
+ export MODEL=/home/mcc/execution
+ MODEL=/home/mcc/execution
+ /home/mcc/BenchKit//runeclipse.sh /home/mcc/execution LTLFireability -its -ltsminpath /home/mcc/BenchKit//lts_install_dir/ -louvain -smt
+ ulimit -s 65536
+ [[ -z '' ]]
+ export LTSMIN_MEM_SIZE=8589934592
+ LTSMIN_MEM_SIZE=8589934592
+ /home/mcc/BenchKit//itstools/its-tools -consoleLog -data /home/mcc/execution/workspace -pnfolder /home/mcc/execution -examination LTLFireability -z3path /home/mcc/BenchKit//z3/bin/z3 -yices2path /home/mcc/BenchKit//yices/bin/yices -its -ltsminpath /home/mcc/BenchKit//lts_install_dir/ -louvain -smt -vmargs -Dosgi.locking=none -Declipse.stateSaveDelayInterval=-1 -Dosgi.configuration.area=/tmp/.eclipse -Xss8m -Xms40m -Xmx8192m -Dfile.encoding=UTF-8 -Dosgi.requiredJavaVersion=1.6
Jun 01, 2018 12:21:09 PM fr.lip6.move.gal.application.Application start
INFO: Running its-tools with arguments : [-pnfolder, /home/mcc/execution, -examination, LTLFireability, -z3path, /home/mcc/BenchKit//z3/bin/z3, -yices2path, /home/mcc/BenchKit//yices/bin/yices, -its, -ltsminpath, /home/mcc/BenchKit//lts_install_dir/, -louvain, -smt]
Jun 01, 2018 12:21:10 PM fr.lip6.move.gal.application.MccTranslator transformPNML
INFO: Parsing pnml file : /home/mcc/execution/model.pnml
Jun 01, 2018 12:21:10 PM fr.lip6.move.gal.nupn.PTNetReader loadFromXML
INFO: Load time of PNML (sax parser for PT used): 73 ms
Jun 01, 2018 12:21:10 PM fr.lip6.move.gal.pnml.togal.PTGALTransformer handlePage
INFO: Transformed 115 places.
Jun 01, 2018 12:21:10 PM fr.lip6.move.gal.pnml.togal.PTGALTransformer handlePage
INFO: Transformed 76 transitions.
Jun 01, 2018 12:21:10 PM fr.lip6.move.gal.pnml.togal.PnmlToGalTransformer transform
INFO: Found NUPN structural information;
Jun 01, 2018 12:21:10 PM fr.lip6.move.serialization.SerializationUtil systemToFile
INFO: Time to serialize gal into /home/mcc/execution/model.pnml.img.gal : 19 ms
Jun 01, 2018 12:21:10 PM fr.lip6.move.gal.application.MccTranslator applyOrder
INFO: Applying decomposition
Jun 01, 2018 12:21:10 PM fr.lip6.move.gal.instantiate.GALRewriter flatten
INFO: Flatten gal took : 78 ms
Jun 01, 2018 12:21:10 PM fr.lip6.move.gal.instantiate.GALRewriter flatten
INFO: Flatten gal took : 38 ms
Jun 01, 2018 12:21:10 PM fr.lip6.move.gal.instantiate.CompositeBuilder decomposeWithOrder
INFO: Decomposing Gal with order
Jun 01, 2018 12:21:10 PM fr.lip6.move.gal.instantiate.GALRewriter flatten
INFO: Flatten gal took : 28 ms
Jun 01, 2018 12:21:10 PM fr.lip6.move.gal.instantiate.CompositeBuilder rewriteArraysToAllowPartition
INFO: Rewriting arrays to variables to allow decomposition.
Jun 01, 2018 12:21:10 PM fr.lip6.move.gal.instantiate.Instantiator fuseIsomorphicEffects
INFO: Removed a total of 52 redundant transitions.
Jun 01, 2018 12:21:10 PM fr.lip6.move.serialization.SerializationUtil systemToFile
INFO: Time to serialize gal into /home/mcc/execution/LTLFireability.pnml.gal : 7 ms
Jun 01, 2018 12:21:10 PM fr.lip6.move.serialization.SerializationUtil serializePropertiesForITSLTLTools
INFO: Time to serialize properties into /home/mcc/execution/LTLFireability.ltl : 2 ms
Jun 01, 2018 12:21:11 PM fr.lip6.move.gal.semantics.CompositeNextBuilder getNextForLabel
INFO: Semantic construction discarded 14 identical transitions.
Jun 01, 2018 12:21:11 PM fr.lip6.move.gal.semantics.DeterministicNextBuilder getDeterministicNext
INFO: Input system was already deterministic with 62 transitions.
Jun 01, 2018 12:21:11 PM fr.lip6.move.gal.gal2smt.bmc.KInductionSolver computeAndDeclareInvariants
INFO: Computed 55 place invariants in 75 ms
Jun 01, 2018 12:21:11 PM fr.lip6.move.gal.gal2smt.bmc.KInductionSolver init
INFO: Proved 115 variables to be positive in 418 ms
Jun 01, 2018 12:21:11 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver computeAblingMatrix
INFO: Computing symmetric may disable matrix : 62 transitions.
Jun 01, 2018 12:21:11 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of disable matrix completed :0/62 took 0 ms. Total solver calls (SAT/UNSAT): 0(0/0)
Jun 01, 2018 12:21:11 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of Complete disable matrix. took 5 ms. Total solver calls (SAT/UNSAT): 0(0/0)
Jun 01, 2018 12:21:11 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver computeAblingMatrix
INFO: Computing symmetric may enable matrix : 62 transitions.
Jun 01, 2018 12:21:11 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of Complete enable matrix. took 4 ms. Total solver calls (SAT/UNSAT): 0(0/0)
Jun 01, 2018 12:21:13 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver computeCoEnablingMatrix
INFO: Computing symmetric co enabling matrix : 62 transitions.
Jun 01, 2018 12:21:14 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(53/62) took 1619 ms. Total solver calls (SAT/UNSAT): 377(196/181)
Jun 01, 2018 12:21:14 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of Finished co-enabling matrix. took 1712 ms. Total solver calls (SAT/UNSAT): 382(196/186)
Jun 01, 2018 12:21:14 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver computeDoNotAccord
INFO: Computing Do-Not-Accords matrix : 62 transitions.
Jun 01, 2018 12:21:15 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of Completed DNA matrix. took 691 ms. Total solver calls (SAT/UNSAT): 28(0/28)
Jun 01, 2018 12:21:15 PM fr.lip6.move.gal.gal2pins.Gal2PinsTransformerNext transform
INFO: Built C files in 4680ms conformant to PINS in folder :/home/mcc/execution
Sequence of Actions to be Executed by the VM
This is useful if one wants to reexecute the tool in the VM from the submitted image disk.
set -x
# this is for BenchKit: configuration of major elements for the test
export BK_INPUT="DES-PT-00a"
export BK_EXAMINATION="LTLFireability"
export BK_TOOL="itstoolsl"
export BK_RESULT_DIR="/tmp/BK_RESULTS/OUTPUTS"
export BK_TIME_CONFINEMENT="3600"
export BK_MEMORY_CONFINEMENT="16384"
# this is specific to your benchmark or test
export BIN_DIR="$HOME/BenchKit/bin"
# remove the execution directoty if it exists (to avoid increse of .vmdk images)
if [ -d execution ] ; then
rm -rf execution
fi
tar xzf /home/mcc/BenchKit/INPUTS/DES-PT-00a.tgz
mv DES-PT-00a execution
cd execution
pwd
ls -lh
# this is for BenchKit: explicit launching of the test
echo "====================================================================="
echo " Generated by BenchKit 2-3637"
echo " Executing tool itstoolsl"
echo " Input is DES-PT-00a, examination is LTLFireability"
echo " Time confinement is $BK_TIME_CONFINEMENT seconds"
echo " Memory confinement is 16384 MBytes"
echo " Number of cores is 4"
echo " Run identifier is r213-smll-152732264000124"
echo "====================================================================="
echo
echo "--------------------"
echo "content from stdout:"
echo
echo "=== Data for post analysis generated by BenchKit (invocation template)"
echo
if [ "LTLFireability" = "UpperBounds" ] ; then
echo "The expected result is a vector of positive values"
echo NUM_VECTOR
elif [ "LTLFireability" != "StateSpace" ] ; then
echo "The expected result is a vector of booleans"
echo BOOL_VECTOR
else
echo "no data necessary for post analysis"
fi
echo
if [ -f "LTLFireability.txt" ] ; then
echo "here is the order used to build the result vector(from text file)"
for x in $(grep Property LTLFireability.txt | cut -d ' ' -f 2 | sort -u) ; do
echo "FORMULA_NAME $x"
done
elif [ -f "LTLFireability.xml" ] ; then # for cunf (txt files deleted;-)
echo echo "here is the order used to build the result vector(from xml file)"
for x in $(grep '
echo "FORMULA_NAME $x"
done
fi
echo
echo "=== Now, execution of the tool begins"
echo
echo -n "BK_START "
date -u +%s%3N
echo
timeout -s 9 $BK_TIME_CONFINEMENT bash -c "/home/mcc/BenchKit/BenchKit_head.sh 2> STDERR ; echo ; echo -n \"BK_STOP \" ; date -u +%s%3N"
if [ $? -eq 137 ] ; then
echo
echo "BK_TIME_CONFINEMENT_REACHED"
fi
echo
echo "--------------------"
echo "content from stderr:"
echo
cat STDERR ;