fond
Model Checking Contest 2018
8th edition, Bratislava, Slovakia, June 26, 2018
Execution of r213-smll-152732263800046
Last Updated
June 26, 2018

About the Execution of ITS-Tools.L for ClientsAndServers-PT-N0200P0

Execution Summary
Max Memory
Used (MB)
Time wait (ms) CPU Usage (ms) I/O Wait (ms) Computed Result Execution
Status
15753.710 3600000.00 3748575.00 8787.90 FFFFFFF????????? normal

Execution Chart

We display below the execution chart for this examination (boot time has been removed).

Trace from the execution

Waiting for the VM to be ready (probing ssh)
......................
/home/mcc/execution
total 176K
-rw-r--r-- 1 mcc users 3.5K May 15 18:54 CTLCardinality.txt
-rw-r--r-- 1 mcc users 19K May 15 18:54 CTLCardinality.xml
-rw-r--r-- 1 mcc users 2.6K May 15 18:54 CTLFireability.txt
-rw-r--r-- 1 mcc users 18K May 15 18:54 CTLFireability.xml
-rw-r--r-- 1 mcc users 4.0K May 15 18:49 GenericPropertiesDefinition.xml
-rw-r--r-- 1 mcc users 6.2K May 15 18:49 GenericPropertiesVerdict.xml
-rw-r--r-- 1 mcc users 2.5K May 26 09:26 LTLCardinality.txt
-rw-r--r-- 1 mcc users 11K May 26 09:26 LTLCardinality.xml
-rw-r--r-- 1 mcc users 2.0K May 26 09:26 LTLFireability.txt
-rw-r--r-- 1 mcc users 9.0K May 26 09:26 LTLFireability.xml
-rw-r--r-- 1 mcc users 3.2K May 15 18:54 ReachabilityCardinality.txt
-rw-r--r-- 1 mcc users 15K May 15 18:54 ReachabilityCardinality.xml
-rw-r--r-- 1 mcc users 119 May 15 18:54 ReachabilityDeadlock.txt
-rw-r--r-- 1 mcc users 357 May 15 18:54 ReachabilityDeadlock.xml
-rw-r--r-- 1 mcc users 2.9K May 15 18:54 ReachabilityFireability.txt
-rw-r--r-- 1 mcc users 17K May 15 18:54 ReachabilityFireability.xml
-rw-r--r-- 1 mcc users 1.8K May 15 18:54 UpperBounds.txt
-rw-r--r-- 1 mcc users 3.8K May 15 18:54 UpperBounds.xml
-rw-r--r-- 1 mcc users 6 May 15 18:49 equiv_col
-rw-r--r-- 1 mcc users 8 May 15 18:49 instance
-rw-r--r-- 1 mcc users 6 May 15 18:49 iscolored
-rw-r--r-- 1 mcc users 9.2K May 15 18:49 model.pnml
=====================================================================
Generated by BenchKit 2-3637
Executing tool itstoolsl
Input is ClientsAndServers-PT-N0200P0, examination is LTLFireability
Time confinement is 3600 seconds
Memory confinement is 16384 MBytes
Number of cores is 4
Run identifier is r213-smll-152732263800046
=====================================================================


--------------------
content from stdout:

=== Data for post analysis generated by BenchKit (invocation template)

The expected result is a vector of booleans
BOOL_VECTOR

here is the order used to build the result vector(from text file)
FORMULA_NAME ClientsAndServers-PT-N0200P0-LTLFireability-00
FORMULA_NAME ClientsAndServers-PT-N0200P0-LTLFireability-01
FORMULA_NAME ClientsAndServers-PT-N0200P0-LTLFireability-02
FORMULA_NAME ClientsAndServers-PT-N0200P0-LTLFireability-03
FORMULA_NAME ClientsAndServers-PT-N0200P0-LTLFireability-04
FORMULA_NAME ClientsAndServers-PT-N0200P0-LTLFireability-05
FORMULA_NAME ClientsAndServers-PT-N0200P0-LTLFireability-06
FORMULA_NAME ClientsAndServers-PT-N0200P0-LTLFireability-07
FORMULA_NAME ClientsAndServers-PT-N0200P0-LTLFireability-08
FORMULA_NAME ClientsAndServers-PT-N0200P0-LTLFireability-09
FORMULA_NAME ClientsAndServers-PT-N0200P0-LTLFireability-10
FORMULA_NAME ClientsAndServers-PT-N0200P0-LTLFireability-11
FORMULA_NAME ClientsAndServers-PT-N0200P0-LTLFireability-12
FORMULA_NAME ClientsAndServers-PT-N0200P0-LTLFireability-13
FORMULA_NAME ClientsAndServers-PT-N0200P0-LTLFireability-14
FORMULA_NAME ClientsAndServers-PT-N0200P0-LTLFireability-15

=== Now, execution of the tool begins

BK_START 1527803211950

Converted graph to binary with : CommandLine [args=[/home/mcc/BenchKit/itstools/plugins/fr.lip6.move.gal.louvain.binaries_1.0.0.201805241334/bin/convert-linux64, -i, /tmp/graph5179564637442198083.txt, -o, /tmp/graph5179564637442198083.bin, -w, /tmp/graph5179564637442198083.weights], workingDir=null]
Built communities with : CommandLine [args=[/home/mcc/BenchKit/itstools/plugins/fr.lip6.move.gal.louvain.binaries_1.0.0.201805241334/bin/louvain-linux64, /tmp/graph5179564637442198083.bin, -l, -1, -v, -w, /tmp/graph5179564637442198083.weights, -q, 0, -e, 0.001], workingDir=null]
Using solver Z3 to compute partial order matrices.
Built C files in :
/home/mcc/execution
Invoking ITS tools like this :CommandLine [args=[/home/mcc/BenchKit/itstools/plugins/fr.lip6.move.gal.itstools.binaries_1.0.0.201805241334/bin/its-ltl-linux64, --gc-threshold, 2000000, -i, /home/mcc/execution/LTLFireability.pnml.gal, -t, CGAL, -LTL, /home/mcc/execution/LTLFireability.ltl, -c, -stutter-deadlock], workingDir=/home/mcc/execution]

its-ltl command run as :

/home/mcc/BenchKit/itstools/plugins/fr.lip6.move.gal.itstools.binaries_1.0.0.201805241334/bin/its-ltl-linux64 --gc-threshold 2000000 -i /home/mcc/execution/LTLFireability.pnml.gal -t CGAL -LTL /home/mcc/execution/LTLFireability.ltl -c -stutter-deadlock
Read 16 LTL properties
Checking formula 0 : !(("(i4.u7.Cb>=1)"))
Formula 0 simplified : !"(i4.u7.Cb>=1)"
built 11 ordering constraints for composite.
built 8 ordering constraints for composite.
built 7 ordering constraints for composite.
built 4 ordering constraints for composite.
Presburger conditions satisfied. Using coverability to approximate state space in K-Induction.
// Phase 1: matrix 18 rows 25 cols
invariant :u3:SA + -1'u4:CF + -1'u4:StF + -1'u4:SwA + -1'i0:u0:Uf + i0:u1:MpA + i0:u2:SR + i0:u2:MwU + -1'i3:u5:SwG + -1'i3:u6:SpG + -1'i4:u7:CG + i4:u7:CwG + i4:u8:CwA + i4:u8:Ci = 800
invariant :u3:CA + u4:CF + -1'i3:u5:StR + -1'i3:u5:SwG + -1'i3:u6:Si + -1'i3:u6:SpG + -1'i4:u8:CwA = -400
invariant :i3:u5:CR + i3:u5:StR + i3:u5:SwG + i3:u6:SpG + i4:u7:CG + -1'i4:u7:CwG = 0
invariant :i4:u7:Cb + i4:u7:CwG + i4:u8:CwA + i4:u8:Ci = 1600
invariant :u3:SpA + u4:StF + u4:SwA + i3:u5:StR + i3:u5:SwG + i3:u6:Si + i3:u6:SpG = 400
invariant :i0:u0:SG + -1'i0:u1:MpA + -1'i0:u1:MtF + -1'i0:u1:Mi + i0:u2:SR + -1'i3:u5:SwG = -600
invariant :i0:u0:MpG + i0:u1:MpA + i0:u1:MtF + i0:u1:Mi + i0:u2:MwU = 600
invariant :u4:SF + u4:CF + u4:StF + i0:u0:Uf + i0:u1:MtF + -1'i0:u2:SR + -1'i0:u2:MwU + i3:u5:SwG + i3:u6:SpG + i4:u7:CG + -1'i4:u7:CwG + -1'i4:u8:CwA + -1'i4:u8:Ci = -800
Running compilation step : CommandLine [args=[gcc, -c, -I/home/mcc/BenchKit//lts_install_dir//include, -I., -std=c99, -fPIC, -O3, model.c], workingDir=/home/mcc/execution]
Compilation finished in 972 ms.
Running link step : CommandLine [args=[gcc, -shared, -o, gal.so, model.o], workingDir=/home/mcc/execution]
Link finished in 55 ms.
Running LTSmin : CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=1, -p, --pins-guards, --when, --ltl, (LTLAP0==true), --buchi-type=spotba], workingDir=/home/mcc/execution]
LTSmin run took 413 ms.
FORMULA ClientsAndServers-PT-N0200P0-LTLFireability-00 FALSE TECHNIQUES PARTIAL_ORDER EXPLICIT LTSMIN SAT_SMT
Running LTSmin : CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=1, --when, --ltl, []((X([]((LTLAP1==true))))U((LTLAP2==true))), --buchi-type=spotba], workingDir=/home/mcc/execution]
LTSmin run took 18681 ms.
FORMULA ClientsAndServers-PT-N0200P0-LTLFireability-01 FALSE TECHNIQUES PARTIAL_ORDER EXPLICIT LTSMIN SAT_SMT
Running LTSmin : CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=1, -p, --pins-guards, --when, --ltl, []((LTLAP2==true)), --buchi-type=spotba], workingDir=/home/mcc/execution]
LTSmin run took 115 ms.
FORMULA ClientsAndServers-PT-N0200P0-LTLFireability-02 FALSE TECHNIQUES PARTIAL_ORDER EXPLICIT LTSMIN SAT_SMT
Running LTSmin : CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=1, -p, --pins-guards, --when, --ltl, (<>(((LTLAP3==true))U((LTLAP4==true))))U((LTLAP5==true)), --buchi-type=spotba], workingDir=/home/mcc/execution]
LTSmin run took 188 ms.
FORMULA ClientsAndServers-PT-N0200P0-LTLFireability-03 FALSE TECHNIQUES PARTIAL_ORDER EXPLICIT LTSMIN SAT_SMT
Running LTSmin : CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=1, --when, --ltl, X((((LTLAP6==true))U((LTLAP7==true)))U(<>([]((LTLAP8==true))))), --buchi-type=spotba], workingDir=/home/mcc/execution]
LTSmin run took 295 ms.
FORMULA ClientsAndServers-PT-N0200P0-LTLFireability-04 FALSE TECHNIQUES PARTIAL_ORDER EXPLICIT LTSMIN SAT_SMT
Running LTSmin : CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=1, --when, --ltl, []([](<>([](X((LTLAP2==true)))))), --buchi-type=spotba], workingDir=/home/mcc/execution]
LTSmin run took 296 ms.
FORMULA ClientsAndServers-PT-N0200P0-LTLFireability-05 FALSE TECHNIQUES PARTIAL_ORDER EXPLICIT LTSMIN SAT_SMT
Running LTSmin : CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=1, --when, --ltl, ([](X(X((LTLAP1==true)))))U(([]((LTLAP1==true)))U(X((LTLAP9==true)))), --buchi-type=spotba], workingDir=/home/mcc/execution]
LTSmin run took 1754 ms.
FORMULA ClientsAndServers-PT-N0200P0-LTLFireability-06 FALSE TECHNIQUES PARTIAL_ORDER EXPLICIT LTSMIN SAT_SMT
Running LTSmin : CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=1, -p, --pins-guards, --when, --ltl, [](<>((<>((LTLAP3==true)))U(<>((LTLAP6==true))))), --buchi-type=spotba], workingDir=/home/mcc/execution]
WARNING : LTS min runner thread failed on error :java.lang.RuntimeException: Unexpected exception when executing ltsmin :CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=1, -p, --pins-guards, --when, --ltl, [](<>((<>((LTLAP3==true)))U(<>((LTLAP6==true))))), --buchi-type=spotba], workingDir=/home/mcc/execution]
255

BK_TIME_CONFINEMENT_REACHED

--------------------
content from stderr:

+ export BINDIR=/home/mcc/BenchKit/
+ BINDIR=/home/mcc/BenchKit/
++ pwd
+ export MODEL=/home/mcc/execution
+ MODEL=/home/mcc/execution
+ /home/mcc/BenchKit//runeclipse.sh /home/mcc/execution LTLFireability -its -ltsminpath /home/mcc/BenchKit//lts_install_dir/ -louvain -smt
+ ulimit -s 65536
+ [[ -z '' ]]
+ export LTSMIN_MEM_SIZE=8589934592
+ LTSMIN_MEM_SIZE=8589934592
+ /home/mcc/BenchKit//itstools/its-tools -consoleLog -data /home/mcc/execution/workspace -pnfolder /home/mcc/execution -examination LTLFireability -z3path /home/mcc/BenchKit//z3/bin/z3 -yices2path /home/mcc/BenchKit//yices/bin/yices -its -ltsminpath /home/mcc/BenchKit//lts_install_dir/ -louvain -smt -vmargs -Dosgi.locking=none -Declipse.stateSaveDelayInterval=-1 -Dosgi.configuration.area=/tmp/.eclipse -Xss8m -Xms40m -Xmx8192m -Dfile.encoding=UTF-8 -Dosgi.requiredJavaVersion=1.6
May 31, 2018 9:46:54 PM fr.lip6.move.gal.application.Application start
INFO: Running its-tools with arguments : [-pnfolder, /home/mcc/execution, -examination, LTLFireability, -z3path, /home/mcc/BenchKit//z3/bin/z3, -yices2path, /home/mcc/BenchKit//yices/bin/yices, -its, -ltsminpath, /home/mcc/BenchKit//lts_install_dir/, -louvain, -smt]
May 31, 2018 9:46:54 PM fr.lip6.move.gal.application.MccTranslator transformPNML
INFO: Parsing pnml file : /home/mcc/execution/model.pnml
May 31, 2018 9:46:54 PM fr.lip6.move.gal.nupn.PTNetReader loadFromXML
INFO: Load time of PNML (sax parser for PT used): 44 ms
May 31, 2018 9:46:54 PM fr.lip6.move.gal.pnml.togal.PTGALTransformer handlePage
INFO: Transformed 25 places.
May 31, 2018 9:46:54 PM fr.lip6.move.gal.pnml.togal.PTGALTransformer handlePage
INFO: Transformed 18 transitions.
May 31, 2018 9:46:54 PM fr.lip6.move.serialization.SerializationUtil systemToFile
INFO: Time to serialize gal into /home/mcc/execution/model.pnml.img.gal : 10 ms
May 31, 2018 9:46:54 PM fr.lip6.move.gal.application.MccTranslator applyOrder
INFO: Applying decomposition
May 31, 2018 9:46:54 PM fr.lip6.move.gal.instantiate.GALRewriter flatten
INFO: Flatten gal took : 39 ms
May 31, 2018 9:46:54 PM fr.lip6.move.gal.instantiate.GALRewriter flatten
INFO: Flatten gal took : 16 ms
Begin: Thu May 31 21:46:55 2018

Computation of communities with the Newman-Girvan Modularity quality function

level 0:
start computation: Thu May 31 21:46:55 2018
network size: 25 nodes, 72 links, 36 weight
quality increased from -0.0443673 to 0.356096
end computation: Thu May 31 21:46:55 2018
level 1:
start computation: Thu May 31 21:46:55 2018
network size: 9 nodes, 41 links, 36 weight
quality increased from 0.356096 to 0.464506
end computation: Thu May 31 21:46:55 2018
level 2:
start computation: Thu May 31 21:46:55 2018
network size: 5 nodes, 23 links, 36 weight
quality increased from 0.464506 to 0.464506
end computation: Thu May 31 21:46:55 2018
End: Thu May 31 21:46:55 2018
Total duration: 0 sec
0.464506
May 31, 2018 9:46:55 PM fr.lip6.move.gal.instantiate.CompositeBuilder decomposeWithOrder
INFO: Decomposing Gal with order
May 31, 2018 9:46:55 PM fr.lip6.move.gal.instantiate.GALRewriter flatten
INFO: Flatten gal took : 31 ms
May 31, 2018 9:46:55 PM fr.lip6.move.gal.instantiate.CompositeBuilder rewriteArraysToAllowPartition
INFO: Rewriting arrays to variables to allow decomposition.
May 31, 2018 9:46:55 PM fr.lip6.move.gal.instantiate.Instantiator fuseIsomorphicEffects
INFO: Removed a total of 1 redundant transitions.
May 31, 2018 9:46:55 PM fr.lip6.move.serialization.SerializationUtil systemToFile
INFO: Time to serialize gal into /home/mcc/execution/LTLFireability.pnml.gal : 3 ms
May 31, 2018 9:46:55 PM fr.lip6.move.serialization.SerializationUtil serializePropertiesForITSLTLTools
INFO: Time to serialize properties into /home/mcc/execution/LTLFireability.ltl : 2 ms
May 31, 2018 9:46:55 PM fr.lip6.move.gal.semantics.DeterministicNextBuilder getDeterministicNext
INFO: Input system was already deterministic with 18 transitions.
May 31, 2018 9:46:55 PM fr.lip6.move.gal.gal2smt.bmc.KInductionSolver computeAndDeclareInvariants
INFO: Computed 8 place invariants in 10 ms
May 31, 2018 9:46:55 PM fr.lip6.move.gal.gal2smt.bmc.KInductionSolver init
INFO: Proved 25 variables to be positive in 75 ms
May 31, 2018 9:46:55 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver computeAblingMatrix
INFO: Computing symmetric may disable matrix : 18 transitions.
May 31, 2018 9:46:55 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of disable matrix completed :0/18 took 0 ms. Total solver calls (SAT/UNSAT): 0(0/0)
May 31, 2018 9:46:55 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of Complete disable matrix. took 2 ms. Total solver calls (SAT/UNSAT): 0(0/0)
May 31, 2018 9:46:55 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver computeAblingMatrix
INFO: Computing symmetric may enable matrix : 18 transitions.
May 31, 2018 9:46:55 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of Complete enable matrix. took 1 ms. Total solver calls (SAT/UNSAT): 0(0/0)
May 31, 2018 9:46:55 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver computeCoEnablingMatrix
INFO: Computing symmetric co enabling matrix : 18 transitions.
May 31, 2018 9:46:56 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of Finished co-enabling matrix. took 412 ms. Total solver calls (SAT/UNSAT): 106(106/0)
May 31, 2018 9:46:56 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver computeDoNotAccord
INFO: Computing Do-Not-Accords matrix : 18 transitions.
May 31, 2018 9:46:56 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of Completed DNA matrix. took 174 ms. Total solver calls (SAT/UNSAT): 33(0/33)
May 31, 2018 9:46:56 PM fr.lip6.move.gal.gal2pins.Gal2PinsTransformerNext transform
INFO: Built C files in 1256ms conformant to PINS in folder :/home/mcc/execution
pins2lts-mc, 0.000: Registering PINS so language module
pins2lts-mc, 0.000: Loading model from ./gal.so
pins2lts-mc, 0.000: library has no initializer
pins2lts-mc, 0.000: loading model GAL
pins2lts-mc, 0.000: completed loading model GAL
pins2lts-mc, 0.000: Initializing POR dependencies: labels 31, guards 18
pins2lts-mc, 0.000: LTL layer: formula: [](<>((<>((LTLAP3==true)))U(<>((LTLAP6==true)))))
pins2lts-mc, 0.000: "[](<>((<>((LTLAP3==true)))U(<>((LTLAP6==true)))))" is not a file, parsing as formula...
pins2lts-mc, 0.000: Using Spin LTL semantics
pins2lts-mc, 0.008: buchi has 2 states
pins2lts-mc, 0.008: Weak Buchi automaton detected, adding non-accepting as progress label.
pins2lts-mc, 0.008: Forcing use of the an ignoring proviso (cndfs)
pins2lts-mc, 0.008: There are 33 state labels and 1 edge labels
pins2lts-mc, 0.008: State length is 26, there are 21 groups
pins2lts-mc, 0.008: Running cndfs using 1 core (sequential)
pins2lts-mc, 0.008: Using a tree table with 2^27 elements
pins2lts-mc, 0.008: Successor permutation: dynamic
pins2lts-mc, 0.008: Visible groups: 0 / 21, labels: 1 / 33
pins2lts-mc, 0.008: POR cycle proviso: cndfs (ltl)
pins2lts-mc, 0.008: Global bits: 2, count bits: 2, local bits: 0
pins2lts-mc, 0.033: [Blue] 1000 levels 1000 states 1001 transitions
pins2lts-mc, 0.052: [Blue] 1868 levels 2000 states 2135 transitions
pins2lts-mc, 0.085: [Blue] 3202 levels 4000 states 4401 transitions
pins2lts-mc, 0.137: [Blue] 3202 levels 8000 states 9322 transitions
pins2lts-mc, 0.235: [Blue] 3202 levels 16000 states 19352 transitions
pins2lts-mc, 0.407: [Blue] 3202 levels 32000 states 39460 transitions
pins2lts-mc, 0.702: [Blue] 3202 levels 64000 states 79352 transitions
pins2lts-mc, 1.241: [Blue] 3202 levels 128000 states 159660 transitions
pins2lts-mc, 2.234: [Blue] 3202 levels 256000 states 319498 transitions
pins2lts-mc, 3.978: [Blue] 3202 levels 512000 states 594642 transitions
pins2lts-mc, 7.041: [Blue] 3217 levels 1024000 states 1112387 transitions
pins2lts-mc, 12.933: [Blue] 3217 levels 2048000 states 2143969 transitions
pins2lts-mc, 24.705: [Blue] 3217 levels 4096000 states 4202709 transitions
pins2lts-mc, 48.556: [Blue] 3217 levels 8192000 states 8315013 transitions
pins2lts-mc, 99.836: [Blue] 3217 levels 16384000 states 16532274 transitions
pins2lts-mc, 109.149: Error: tree leafs table full! Change -s/--ratio.
pins2lts-mc, 109.157:
pins2lts-mc, 109.157: Explored 16735102 states 16884523 transitions, fanout: 1.009
pins2lts-mc, 109.157: Total exploration time 109.150 sec (109.150 sec minimum, 109.150 sec on average)
pins2lts-mc, 109.157: States per second: 153322, Transitions per second: 154691
pins2lts-mc, 109.157:
pins2lts-mc, 109.157: State space has 16735443 states, 16732766 are accepting
pins2lts-mc, 109.157: cndfs_1 (permutation: dynamic) stats:
pins2lts-mc, 109.157: blue states: 16735102 (100.00%), transitions: 0 (per worker)
pins2lts-mc, 109.157: red states: 0 (0.00%), bogus: 0 (0.00%), transitions: 0, waits: 0 (0.00 sec)
pins2lts-mc, 109.157: all-red states: 16732766 (99.98%), bogus 0 (0.00%)
pins2lts-mc, 109.157:
pins2lts-mc, 109.157: Total memory used for local state coloring: 0.0MB
pins2lts-mc, 109.157:
pins2lts-mc, 109.157: Queue width: 8B, total height: 3217, memory: 0.02MB
pins2lts-mc, 109.157: Tree memory: 383.7MB, 24.0 B/state, compr.: 22.7%
pins2lts-mc, 109.157: Tree fill ratio (roots/leafs): 12.0%/99.0%
pins2lts-mc, 109.157: Stored 18 string chucks using 0MB
pins2lts-mc, 109.157: Total memory used for chunk indexing: 0MB
pins2lts-mc, 109.157: Est. total memory use: 383.7MB (~1024.0MB paged-in)
java.lang.RuntimeException: Unexpected exception when executing ltsmin :CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=1, -p, --pins-guards, --when, --ltl, [](<>((<>((LTLAP3==true)))U(<>((LTLAP6==true))))), --buchi-type=spotba], workingDir=/home/mcc/execution]
255
at fr.lip6.move.gal.application.LTSminRunner.checkProperty(LTSminRunner.java:167)
at fr.lip6.move.gal.application.LTSminRunner.access$9(LTSminRunner.java:122)
at fr.lip6.move.gal.application.LTSminRunner$1.run(LTSminRunner.java:91)
at java.lang.Thread.run(Thread.java:748)

Sequence of Actions to be Executed by the VM

This is useful if one wants to reexecute the tool in the VM from the submitted image disk.

set -x
# this is for BenchKit: configuration of major elements for the test
export BK_INPUT="ClientsAndServers-PT-N0200P0"
export BK_EXAMINATION="LTLFireability"
export BK_TOOL="itstoolsl"
export BK_RESULT_DIR="/tmp/BK_RESULTS/OUTPUTS"
export BK_TIME_CONFINEMENT="3600"
export BK_MEMORY_CONFINEMENT="16384"

# this is specific to your benchmark or test

export BIN_DIR="$HOME/BenchKit/bin"

# remove the execution directoty if it exists (to avoid increse of .vmdk images)
if [ -d execution ] ; then
rm -rf execution
fi

tar xzf /home/mcc/BenchKit/INPUTS/ClientsAndServers-PT-N0200P0.tgz
mv ClientsAndServers-PT-N0200P0 execution
cd execution
pwd
ls -lh

# this is for BenchKit: explicit launching of the test
echo "====================================================================="
echo " Generated by BenchKit 2-3637"
echo " Executing tool itstoolsl"
echo " Input is ClientsAndServers-PT-N0200P0, examination is LTLFireability"
echo " Time confinement is $BK_TIME_CONFINEMENT seconds"
echo " Memory confinement is 16384 MBytes"
echo " Number of cores is 4"
echo " Run identifier is r213-smll-152732263800046"
echo "====================================================================="
echo
echo "--------------------"
echo "content from stdout:"
echo
echo "=== Data for post analysis generated by BenchKit (invocation template)"
echo
if [ "LTLFireability" = "UpperBounds" ] ; then
echo "The expected result is a vector of positive values"
echo NUM_VECTOR
elif [ "LTLFireability" != "StateSpace" ] ; then
echo "The expected result is a vector of booleans"
echo BOOL_VECTOR
else
echo "no data necessary for post analysis"
fi
echo
if [ -f "LTLFireability.txt" ] ; then
echo "here is the order used to build the result vector(from text file)"
for x in $(grep Property LTLFireability.txt | cut -d ' ' -f 2 | sort -u) ; do
echo "FORMULA_NAME $x"
done
elif [ -f "LTLFireability.xml" ] ; then # for cunf (txt files deleted;-)
echo echo "here is the order used to build the result vector(from xml file)"
for x in $(grep '' LTLFireability.xml | cut -d '>' -f 2 | cut -d '<' -f 1 | sort -u) ; do
echo "FORMULA_NAME $x"
done
fi
echo
echo "=== Now, execution of the tool begins"
echo
echo -n "BK_START "
date -u +%s%3N
echo
timeout -s 9 $BK_TIME_CONFINEMENT bash -c "/home/mcc/BenchKit/BenchKit_head.sh 2> STDERR ; echo ; echo -n \"BK_STOP \" ; date -u +%s%3N"
if [ $? -eq 137 ] ; then
echo
echo "BK_TIME_CONFINEMENT_REACHED"
fi
echo
echo "--------------------"
echo "content from stderr:"
echo
cat STDERR ;