About the Execution of ITS-Tools for TCPcondis-PT-05
Execution Summary | |||||
Max Memory Used (MB) |
Time wait (ms) | CPU Usage (ms) | I/O Wait (ms) | Computed Result | Execution Status |
15751.960 | 10349.00 | 19044.00 | 591.30 | FFFFFFFFFFFFFTFF | normal |
Execution Chart
We display below the execution chart for this examination (boot time has been removed).
Trace from the execution
Waiting for the VM to be ready (probing ssh)
.................
/home/mcc/execution
total 196K
-rw-r--r-- 1 mcc users 2.9K May 15 18:54 CTLCardinality.txt
-rw-r--r-- 1 mcc users 15K May 15 18:54 CTLCardinality.xml
-rw-r--r-- 1 mcc users 2.5K May 15 18:54 CTLFireability.txt
-rw-r--r-- 1 mcc users 17K May 15 18:54 CTLFireability.xml
-rw-r--r-- 1 mcc users 4.0K May 15 18:50 GenericPropertiesDefinition.xml
-rw-r--r-- 1 mcc users 6.0K May 15 18:50 GenericPropertiesVerdict.xml
-rw-r--r-- 1 mcc users 2.3K May 26 09:27 LTLCardinality.txt
-rw-r--r-- 1 mcc users 9.9K May 26 09:27 LTLCardinality.xml
-rw-r--r-- 1 mcc users 1.8K May 26 09:27 LTLFireability.txt
-rw-r--r-- 1 mcc users 8.3K May 26 09:27 LTLFireability.xml
-rw-r--r-- 1 mcc users 4.2K May 15 18:54 ReachabilityCardinality.txt
-rw-r--r-- 1 mcc users 22K May 15 18:54 ReachabilityCardinality.xml
-rw-r--r-- 1 mcc users 106 May 15 18:54 ReachabilityDeadlock.txt
-rw-r--r-- 1 mcc users 344 May 15 18:54 ReachabilityDeadlock.xml
-rw-r--r-- 1 mcc users 2.9K May 15 18:54 ReachabilityFireability.txt
-rw-r--r-- 1 mcc users 19K May 15 18:54 ReachabilityFireability.xml
-rw-r--r-- 1 mcc users 1.7K May 15 18:54 UpperBounds.txt
-rw-r--r-- 1 mcc users 3.7K May 15 18:54 UpperBounds.xml
-rw-r--r-- 1 mcc users 6 May 15 18:50 equiv_col
-rw-r--r-- 1 mcc users 3 May 15 18:50 instance
-rw-r--r-- 1 mcc users 6 May 15 18:50 iscolored
-rwxr-xr-x 1 mcc users 24K May 15 18:50 model.pnml
=====================================================================
Generated by BenchKit 2-3637
Executing tool itstools
Input is TCPcondis-PT-05, examination is LTLFireability
Time confinement is 3600 seconds
Memory confinement is 16384 MBytes
Number of cores is 4
Run identifier is r212-smll-152732263600670
=====================================================================
--------------------
content from stdout:
=== Data for post analysis generated by BenchKit (invocation template)
The expected result is a vector of booleans
BOOL_VECTOR
here is the order used to build the result vector(from text file)
FORMULA_NAME TCPcondis-PT-05-LTLFireability-00
FORMULA_NAME TCPcondis-PT-05-LTLFireability-01
FORMULA_NAME TCPcondis-PT-05-LTLFireability-02
FORMULA_NAME TCPcondis-PT-05-LTLFireability-03
FORMULA_NAME TCPcondis-PT-05-LTLFireability-04
FORMULA_NAME TCPcondis-PT-05-LTLFireability-05
FORMULA_NAME TCPcondis-PT-05-LTLFireability-06
FORMULA_NAME TCPcondis-PT-05-LTLFireability-07
FORMULA_NAME TCPcondis-PT-05-LTLFireability-08
FORMULA_NAME TCPcondis-PT-05-LTLFireability-09
FORMULA_NAME TCPcondis-PT-05-LTLFireability-10
FORMULA_NAME TCPcondis-PT-05-LTLFireability-11
FORMULA_NAME TCPcondis-PT-05-LTLFireability-12
FORMULA_NAME TCPcondis-PT-05-LTLFireability-13
FORMULA_NAME TCPcondis-PT-05-LTLFireability-14
FORMULA_NAME TCPcondis-PT-05-LTLFireability-15
=== Now, execution of the tool begins
BK_START 1527917936501
Using solver Z3 to compute partial order matrices.
Built C files in :
/home/mcc/execution
Invoking ITS tools like this :CommandLine [args=[/home/mcc/BenchKit/itstools/plugins/fr.lip6.move.gal.itstools.binaries_1.0.0.201805151631/bin/its-ltl-linux64, --gc-threshold, 2000000, -i, /home/mcc/execution/LTLFireability.pnml.gal, -t, CGAL, -LTL, /home/mcc/execution/LTLFireability.ltl, -c, -stutter-deadlock], workingDir=/home/mcc/execution]
its-ltl command run as :
/home/mcc/BenchKit/itstools/plugins/fr.lip6.move.gal.itstools.binaries_1.0.0.201805151631/bin/its-ltl-linux64 --gc-threshold 2000000 -i /home/mcc/execution/LTLFireability.pnml.gal -t CGAL -LTL /home/mcc/execution/LTLFireability.ltl -c -stutter-deadlock
Read 16 LTL properties
Checking formula 0 : !((F(X(G(("((FINWAIT1>=1)&&(xFINACK>=1))")U("((ESTAB>=1)&&(xFIN>=1))"))))))
Formula 0 simplified : !FXG("((FINWAIT1>=1)&&(xFINACK>=1))" U "((ESTAB>=1)&&(xFIN>=1))")
Presburger conditions satisfied. Using coverability to approximate state space in K-Induction.
// Phase 1: matrix 32 rows 30 cols
invariant :SYNACK + -1'SYNRCVD + xSYNACK + -1'xSYNRCVD = 0
invariant :CLOSED + CLOSEWAIT + CLOSING + ESTAB + FINWAIT1 + FINWAIT2 + LASTACK + LISTEN + SYNRCVD + SYNSENT + TIMEWAIT = 5
invariant :-1'CLOSEWAIT + -1'CLOSING + FINACK + FINWAIT2 + -1'LASTACK + -1'xCLOSEWAIT + -1'xCLOSING + xFINACK + xFINWAIT2 + -1'xLASTACK = 0
invariant :SYNRCVD + xSYN + -1'xSYNACK + -1'xSYNSENT = 0
invariant :-1'CLOSEWAIT + -1'CLOSING + -1'ESTAB + -1'FINWAIT1 + -1'LASTACK + xESTAB + xFINACK + xFINWAIT1 + xFINWAIT2 + -1'xSYNACK + xSYNRCVD = 0
invariant :SYN + -1'SYNRCVD + -1'SYNSENT + xSYNACK = 0
invariant :-1'CLOSING + FIN + -1'FINWAIT1 + -1'LASTACK + xFINACK = 0
invariant :CLOSEWAIT + CLOSING + ESTAB + FINWAIT1 + LASTACK + xCLOSED + xCLOSEWAIT + xCLOSING + -1'xFINACK + xLASTACK + xLISTEN + xSYNACK + xSYNSENT + xTIMEWAIT = 5
invariant :CLOSEWAIT + CLOSING + -1'FINWAIT2 + LASTACK + xCLOSEWAIT + xFIN + -1'xFINACK + -1'xFINWAIT1 + -1'xFINWAIT2 = 0
Reverse transition relation is NOT exact ! Due to transitions raf2, xraf2, Intersection with reachable at each step enabled. (destroyed/reverse/intersect/total) :0/30/2/32
Running compilation step : CommandLine [args=[gcc, -c, -I/home/mcc/BenchKit//lts_install_dir//include, -I., -std=c99, -fPIC, -O3, model.c], workingDir=/home/mcc/execution]
Compilation finished in 893 ms.
Running link step : CommandLine [args=[gcc, -shared, -o, gal.so, model.o], workingDir=/home/mcc/execution]
3 unique states visited
3 strongly connected components in search stack
3 transitions explored
3 items max in DFS search stack
405 ticks for the emptiness check
Model ,|S| ,Time ,Mem(kb) ,fin. SDD ,fin. DDD ,peak SDD ,peak DDD ,SDD Hom ,SDD cache peak ,DDD Hom ,DDD cachepeak ,SHom cache
STATS,0,4.06838,103648,1,0,70,466176,101,34,1158,479867,106
an accepting run exists (use option '-e' to print it)
Formula 0 is FALSE accepting run found.
FORMULA TCPcondis-PT-05-LTLFireability-00 FALSE TECHNIQUES DECISION_DIAGRAMS TOPOLOGICAL
Checking formula 1 : !(("(TIMEWAIT>=1)"))
Formula 1 simplified : !"(TIMEWAIT>=1)"
Link finished in 39 ms.
3 unique states visited
3 strongly connected components in search stack
3 transitions explored
3 items max in DFS search stack
5 ticks for the emptiness check
Model ,|S| ,Time ,Mem(kb) ,fin. SDD ,fin. DDD ,peak SDD ,peak DDD ,SDD Hom ,SDD cache peak ,DDD Hom ,DDD cachepeak ,SHom cache
STATS,0,4.11679,105084,1,0,70,471075,106,34,1159,490530,115
an accepting run exists (use option '-e' to print it)
Formula 1 is FALSE accepting run found.
FORMULA TCPcondis-PT-05-LTLFireability-01 FALSE TECHNIQUES DECISION_DIAGRAMS TOPOLOGICAL
Checking formula 2 : !(((F("(xLISTEN>=1)"))U((G("((xFINWAIT1>=1)&&(FIN>=1))"))U(X("((xLASTACK>=1)&&(FINACK>=1))")))))
Formula 2 simplified : !(F"(xLISTEN>=1)" U (G"((xFINWAIT1>=1)&&(FIN>=1))" U X"((xLASTACK>=1)&&(FINACK>=1))"))
Running LTSmin : CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=1, -p, --pins-guards, --when, --ltl, (LTLAP2==true), --buchi-type=spotba], workingDir=/home/mcc/execution]
LTSmin run took 37 ms.
FORMULA TCPcondis-PT-05-LTLFireability-01 FALSE TECHNIQUES PARTIAL_ORDER EXPLICIT LTSMIN SAT_SMT
Running LTSmin : CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=1, --when, --ltl, (<>((LTLAP3==true)))U(([]((LTLAP4==true)))U(X((LTLAP5==true)))), --buchi-type=spotba], workingDir=/home/mcc/execution]
LTSmin run took 61 ms.
FORMULA TCPcondis-PT-05-LTLFireability-02 FALSE TECHNIQUES PARTIAL_ORDER EXPLICIT LTSMIN SAT_SMT
Running LTSmin : CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=1, --when, --ltl, [](X([]([](<>((LTLAP4==true)))))), --buchi-type=spotba], workingDir=/home/mcc/execution]
LTSmin run took 25 ms.
FORMULA TCPcondis-PT-05-LTLFireability-03 FALSE TECHNIQUES PARTIAL_ORDER EXPLICIT LTSMIN SAT_SMT
Running LTSmin : CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=1, -p, --pins-guards, --when, --ltl, <>([](<>(((LTLAP6==true))U((LTLAP7==true))))), --buchi-type=spotba], workingDir=/home/mcc/execution]
LTSmin run took 16 ms.
FORMULA TCPcondis-PT-05-LTLFireability-04 FALSE TECHNIQUES PARTIAL_ORDER EXPLICIT LTSMIN SAT_SMT
Running LTSmin : CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=1, --when, --ltl, [](X((LTLAP8==true))), --buchi-type=spotba], workingDir=/home/mcc/execution]
LTSmin run took 29 ms.
FORMULA TCPcondis-PT-05-LTLFireability-05 FALSE TECHNIQUES PARTIAL_ORDER EXPLICIT LTSMIN SAT_SMT
Running LTSmin : CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=1, --when, --ltl, <>(([](X((LTLAP9==true))))U(((LTLAP10==true))U((LTLAP11==true)))), --buchi-type=spotba], workingDir=/home/mcc/execution]
LTSmin run took 892 ms.
FORMULA TCPcondis-PT-05-LTLFireability-06 FALSE TECHNIQUES PARTIAL_ORDER EXPLICIT LTSMIN SAT_SMT
Running LTSmin : CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=1, -p, --pins-guards, --when, --ltl, (LTLAP2==true), --buchi-type=spotba], workingDir=/home/mcc/execution]
LTSmin run took 15 ms.
FORMULA TCPcondis-PT-05-LTLFireability-07 FALSE TECHNIQUES PARTIAL_ORDER EXPLICIT LTSMIN SAT_SMT
Running LTSmin : CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=1, -p, --pins-guards, --when, --ltl, (LTLAP12==true), --buchi-type=spotba], workingDir=/home/mcc/execution]
LTSmin run took 15 ms.
FORMULA TCPcondis-PT-05-LTLFireability-08 FALSE TECHNIQUES PARTIAL_ORDER EXPLICIT LTSMIN SAT_SMT
Running LTSmin : CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=1, -p, --pins-guards, --when, --ltl, []([]([]([]([]((LTLAP13==true)))))), --buchi-type=spotba], workingDir=/home/mcc/execution]
LTSmin run took 15 ms.
FORMULA TCPcondis-PT-05-LTLFireability-09 FALSE TECHNIQUES PARTIAL_ORDER EXPLICIT LTSMIN SAT_SMT
Running LTSmin : CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=1, -p, --pins-guards, --when, --ltl, (LTLAP12==true), --buchi-type=spotba], workingDir=/home/mcc/execution]
LTSmin run took 15 ms.
FORMULA TCPcondis-PT-05-LTLFireability-10 FALSE TECHNIQUES PARTIAL_ORDER EXPLICIT LTSMIN SAT_SMT
Running LTSmin : CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=1, -p, --pins-guards, --when, --ltl, []([](<>([]((LTLAP14==true))))), --buchi-type=spotba], workingDir=/home/mcc/execution]
LTSmin run took 17 ms.
FORMULA TCPcondis-PT-05-LTLFireability-11 FALSE TECHNIQUES PARTIAL_ORDER EXPLICIT LTSMIN SAT_SMT
Running LTSmin : CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=1, --when, --ltl, X(<>([](X([]((LTLAP15==true)))))), --buchi-type=spotba], workingDir=/home/mcc/execution]
LTSmin run took 15 ms.
FORMULA TCPcondis-PT-05-LTLFireability-12 FALSE TECHNIQUES PARTIAL_ORDER EXPLICIT LTSMIN SAT_SMT
Running LTSmin : CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=1, --when, --ltl, X(<>((LTLAP16==true))), --buchi-type=spotba], workingDir=/home/mcc/execution]
LTSmin run took 13 ms.
FORMULA TCPcondis-PT-05-LTLFireability-13 TRUE TECHNIQUES PARTIAL_ORDER EXPLICIT LTSMIN SAT_SMT
Running LTSmin : CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=1, -p, --pins-guards, --when, --ltl, <>(<>([](((LTLAP17==true))U((LTLAP18==true))))), --buchi-type=spotba], workingDir=/home/mcc/execution]
LTSmin run took 25 ms.
FORMULA TCPcondis-PT-05-LTLFireability-14 FALSE TECHNIQUES PARTIAL_ORDER EXPLICIT LTSMIN SAT_SMT
Running LTSmin : CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=1, --when, --ltl, X([]([]([]((LTLAP4==true))))), --buchi-type=spotba], workingDir=/home/mcc/execution]
LTSmin run took 31 ms.
FORMULA TCPcondis-PT-05-LTLFireability-15 FALSE TECHNIQUES PARTIAL_ORDER EXPLICIT LTSMIN SAT_SMT
ITS tools runner thread asked to quit. Dying gracefully.
BK_STOP 1527917946850
--------------------
content from stderr:
+ export BINDIR=/home/mcc/BenchKit/
+ BINDIR=/home/mcc/BenchKit/
++ pwd
+ export MODEL=/home/mcc/execution
+ MODEL=/home/mcc/execution
+ /home/mcc/BenchKit//runeclipse.sh /home/mcc/execution LTLFireability -its -ltsminpath /home/mcc/BenchKit//lts_install_dir/ -smt
+ ulimit -s 65536
+ [[ -z '' ]]
+ export LTSMIN_MEM_SIZE=8589934592
+ LTSMIN_MEM_SIZE=8589934592
+ /home/mcc/BenchKit//itstools/its-tools -consoleLog -data /home/mcc/execution/workspace -pnfolder /home/mcc/execution -examination LTLFireability -z3path /home/mcc/BenchKit//z3/bin/z3 -yices2path /home/mcc/BenchKit//yices/bin/yices -its -ltsminpath /home/mcc/BenchKit//lts_install_dir/ -smt -vmargs -Dosgi.locking=none -Declipse.stateSaveDelayInterval=-1 -Dosgi.configuration.area=/tmp/.eclipse -Xss8m -Xms40m -Xmx8192m -Dfile.encoding=UTF-8 -Dosgi.requiredJavaVersion=1.6
Jun 02, 2018 5:38:59 AM fr.lip6.move.gal.application.Application start
INFO: Running its-tools with arguments : [-pnfolder, /home/mcc/execution, -examination, LTLFireability, -z3path, /home/mcc/BenchKit//z3/bin/z3, -yices2path, /home/mcc/BenchKit//yices/bin/yices, -its, -ltsminpath, /home/mcc/BenchKit//lts_install_dir/, -smt]
Jun 02, 2018 5:38:59 AM fr.lip6.move.gal.application.MccTranslator transformPNML
INFO: Parsing pnml file : /home/mcc/execution/model.pnml
Jun 02, 2018 5:38:59 AM fr.lip6.move.gal.nupn.PTNetHandler startElement
WARNING: Skipping unknown tool specific annotation : Tina
Jun 02, 2018 5:38:59 AM fr.lip6.move.gal.nupn.PTNetHandler startElement
WARNING: Unknown XML tag in source file: size
Jun 02, 2018 5:38:59 AM fr.lip6.move.gal.nupn.PTNetHandler startElement
WARNING: Unknown XML tag in source file: color
Jun 02, 2018 5:38:59 AM fr.lip6.move.gal.nupn.PTNetReader loadFromXML
INFO: Load time of PNML (sax parser for PT used): 68 ms
Jun 02, 2018 5:38:59 AM fr.lip6.move.gal.pnml.togal.PTGALTransformer handlePage
INFO: Transformed 30 places.
Jun 02, 2018 5:38:59 AM fr.lip6.move.gal.pnml.togal.PTGALTransformer handlePage
INFO: Transformed 32 transitions.
Jun 02, 2018 5:38:59 AM fr.lip6.move.serialization.SerializationUtil systemToFile
INFO: Time to serialize gal into /home/mcc/execution/model.pnml.img.gal : 13 ms
Jun 02, 2018 5:39:00 AM fr.lip6.move.gal.instantiate.GALRewriter flatten
INFO: Flatten gal took : 55 ms
Jun 02, 2018 5:39:00 AM fr.lip6.move.serialization.SerializationUtil systemToFile
INFO: Time to serialize gal into /home/mcc/execution/LTLFireability.pnml.gal : 3 ms
Jun 02, 2018 5:39:00 AM fr.lip6.move.serialization.SerializationUtil serializePropertiesForITSLTLTools
INFO: Time to serialize properties into /home/mcc/execution/LTLFireability.ltl : 2 ms
Jun 02, 2018 5:39:00 AM fr.lip6.move.gal.semantics.DeterministicNextBuilder getDeterministicNext
INFO: Input system was already deterministic with 32 transitions.
Jun 02, 2018 5:39:00 AM fr.lip6.move.gal.gal2smt.bmc.KInductionSolver computeAndDeclareInvariants
INFO: Computed 9 place invariants in 18 ms
Jun 02, 2018 5:39:00 AM fr.lip6.move.gal.gal2smt.bmc.KInductionSolver init
INFO: Proved 30 variables to be positive in 116 ms
Jun 02, 2018 5:39:00 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver computeAblingMatrix
INFO: Computing symmetric may disable matrix : 32 transitions.
Jun 02, 2018 5:39:00 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of disable matrix completed :0/32 took 0 ms. Total solver calls (SAT/UNSAT): 0(0/0)
Jun 02, 2018 5:39:00 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of Complete disable matrix. took 2 ms. Total solver calls (SAT/UNSAT): 0(0/0)
Jun 02, 2018 5:39:00 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver computeAblingMatrix
INFO: Computing symmetric may enable matrix : 32 transitions.
Jun 02, 2018 5:39:00 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of Complete enable matrix. took 1 ms. Total solver calls (SAT/UNSAT): 0(0/0)
Jun 02, 2018 5:39:01 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver computeCoEnablingMatrix
INFO: Computing symmetric co enabling matrix : 32 transitions.
Jun 02, 2018 5:39:02 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of Finished co-enabling matrix. took 1256 ms. Total solver calls (SAT/UNSAT): 343(343/0)
Jun 02, 2018 5:39:02 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver computeDoNotAccord
INFO: Computing Do-Not-Accords matrix : 32 transitions.
Jun 02, 2018 5:39:03 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of Completed DNA matrix. took 773 ms. Total solver calls (SAT/UNSAT): 114(0/114)
Jun 02, 2018 5:39:03 AM fr.lip6.move.gal.gal2pins.Gal2PinsTransformerNext transform
INFO: Built C files in 3173ms conformant to PINS in folder :/home/mcc/execution
Sequence of Actions to be Executed by the VM
This is useful if one wants to reexecute the tool in the VM from the submitted image disk.
set -x
# this is for BenchKit: configuration of major elements for the test
export BK_INPUT="TCPcondis-PT-05"
export BK_EXAMINATION="LTLFireability"
export BK_TOOL="itstools"
export BK_RESULT_DIR="/tmp/BK_RESULTS/OUTPUTS"
export BK_TIME_CONFINEMENT="3600"
export BK_MEMORY_CONFINEMENT="16384"
# this is specific to your benchmark or test
export BIN_DIR="$HOME/BenchKit/bin"
# remove the execution directoty if it exists (to avoid increse of .vmdk images)
if [ -d execution ] ; then
rm -rf execution
fi
tar xzf /home/mcc/BenchKit/INPUTS/TCPcondis-PT-05.tgz
mv TCPcondis-PT-05 execution
cd execution
pwd
ls -lh
# this is for BenchKit: explicit launching of the test
echo "====================================================================="
echo " Generated by BenchKit 2-3637"
echo " Executing tool itstools"
echo " Input is TCPcondis-PT-05, examination is LTLFireability"
echo " Time confinement is $BK_TIME_CONFINEMENT seconds"
echo " Memory confinement is 16384 MBytes"
echo " Number of cores is 4"
echo " Run identifier is r212-smll-152732263600670"
echo "====================================================================="
echo
echo "--------------------"
echo "content from stdout:"
echo
echo "=== Data for post analysis generated by BenchKit (invocation template)"
echo
if [ "LTLFireability" = "UpperBounds" ] ; then
echo "The expected result is a vector of positive values"
echo NUM_VECTOR
elif [ "LTLFireability" != "StateSpace" ] ; then
echo "The expected result is a vector of booleans"
echo BOOL_VECTOR
else
echo "no data necessary for post analysis"
fi
echo
if [ -f "LTLFireability.txt" ] ; then
echo "here is the order used to build the result vector(from text file)"
for x in $(grep Property LTLFireability.txt | cut -d ' ' -f 2 | sort -u) ; do
echo "FORMULA_NAME $x"
done
elif [ -f "LTLFireability.xml" ] ; then # for cunf (txt files deleted;-)
echo echo "here is the order used to build the result vector(from xml file)"
for x in $(grep '
echo "FORMULA_NAME $x"
done
fi
echo
echo "=== Now, execution of the tool begins"
echo
echo -n "BK_START "
date -u +%s%3N
echo
timeout -s 9 $BK_TIME_CONFINEMENT bash -c "/home/mcc/BenchKit/BenchKit_head.sh 2> STDERR ; echo ; echo -n \"BK_STOP \" ; date -u +%s%3N"
if [ $? -eq 137 ] ; then
echo
echo "BK_TIME_CONFINEMENT_REACHED"
fi
echo
echo "--------------------"
echo "content from stderr:"
echo
cat STDERR ;