Execution Chart

We display below the execution chart for this examination (boot time has been removed).

Trace from the execution

Waiting for the VM to be ready (probing ssh)
....................
/home/mcc/execution
total 804K
-rw-r--r-- 1 mcc users 6.2K May 15 18:54 CTLCardinality.txt
-rw-r--r-- 1 mcc users 28K May 15 18:54 CTLCardinality.xml
-rw-r--r-- 1 mcc users 16K May 15 18:54 CTLFireability.txt
-rw-r--r-- 1 mcc users 62K May 15 18:54 CTLFireability.xml
-rw-r--r-- 1 mcc users 4.0K May 15 18:50 GenericPropertiesDefinition.xml
-rw-r--r-- 1 mcc users 6.0K May 15 18:50 GenericPropertiesVerdict.xml
-rw-r--r-- 1 mcc users 3.3K May 26 09:27 LTLCardinality.txt
-rw-r--r-- 1 mcc users 14K May 26 09:27 LTLCardinality.xml
-rw-r--r-- 1 mcc users 4.7K May 26 09:27 LTLFireability.txt
-rw-r--r-- 1 mcc users 19K May 26 09:27 LTLFireability.xml
-rw-r--r-- 1 mcc users 7.7K May 15 18:54 ReachabilityCardinality.txt
-rw-r--r-- 1 mcc users 32K May 15 18:54 ReachabilityCardinality.xml
-rw-r--r-- 1 mcc users 104 May 15 18:54 ReachabilityDeadlock.txt
-rw-r--r-- 1 mcc users 342 May 15 18:54 ReachabilityDeadlock.xml
-rw-r--r-- 1 mcc users 22K May 15 18:54 ReachabilityFireability.txt
-rw-r--r-- 1 mcc users 83K May 15 18:54 ReachabilityFireability.xml
-rw-r--r-- 1 mcc users 2.5K May 15 18:54 UpperBounds.txt
-rw-r--r-- 1 mcc users 5.7K May 15 18:54 UpperBounds.xml
-rw-r--r-- 1 mcc users 5 May 15 18:50 equiv_col
-rw-r--r-- 1 mcc users 3 May 15 18:50 instance
-rw-r--r-- 1 mcc users 6 May 15 18:50 iscolored
-rw-r--r-- 1 mcc users 448K May 15 18:50 model.pnml
=====================================================================
Generated by BenchKit 2-3637
Executing tool itstools
Input is SafeBus-PT-06, examination is LTLFireability
Time confinement is 3600 seconds
Memory confinement is 16384 MBytes
Number of cores is 4
Run identifier is r212-smll-152732263400532
=====================================================================

--------------------
content from stdout:

=== Data for post analysis generated by BenchKit (invocation template)

The expected result is a vector of booleans
BOOL_VECTOR

here is the order used to build the result vector(from text file)
FORMULA_NAME SafeBus-PT-06-LTLFireability-00
FORMULA_NAME SafeBus-PT-06-LTLFireability-01
FORMULA_NAME SafeBus-PT-06-LTLFireability-02
FORMULA_NAME SafeBus-PT-06-LTLFireability-03
FORMULA_NAME SafeBus-PT-06-LTLFireability-04
FORMULA_NAME SafeBus-PT-06-LTLFireability-05
FORMULA_NAME SafeBus-PT-06-LTLFireability-06
FORMULA_NAME SafeBus-PT-06-LTLFireability-07
FORMULA_NAME SafeBus-PT-06-LTLFireability-08
FORMULA_NAME SafeBus-PT-06-LTLFireability-09
FORMULA_NAME SafeBus-PT-06-LTLFireability-10
FORMULA_NAME SafeBus-PT-06-LTLFireability-11
FORMULA_NAME SafeBus-PT-06-LTLFireability-12
FORMULA_NAME SafeBus-PT-06-LTLFireability-13
FORMULA_NAME SafeBus-PT-06-LTLFireability-14
FORMULA_NAME SafeBus-PT-06-LTLFireability-15

=== Now, execution of the tool begins

BK_START 1527839603627

Using solver Z3 to compute partial order matrices.
Built C files in :
/home/mcc/execution
Invoking ITS tools like this :CommandLine [args=[/home/mcc/BenchKit/itstools/plugins/fr.lip6.move.gal.itstools.binaries_1.0.0.201805151631/bin/its-ltl-linux64, --gc-threshold, 2000000, -i, /home/mcc/execution/LTLFireability.pnml.gal, -t, CGAL, -LTL, /home/mcc/execution/LTLFireability.ltl, -c, -stutter-deadlock], workingDir=/home/mcc/execution]

its-ltl command run as :

/home/mcc/BenchKit/itstools/plugins/fr.lip6.move.gal.itstools.binaries_1.0.0.201805151631/bin/its-ltl-linux64 --gc-threshold 2000000 -i /home/mcc/execution/LTLFireability.pnml.gal -t CGAL -LTL /home/mcc/execution/LTLFireability.ltl -c -stutter-deadlock
Read 16 LTL properties
Checking formula 0 : !((X(F(("(((((((RMC_1>=1)&&(wait_cable_1>=1))||((RMC_2>=1)&&(wait_cable_2>=1)))||((RMC_3>=1)&&(wait_cable_3>=1)))||((RMC_4>=1)&&(wait_cable_4>=1)))||((RMC_5>=1)&&(wait_cable_5>=1)))||((RMC_6>=1)&&(wait_cable_6>=1)))")U("(((((((cable_used_1>=1)&&(FMC_1>=1))||((cable_used_2>=1)&&(FMC_2>=1)))||((cable_used_3>=1)&&(FMC_3>=1)))||((cable_used_4>=1)&&(FMC_4>=1)))||((cable_used_5>=1)&&(FMC_5>=1)))||((cable_used_6>=1)&&(FMC_6>=1)))")))))
Formula 0 simplified : !XF("(((((((RMC_1>=1)&&(wait_cable_1>=1))||((RMC_2>=1)&&(wait_cable_2>=1)))||((RMC_3>=1)&&(wait_cable_3>=1)))||((RMC_4>=1)&&(wait_cable_4>=1)))||((RMC_5>=1)&&(wait_cable_5>=1)))||((RMC_6>=1)&&(wait_cable_6>=1)))" U "(((((((cable_used_1>=1)&&(FMC_1>=1))||((cable_used_2>=1)&&(FMC_2>=1)))||((cable_used_3>=1)&&(FMC_3>=1)))||((cable_used_4>=1)&&(FMC_4>=1)))||((cable_used_5>=1)&&(FMC_5>=1)))||((cable_used_6>=1)&&(FMC_6>=1)))")
Presburger conditions satisfied. Using coverability to approximate state space in K-Induction.
Normalized transition count is 242
// Phase 1: matrix 242 rows 138 cols
invariant :Cpt1_1 + Cpt1_2 + Cpt1_3 + Cpt1_4 + Cpt1_5 + Cpt1_6 = 1
invariant :Cpt2_2 + AMC_1_1 + AMC_2_1 + AMC_3_1 + AMC_4_1 + AMC_5_1 + AMC_6_1 + -1'AMC_1_2 + -1'AMC_2_2 + -1'AMC_3_2 + -1'AMC_4_2 + -1'AMC_5_2 + -1'AMC_6_2 + -1'Cpt1_2 = 0
invariant :Cpt2_4 + AMC_1_3 + AMC_2_3 + AMC_3_3 + AMC_4_3 + AMC_5_3 + AMC_6_3 + -1'AMC_1_4 + -1'AMC_2_4 + -1'AMC_3_4 + -1'AMC_4_4 + -1'AMC_5_4 + -1'AMC_6_4 + -1'Cpt1_4 = 0
invariant :AMC_3_1 + AMC_3_2 + AMC_3_3 + AMC_3_4 + AMC_3_5 + AMC_3_6 + RMC_3 + PMC_3 + -1'wait_cable_3 = 0
invariant :wait_ack_5_1 + wait_ack_5_2 + wait_ack_5_3 + wait_ack_5_4 + wait_ack_5_6 + AMC_5_1 + AMC_5_2 + AMC_5_3 + AMC_5_4 + AMC_5_5 + AMC_5_6 + RMC_5 + PMC_5 + listen_5 + wait_msg_5 + loop_em_5 = 1
invariant :-1'wait_ack_1_2 + -1'wait_ack_1_3 + -1'wait_ack_1_4 + -1'wait_ack_1_5 + -1'wait_ack_1_6 + cable_used_1 + -1'FMC_1 + -1'PMC_1 = 0
invariant :AMC_2_1 + AMC_2_2 + AMC_2_3 + AMC_2_4 + AMC_2_5 + AMC_2_6 + RMC_2 + PMC_2 + -1'wait_cable_2 = 0
invariant :wait_ack_2_1 + wait_ack_2_3 + wait_ack_2_4 + wait_ack_2_5 + wait_ack_2_6 + listen_2 + wait_cable_2 + wait_msg_2 + loop_em_2 = 1
invariant :-1'wait_ack_6_1 + -1'wait_ack_6_2 + -1'wait_ack_6_3 + -1'wait_ack_6_4 + -1'wait_ack_6_5 + cable_used_6 + -1'FMC_6 + -1'PMC_6 = 0
invariant :wait_ack_4_1 + wait_ack_4_2 + wait_ack_4_3 + wait_ack_4_5 + wait_ack_4_6 + AMC_4_1 + AMC_4_2 + AMC_4_3 + AMC_4_4 + AMC_4_5 + AMC_4_6 + RMC_4 + PMC_4 + listen_4 + wait_msg_4 + loop_em_4 = 1
invariant :wait_ack_5_1 + wait_ack_5_2 + wait_ack_5_3 + wait_ack_5_4 + wait_ack_5_6 + listen_5 + wait_cable_5 + wait_msg_5 + loop_em_5 = 1
invariant :wait_ack_2_1 + wait_ack_3_1 + wait_ack_4_1 + wait_ack_5_1 + wait_ack_6_1 + wait_ack_1_2 + wait_ack_3_2 + wait_ack_4_2 + wait_ack_5_2 + wait_ack_6_2 + wait_ack_1_3 + wait_ack_2_3 + wait_ack_4_3 + wait_ack_5_3 + wait_ack_6_3 + wait_ack_1_4 + wait_ack_2_4 + wait_ack_3_4 + wait_ack_5_4 + wait_ack_6_4 + wait_ack_1_5 + wait_ack_2_5 + wait_ack_3_5 + wait_ack_4_5 + wait_ack_6_5 + wait_ack_1_6 + wait_ack_2_6 + wait_ack_3_6 + wait_ack_4_6 + wait_ack_5_6 + -1'AMC_3_1 + -1'AMC_3_2 + -1'AMC_3_3 + -1'AMC_3_4 + -1'AMC_3_5 + -1'AMC_3_6 + -1'RMC_3 + FMC_1 + FMC_2 + FMC_3 + FMC_4 + FMC_5 + FMC_6 + cable_free + PMC_1 + PMC_2 + PMC_4 + PMC_5 + PMC_6 + wait_cable_3 = 1
invariant :-1'wait_ack_2_1 + -1'wait_ack_2_3 + -1'wait_ack_2_4 + -1'wait_ack_2_5 + -1'wait_ack_2_6 + cable_used_2 + -1'FMC_2 + -1'PMC_2 = 0
invariant :wait_ack_3_1 + wait_ack_3_2 + wait_ack_3_4 + wait_ack_3_5 + wait_ack_3_6 + listen_3 + wait_cable_3 + wait_msg_3 + loop_em_3 = 1
invariant :-1'wait_ack_4_1 + -1'wait_ack_4_2 + -1'wait_ack_4_3 + -1'wait_ack_4_5 + -1'wait_ack_4_6 + cable_used_4 + -1'FMC_4 + -1'PMC_4 = 0
invariant :FMCb + FMC_1 + FMC_2 + FMC_3 + FMC_4 + FMC_5 + FMC_6 = 1
invariant :wait_ack_1_2 + wait_ack_1_3 + wait_ack_1_4 + wait_ack_1_5 + wait_ack_1_6 + listen_1 + wait_cable_1 + wait_msg_1 + loop_em_1 = 1
invariant :Cpt2_6 + AMC_1_5 + AMC_2_5 + AMC_3_5 + AMC_4_5 + AMC_5_5 + AMC_6_5 + -1'AMC_1_6 + -1'AMC_2_6 + -1'AMC_3_6 + -1'AMC_4_6 + -1'AMC_5_6 + -1'AMC_6_6 + -1'Cpt1_6 = 0
invariant :AMC_6_1 + AMC_6_2 + AMC_6_3 + AMC_6_4 + AMC_6_5 + AMC_6_6 + RMC_6 + PMC_6 + -1'wait_cable_6 = 0
invariant :wait_ack_6_1 + wait_ack_6_2 + wait_ack_6_3 + wait_ack_6_4 + wait_ack_6_5 + listen_6 + wait_cable_6 + wait_msg_6 + loop_em_6 = 1
invariant :AMC_1_1 + AMC_1_2 + AMC_1_3 + AMC_1_4 + AMC_1_5 + AMC_1_6 + RMC_1 + PMC_1 + -1'wait_cable_1 = 0
invariant :Cpt2_5 + AMC_1_4 + AMC_2_4 + AMC_3_4 + AMC_4_4 + AMC_5_4 + AMC_6_4 + -1'AMC_1_5 + -1'AMC_2_5 + -1'AMC_3_5 + -1'AMC_4_5 + -1'AMC_5_5 + -1'AMC_6_5 + -1'Cpt1_5 = 0
invariant :-1'wait_ack_3_1 + -1'wait_ack_3_2 + -1'wait_ack_3_4 + -1'wait_ack_3_5 + -1'wait_ack_3_6 + AMC_3_1 + AMC_3_2 + AMC_3_3 + AMC_3_4 + AMC_3_5 + AMC_3_6 + cable_used_3 + RMC_3 + -1'FMC_3 + -1'wait_cable_3 = 0
invariant :ACK + T_out + -1'wait_ack_2_1 + -1'wait_ack_3_1 + -1'wait_ack_4_1 + -1'wait_ack_5_1 + -1'wait_ack_6_1 + -1'wait_ack_1_2 + -1'wait_ack_3_2 + -1'wait_ack_4_2 + -1'wait_ack_5_2 + -1'wait_ack_6_2 + -1'wait_ack_1_3 + -1'wait_ack_2_3 + -1'wait_ack_4_3 + -1'wait_ack_5_3 + -1'wait_ack_6_3 + -1'wait_ack_1_4 + -1'wait_ack_2_4 + -1'wait_ack_3_4 + -1'wait_ack_5_4 + -1'wait_ack_6_4 + -1'wait_ack_1_5 + -1'wait_ack_2_5 + -1'wait_ack_3_5 + -1'wait_ack_4_5 + -1'wait_ack_6_5 + -1'wait_ack_1_6 + -1'wait_ack_2_6 + -1'wait_ack_3_6 + -1'wait_ack_4_6 + -1'wait_ack_5_6 + MSG_1 + MSG_2 + MSG_3 + MSG_4 + MSG_5 + MSG_6 = 0
invariant :Cpt2_1 + -1'AMC_1_1 + -1'AMC_2_1 + -1'AMC_3_1 + -1'AMC_4_1 + -1'AMC_5_1 + -1'AMC_6_1 + AMC_1_6 + AMC_2_6 + AMC_3_6 + AMC_4_6 + AMC_5_6 + AMC_6_6 + -1'Cpt1_1 = 0
invariant :wait_ack_4_1 + wait_ack_4_2 + wait_ack_4_3 + wait_ack_4_5 + wait_ack_4_6 + listen_4 + wait_cable_4 + wait_msg_4 + loop_em_4 = 1
invariant :Cpt2_3 + AMC_1_2 + AMC_2_2 + AMC_3_2 + AMC_4_2 + AMC_5_2 + AMC_6_2 + -1'AMC_1_3 + -1'AMC_2_3 + -1'AMC_3_3 + -1'AMC_4_3 + -1'AMC_5_3 + -1'AMC_6_3 + Cpt1_1 + Cpt1_2 + Cpt1_4 + Cpt1_5 + Cpt1_6 = 1
invariant :R_tout + S_tout = 1
invariant :-1'wait_ack_5_1 + -1'wait_ack_5_2 + -1'wait_ack_5_3 + -1'wait_ack_5_4 + -1'wait_ack_5_6 + cable_used_5 + -1'FMC_5 + -1'PMC_5 = 0
Running compilation step : CommandLine [args=[gcc, -c, -I/home/mcc/BenchKit//lts_install_dir//include, -I., -std=c99, -fPIC, -O3, model.c], workingDir=/home/mcc/execution]
Compilation finished in 7020 ms.
Running link step : CommandLine [args=[gcc, -shared, -o, gal.so, model.o], workingDir=/home/mcc/execution]
Link finished in 49 ms.
Running LTSmin : CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=1, --when, --ltl, X(<>(((LTLAP0==true))U((LTLAP1==true)))), --buchi-type=spotba], workingDir=/home/mcc/execution]
LTSmin run took 48996 ms.
FORMULA SafeBus-PT-06-LTLFireability-00 TRUE TECHNIQUES PARTIAL_ORDER EXPLICIT LTSMIN SAT_SMT
Running LTSmin : CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=1, --when, --ltl, []((<>(<>((LTLAP2==true))))U([](X((LTLAP3==true))))), --buchi-type=spotba], workingDir=/home/mcc/execution]
LTSmin run took 51 ms.
FORMULA SafeBus-PT-06-LTLFireability-01 FALSE TECHNIQUES PARTIAL_ORDER EXPLICIT LTSMIN SAT_SMT
Running LTSmin : CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=1, --when, --ltl, (X((LTLAP4==true)))U([](<>((LTLAP5==true)))), --buchi-type=spotba], workingDir=/home/mcc/execution]
LTSmin run took 69 ms.
FORMULA SafeBus-PT-06-LTLFireability-02 FALSE TECHNIQUES PARTIAL_ORDER EXPLICIT LTSMIN SAT_SMT
Running LTSmin : CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=1, --when, --ltl, (X((LTLAP6==true)))U((LTLAP7==true)), --buchi-type=spotba], workingDir=/home/mcc/execution]
LTSmin run took 35 ms.
FORMULA SafeBus-PT-06-LTLFireability-03 FALSE TECHNIQUES PARTIAL_ORDER EXPLICIT LTSMIN SAT_SMT
Running LTSmin : CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=1, --when, --ltl, X(((LTLAP1==true))U(X(X((LTLAP6==true))))), --buchi-type=spotba], workingDir=/home/mcc/execution]
LTSmin run took 37 ms.
FORMULA SafeBus-PT-06-LTLFireability-04 FALSE TECHNIQUES PARTIAL_ORDER EXPLICIT LTSMIN SAT_SMT
Running LTSmin : CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=1, --when, --ltl, X([]((<>((LTLAP4==true)))U(X((LTLAP0==true))))), --buchi-type=spotba], workingDir=/home/mcc/execution]
LTSmin run took 45 ms.
FORMULA SafeBus-PT-06-LTLFireability-05 FALSE TECHNIQUES PARTIAL_ORDER EXPLICIT LTSMIN SAT_SMT
Running LTSmin : CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=1, -p, --pins-guards, --when, --ltl, (LTLAP7==true), --buchi-type=spotba], workingDir=/home/mcc/execution]
LTSmin run took 215 ms.
FORMULA SafeBus-PT-06-LTLFireability-06 FALSE TECHNIQUES PARTIAL_ORDER EXPLICIT LTSMIN SAT_SMT
Running LTSmin : CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=1, -p, --pins-guards, --when, --ltl, []([]((LTLAP8==true))), --buchi-type=spotba], workingDir=/home/mcc/execution]
LTSmin run took 215 ms.
FORMULA SafeBus-PT-06-LTLFireability-07 FALSE TECHNIQUES PARTIAL_ORDER EXPLICIT LTSMIN SAT_SMT
Running LTSmin : CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=1, --when, --ltl, X(<>([]([]([]((LTLAP9==true)))))), --buchi-type=spotba], workingDir=/home/mcc/execution]
LTSmin run took 30 ms.
FORMULA SafeBus-PT-06-LTLFireability-08 FALSE TECHNIQUES PARTIAL_ORDER EXPLICIT LTSMIN SAT_SMT
Running LTSmin : CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=1, --when, --ltl, ([](X([]((LTLAP10==true)))))U(<>((LTLAP11==true))), --buchi-type=spotba], workingDir=/home/mcc/execution]
LTSmin run took 33 ms.
FORMULA SafeBus-PT-06-LTLFireability-09 FALSE TECHNIQUES PARTIAL_ORDER EXPLICIT LTSMIN SAT_SMT
Running LTSmin : CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=1, --when, --ltl, <>(X((LTLAP12==true))), --buchi-type=spotba], workingDir=/home/mcc/execution]
LTSmin run took 35 ms.
FORMULA SafeBus-PT-06-LTLFireability-10 FALSE TECHNIQUES PARTIAL_ORDER EXPLICIT LTSMIN SAT_SMT
Running LTSmin : CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=1, --when, --ltl, ((LTLAP13==true))U(X(((LTLAP14==true))U((LTLAP15==true)))), --buchi-type=spotba], workingDir=/home/mcc/execution]
LTSmin run took 33 ms.
FORMULA SafeBus-PT-06-LTLFireability-11 FALSE TECHNIQUES PARTIAL_ORDER EXPLICIT LTSMIN SAT_SMT
Running LTSmin : CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=1, --when, --ltl, ([]((LTLAP16==true)))U([](X(X((LTLAP17==true))))), --buchi-type=spotba], workingDir=/home/mcc/execution]
LTSmin run took 33 ms.
FORMULA SafeBus-PT-06-LTLFireability-12 FALSE TECHNIQUES PARTIAL_ORDER EXPLICIT LTSMIN SAT_SMT
Running LTSmin : CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=1, --when, --ltl, X([]([]([]([]((LTLAP18==true)))))), --buchi-type=spotba], workingDir=/home/mcc/execution]
LTSmin run took 35 ms.
FORMULA SafeBus-PT-06-LTLFireability-13 FALSE TECHNIQUES PARTIAL_ORDER EXPLICIT LTSMIN SAT_SMT
Running LTSmin : CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=1, -p, --pins-guards, --when, --ltl, <>((LTLAP19==true)), --buchi-type=spotba], workingDir=/home/mcc/execution]
LTSmin run took 212 ms.
FORMULA SafeBus-PT-06-LTLFireability-14 FALSE TECHNIQUES PARTIAL_ORDER EXPLICIT LTSMIN SAT_SMT
Running LTSmin : CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=1, -p, --pins-guards, --when, --ltl, []((LTLAP20==true)), --buchi-type=spotba], workingDir=/home/mcc/execution]
LTSmin run took 232 ms.
FORMULA SafeBus-PT-06-LTLFireability-15 FALSE TECHNIQUES PARTIAL_ORDER EXPLICIT LTSMIN SAT_SMT
ITS tools runner thread asked to quit. Dying gracefully.

BK_STOP 1527839860993

--------------------
content from stderr:

+ export BINDIR=/home/mcc/BenchKit/
+ BINDIR=/home/mcc/BenchKit/
++ pwd
+ export MODEL=/home/mcc/execution
+ MODEL=/home/mcc/execution
+ /home/mcc/BenchKit//runeclipse.sh /home/mcc/execution LTLFireability -its -ltsminpath /home/mcc/BenchKit//lts_install_dir/ -smt
+ ulimit -s 65536
+ [[ -z '' ]]
+ export LTSMIN_MEM_SIZE=8589934592
+ LTSMIN_MEM_SIZE=8589934592
+ /home/mcc/BenchKit//itstools/its-tools -consoleLog -data /home/mcc/execution/workspace -pnfolder /home/mcc/execution -examination LTLFireability -z3path /home/mcc/BenchKit//z3/bin/z3 -yices2path /home/mcc/BenchKit//yices/bin/yices -its -ltsminpath /home/mcc/BenchKit//lts_install_dir/ -smt -vmargs -Dosgi.locking=none -Declipse.stateSaveDelayInterval=-1 -Dosgi.configuration.area=/tmp/.eclipse -Xss8m -Xms40m -Xmx8192m -Dfile.encoding=UTF-8 -Dosgi.requiredJavaVersion=1.6
Jun 01, 2018 7:53:26 AM fr.lip6.move.gal.application.Application start
INFO: Running its-tools with arguments : [-pnfolder, /home/mcc/execution, -examination, LTLFireability, -z3path, /home/mcc/BenchKit//z3/bin/z3, -yices2path, /home/mcc/BenchKit//yices/bin/yices, -its, -ltsminpath, /home/mcc/BenchKit//lts_install_dir/, -smt]
Jun 01, 2018 7:53:26 AM fr.lip6.move.gal.application.MccTranslator transformPNML
INFO: Parsing pnml file : /home/mcc/execution/model.pnml
Jun 01, 2018 7:53:26 AM fr.lip6.move.gal.nupn.PTNetReader loadFromXML
INFO: Load time of PNML (sax parser for PT used): 144 ms
Jun 01, 2018 7:53:26 AM fr.lip6.move.gal.pnml.togal.PTGALTransformer handlePage
INFO: Transformed 144 places.
Jun 01, 2018 7:53:26 AM fr.lip6.move.gal.pnml.togal.PTGALTransformer handlePage
INFO: Transformed 451 transitions.
Jun 01, 2018 7:53:26 AM fr.lip6.move.serialization.SerializationUtil systemToFile
INFO: Time to serialize gal into /home/mcc/execution/model.pnml.img.gal : 37 ms
Jun 01, 2018 7:53:26 AM fr.lip6.move.gal.instantiate.DomainAnalyzer computeVariableDomains
INFO: Found a total of 6 fixed domain variables (out of 144 variables) in GAL type SafeBus_PT_06
Jun 01, 2018 7:53:26 AM fr.lip6.move.gal.instantiate.Simplifier printConstantVars
INFO: Found a total of 6 constant array cells/variables (out of 144 variables) in type SafeBus_PT_06
Jun 01, 2018 7:53:26 AM fr.lip6.move.gal.instantiate.Simplifier printConstantVars
INFO: msgl_2,msgl_4,msgl_3,msgl_5,msgl_1,msgl_6,
Jun 01, 2018 7:53:26 AM fr.lip6.move.gal.instantiate.Simplifier simplifyConstantVariables
INFO: Removed 6 constant variables :msgl_2=1, msgl_4=1, msgl_3=1, msgl_5=1, msgl_1=1, msgl_6=1
Jun 01, 2018 7:53:26 AM fr.lip6.move.gal.instantiate.Simplifier simplifyConstantVariables
INFO: Simplified 32 expressions due to constant valuations.
Jun 01, 2018 7:53:27 AM fr.lip6.move.gal.instantiate.GALRewriter flatten
INFO: Flatten gal took : 248 ms
Jun 01, 2018 7:53:27 AM fr.lip6.move.serialization.SerializationUtil systemToFile
INFO: Time to serialize gal into /home/mcc/execution/LTLFireability.pnml.gal : 7 ms
Jun 01, 2018 7:53:27 AM fr.lip6.move.serialization.SerializationUtil serializePropertiesForITSLTLTools
INFO: Time to serialize properties into /home/mcc/execution/LTLFireability.ltl : 6 ms
Jun 01, 2018 7:53:27 AM fr.lip6.move.gal.semantics.DeterministicNextBuilder getDeterministicNext
INFO: Input system was already deterministic with 451 transitions.
Jun 01, 2018 7:53:27 AM fr.lip6.move.gal.gal2smt.bmc.KInductionSolver computeAndDeclareInvariants
INFO: Computed 29 place invariants in 92 ms
Jun 01, 2018 7:53:28 AM fr.lip6.move.gal.gal2smt.bmc.KInductionSolver init
INFO: Proved 138 variables to be positive in 550 ms
Jun 01, 2018 7:53:28 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver computeAblingMatrix
INFO: Computing symmetric may disable matrix : 451 transitions.
Jun 01, 2018 7:53:28 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of disable matrix completed :0/451 took 1 ms. Total solver calls (SAT/UNSAT): 0(0/0)
Jun 01, 2018 7:53:28 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of Complete disable matrix. took 74 ms. Total solver calls (SAT/UNSAT): 0(0/0)
Jun 01, 2018 7:53:28 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver computeAblingMatrix
INFO: Computing symmetric may enable matrix : 451 transitions.
Jun 01, 2018 7:53:28 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of Complete enable matrix. took 39 ms. Total solver calls (SAT/UNSAT): 0(0/0)
Jun 01, 2018 7:53:36 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver computeCoEnablingMatrix
INFO: Computing symmetric co enabling matrix : 451 transitions.
Jun 01, 2018 7:53:37 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(0/451) took 94 ms. Total solver calls (SAT/UNSAT): 84(78/6)
Jun 01, 2018 7:53:40 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(3/451) took 3430 ms. Total solver calls (SAT/UNSAT): 815(683/132)
Jun 01, 2018 7:53:43 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(7/451) took 6430 ms. Total solver calls (SAT/UNSAT): 1766(1481/285)
Jun 01, 2018 7:53:46 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(14/451) took 9491 ms. Total solver calls (SAT/UNSAT): 3461(2821/640)
Jun 01, 2018 7:53:51 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(18/451) took 14179 ms. Total solver calls (SAT/UNSAT): 4338(3594/744)
Jun 01, 2018 7:53:54 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(23/451) took 17202 ms. Total solver calls (SAT/UNSAT): 5442(4531/911)
Jun 01, 2018 7:53:57 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(28/451) took 21030 ms. Total solver calls (SAT/UNSAT): 6521(5447/1074)
Jun 01, 2018 7:54:01 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(34/451) took 24279 ms. Total solver calls (SAT/UNSAT): 8325(6889/1436)
Jun 01, 2018 7:54:07 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(39/451) took 30821 ms. Total solver calls (SAT/UNSAT): 9960(8282/1678)
Jun 01, 2018 7:54:11 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(44/451) took 34117 ms. Total solver calls (SAT/UNSAT): 11567(9709/1858)
Jun 01, 2018 7:54:14 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(45/451) took 37368 ms. Total solver calls (SAT/UNSAT): 11901(9945/1956)
Jun 01, 2018 7:54:20 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(51/451) took 43635 ms. Total solver calls (SAT/UNSAT): 13807(11543/2264)
Jun 01, 2018 7:54:24 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(57/451) took 47851 ms. Total solver calls (SAT/UNSAT): 15669(12857/2812)
Jun 01, 2018 7:54:28 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(64/451) took 51453 ms. Total solver calls (SAT/UNSAT): 17800(14375/3425)
Jun 01, 2018 7:54:31 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(69/451) took 54467 ms. Total solver calls (SAT/UNSAT): 19388(15727/3661)
Jun 01, 2018 7:54:35 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(75/451) took 58587 ms. Total solver calls (SAT/UNSAT): 21346(17389/3957)
Jun 01, 2018 7:54:40 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(81/451) took 63220 ms. Total solver calls (SAT/UNSAT): 23275(19052/4223)
Jun 01, 2018 7:54:46 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(87/451) took 69642 ms. Total solver calls (SAT/UNSAT): 25169(20656/4513)
Jun 01, 2018 7:54:50 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(93/451) took 73923 ms. Total solver calls (SAT/UNSAT): 27019(21976/5043)
Jun 01, 2018 7:54:54 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(100/451) took 77287 ms. Total solver calls (SAT/UNSAT): 29132(23500/5632)
Jun 01, 2018 7:54:57 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(106/451) took 80470 ms. Total solver calls (SAT/UNSAT): 30899(24983/5916)
Jun 01, 2018 7:55:02 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(111/451) took 85430 ms. Total solver calls (SAT/UNSAT): 32348(26214/6134)
Jun 01, 2018 7:55:06 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(117/451) took 89864 ms. Total solver calls (SAT/UNSAT): 34061(27673/6388)
Jun 01, 2018 7:55:13 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(123/451) took 96332 ms. Total solver calls (SAT/UNSAT): 35739(29079/6660)
Jun 01, 2018 7:55:16 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(129/451) took 99938 ms. Total solver calls (SAT/UNSAT): 37373(30231/7142)
Jun 01, 2018 7:55:20 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(138/451) took 103197 ms. Total solver calls (SAT/UNSAT): 39748(31999/7749)
Jun 01, 2018 7:55:24 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(147/451) took 107075 ms. Total solver calls (SAT/UNSAT): 41742(33593/8149)
Jun 01, 2018 7:55:27 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(153/451) took 111007 ms. Total solver calls (SAT/UNSAT): 43035(34644/8391)
Jun 01, 2018 7:55:31 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(159/451) took 114521 ms. Total solver calls (SAT/UNSAT): 44293(35648/8645)
Jun 01, 2018 7:55:34 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(170/451) took 117710 ms. Total solver calls (SAT/UNSAT): 46477(37141/9336)
Jun 01, 2018 7:55:37 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(179/451) took 120863 ms. Total solver calls (SAT/UNSAT): 48203(38407/9796)
Jun 01, 2018 7:55:40 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(185/451) took 123907 ms. Total solver calls (SAT/UNSAT): 49297(39259/10038)
Jun 01, 2018 7:55:43 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(193/451) took 126969 ms. Total solver calls (SAT/UNSAT): 50698(40406/10292)
Jun 01, 2018 7:55:47 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(202/451) took 130298 ms. Total solver calls (SAT/UNSAT): 52212(41400/10812)
Jun 01, 2018 7:55:50 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(215/451) took 133386 ms. Total solver calls (SAT/UNSAT): 54237(42804/11433)
Jun 01, 2018 7:55:53 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(226/451) took 136543 ms. Total solver calls (SAT/UNSAT): 55823(43990/11833)
Jun 01, 2018 7:55:56 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(237/451) took 139951 ms. Total solver calls (SAT/UNSAT): 57287(44970/12317)
Jun 01, 2018 7:56:01 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(255/451) took 144229 ms. Total solver calls (SAT/UNSAT): 59400(46142/13258)
Jun 01, 2018 7:56:04 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(261/451) took 147745 ms. Total solver calls (SAT/UNSAT): 60256(46842/13414)
Jun 01, 2018 7:56:08 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(267/451) took 151357 ms. Total solver calls (SAT/UNSAT): 61172(47604/13568)
Jun 01, 2018 7:56:11 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(276/451) took 154451 ms. Total solver calls (SAT/UNSAT): 62279(48487/13792)
Jun 01, 2018 7:56:14 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(287/451) took 157561 ms. Total solver calls (SAT/UNSAT): 63395(49315/14080)
Jun 01, 2018 7:56:17 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(302/451) took 160788 ms. Total solver calls (SAT/UNSAT): 64560(50136/14424)
Jun 01, 2018 7:56:20 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(321/451) took 163817 ms. Total solver calls (SAT/UNSAT): 65964(51035/14929)
Jun 01, 2018 7:56:23 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(367/451) took 166820 ms. Total solver calls (SAT/UNSAT): 67779(51757/16022)
Jun 01, 2018 7:56:26 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of Finished co-enabling matrix. took 169393 ms. Total solver calls (SAT/UNSAT): 70041(52128/17913)
Jun 01, 2018 7:56:26 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver computeDoNotAccord
INFO: Computing Do-Not-Accords matrix : 451 transitions.
Jun 01, 2018 7:56:42 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of Completed DNA matrix. took 15677 ms. Total solver calls (SAT/UNSAT): 11925(0/11925)
Jun 01, 2018 7:56:42 AM fr.lip6.move.gal.gal2pins.Gal2PinsTransformerNext transform
INFO: Built C files in 194927ms conformant to PINS in folder :/home/mcc/execution

Sequence of Actions to be Executed by the VM

This is useful if one wants to reexecute the tool in the VM from the submitted image disk.

set -x
# this is for BenchKit: configuration of major elements for the test
export BK_INPUT="SafeBus-PT-06"
export BK_EXAMINATION="LTLFireability"
export BK_TOOL="itstools"
export BK_RESULT_DIR="/tmp/BK_RESULTS/OUTPUTS"
export BK_TIME_CONFINEMENT="3600"
export BK_MEMORY_CONFINEMENT="16384"

# this is specific to your benchmark or test

export BIN_DIR="$HOME/BenchKit/bin"

# remove the execution directoty if it exists (to avoid increse of .vmdk images)
if [ -d execution ] ; then
rm -rf execution
fi

tar xzf /home/mcc/BenchKit/INPUTS/SafeBus-PT-06.tgz
mv SafeBus-PT-06 execution
cd execution
pwd
ls -lh

# this is for BenchKit: explicit launching of the test
echo "====================================================================="
echo " Generated by BenchKit 2-3637"
echo " Executing tool itstools"
echo " Input is SafeBus-PT-06, examination is LTLFireability"
echo " Time confinement is $BK_TIME_CONFINEMENT seconds"
echo " Memory confinement is 16384 MBytes"
echo " Number of cores is 4"
echo " Run identifier is r212-smll-152732263400532"
echo "====================================================================="
echo
echo "--------------------"
echo "content from stdout:"
echo
echo "=== Data for post analysis generated by BenchKit (invocation template)"
echo
if [ "LTLFireability" = "UpperBounds" ] ; then
echo "The expected result is a vector of positive values"
echo NUM_VECTOR
elif [ "LTLFireability" != "StateSpace" ] ; then
echo "The expected result is a vector of booleans"
echo BOOL_VECTOR
else
echo "no data necessary for post analysis"
fi
echo
if [ -f "LTLFireability.txt" ] ; then
echo "here is the order used to build the result vector(from text file)"
for x in $(grep Property LTLFireability.txt | cut -d ' ' -f 2 | sort -u) ; do
echo "FORMULA_NAME $x"
done
elif [ -f "LTLFireability.xml" ] ; then # for cunf (txt files deleted;-)
echo echo "here is the order used to build the result vector(from xml file)"
for x in $(grep '' LTLFireability.xml | cut -d '>' -f 2 | cut -d '<' -f 1 | sort -u) ; do
echo "FORMULA_NAME $x"
done
fi
echo
echo "=== Now, execution of the tool begins"
echo
echo -n "BK_START "
date -u +%s%3N
echo
timeout -s 9 $BK_TIME_CONFINEMENT bash -c "/home/mcc/BenchKit/BenchKit_head.sh 2> STDERR ; echo ; echo -n \"BK_STOP \" ; date -u +%s%3N"
if [ $? -eq 137 ] ; then
echo
echo "BK_TIME_CONFINEMENT_REACHED"
fi
echo
echo "--------------------"
echo "content from stderr:"
echo
cat STDERR ;