Execution Chart

We display below the execution chart for this examination (boot time has been removed).

Trace from the execution

Waiting for the VM to be ready (probing ssh)
.....................
/home/mcc/execution
total 216K
-rw-r--r-- 1 mcc users 4.3K May 15 18:54 CTLCardinality.txt
-rw-r--r-- 1 mcc users 26K May 15 18:54 CTLCardinality.xml
-rw-r--r-- 1 mcc users 2.5K May 15 18:54 CTLFireability.txt
-rw-r--r-- 1 mcc users 16K May 15 18:54 CTLFireability.xml
-rw-r--r-- 1 mcc users 4.0K May 15 18:50 GenericPropertiesDefinition.xml
-rw-r--r-- 1 mcc users 6.0K May 15 18:50 GenericPropertiesVerdict.xml
-rw-r--r-- 1 mcc users 2.5K May 26 09:27 LTLCardinality.txt
-rw-r--r-- 1 mcc users 12K May 26 09:27 LTLCardinality.xml
-rw-r--r-- 1 mcc users 1.8K May 26 09:27 LTLFireability.txt
-rw-r--r-- 1 mcc users 7.9K May 26 09:27 LTLFireability.xml
-rw-r--r-- 1 mcc users 3.3K May 15 18:54 ReachabilityCardinality.txt
-rw-r--r-- 1 mcc users 16K May 15 18:54 ReachabilityCardinality.xml
-rw-r--r-- 1 mcc users 105 May 15 18:54 ReachabilityDeadlock.txt
-rw-r--r-- 1 mcc users 343 May 15 18:54 ReachabilityDeadlock.xml
-rw-r--r-- 1 mcc users 3.4K May 15 18:54 ReachabilityFireability.txt
-rw-r--r-- 1 mcc users 23K May 15 18:54 ReachabilityFireability.xml
-rw-r--r-- 1 mcc users 1.6K May 15 18:54 UpperBounds.txt
-rw-r--r-- 1 mcc users 3.6K May 15 18:54 UpperBounds.xml
-rw-r--r-- 1 mcc users 5 May 15 18:50 equiv_pt
-rw-r--r-- 1 mcc users 3 May 15 18:50 instance
-rw-r--r-- 1 mcc users 5 May 15 18:50 iscolored
-rw-r--r-- 1 mcc users 42K May 15 18:50 model.pnml
=====================================================================
Generated by BenchKit 2-3637
Executing tool itstools
Input is SafeBus-COL-03, examination is LTLFireability
Time confinement is 3600 seconds
Memory confinement is 16384 MBytes
Number of cores is 4
Run identifier is r212-smll-152732263400516
=====================================================================

--------------------
content from stdout:

=== Data for post analysis generated by BenchKit (invocation template)

The expected result is a vector of booleans
BOOL_VECTOR

here is the order used to build the result vector(from text file)
FORMULA_NAME SafeBus-COL-03-LTLFireability-00
FORMULA_NAME SafeBus-COL-03-LTLFireability-01
FORMULA_NAME SafeBus-COL-03-LTLFireability-02
FORMULA_NAME SafeBus-COL-03-LTLFireability-03
FORMULA_NAME SafeBus-COL-03-LTLFireability-04
FORMULA_NAME SafeBus-COL-03-LTLFireability-05
FORMULA_NAME SafeBus-COL-03-LTLFireability-06
FORMULA_NAME SafeBus-COL-03-LTLFireability-07
FORMULA_NAME SafeBus-COL-03-LTLFireability-08
FORMULA_NAME SafeBus-COL-03-LTLFireability-09
FORMULA_NAME SafeBus-COL-03-LTLFireability-10
FORMULA_NAME SafeBus-COL-03-LTLFireability-11
FORMULA_NAME SafeBus-COL-03-LTLFireability-12
FORMULA_NAME SafeBus-COL-03-LTLFireability-13
FORMULA_NAME SafeBus-COL-03-LTLFireability-14
FORMULA_NAME SafeBus-COL-03-LTLFireability-15

=== Now, execution of the tool begins

BK_START 1527832381524

05:53:05.084 [main] ERROR PNML validation - The rng grammar file can't be accessed : www.pnml.org
05:53:05.088 [main] ERROR import - Grammar file errors have been raised, the validation can't be done, process will continue without Grammar validation
Using solver Z3 to compute partial order matrices.
Built C files in :
/home/mcc/execution
Invoking ITS tools like this :CommandLine [args=[/home/mcc/BenchKit/itstools/plugins/fr.lip6.move.gal.itstools.binaries_1.0.0.201805151631/bin/its-ltl-linux64, --gc-threshold, 2000000, -i, /home/mcc/execution/LTLFireability.pnml.gal, -t, CGAL, -LTL, /home/mcc/execution/LTLFireability.ltl, -c, -stutter-deadlock], workingDir=/home/mcc/execution]

its-ltl command run as :

/home/mcc/BenchKit/itstools/plugins/fr.lip6.move.gal.itstools.binaries_1.0.0.201805151631/bin/its-ltl-linux64 --gc-threshold 2000000 -i /home/mcc/execution/LTLFireability.pnml.gal -t CGAL -LTL /home/mcc/execution/LTLFireability.ltl -c -stutter-deadlock
Read 16 LTL properties
Checking formula 0 : !((G("((((((((((((cable_free.cable_free_0>=1)&&(It0.Cpt2_0>=1))&&(Dom0.AMC_0>=1))&&(FMCb.FMCb_0>=1))||((((cable_free.cable_free_0>=1)&&(It0.Cpt2_0>=1))&&(Dom3.AMC_3>=1))&&(FMCb.FMCb_0>=1)))||((((cable_free.cable_free_0>=1)&&(It0.Cpt2_0>=1))&&(Dom6.AMC_6>=1))&&(FMCb.FMCb_0>=1)))||((((cable_free.cable_free_0>=1)&&(It1.Cpt2_1>=1))&&(Dom1.AMC_1>=1))&&(FMCb.FMCb_0>=1)))||((((cable_free.cable_free_0>=1)&&(It1.Cpt2_1>=1))&&(Dom4.AMC_4>=1))&&(FMCb.FMCb_0>=1)))||((((cable_free.cable_free_0>=1)&&(It1.Cpt2_1>=1))&&(Dom7.AMC_7>=1))&&(FMCb.FMCb_0>=1)))||((((cable_free.cable_free_0>=1)&&(It2.Cpt2_2>=1))&&(Dom2.AMC_2>=1))&&(FMCb.FMCb_0>=1)))||((((cable_free.cable_free_0>=1)&&(It2.Cpt2_2>=1))&&(Dom5.AMC_5>=1))&&(FMCb.FMCb_0>=1)))||((((cable_free.cable_free_0>=1)&&(It2.Cpt2_2>=1))&&(Dom8.AMC_8>=1))&&(FMCb.FMCb_0>=1)))")))
Formula 0 simplified : !G"((((((((((((cable_free.cable_free_0>=1)&&(It0.Cpt2_0>=1))&&(Dom0.AMC_0>=1))&&(FMCb.FMCb_0>=1))||((((cable_free.cable_free_0>=1)&&(It0.Cpt2_0>=1))&&(Dom3.AMC_3>=1))&&(FMCb.FMCb_0>=1)))||((((cable_free.cable_free_0>=1)&&(It0.Cpt2_0>=1))&&(Dom6.AMC_6>=1))&&(FMCb.FMCb_0>=1)))||((((cable_free.cable_free_0>=1)&&(It1.Cpt2_1>=1))&&(Dom1.AMC_1>=1))&&(FMCb.FMCb_0>=1)))||((((cable_free.cable_free_0>=1)&&(It1.Cpt2_1>=1))&&(Dom4.AMC_4>=1))&&(FMCb.FMCb_0>=1)))||((((cable_free.cable_free_0>=1)&&(It1.Cpt2_1>=1))&&(Dom7.AMC_7>=1))&&(FMCb.FMCb_0>=1)))||((((cable_free.cable_free_0>=1)&&(It2.Cpt2_2>=1))&&(Dom2.AMC_2>=1))&&(FMCb.FMCb_0>=1)))||((((cable_free.cable_free_0>=1)&&(It2.Cpt2_2>=1))&&(Dom5.AMC_5>=1))&&(FMCb.FMCb_0>=1)))||((((cable_free.cable_free_0>=1)&&(It2.Cpt2_2>=1))&&(Dom8.AMC_8>=1))&&(FMCb.FMCb_0>=1)))"
built 77 ordering constraints for composite.
Presburger conditions satisfied. Using coverability to approximate state space in K-Induction.
Normalized transition count is 71
// Phase 1: matrix 71 rows 57 cols
invariant :-1'Dom3:wait_ack_3 + -1'Dom4:wait_ack_4 + -1'Dom5:wait_ack_5 + It1:cable_used_1 + -1'It1:FMC_1 + -1'It1:PMC_1 = 0
invariant :Dom6:wait_ack_6 + Dom7:wait_ack_7 + Dom8:wait_ack_8 + It2:wait_cable_2 + It2:listen_2 + It2:wait_msg_2 + It2:loop_em_2 = 1
invariant :-1'Dom0:AMC_0 + Dom2:AMC_2 + Dom3:wait_ack_3 + Dom4:AMC_4 + Dom4:wait_ack_4 + 2'Dom5:AMC_5 + Dom5:wait_ack_5 + -1'Dom6:AMC_6 + Dom8:AMC_8 + It0:Cpt2_0 + -1'It0:Cpt1_0 + It1:listen_1 + It1:RMC_1 + It1:PMC_1 + It1:wait_msg_1 + It1:loop_em_1 = 1
invariant :-1'Dom0:AMC_0 + -1'Dom1:AMC_1 + -1'Dom2:AMC_2 + It0:wait_cable_0 + -1'It0:RMC_0 + -1'It0:PMC_0 = 0
invariant :Dom0:wait_ack_0 + Dom1:wait_ack_1 + Dom2:wait_ack_2 + Dom3:wait_ack_3 + Dom4:wait_ack_4 + Dom5:wait_ack_5 + Dom6:wait_ack_6 + Dom7:wait_ack_7 + Dom8:wait_ack_8 + cable_free:cable_free_0 + It0:FMC_0 + It0:PMC_0 + It1:FMC_1 + It1:PMC_1 + It2:FMC_2 + It2:PMC_2 = 1
invariant :Dom1:AMC_1 + -1'Dom2:AMC_2 + Dom4:AMC_4 + -1'Dom5:AMC_5 + -1'Dom6:AMC_6 + -1'Dom6:wait_ack_6 + -1'Dom7:wait_ack_7 + -2'Dom8:AMC_8 + -1'Dom8:wait_ack_8 + It2:Cpt2_2 + -1'It2:Cpt1_2 + -1'It2:listen_2 + -1'It2:RMC_2 + -1'It2:PMC_2 + -1'It2:wait_msg_2 + -1'It2:loop_em_2 = -1
invariant :-1'Dom0:wait_ack_0 + -1'Dom1:wait_ack_1 + -1'Dom2:wait_ack_2 + It0:cable_used_0 + -1'It0:FMC_0 + -1'It0:PMC_0 = 0
invariant :Dom0:AMC_0 + -1'Dom1:AMC_1 + -1'Dom3:wait_ack_3 + -2'Dom4:AMC_4 + -1'Dom4:wait_ack_4 + -1'Dom5:AMC_5 + -1'Dom5:wait_ack_5 + 2'Dom6:AMC_6 + Dom6:wait_ack_6 + Dom7:wait_ack_7 + Dom8:AMC_8 + Dom8:wait_ack_8 + It0:Cpt1_0 + It1:Cpt2_1 + -1'It1:listen_1 + -1'It1:RMC_1 + -1'It1:PMC_1 + -1'It1:wait_msg_1 + -1'It1:loop_em_1 + It2:Cpt1_2 + It2:listen_2 + It2:RMC_2 + It2:PMC_2 + It2:wait_msg_2 + It2:loop_em_2 = 1
invariant :It0:Cpt1_0 + It1:Cpt1_1 + It2:Cpt1_2 = 1
invariant :-1'Dom6:wait_ack_6 + -1'Dom7:wait_ack_7 + -1'Dom8:wait_ack_8 + It2:cable_used_2 + -1'It2:FMC_2 + -1'It2:PMC_2 = 0
invariant :-1'Dom0:wait_ack_0 + -1'Dom1:wait_ack_1 + -1'Dom2:wait_ack_2 + -1'Dom3:wait_ack_3 + -1'Dom4:wait_ack_4 + -1'Dom5:wait_ack_5 + -1'Dom6:wait_ack_6 + -1'Dom7:wait_ack_7 + -1'Dom8:wait_ack_8 + ACK:ACK_0 + T_out:T_out_0 + It0:MSG_0 + It1:MSG_1 + It2:MSG_2 = 0
invariant :Dom3:AMC_3 + Dom3:wait_ack_3 + Dom4:AMC_4 + Dom4:wait_ack_4 + Dom5:AMC_5 + Dom5:wait_ack_5 + It1:listen_1 + It1:RMC_1 + It1:PMC_1 + It1:wait_msg_1 + It1:loop_em_1 = 1
invariant :Dom3:wait_ack_3 + Dom4:wait_ack_4 + Dom5:wait_ack_5 + It1:wait_cable_1 + It1:listen_1 + It1:wait_msg_1 + It1:loop_em_1 = 1
invariant :Dom0:AMC_0 + Dom0:wait_ack_0 + Dom1:AMC_1 + Dom1:wait_ack_1 + Dom2:AMC_2 + Dom2:wait_ack_2 + It0:listen_0 + It0:RMC_0 + It0:PMC_0 + It0:wait_msg_0 + It0:loop_em_0 = 1
invariant :FMCb:FMCb_0 + It0:FMC_0 + It1:FMC_1 + It2:FMC_2 = 1
invariant :R_tout:R_tout_0 + S_tout:S_tout_0 = 1
invariant :Dom6:AMC_6 + Dom6:wait_ack_6 + Dom7:AMC_7 + Dom7:wait_ack_7 + Dom8:AMC_8 + Dom8:wait_ack_8 + It2:listen_2 + It2:RMC_2 + It2:PMC_2 + It2:wait_msg_2 + It2:loop_em_2 = 1
Reverse transition relation is NOT exact ! Due to transitions I_reemit, C_free, I_rec1, loss_m, I_rec2, I_ask2_0, I_ask2_1, I_ask2_2, Intersection with reachable at each step enabled. (destroyed/reverse/intersect/total) :0/14/8/22
3 unique states visited
3 strongly connected components in search stack
3 transitions explored
3 items max in DFS search stack
154 ticks for the emptiness check
Model ,|S| ,Time ,Mem(kb) ,fin. SDD ,fin. DDD ,peak SDD ,peak DDD ,SDD Hom ,SDD cache peak ,DDD Hom ,DDD cachepeak ,SHom cache
STATS,0,1.55756,51112,1,0,73147,17077,963,57011,227,94580,162103
an accepting run exists (use option '-e' to print it)
Formula 0 is FALSE accepting run found.
FORMULA SafeBus-COL-03-LTLFireability-00 FALSE TECHNIQUES DECISION_DIAGRAMS TOPOLOGICAL USE_NUPN
Checking formula 1 : !((G(G(X(X(F("((((It0.FMC_0>=1)&&(It0.cable_used_0>=1))||((It1.FMC_1>=1)&&(It1.cable_used_1>=1)))||((It2.FMC_2>=1)&&(It2.cable_used_2>=1)))")))))))
Formula 1 simplified : !GXXF"((((It0.FMC_0>=1)&&(It0.cable_used_0>=1))||((It1.FMC_1>=1)&&(It1.cable_used_1>=1)))||((It2.FMC_2>=1)&&(It2.cable_used_2>=1)))"
3 unique states visited
0 strongly connected components in search stack
3 transitions explored
3 items max in DFS search stack
39 ticks for the emptiness check
Model ,|S| ,Time ,Mem(kb) ,fin. SDD ,fin. DDD ,peak SDD ,peak DDD ,SDD Hom ,SDD cache peak ,DDD Hom ,DDD cachepeak ,SHom cache
STATS,0,1.94857,64796,1,0,104972,17478,986,75650,229,101053,229083
no accepting run found
Formula 1 is TRUE no accepting run found.
FORMULA SafeBus-COL-03-LTLFireability-01 TRUE TECHNIQUES DECISION_DIAGRAMS TOPOLOGICAL USE_NUPN
Checking formula 2 : !((F("((((It0.MSG_0>=1)&&(It0.listen_0>=1))||((It1.MSG_1>=1)&&(It1.listen_1>=1)))||((It2.MSG_2>=1)&&(It2.listen_2>=1)))")))
Formula 2 simplified : !F"((((It0.MSG_0>=1)&&(It0.listen_0>=1))||((It1.MSG_1>=1)&&(It1.listen_1>=1)))||((It2.MSG_2>=1)&&(It2.listen_2>=1)))"
2 unique states visited
2 strongly connected components in search stack
2 transitions explored
2 items max in DFS search stack
126 ticks for the emptiness check
Model ,|S| ,Time ,Mem(kb) ,fin. SDD ,fin. DDD ,peak SDD ,peak DDD ,SDD Hom ,SDD cache peak ,DDD Hom ,DDD cachepeak ,SHom cache
STATS,0,3.20872,104132,1,0,188925,17583,1017,123565,231,107298,391826
an accepting run exists (use option '-e' to print it)
Formula 2 is FALSE accepting run found.
FORMULA SafeBus-COL-03-LTLFireability-02 FALSE TECHNIQUES DECISION_DIAGRAMS TOPOLOGICAL USE_NUPN
Checking formula 3 : !((F(F(("((ACK.ACK_0>=1)&&(R_tout.R_tout_0>=1))")U("(((((((((((FMCb.FMCb_0>=1)&&(ACK.ACK_0>=1))&&(Dom0.wait_ack_0>=1))||(((FMCb.FMCb_0>=1)&&(ACK.ACK_0>=1))&&(Dom3.wait_ack_3>=1)))||(((FMCb.FMCb_0>=1)&&(ACK.ACK_0>=1))&&(Dom6.wait_ack_6>=1)))||(((FMCb.FMCb_0>=1)&&(ACK.ACK_0>=1))&&(Dom1.wait_ack_1>=1)))||(((FMCb.FMCb_0>=1)&&(ACK.ACK_0>=1))&&(Dom4.wait_ack_4>=1)))||(((FMCb.FMCb_0>=1)&&(ACK.ACK_0>=1))&&(Dom7.wait_ack_7>=1)))||(((FMCb.FMCb_0>=1)&&(ACK.ACK_0>=1))&&(Dom2.wait_ack_2>=1)))||(((FMCb.FMCb_0>=1)&&(ACK.ACK_0>=1))&&(Dom5.wait_ack_5>=1)))||(((FMCb.FMCb_0>=1)&&(ACK.ACK_0>=1))&&(Dom8.wait_ack_8>=1)))")))))
Formula 3 simplified : !F("((ACK.ACK_0>=1)&&(R_tout.R_tout_0>=1))" U "(((((((((((FMCb.FMCb_0>=1)&&(ACK.ACK_0>=1))&&(Dom0.wait_ack_0>=1))||(((FMCb.FMCb_0>=1)&&(ACK.ACK_0>=1))&&(Dom3.wait_ack_3>=1)))||(((FMCb.FMCb_0>=1)&&(ACK.ACK_0>=1))&&(Dom6.wait_ack_6>=1)))||(((FMCb.FMCb_0>=1)&&(ACK.ACK_0>=1))&&(Dom1.wait_ack_1>=1)))||(((FMCb.FMCb_0>=1)&&(ACK.ACK_0>=1))&&(Dom4.wait_ack_4>=1)))||(((FMCb.FMCb_0>=1)&&(ACK.ACK_0>=1))&&(Dom7.wait_ack_7>=1)))||(((FMCb.FMCb_0>=1)&&(ACK.ACK_0>=1))&&(Dom2.wait_ack_2>=1)))||(((FMCb.FMCb_0>=1)&&(ACK.ACK_0>=1))&&(Dom5.wait_ack_5>=1)))||(((FMCb.FMCb_0>=1)&&(ACK.ACK_0>=1))&&(Dom8.wait_ack_8>=1)))")
1 unique states visited
0 strongly connected components in search stack
0 transitions explored
1 items max in DFS search stack
8 ticks for the emptiness check
Model ,|S| ,Time ,Mem(kb) ,fin. SDD ,fin. DDD ,peak SDD ,peak DDD ,SDD Hom ,SDD cache peak ,DDD Hom ,DDD cachepeak ,SHom cache
STATS,0,3.29068,107576,1,0,196573,17583,1096,127022,231,107361,411750
no accepting run found
Formula 3 is TRUE no accepting run found.
FORMULA SafeBus-COL-03-LTLFireability-03 TRUE TECHNIQUES DECISION_DIAGRAMS TOPOLOGICAL USE_NUPN
Checking formula 4 : !(("((((It0.FMC_0>=1)&&(It0.cable_used_0>=1))||((It1.FMC_1>=1)&&(It1.cable_used_1>=1)))||((It2.FMC_2>=1)&&(It2.cable_used_2>=1)))"))
Formula 4 simplified : !"((((It0.FMC_0>=1)&&(It0.cable_used_0>=1))||((It1.FMC_1>=1)&&(It1.cable_used_1>=1)))||((It2.FMC_2>=1)&&(It2.cable_used_2>=1)))"
3 unique states visited
3 strongly connected components in search stack
3 transitions explored
3 items max in DFS search stack
0 ticks for the emptiness check
Model ,|S| ,Time ,Mem(kb) ,fin. SDD ,fin. DDD ,peak SDD ,peak DDD ,SDD Hom ,SDD cache peak ,DDD Hom ,DDD cachepeak ,SHom cache
STATS,0,3.29227,107840,1,0,196573,17583,1096,127022,231,107361,411769
an accepting run exists (use option '-e' to print it)
Formula 4 is FALSE accepting run found.
FORMULA SafeBus-COL-03-LTLFireability-04 FALSE TECHNIQUES DECISION_DIAGRAMS TOPOLOGICAL USE_NUPN
Checking formula 5 : !((("((((It0.FMC_0>=1)&&(It0.cable_used_0>=1))||((It1.FMC_1>=1)&&(It1.cable_used_1>=1)))||((It2.FMC_2>=1)&&(It2.cable_used_2>=1)))")U(F("((ACK.ACK_0>=1)&&(R_tout.R_tout_0>=1))"))))
Formula 5 simplified : !("((((It0.FMC_0>=1)&&(It0.cable_used_0>=1))||((It1.FMC_1>=1)&&(It1.cable_used_1>=1)))||((It2.FMC_2>=1)&&(It2.cable_used_2>=1)))" U F"((ACK.ACK_0>=1)&&(R_tout.R_tout_0>=1))")
2 unique states visited
2 strongly connected components in search stack
2 transitions explored
2 items max in DFS search stack
50 ticks for the emptiness check
Model ,|S| ,Time ,Mem(kb) ,fin. SDD ,fin. DDD ,peak SDD ,peak DDD ,SDD Hom ,SDD cache peak ,DDD Hom ,DDD cachepeak ,SHom cache
STATS,0,3.79312,117072,1,0,213881,17590,1123,139342,231,108200,445392
an accepting run exists (use option '-e' to print it)
Formula 5 is FALSE accepting run found.
FORMULA SafeBus-COL-03-LTLFireability-05 FALSE TECHNIQUES DECISION_DIAGRAMS TOPOLOGICAL USE_NUPN
Checking formula 6 : !(("((((It0.FMC_0>=1)&&(It0.cable_used_0>=1))||((It1.FMC_1>=1)&&(It1.cable_used_1>=1)))||((It2.FMC_2>=1)&&(It2.cable_used_2>=1)))"))
Formula 6 simplified : !"((((It0.FMC_0>=1)&&(It0.cable_used_0>=1))||((It1.FMC_1>=1)&&(It1.cable_used_1>=1)))||((It2.FMC_2>=1)&&(It2.cable_used_2>=1)))"
3 unique states visited
3 strongly connected components in search stack
3 transitions explored
3 items max in DFS search stack
0 ticks for the emptiness check
Model ,|S| ,Time ,Mem(kb) ,fin. SDD ,fin. DDD ,peak SDD ,peak DDD ,SDD Hom ,SDD cache peak ,DDD Hom ,DDD cachepeak ,SHom cache
STATS,0,3.79414,117336,1,0,213881,17590,1123,139342,231,108200,445392
an accepting run exists (use option '-e' to print it)
Formula 6 is FALSE accepting run found.
FORMULA SafeBus-COL-03-LTLFireability-06 FALSE TECHNIQUES DECISION_DIAGRAMS TOPOLOGICAL USE_NUPN
Checking formula 7 : !((((F("((((It0.MSG_0>=1)&&(It0.wait_msg_0>=1))||((It1.MSG_1>=1)&&(It1.wait_msg_1>=1)))||((It2.MSG_2>=1)&&(It2.wait_msg_2>=1)))"))U(X("((((It0.FMC_0>=1)&&(It0.cable_used_0>=1))||((It1.FMC_1>=1)&&(It1.cable_used_1>=1)))||((It2.FMC_2>=1)&&(It2.cable_used_2>=1)))")))U((G("((((((((((T_out.T_out_0>=1)&&(Dom0.wait_ack_0>=1))||((T_out.T_out_0>=1)&&(Dom3.wait_ack_3>=1)))||((T_out.T_out_0>=1)&&(Dom6.wait_ack_6>=1)))||((T_out.T_out_0>=1)&&(Dom1.wait_ack_1>=1)))||((T_out.T_out_0>=1)&&(Dom4.wait_ack_4>=1)))||((T_out.T_out_0>=1)&&(Dom7.wait_ack_7>=1)))||((T_out.T_out_0>=1)&&(Dom2.wait_ack_2>=1)))||((T_out.T_out_0>=1)&&(Dom5.wait_ack_5>=1)))||((T_out.T_out_0>=1)&&(Dom8.wait_ack_8>=1)))"))U(F("((((S_tout.S_tout_0>=1)&&(It0.FMC_0>=1))||((S_tout.S_tout_0>=1)&&(It1.FMC_1>=1)))||((S_tout.S_tout_0>=1)&&(It2.FMC_2>=1)))")))))
Formula 7 simplified : !((F"((((It0.MSG_0>=1)&&(It0.wait_msg_0>=1))||((It1.MSG_1>=1)&&(It1.wait_msg_1>=1)))||((It2.MSG_2>=1)&&(It2.wait_msg_2>=1)))" U X"((((It0.FMC_0>=1)&&(It0.cable_used_0>=1))||((It1.FMC_1>=1)&&(It1.cable_used_1>=1)))||((It2.FMC_2>=1)&&(It2.cable_used_2>=1)))") U (G"((((((((((T_out.T_out_0>=1)&&(Dom0.wait_ack_0>=1))||((T_out.T_out_0>=1)&&(Dom3.wait_ack_3>=1)))||((T_out.T_out_0>=1)&&(Dom6.wait_ack_6>=1)))||((T_out.T_out_0>=1)&&(Dom1.wait_ack_1>=1)))||((T_out.T_out_0>=1)&&(Dom4.wait_ack_4>=1)))||((T_out.T_out_0>=1)&&(Dom7.wait_ack_7>=1)))||((T_out.T_out_0>=1)&&(Dom2.wait_ack_2>=1)))||((T_out.T_out_0>=1)&&(Dom5.wait_ack_5>=1)))||((T_out.T_out_0>=1)&&(Dom8.wait_ack_8>=1)))" U F"((((S_tout.S_tout_0>=1)&&(It0.FMC_0>=1))||((S_tout.S_tout_0>=1)&&(It1.FMC_1>=1)))||((S_tout.S_tout_0>=1)&&(It2.FMC_2>=1)))"))
2 unique states visited
2 strongly connected components in search stack
2 transitions explored
2 items max in DFS search stack
72 ticks for the emptiness check
Model ,|S| ,Time ,Mem(kb) ,fin. SDD ,fin. DDD ,peak SDD ,peak DDD ,SDD Hom ,SDD cache peak ,DDD Hom ,DDD cachepeak ,SHom cache
STATS,0,4.51774,138868,1,0,256299,17707,1142,166294,231,111809,527670
an accepting run exists (use option '-e' to print it)
Formula 7 is FALSE accepting run found.
FORMULA SafeBus-COL-03-LTLFireability-07 FALSE TECHNIQUES DECISION_DIAGRAMS TOPOLOGICAL USE_NUPN
Checking formula 8 : !((F(X(("((((S_tout.S_tout_0>=1)&&(It0.FMC_0>=1))||((S_tout.S_tout_0>=1)&&(It1.FMC_1>=1)))||((S_tout.S_tout_0>=1)&&(It2.FMC_2>=1)))")U(G("(((((((It1.PMC_1>=1)&&(It1.wait_cable_1>=1))||((It2.PMC_2>=1)&&(It2.wait_cable_2>=1)))||((It0.PMC_0>=1)&&(It0.wait_cable_0>=1)))||((It2.PMC_2>=1)&&(It2.wait_cable_2>=1)))||((It0.PMC_0>=1)&&(It0.wait_cable_0>=1)))||((It1.PMC_1>=1)&&(It1.wait_cable_1>=1)))"))))))
Formula 8 simplified : !FX("((((S_tout.S_tout_0>=1)&&(It0.FMC_0>=1))||((S_tout.S_tout_0>=1)&&(It1.FMC_1>=1)))||((S_tout.S_tout_0>=1)&&(It2.FMC_2>=1)))" U G"(((((((It1.PMC_1>=1)&&(It1.wait_cable_1>=1))||((It2.PMC_2>=1)&&(It2.wait_cable_2>=1)))||((It0.PMC_0>=1)&&(It0.wait_cable_0>=1)))||((It2.PMC_2>=1)&&(It2.wait_cable_2>=1)))||((It0.PMC_0>=1)&&(It0.wait_cable_0>=1)))||((It1.PMC_1>=1)&&(It1.wait_cable_1>=1)))")
3 unique states visited
3 strongly connected components in search stack
3 transitions explored
3 items max in DFS search stack
68 ticks for the emptiness check
Model ,|S| ,Time ,Mem(kb) ,fin. SDD ,fin. DDD ,peak SDD ,peak DDD ,SDD Hom ,SDD cache peak ,DDD Hom ,DDD cachepeak ,SHom cache
STATS,0,5.20362,162088,1,0,302539,17773,1178,193997,233,113272,622981
an accepting run exists (use option '-e' to print it)
Formula 8 is FALSE accepting run found.
FORMULA SafeBus-COL-03-LTLFireability-08 FALSE TECHNIQUES DECISION_DIAGRAMS TOPOLOGICAL USE_NUPN
Checking formula 9 : !((F("((((((((((It0.Cpt1_0>=1)&&(It0.loop_em_0>=1))||((It0.Cpt1_0>=1)&&(It1.loop_em_1>=1)))||((It0.Cpt1_0>=1)&&(It2.loop_em_2>=1)))||((It1.Cpt1_1>=1)&&(It0.loop_em_0>=1)))||((It1.Cpt1_1>=1)&&(It1.loop_em_1>=1)))||((It1.Cpt1_1>=1)&&(It2.loop_em_2>=1)))||((It2.Cpt1_2>=1)&&(It0.loop_em_0>=1)))||((It2.Cpt1_2>=1)&&(It1.loop_em_1>=1)))||((It2.Cpt1_2>=1)&&(It2.loop_em_2>=1)))")))
Formula 9 simplified : !F"((((((((((It0.Cpt1_0>=1)&&(It0.loop_em_0>=1))||((It0.Cpt1_0>=1)&&(It1.loop_em_1>=1)))||((It0.Cpt1_0>=1)&&(It2.loop_em_2>=1)))||((It1.Cpt1_1>=1)&&(It0.loop_em_0>=1)))||((It1.Cpt1_1>=1)&&(It1.loop_em_1>=1)))||((It1.Cpt1_1>=1)&&(It2.loop_em_2>=1)))||((It2.Cpt1_2>=1)&&(It0.loop_em_0>=1)))||((It2.Cpt1_2>=1)&&(It1.loop_em_1>=1)))||((It2.Cpt1_2>=1)&&(It2.loop_em_2>=1)))"
2 unique states visited
2 strongly connected components in search stack
2 transitions explored
2 items max in DFS search stack
69 ticks for the emptiness check
Model ,|S| ,Time ,Mem(kb) ,fin. SDD ,fin. DDD ,peak SDD ,peak DDD ,SDD Hom ,SDD cache peak ,DDD Hom ,DDD cachepeak ,SHom cache
STATS,0,5.89528,178456,1,0,333223,17779,1235,212249,235,113616,688183
an accepting run exists (use option '-e' to print it)
Formula 9 is FALSE accepting run found.
FORMULA SafeBus-COL-03-LTLFireability-09 FALSE TECHNIQUES DECISION_DIAGRAMS TOPOLOGICAL USE_NUPN
Checking formula 10 : !(("((((It0.MSG_0>=1)&&(It0.listen_0>=1))||((It1.MSG_1>=1)&&(It1.listen_1>=1)))||((It2.MSG_2>=1)&&(It2.listen_2>=1)))"))
Formula 10 simplified : !"((((It0.MSG_0>=1)&&(It0.listen_0>=1))||((It1.MSG_1>=1)&&(It1.listen_1>=1)))||((It2.MSG_2>=1)&&(It2.listen_2>=1)))"
3 unique states visited
3 strongly connected components in search stack
3 transitions explored
3 items max in DFS search stack
0 ticks for the emptiness check
Model ,|S| ,Time ,Mem(kb) ,fin. SDD ,fin. DDD ,peak SDD ,peak DDD ,SDD Hom ,SDD cache peak ,DDD Hom ,DDD cachepeak ,SHom cache
STATS,0,5.89652,178720,1,0,333223,17779,1235,212249,235,113616,688184
an accepting run exists (use option '-e' to print it)
Formula 10 is FALSE accepting run found.
FORMULA SafeBus-COL-03-LTLFireability-10 FALSE TECHNIQUES DECISION_DIAGRAMS TOPOLOGICAL USE_NUPN
Checking formula 11 : !((F(F(X(G(X("(((((((It1.PMC_1>=1)&&(It1.wait_cable_1>=1))||((It2.PMC_2>=1)&&(It2.wait_cable_2>=1)))||((It0.PMC_0>=1)&&(It0.wait_cable_0>=1)))||((It2.PMC_2>=1)&&(It2.wait_cable_2>=1)))||((It0.PMC_0>=1)&&(It0.wait_cable_0>=1)))||((It1.PMC_1>=1)&&(It1.wait_cable_1>=1)))")))))))
Formula 11 simplified : !FXGX"(((((((It1.PMC_1>=1)&&(It1.wait_cable_1>=1))||((It2.PMC_2>=1)&&(It2.wait_cable_2>=1)))||((It0.PMC_0>=1)&&(It0.wait_cable_0>=1)))||((It2.PMC_2>=1)&&(It2.wait_cable_2>=1)))||((It0.PMC_0>=1)&&(It0.wait_cable_0>=1)))||((It1.PMC_1>=1)&&(It1.wait_cable_1>=1)))"
3 unique states visited
2 strongly connected components in search stack
4 transitions explored
3 items max in DFS search stack
2 ticks for the emptiness check
Model ,|S| ,Time ,Mem(kb) ,fin. SDD ,fin. DDD ,peak SDD ,peak DDD ,SDD Hom ,SDD cache peak ,DDD Hom ,DDD cachepeak ,SHom cache
STATS,0,5.91231,178720,1,0,333450,17779,1242,212515,235,113616,688642
an accepting run exists (use option '-e' to print it)
Formula 11 is FALSE accepting run found.
FORMULA SafeBus-COL-03-LTLFireability-11 FALSE TECHNIQUES DECISION_DIAGRAMS TOPOLOGICAL USE_NUPN
Checking formula 12 : !((F(X(F(("((((((((((((((((((((((((((((((Dom0.AMC_0>=1)&&(FMCb.FMCb_0>=1))&&(It0.cable_used_0>=1))&&(It0.Cpt2_0>=1))||((((Dom3.AMC_3>=1)&&(FMCb.FMCb_0>=1))&&(It0.cable_used_0>=1))&&(It0.Cpt2_0>=1)))||((((Dom6.AMC_6>=1)&&(FMCb.FMCb_0>=1))&&(It0.cable_used_0>=1))&&(It0.Cpt2_0>=1)))||((((Dom1.AMC_1>=1)&&(FMCb.FMCb_0>=1))&&(It0.cable_used_0>=1))&&(It1.Cpt2_1>=1)))||((((Dom4.AMC_4>=1)&&(FMCb.FMCb_0>=1))&&(It0.cable_used_0>=1))&&(It1.Cpt2_1>=1)))||((((Dom7.AMC_7>=1)&&(FMCb.FMCb_0>=1))&&(It0.cable_used_0>=1))&&(It1.Cpt2_1>=1)))||((((Dom2.AMC_2>=1)&&(FMCb.FMCb_0>=1))&&(It0.cable_used_0>=1))&&(It2.Cpt2_2>=1)))||((((Dom5.AMC_5>=1)&&(FMCb.FMCb_0>=1))&&(It0.cable_used_0>=1))&&(It2.Cpt2_2>=1)))||((((Dom8.AMC_8>=1)&&(FMCb.FMCb_0>=1))&&(It0.cable_used_0>=1))&&(It2.Cpt2_2>=1)))||((((Dom0.AMC_0>=1)&&(FMCb.FMCb_0>=1))&&(It1.cable_used_1>=1))&&(It0.Cpt2_0>=1)))||((((Dom3.AMC_3>=1)&&(FMCb.FMCb_0>=1))&&(It1.cable_used_1>=1))&&(It0.Cpt2_0>=1)))||((((Dom6.AMC_6>=1)&&(FMCb.FMCb_0>=1))&&(It1.cable_used_1>=1))&&(It0.Cpt2_0>=1)))||((((Dom1.AMC_1>=1)&&(FMCb.FMCb_0>=1))&&(It1.cable_used_1>=1))&&(It1.Cpt2_1>=1)))||((((Dom4.AMC_4>=1)&&(FMCb.FMCb_0>=1))&&(It1.cable_used_1>=1))&&(It1.Cpt2_1>=1)))||((((Dom7.AMC_7>=1)&&(FMCb.FMCb_0>=1))&&(It1.cable_used_1>=1))&&(It1.Cpt2_1>=1)))||((((Dom2.AMC_2>=1)&&(FMCb.FMCb_0>=1))&&(It1.cable_used_1>=1))&&(It2.Cpt2_2>=1)))||((((Dom5.AMC_5>=1)&&(FMCb.FMCb_0>=1))&&(It1.cable_used_1>=1))&&(It2.Cpt2_2>=1)))||((((Dom8.AMC_8>=1)&&(FMCb.FMCb_0>=1))&&(It1.cable_used_1>=1))&&(It2.Cpt2_2>=1)))||((((Dom0.AMC_0>=1)&&(FMCb.FMCb_0>=1))&&(It2.cable_used_2>=1))&&(It0.Cpt2_0>=1)))||((((Dom3.AMC_3>=1)&&(FMCb.FMCb_0>=1))&&(It2.cable_used_2>=1))&&(It0.Cpt2_0>=1)))||((((Dom6.AMC_6>=1)&&(FMCb.FMCb_0>=1))&&(It2.cable_used_2>=1))&&(It0.Cpt2_0>=1)))||((((Dom1.AMC_1>=1)&&(FMCb.FMCb_0>=1))&&(It2.cable_used_2>=1))&&(It1.Cpt2_1>=1)))||((((Dom4.AMC_4>=1)&&(FMCb.FMCb_0>=1))&&(It2.cable_used_2>=1))&&(It1.Cpt2_1>=1)))||((((Dom7.AMC_7>=1)&&(FMCb.FMCb_0>=1))&&(It2.cable_used_2>=1))&&(It1.Cpt2_1>=1)))||((((Dom2.AMC_2>=1)&&(FMCb.FMCb_0>=1))&&(It2.cable_used_2>=1))&&(It2.Cpt2_2>=1)))||((((Dom5.AMC_5>=1)&&(FMCb.FMCb_0>=1))&&(It2.cable_used_2>=1))&&(It2.Cpt2_2>=1)))||((((Dom8.AMC_8>=1)&&(FMCb.FMCb_0>=1))&&(It2.cable_used_2>=1))&&(It2.Cpt2_2>=1)))")U("((((R_tout.R_tout_0>=1)&&(It0.MSG_0>=1))||((R_tout.R_tout_0>=1)&&(It1.MSG_1>=1)))||((R_tout.R_tout_0>=1)&&(It2.MSG_2>=1)))"))))))
Formula 12 simplified : !FXF("((((((((((((((((((((((((((((((Dom0.AMC_0>=1)&&(FMCb.FMCb_0>=1))&&(It0.cable_used_0>=1))&&(It0.Cpt2_0>=1))||((((Dom3.AMC_3>=1)&&(FMCb.FMCb_0>=1))&&(It0.cable_used_0>=1))&&(It0.Cpt2_0>=1)))||((((Dom6.AMC_6>=1)&&(FMCb.FMCb_0>=1))&&(It0.cable_used_0>=1))&&(It0.Cpt2_0>=1)))||((((Dom1.AMC_1>=1)&&(FMCb.FMCb_0>=1))&&(It0.cable_used_0>=1))&&(It1.Cpt2_1>=1)))||((((Dom4.AMC_4>=1)&&(FMCb.FMCb_0>=1))&&(It0.cable_used_0>=1))&&(It1.Cpt2_1>=1)))||((((Dom7.AMC_7>=1)&&(FMCb.FMCb_0>=1))&&(It0.cable_used_0>=1))&&(It1.Cpt2_1>=1)))||((((Dom2.AMC_2>=1)&&(FMCb.FMCb_0>=1))&&(It0.cable_used_0>=1))&&(It2.Cpt2_2>=1)))||((((Dom5.AMC_5>=1)&&(FMCb.FMCb_0>=1))&&(It0.cable_used_0>=1))&&(It2.Cpt2_2>=1)))||((((Dom8.AMC_8>=1)&&(FMCb.FMCb_0>=1))&&(It0.cable_used_0>=1))&&(It2.Cpt2_2>=1)))||((((Dom0.AMC_0>=1)&&(FMCb.FMCb_0>=1))&&(It1.cable_used_1>=1))&&(It0.Cpt2_0>=1)))||((((Dom3.AMC_3>=1)&&(FMCb.FMCb_0>=1))&&(It1.cable_used_1>=1))&&(It0.Cpt2_0>=1)))||((((Dom6.AMC_6>=1)&&(FMCb.FMCb_0>=1))&&(It1.cable_used_1>=1))&&(It0.Cpt2_0>=1)))||((((Dom1.AMC_1>=1)&&(FMCb.FMCb_0>=1))&&(It1.cable_used_1>=1))&&(It1.Cpt2_1>=1)))||((((Dom4.AMC_4>=1)&&(FMCb.FMCb_0>=1))&&(It1.cable_used_1>=1))&&(It1.Cpt2_1>=1)))||((((Dom7.AMC_7>=1)&&(FMCb.FMCb_0>=1))&&(It1.cable_used_1>=1))&&(It1.Cpt2_1>=1)))||((((Dom2.AMC_2>=1)&&(FMCb.FMCb_0>=1))&&(It1.cable_used_1>=1))&&(It2.Cpt2_2>=1)))||((((Dom5.AMC_5>=1)&&(FMCb.FMCb_0>=1))&&(It1.cable_used_1>=1))&&(It2.Cpt2_2>=1)))||((((Dom8.AMC_8>=1)&&(FMCb.FMCb_0>=1))&&(It1.cable_used_1>=1))&&(It2.Cpt2_2>=1)))||((((Dom0.AMC_0>=1)&&(FMCb.FMCb_0>=1))&&(It2.cable_used_2>=1))&&(It0.Cpt2_0>=1)))||((((Dom3.AMC_3>=1)&&(FMCb.FMCb_0>=1))&&(It2.cable_used_2>=1))&&(It0.Cpt2_0>=1)))||((((Dom6.AMC_6>=1)&&(FMCb.FMCb_0>=1))&&(It2.cable_used_2>=1))&&(It0.Cpt2_0>=1)))||((((Dom1.AMC_1>=1)&&(FMCb.FMCb_0>=1))&&(It2.cable_used_2>=1))&&(It1.Cpt2_1>=1)))||((((Dom4.AMC_4>=1)&&(FMCb.FMCb_0>=1))&&(It2.cable_used_2>=1))&&(It1.Cpt2_1>=1)))||((((Dom7.AMC_7>=1)&&(FMCb.FMCb_0>=1))&&(It2.cable_used_2>=1))&&(It1.Cpt2_1>=1)))||((((Dom2.AMC_2>=1)&&(FMCb.FMCb_0>=1))&&(It2.cable_used_2>=1))&&(It2.Cpt2_2>=1)))||((((Dom5.AMC_5>=1)&&(FMCb.FMCb_0>=1))&&(It2.cable_used_2>=1))&&(It2.Cpt2_2>=1)))||((((Dom8.AMC_8>=1)&&(FMCb.FMCb_0>=1))&&(It2.cable_used_2>=1))&&(It2.Cpt2_2>=1)))" U "((((R_tout.R_tout_0>=1)&&(It0.MSG_0>=1))||((R_tout.R_tout_0>=1)&&(It1.MSG_1>=1)))||((R_tout.R_tout_0>=1)&&(It2.MSG_2>=1)))")
2 unique states visited
0 strongly connected components in search stack
1 transitions explored
2 items max in DFS search stack
4 ticks for the emptiness check
Model ,|S| ,Time ,Mem(kb) ,fin. SDD ,fin. DDD ,peak SDD ,peak DDD ,SDD Hom ,SDD cache peak ,DDD Hom ,DDD cachepeak ,SHom cache
STATS,0,5.94913,179508,1,0,335552,17951,1262,213695,235,113977,695503
no accepting run found
Formula 12 is TRUE no accepting run found.
FORMULA SafeBus-COL-03-LTLFireability-12 TRUE TECHNIQUES DECISION_DIAGRAMS TOPOLOGICAL USE_NUPN
Checking formula 13 : !(("(((((((It1.PMC_1>=1)&&(It1.wait_cable_1>=1))||((It2.PMC_2>=1)&&(It2.wait_cable_2>=1)))||((It0.PMC_0>=1)&&(It0.wait_cable_0>=1)))||((It2.PMC_2>=1)&&(It2.wait_cable_2>=1)))||((It0.PMC_0>=1)&&(It0.wait_cable_0>=1)))||((It1.PMC_1>=1)&&(It1.wait_cable_1>=1)))"))
Formula 13 simplified : !"(((((((It1.PMC_1>=1)&&(It1.wait_cable_1>=1))||((It2.PMC_2>=1)&&(It2.wait_cable_2>=1)))||((It0.PMC_0>=1)&&(It0.wait_cable_0>=1)))||((It2.PMC_2>=1)&&(It2.wait_cable_2>=1)))||((It0.PMC_0>=1)&&(It0.wait_cable_0>=1)))||((It1.PMC_1>=1)&&(It1.wait_cable_1>=1)))"
3 unique states visited
3 strongly connected components in search stack
3 transitions explored
3 items max in DFS search stack
0 ticks for the emptiness check
Model ,|S| ,Time ,Mem(kb) ,fin. SDD ,fin. DDD ,peak SDD ,peak DDD ,SDD Hom ,SDD cache peak ,DDD Hom ,DDD cachepeak ,SHom cache
STATS,0,5.95124,179772,1,0,335552,17951,1262,213695,235,113977,695520
an accepting run exists (use option '-e' to print it)
Formula 13 is FALSE accepting run found.
FORMULA SafeBus-COL-03-LTLFireability-13 FALSE TECHNIQUES DECISION_DIAGRAMS TOPOLOGICAL USE_NUPN
Checking formula 14 : !((X(X(G(F("((((It0.FMC_0>=1)&&(It0.cable_used_0>=1))||((It1.FMC_1>=1)&&(It1.cable_used_1>=1)))||((It2.FMC_2>=1)&&(It2.cable_used_2>=1)))"))))))
Formula 14 simplified : !XXGF"((((It0.FMC_0>=1)&&(It0.cable_used_0>=1))||((It1.FMC_1>=1)&&(It1.cable_used_1>=1)))||((It2.FMC_2>=1)&&(It2.cable_used_2>=1)))"
4 unique states visited
0 strongly connected components in search stack
4 transitions explored
4 items max in DFS search stack
17 ticks for the emptiness check
Model ,|S| ,Time ,Mem(kb) ,fin. SDD ,fin. DDD ,peak SDD ,peak DDD ,SDD Hom ,SDD cache peak ,DDD Hom ,DDD cachepeak ,SHom cache
STATS,0,6.12011,182140,1,0,339431,17951,1262,216295,235,113993,702879
no accepting run found
Formula 14 is TRUE no accepting run found.
FORMULA SafeBus-COL-03-LTLFireability-14 TRUE TECHNIQUES DECISION_DIAGRAMS TOPOLOGICAL USE_NUPN
Checking formula 15 : !((("((((((((((It0.Cpt1_0>=1)&&(It0.loop_em_0>=1))||((It0.Cpt1_0>=1)&&(It1.loop_em_1>=1)))||((It0.Cpt1_0>=1)&&(It2.loop_em_2>=1)))||((It1.Cpt1_1>=1)&&(It0.loop_em_0>=1)))||((It1.Cpt1_1>=1)&&(It1.loop_em_1>=1)))||((It1.Cpt1_1>=1)&&(It2.loop_em_2>=1)))||((It2.Cpt1_2>=1)&&(It0.loop_em_0>=1)))||((It2.Cpt1_2>=1)&&(It1.loop_em_1>=1)))||((It2.Cpt1_2>=1)&&(It2.loop_em_2>=1)))")U(X("((((It0.MSG_0>=1)&&(It0.listen_0>=1))||((It1.MSG_1>=1)&&(It1.listen_1>=1)))||((It2.MSG_2>=1)&&(It2.listen_2>=1)))"))))
Formula 15 simplified : !("((((((((((It0.Cpt1_0>=1)&&(It0.loop_em_0>=1))||((It0.Cpt1_0>=1)&&(It1.loop_em_1>=1)))||((It0.Cpt1_0>=1)&&(It2.loop_em_2>=1)))||((It1.Cpt1_1>=1)&&(It0.loop_em_0>=1)))||((It1.Cpt1_1>=1)&&(It1.loop_em_1>=1)))||((It1.Cpt1_1>=1)&&(It2.loop_em_2>=1)))||((It2.Cpt1_2>=1)&&(It0.loop_em_0>=1)))||((It2.Cpt1_2>=1)&&(It1.loop_em_1>=1)))||((It2.Cpt1_2>=1)&&(It2.loop_em_2>=1)))" U X"((((It0.MSG_0>=1)&&(It0.listen_0>=1))||((It1.MSG_1>=1)&&(It1.listen_1>=1)))||((It2.MSG_2>=1)&&(It2.listen_2>=1)))")
4 unique states visited
4 strongly connected components in search stack
4 transitions explored
4 items max in DFS search stack
0 ticks for the emptiness check
Model ,|S| ,Time ,Mem(kb) ,fin. SDD ,fin. DDD ,peak SDD ,peak DDD ,SDD Hom ,SDD cache peak ,DDD Hom ,DDD cachepeak ,SHom cache
STATS,0,6.12571,182396,1,0,339431,17951,1263,216295,235,113993,702904
an accepting run exists (use option '-e' to print it)
Formula 15 is FALSE accepting run found.
FORMULA SafeBus-COL-03-LTLFireability-15 FALSE TECHNIQUES DECISION_DIAGRAMS TOPOLOGICAL USE_NUPN
Running compilation step : CommandLine [args=[gcc, -c, -I/home/mcc/BenchKit//lts_install_dir//include, -I., -std=c99, -fPIC, -O3, model.c], workingDir=/home/mcc/execution]
WARNING : LTS min runner thread was asked to interrupt. Dying gracefully.

BK_STOP 1527832394943

--------------------
content from stderr:

+ export BINDIR=/home/mcc/BenchKit/
+ BINDIR=/home/mcc/BenchKit/
++ pwd
+ export MODEL=/home/mcc/execution
+ MODEL=/home/mcc/execution
+ /home/mcc/BenchKit//runeclipse.sh /home/mcc/execution LTLFireability -its -ltsminpath /home/mcc/BenchKit//lts_install_dir/ -smt
+ ulimit -s 65536
+ [[ -z '' ]]
+ export LTSMIN_MEM_SIZE=8589934592
+ LTSMIN_MEM_SIZE=8589934592
+ /home/mcc/BenchKit//itstools/its-tools -consoleLog -data /home/mcc/execution/workspace -pnfolder /home/mcc/execution -examination LTLFireability -z3path /home/mcc/BenchKit//z3/bin/z3 -yices2path /home/mcc/BenchKit//yices/bin/yices -its -ltsminpath /home/mcc/BenchKit//lts_install_dir/ -smt -vmargs -Dosgi.locking=none -Declipse.stateSaveDelayInterval=-1 -Dosgi.configuration.area=/tmp/.eclipse -Xss8m -Xms40m -Xmx8192m -Dfile.encoding=UTF-8 -Dosgi.requiredJavaVersion=1.6
Jun 01, 2018 5:53:04 AM fr.lip6.move.gal.application.Application start
INFO: Running its-tools with arguments : [-pnfolder, /home/mcc/execution, -examination, LTLFireability, -z3path, /home/mcc/BenchKit//z3/bin/z3, -yices2path, /home/mcc/BenchKit//yices/bin/yices, -its, -ltsminpath, /home/mcc/BenchKit//lts_install_dir/, -smt]
Jun 01, 2018 5:53:04 AM fr.lip6.move.gal.application.MccTranslator transformPNML
INFO: Parsing pnml file : /home/mcc/execution/model.pnml
Jun 01, 2018 5:53:04 AM fr.lip6.move.gal.pnml.togal.PnmlToGalTransformer transform
INFO: Detected file is not PT type :http://www.pnml.org/version-2009/grammar/symmetricnet
Jun 01, 2018 5:53:05 AM fr.lip6.move.gal.pnml.togal.PnmlToGalTransformer transform
INFO: Load time of PNML (colored model parsed with PNMLFW) : 1232 ms
Jun 01, 2018 5:53:05 AM fr.lip6.move.gal.pnml.togal.HLGALTransformer handlePage
INFO: Transformed 20 places.
Jun 01, 2018 5:53:05 AM fr.lip6.move.gal.pnml.togal.HLGALTransformer handlePage
INFO: Computed order using colors.
Jun 01, 2018 5:53:05 AM fr.lip6.move.gal.pnml.togal.HLGALTransformer handlePage
INFO: sort/places :Dom->AMC,wait_ack,
Dot->cable_free,ACK,T_out,R_tout,S_tout,FMCb,
It->Cpt2,Cpt1,msgl,cable_used,FMC,wait_cable,listen,RMC,PMC,MSG,wait_msg,loop_em,

Jun 01, 2018 5:53:05 AM fr.lip6.move.gal.pnml.togal.HLGALTransformer handlePage
INFO: Transformed 14 transitions.
Jun 01, 2018 5:53:05 AM fr.lip6.move.gal.pnml.togal.PnmlToGalTransformer transform
INFO: Computed order based on color domains.
Jun 01, 2018 5:53:05 AM fr.lip6.move.serialization.SerializationUtil systemToFile
INFO: Time to serialize gal into /home/mcc/execution/model.pnml.img.gal : 7 ms
Jun 01, 2018 5:53:05 AM fr.lip6.move.gal.application.MccTranslator applyOrder
INFO: Applying decomposition
Jun 01, 2018 5:53:05 AM fr.lip6.move.gal.instantiate.CompositeBuilder decomposeWithOrder
INFO: Decomposing Gal with order
Jun 01, 2018 5:53:05 AM fr.lip6.move.gal.instantiate.Instantiator fuseEqualParameters
INFO: Fused parameters : $x and $y of transition C_refuse
Jun 01, 2018 5:53:05 AM fr.lip6.move.gal.instantiate.Instantiator fuseEqualParameters
INFO: Fused parameters : $i and $j of transition C_free
Jun 01, 2018 5:53:05 AM fr.lip6.move.gal.instantiate.Instantiator fuseEqualParameters
INFO: Fused parameters : $x and $y of transition C_provide
Jun 01, 2018 5:53:05 AM fr.lip6.move.gal.instantiate.Instantiator fuseEqualParameters
INFO: Fused parameters : $r and $i of transition I_rec1
Jun 01, 2018 5:53:05 AM fr.lip6.move.gal.instantiate.Instantiator fuseEqualParameters
INFO: Fused parameters : $i and $j of transition I_emit
Jun 01, 2018 5:53:05 AM fr.lip6.move.gal.instantiate.Instantiator fuseEqualParameters
INFO: Fused parameters : $i and $j of transition I_refused
Jun 01, 2018 5:53:05 AM fr.lip6.move.gal.instantiate.Instantiator fuseEqualParameters
INFO: Fused parameters : $r and $i of transition I_rec2
Jun 01, 2018 5:53:05 AM fr.lip6.move.gal.instantiate.DomainAnalyzer computeVariableDomains
INFO: Found a total of 1 fixed domain variables (out of 60 variables) in GAL type Document
Jun 01, 2018 5:53:05 AM fr.lip6.move.gal.instantiate.Simplifier printConstantVars
INFO: Found a total of 3 constant array cells/variables (out of 60 variables) in type Document
Jun 01, 2018 5:53:05 AM fr.lip6.move.gal.instantiate.Simplifier printConstantVars
INFO: msgl[0-2],
Jun 01, 2018 5:53:05 AM fr.lip6.move.gal.instantiate.Instantiator instantiateParameters
INFO: On-the-fly reduction of False transitions avoided exploring 3.0 instantiations of transitions. Total transitions/syncs built is 112
Jun 01, 2018 5:53:05 AM fr.lip6.move.gal.instantiate.DomainAnalyzer computeVariableDomains
INFO: Found a total of 1 fixed domain variables (out of 60 variables) in GAL type Document
Jun 01, 2018 5:53:05 AM fr.lip6.move.gal.instantiate.Simplifier printConstantVars
INFO: Found a total of 3 constant array cells/variables (out of 60 variables) in type Document
Jun 01, 2018 5:53:05 AM fr.lip6.move.gal.instantiate.Simplifier printConstantVars
INFO: msgl[0-2],
Jun 01, 2018 5:53:06 AM fr.lip6.move.gal.instantiate.Simplifier simplifyConstantVariables
INFO: Removed constant array :msgl[]
Jun 01, 2018 5:53:06 AM fr.lip6.move.gal.instantiate.Simplifier simplifyConstantVariables
INFO: Simplified 18 expressions due to constant valuations.
Jun 01, 2018 5:53:06 AM fr.lip6.move.gal.instantiate.GALRewriter flatten
INFO: Flatten gal took : 77 ms
Jun 01, 2018 5:53:06 AM fr.lip6.move.gal.instantiate.CompositeBuilder rewriteArraysToAllowPartition
INFO: Rewriting arrays Cpt2, Cpt1, cable_used, FMC, AMC, wait_ack, wait_cable, listen, RMC, PMC, MSG, wait_msg, loop_em to variables to allow decomposition.
Jun 01, 2018 5:53:06 AM fr.lip6.move.gal.instantiate.Instantiator fuseIsomorphicEffects
INFO: Removed a total of 96 redundant transitions.
Jun 01, 2018 5:53:06 AM fr.lip6.move.serialization.SerializationUtil systemToFile
INFO: Time to serialize gal into /home/mcc/execution/LTLFireability.pnml.gal : 5 ms
Jun 01, 2018 5:53:06 AM fr.lip6.move.serialization.SerializationUtil serializePropertiesForITSLTLTools
INFO: Time to serialize properties into /home/mcc/execution/LTLFireability.ltl : 5 ms
Jun 01, 2018 5:53:06 AM fr.lip6.move.gal.semantics.DeterministicNextBuilder getDeterministicNext
INFO: Input system was not deterministic with 22 transitions. Expanding to a total of 145 deterministic transitions.
Jun 01, 2018 5:53:06 AM fr.lip6.move.gal.semantics.DeterministicNextBuilder getDeterministicNext
INFO: Determinization took 3 ms.
Jun 01, 2018 5:53:07 AM fr.lip6.move.gal.gal2smt.bmc.KInductionSolver computeAndDeclareInvariants
INFO: Computed 17 place invariants in 38 ms
Jun 01, 2018 5:53:07 AM fr.lip6.move.gal.gal2smt.bmc.KInductionSolver init
INFO: Proved 57 variables to be positive in 323 ms
Jun 01, 2018 5:53:07 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver computeAblingMatrix
INFO: Computing symmetric may disable matrix : 97 transitions.
Jun 01, 2018 5:53:07 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of disable matrix completed :0/97 took 0 ms. Total solver calls (SAT/UNSAT): 0(0/0)
Jun 01, 2018 5:53:07 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of Complete disable matrix. took 24 ms. Total solver calls (SAT/UNSAT): 0(0/0)
Jun 01, 2018 5:53:07 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver computeAblingMatrix
INFO: Computing symmetric may enable matrix : 97 transitions.
Jun 01, 2018 5:53:07 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of Complete enable matrix. took 7 ms. Total solver calls (SAT/UNSAT): 0(0/0)
Jun 01, 2018 5:53:09 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver computeCoEnablingMatrix
INFO: Computing symmetric co enabling matrix : 97 transitions.
Jun 01, 2018 5:53:10 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(11/97) took 1141 ms. Total solver calls (SAT/UNSAT): 912(267/645)
Jun 01, 2018 5:53:13 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(58/97) took 4163 ms. Total solver calls (SAT/UNSAT): 3312(1139/2173)
Skipping mayMatrices nes/nds SMT solver raised an exception or timeout.
java.lang.RuntimeException: SMT solver raised an exception or timeout.
at fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver.computeCoEnablingMatrix(NecessaryEnablingsolver.java:480)
at fr.lip6.move.gal.gal2pins.Gal2PinsTransformerNext.printLabels(Gal2PinsTransformerNext.java:530)
at fr.lip6.move.gal.gal2pins.Gal2PinsTransformerNext.printDependencyMatrix(Gal2PinsTransformerNext.java:209)
at fr.lip6.move.gal.gal2pins.Gal2PinsTransformerNext.buildBodyFile(Gal2PinsTransformerNext.java:85)
at fr.lip6.move.gal.gal2pins.Gal2PinsTransformerNext.transform(Gal2PinsTransformerNext.java:830)
at fr.lip6.move.gal.application.LTSminRunner$1.run(LTSminRunner.java:71)
at java.lang.Thread.run(Thread.java:748)
Jun 01, 2018 5:53:13 AM fr.lip6.move.gal.gal2pins.Gal2PinsTransformerNext transform
INFO: Built C files in 7122ms conformant to PINS in folder :/home/mcc/execution

Sequence of Actions to be Executed by the VM

This is useful if one wants to reexecute the tool in the VM from the submitted image disk.

set -x
# this is for BenchKit: configuration of major elements for the test
export BK_INPUT="SafeBus-COL-03"
export BK_EXAMINATION="LTLFireability"
export BK_TOOL="itstools"
export BK_RESULT_DIR="/tmp/BK_RESULTS/OUTPUTS"
export BK_TIME_CONFINEMENT="3600"
export BK_MEMORY_CONFINEMENT="16384"

# this is specific to your benchmark or test

export BIN_DIR="$HOME/BenchKit/bin"

# remove the execution directoty if it exists (to avoid increse of .vmdk images)
if [ -d execution ] ; then
rm -rf execution
fi

tar xzf /home/mcc/BenchKit/INPUTS/SafeBus-COL-03.tgz
mv SafeBus-COL-03 execution
cd execution
pwd
ls -lh

# this is for BenchKit: explicit launching of the test
echo "====================================================================="
echo " Generated by BenchKit 2-3637"
echo " Executing tool itstools"
echo " Input is SafeBus-COL-03, examination is LTLFireability"
echo " Time confinement is $BK_TIME_CONFINEMENT seconds"
echo " Memory confinement is 16384 MBytes"
echo " Number of cores is 4"
echo " Run identifier is r212-smll-152732263400516"
echo "====================================================================="
echo
echo "--------------------"
echo "content from stdout:"
echo
echo "=== Data for post analysis generated by BenchKit (invocation template)"
echo
if [ "LTLFireability" = "UpperBounds" ] ; then
echo "The expected result is a vector of positive values"
echo NUM_VECTOR
elif [ "LTLFireability" != "StateSpace" ] ; then
echo "The expected result is a vector of booleans"
echo BOOL_VECTOR
else
echo "no data necessary for post analysis"
fi
echo
if [ -f "LTLFireability.txt" ] ; then
echo "here is the order used to build the result vector(from text file)"
for x in $(grep Property LTLFireability.txt | cut -d ' ' -f 2 | sort -u) ; do
echo "FORMULA_NAME $x"
done
elif [ -f "LTLFireability.xml" ] ; then # for cunf (txt files deleted;-)
echo echo "here is the order used to build the result vector(from xml file)"
for x in $(grep '' LTLFireability.xml | cut -d '>' -f 2 | cut -d '<' -f 1 | sort -u) ; do
echo "FORMULA_NAME $x"
done
fi
echo
echo "=== Now, execution of the tool begins"
echo
echo -n "BK_START "
date -u +%s%3N
echo
timeout -s 9 $BK_TIME_CONFINEMENT bash -c "/home/mcc/BenchKit/BenchKit_head.sh 2> STDERR ; echo ; echo -n \"BK_STOP \" ; date -u +%s%3N"
if [ $? -eq 137 ] ; then
echo
echo "BK_TIME_CONFINEMENT_REACHED"
fi
echo
echo "--------------------"
echo "content from stderr:"
echo
cat STDERR ;