Execution Chart

We display below the execution chart for this examination (boot time has been removed).

Trace from the execution

Waiting for the VM to be ready (probing ssh)
....................
/home/mcc/execution
total 184K
-rw-r--r-- 1 mcc users 3.1K May 15 18:54 CTLCardinality.txt
-rw-r--r-- 1 mcc users 17K May 15 18:54 CTLCardinality.xml
-rw-r--r-- 1 mcc users 2.5K May 15 18:54 CTLFireability.txt
-rw-r--r-- 1 mcc users 17K May 15 18:54 CTLFireability.xml
-rw-r--r-- 1 mcc users 4.0K May 15 18:50 GenericPropertiesDefinition.xml
-rw-r--r-- 1 mcc users 6.0K May 15 18:50 GenericPropertiesVerdict.xml
-rw-r--r-- 1 mcc users 2.5K May 26 09:26 LTLCardinality.txt
-rw-r--r-- 1 mcc users 12K May 26 09:26 LTLCardinality.xml
-rw-r--r-- 1 mcc users 1.9K May 26 09:26 LTLFireability.txt
-rw-r--r-- 1 mcc users 8.7K May 26 09:26 LTLFireability.xml
-rw-r--r-- 1 mcc users 3.5K May 15 18:54 ReachabilityCardinality.txt
-rw-r--r-- 1 mcc users 18K May 15 18:54 ReachabilityCardinality.xml
-rw-r--r-- 1 mcc users 115 May 15 18:54 ReachabilityDeadlock.txt
-rw-r--r-- 1 mcc users 353 May 15 18:54 ReachabilityDeadlock.xml
-rw-r--r-- 1 mcc users 2.9K May 15 18:54 ReachabilityFireability.txt
-rw-r--r-- 1 mcc users 18K May 15 18:54 ReachabilityFireability.xml
-rw-r--r-- 1 mcc users 1.7K May 15 18:54 UpperBounds.txt
-rw-r--r-- 1 mcc users 3.7K May 15 18:54 UpperBounds.xml
-rw-r--r-- 1 mcc users 6 May 15 18:50 equiv_col
-rw-r--r-- 1 mcc users 4 May 15 18:50 instance
-rw-r--r-- 1 mcc users 6 May 15 18:50 iscolored
-rw-r--r-- 1 mcc users 13K May 15 18:50 model.pnml
=====================================================================
Generated by BenchKit 2-3637
Executing tool itstools
Input is HouseConstruction-PT-200, examination is LTLFireability
Time confinement is 3600 seconds
Memory confinement is 16384 MBytes
Number of cores is 4
Run identifier is r212-smll-152732263000290
=====================================================================

--------------------
content from stdout:

=== Data for post analysis generated by BenchKit (invocation template)

The expected result is a vector of booleans
BOOL_VECTOR

here is the order used to build the result vector(from text file)
FORMULA_NAME HouseConstruction-PT-200-LTLFireability-00
FORMULA_NAME HouseConstruction-PT-200-LTLFireability-01
FORMULA_NAME HouseConstruction-PT-200-LTLFireability-02
FORMULA_NAME HouseConstruction-PT-200-LTLFireability-03
FORMULA_NAME HouseConstruction-PT-200-LTLFireability-04
FORMULA_NAME HouseConstruction-PT-200-LTLFireability-05
FORMULA_NAME HouseConstruction-PT-200-LTLFireability-06
FORMULA_NAME HouseConstruction-PT-200-LTLFireability-07
FORMULA_NAME HouseConstruction-PT-200-LTLFireability-08
FORMULA_NAME HouseConstruction-PT-200-LTLFireability-09
FORMULA_NAME HouseConstruction-PT-200-LTLFireability-10
FORMULA_NAME HouseConstruction-PT-200-LTLFireability-11
FORMULA_NAME HouseConstruction-PT-200-LTLFireability-12
FORMULA_NAME HouseConstruction-PT-200-LTLFireability-13
FORMULA_NAME HouseConstruction-PT-200-LTLFireability-14
FORMULA_NAME HouseConstruction-PT-200-LTLFireability-15

=== Now, execution of the tool begins

BK_START 1527949843272

Using solver Z3 to compute partial order matrices.
Built C files in :
/home/mcc/execution
Invoking ITS tools like this :CommandLine [args=[/home/mcc/BenchKit/itstools/plugins/fr.lip6.move.gal.itstools.binaries_1.0.0.201805151631/bin/its-ltl-linux64, --gc-threshold, 2000000, -i, /home/mcc/execution/LTLFireability.pnml.gal, -t, CGAL, -LTL, /home/mcc/execution/LTLFireability.ltl, -c, -stutter-deadlock], workingDir=/home/mcc/execution]

its-ltl command run as :

/home/mcc/BenchKit/itstools/plugins/fr.lip6.move.gal.itstools.binaries_1.0.0.201805151631/bin/its-ltl-linux64 --gc-threshold 2000000 -i /home/mcc/execution/LTLFireability.pnml.gal -t CGAL -LTL /home/mcc/execution/LTLFireability.ltl -c -stutter-deadlock
Read 16 LTL properties
Checking formula 0 : !((G(F((G("(p17>=1)"))U(X("(p18>=1)"))))))
Formula 0 simplified : !GF(G"(p17>=1)" U X"(p18>=1)")
Presburger conditions satisfied. Using coverability to approximate state space in K-Induction.
// Phase 1: matrix 18 rows 26 cols
Running compilation step : CommandLine [args=[gcc, -c, -I/home/mcc/BenchKit//lts_install_dir//include, -I., -std=c99, -fPIC, -O3, model.c], workingDir=/home/mcc/execution]
Compilation finished in 569 ms.
Running link step : CommandLine [args=[gcc, -shared, -o, gal.so, model.o], workingDir=/home/mcc/execution]
Link finished in 39 ms.
Running LTSmin : CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=1, --when, --ltl, [](<>(([]((LTLAP0==true)))U(X((LTLAP1==true))))), --buchi-type=spotba], workingDir=/home/mcc/execution]
WARNING : LTSmin timed out (>225 s) on command CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=1, --when, --ltl, [](<>(([]((LTLAP0==true)))U(X((LTLAP1==true))))), --buchi-type=spotba], workingDir=/home/mcc/execution]
Running LTSmin : CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=1, -p, --pins-guards, --when, --ltl, (LTLAP1==true), --buchi-type=spotba], workingDir=/home/mcc/execution]
LTSmin run took 65 ms.
FORMULA HouseConstruction-PT-200-LTLFireability-01 FALSE TECHNIQUES PARTIAL_ORDER EXPLICIT LTSMIN SAT_SMT
Running LTSmin : CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=1, -p, --pins-guards, --when, --ltl, []((LTLAP2==true)), --buchi-type=spotba], workingDir=/home/mcc/execution]
LTSmin run took 73 ms.
FORMULA HouseConstruction-PT-200-LTLFireability-02 FALSE TECHNIQUES PARTIAL_ORDER EXPLICIT LTSMIN SAT_SMT
Running LTSmin : CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=1, --when, --ltl, []((X(<>((LTLAP3==true))))U((LTLAP4==true))), --buchi-type=spotba], workingDir=/home/mcc/execution]
WARNING : LTSmin timed out (>225 s) on command CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=1, --when, --ltl, []((X(<>((LTLAP3==true))))U((LTLAP4==true))), --buchi-type=spotba], workingDir=/home/mcc/execution]
Running LTSmin : CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=1, --when, --ltl, <>(X(((LTLAP3==true))U(<>((LTLAP5==true))))), --buchi-type=spotba], workingDir=/home/mcc/execution]
WARNING : LTSmin timed out (>225 s) on command CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=1, --when, --ltl, <>(X(((LTLAP3==true))U(<>((LTLAP5==true))))), --buchi-type=spotba], workingDir=/home/mcc/execution]
Running LTSmin : CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=1, -p, --pins-guards, --when, --ltl, (<>((LTLAP6==true)))U([]([]([]((LTLAP7==true))))), --buchi-type=spotba], workingDir=/home/mcc/execution]
LTSmin run took 104 ms.
FORMULA HouseConstruction-PT-200-LTLFireability-05 FALSE TECHNIQUES PARTIAL_ORDER EXPLICIT LTSMIN SAT_SMT
Running LTSmin : CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=1, --when, --ltl, <>(((LTLAP8==true))U(X((LTLAP1==true)))), --buchi-type=spotba], workingDir=/home/mcc/execution]
sparsehash FATAL ERROR: failed to allocate 35 groups
WARNING : LTSmin timed out (>225 s) on command CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=1, --when, --ltl, <>(((LTLAP8==true))U(X((LTLAP1==true)))), --buchi-type=spotba], workingDir=/home/mcc/execution]
Running LTSmin : CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=1, -p, --pins-guards, --when, --ltl, [](<>((<>((LTLAP9==true)))U((LTLAP10==true)))), --buchi-type=spotba], workingDir=/home/mcc/execution]
LTSmin run took 169 ms.
FORMULA HouseConstruction-PT-200-LTLFireability-07 FALSE TECHNIQUES PARTIAL_ORDER EXPLICIT LTSMIN SAT_SMT
Running LTSmin : CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=1, --when, --ltl, ((LTLAP7==true))U(X(X(<>((LTLAP7==true))))), --buchi-type=spotba], workingDir=/home/mcc/execution]
WARNING : LTSmin timed out (>225 s) on command CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=1, --when, --ltl, ((LTLAP7==true))U(X(X(<>((LTLAP7==true))))), --buchi-type=spotba], workingDir=/home/mcc/execution]
Running LTSmin : CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=1, -p, --pins-guards, --when, --ltl, <>([](<>((LTLAP10==true)))), --buchi-type=spotba], workingDir=/home/mcc/execution]
LTSmin run took 100 ms.
FORMULA HouseConstruction-PT-200-LTLFireability-09 FALSE TECHNIQUES PARTIAL_ORDER EXPLICIT LTSMIN SAT_SMT
Running LTSmin : CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=1, -p, --pins-guards, --when, --ltl, ([]((LTLAP10==true)))U(<>([]([]((LTLAP11==true))))), --buchi-type=spotba], workingDir=/home/mcc/execution]
LTSmin run took 48 ms.
FORMULA HouseConstruction-PT-200-LTLFireability-10 FALSE TECHNIQUES PARTIAL_ORDER EXPLICIT LTSMIN SAT_SMT
Running LTSmin : CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=1, --when, --ltl, []([]((X((LTLAP5==true)))U(<>((LTLAP11==true))))), --buchi-type=spotba], workingDir=/home/mcc/execution]
WARNING : LTSmin timed out (>225 s) on command CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=1, --when, --ltl, []([]((X((LTLAP5==true)))U(<>((LTLAP11==true))))), --buchi-type=spotba], workingDir=/home/mcc/execution]
Running LTSmin : CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=1, -p, --pins-guards, --when, --ltl, (LTLAP5==true), --buchi-type=spotba], workingDir=/home/mcc/execution]
LTSmin run took 74 ms.
FORMULA HouseConstruction-PT-200-LTLFireability-12 FALSE TECHNIQUES PARTIAL_ORDER EXPLICIT LTSMIN SAT_SMT
Running LTSmin : CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=1, --when, --ltl, [](<>([](X(X((LTLAP10==true)))))), --buchi-type=spotba], workingDir=/home/mcc/execution]
LTSmin run took 99 ms.
FORMULA HouseConstruction-PT-200-LTLFireability-13 FALSE TECHNIQUES PARTIAL_ORDER EXPLICIT LTSMIN SAT_SMT
Running LTSmin : CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=1, --when, --ltl, X((LTLAP12==true)), --buchi-type=spotba], workingDir=/home/mcc/execution]
LTSmin run took 314 ms.
FORMULA HouseConstruction-PT-200-LTLFireability-14 FALSE TECHNIQUES PARTIAL_ORDER EXPLICIT LTSMIN SAT_SMT
Running LTSmin : CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=1, -p, --pins-guards, --when, --ltl, <>((LTLAP7==true)), --buchi-type=spotba], workingDir=/home/mcc/execution]
LTSmin run took 52 ms.
FORMULA HouseConstruction-PT-200-LTLFireability-15 TRUE TECHNIQUES PARTIAL_ORDER EXPLICIT LTSMIN SAT_SMT
Retrying LTSmin with larger timeout 1800 s
Running LTSmin : CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=1, --when, --ltl, [](<>(([]((LTLAP0==true)))U(X((LTLAP1==true))))), --buchi-type=spotba], workingDir=/home/mcc/execution]
WARNING : LTS min runner thread failed on error :java.lang.RuntimeException: Unexpected exception when executing ltsmin :CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=1, --when, --ltl, [](<>(([]((LTLAP0==true)))U(X((LTLAP1==true))))), --buchi-type=spotba], workingDir=/home/mcc/execution]
255

BK_STOP 1527952003411

--------------------
content from stderr:

+ export BINDIR=/home/mcc/BenchKit/
+ BINDIR=/home/mcc/BenchKit/
++ pwd
+ export MODEL=/home/mcc/execution
+ MODEL=/home/mcc/execution
+ /home/mcc/BenchKit//runeclipse.sh /home/mcc/execution LTLFireability -its -ltsminpath /home/mcc/BenchKit//lts_install_dir/ -smt
+ ulimit -s 65536
+ [[ -z '' ]]
+ export LTSMIN_MEM_SIZE=8589934592
+ LTSMIN_MEM_SIZE=8589934592
+ /home/mcc/BenchKit//itstools/its-tools -consoleLog -data /home/mcc/execution/workspace -pnfolder /home/mcc/execution -examination LTLFireability -z3path /home/mcc/BenchKit//z3/bin/z3 -yices2path /home/mcc/BenchKit//yices/bin/yices -its -ltsminpath /home/mcc/BenchKit//lts_install_dir/ -smt -vmargs -Dosgi.locking=none -Declipse.stateSaveDelayInterval=-1 -Dosgi.configuration.area=/tmp/.eclipse -Xss8m -Xms40m -Xmx8192m -Dfile.encoding=UTF-8 -Dosgi.requiredJavaVersion=1.6
Jun 02, 2018 2:30:45 PM fr.lip6.move.gal.application.Application start
INFO: Running its-tools with arguments : [-pnfolder, /home/mcc/execution, -examination, LTLFireability, -z3path, /home/mcc/BenchKit//z3/bin/z3, -yices2path, /home/mcc/BenchKit//yices/bin/yices, -its, -ltsminpath, /home/mcc/BenchKit//lts_install_dir/, -smt]
Jun 02, 2018 2:30:45 PM fr.lip6.move.gal.application.MccTranslator transformPNML
INFO: Parsing pnml file : /home/mcc/execution/model.pnml
Jun 02, 2018 2:30:45 PM fr.lip6.move.gal.nupn.PTNetReader loadFromXML
INFO: Load time of PNML (sax parser for PT used): 35 ms
Jun 02, 2018 2:30:45 PM fr.lip6.move.gal.pnml.togal.PTGALTransformer handlePage
INFO: Transformed 26 places.
Jun 02, 2018 2:30:45 PM fr.lip6.move.gal.pnml.togal.PTGALTransformer handlePage
INFO: Transformed 18 transitions.
Jun 02, 2018 2:30:45 PM fr.lip6.move.serialization.SerializationUtil systemToFile
INFO: Time to serialize gal into /home/mcc/execution/model.pnml.img.gal : 7 ms
Jun 02, 2018 2:30:45 PM fr.lip6.move.gal.instantiate.GALRewriter flatten
INFO: Flatten gal took : 26 ms
Jun 02, 2018 2:30:45 PM fr.lip6.move.serialization.SerializationUtil systemToFile
INFO: Time to serialize gal into /home/mcc/execution/LTLFireability.pnml.gal : 2 ms
Jun 02, 2018 2:30:45 PM fr.lip6.move.serialization.SerializationUtil serializePropertiesForITSLTLTools
INFO: Time to serialize properties into /home/mcc/execution/LTLFireability.ltl : 1 ms
Jun 02, 2018 2:30:45 PM fr.lip6.move.gal.semantics.DeterministicNextBuilder getDeterministicNext
INFO: Input system was already deterministic with 18 transitions.
Jun 02, 2018 2:30:45 PM fr.lip6.move.gal.gal2smt.bmc.KInductionSolver computeAndDeclareInvariants
INFO: Computed 0 place invariants in 4 ms
Jun 02, 2018 2:30:46 PM fr.lip6.move.gal.gal2smt.bmc.KInductionSolver init
INFO: Proved 26 variables to be positive in 126 ms
Jun 02, 2018 2:30:46 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver computeAblingMatrix
INFO: Computing symmetric may disable matrix : 18 transitions.
Jun 02, 2018 2:30:46 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of disable matrix completed :0/18 took 0 ms. Total solver calls (SAT/UNSAT): 0(0/0)
Jun 02, 2018 2:30:46 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of Complete disable matrix. took 1 ms. Total solver calls (SAT/UNSAT): 0(0/0)
Jun 02, 2018 2:30:46 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver computeAblingMatrix
INFO: Computing symmetric may enable matrix : 18 transitions.
Jun 02, 2018 2:30:46 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of Complete enable matrix. took 0 ms. Total solver calls (SAT/UNSAT): 0(0/0)
Jun 02, 2018 2:30:46 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver computeCoEnablingMatrix
INFO: Computing symmetric co enabling matrix : 18 transitions.
Jun 02, 2018 2:30:46 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of Finished co-enabling matrix. took 139 ms. Total solver calls (SAT/UNSAT): 0(0/0)
Jun 02, 2018 2:30:46 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver computeDoNotAccord
INFO: Computing Do-Not-Accords matrix : 18 transitions.
Jun 02, 2018 2:30:46 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of Completed DNA matrix. took 103 ms. Total solver calls (SAT/UNSAT): 24(0/24)
Jun 02, 2018 2:30:46 PM fr.lip6.move.gal.gal2pins.Gal2PinsTransformerNext transform
INFO: Built C files in 807ms conformant to PINS in folder :/home/mcc/execution
ITS-tools command line returned an error code 1
pins2lts-mc, 0.000: Registering PINS so language module
pins2lts-mc, 0.000: Loading model from ./gal.so
pins2lts-mc, 0.000: library has no initializer
pins2lts-mc, 0.000: loading model GAL
pins2lts-mc, 0.000: completed loading model GAL
pins2lts-mc, 0.000: LTL layer: formula: [](<>(([]((LTLAP0==true)))U(X((LTLAP1==true)))))
pins2lts-mc, 0.000: "[](<>(([]((LTLAP0==true)))U(X((LTLAP1==true)))))" is not a file, parsing as formula...
pins2lts-mc, 0.000: Using Spin LTL semantics
pins2lts-mc, 0.008: buchi has 2 states
pins2lts-mc, 0.008: Weak Buchi automaton detected, adding non-accepting as progress label.
pins2lts-mc, 0.009: DFS-FIFO for weak LTL, using special progress label 32
pins2lts-mc, 0.009: There are 33 state labels and 1 edge labels
pins2lts-mc, 0.009: State length is 27, there are 21 groups
pins2lts-mc, 0.009: Running dfsfifo using 1 core (sequential)
pins2lts-mc, 0.009: Using a tree table with 2^27 elements
pins2lts-mc, 0.009: Successor permutation: rr
pins2lts-mc, 0.009: Global bits: 2, count bits: 0, local bits: 0
pins2lts-mc, 0.083: 925 levels 1000 states 10230 transitions
pins2lts-mc, 0.146: 1838 levels 2000 states 20542 transitions
pins2lts-mc, 0.184: 2402 levels 4000 states 28595 transitions
pins2lts-mc, 0.207: 2402 levels 8000 states 37269 transitions
pins2lts-mc, 0.254: 2402 levels 16000 states 55250 transitions
pins2lts-mc, 0.354: 2402 levels 32000 states 96884 transitions
pins2lts-mc, 0.550: 2402 levels 64000 states 182580 transitions
pins2lts-mc, 0.922: 2402 levels 128000 states 354035 transitions
pins2lts-mc, 1.651: 2402 levels 256000 states 740677 transitions
pins2lts-mc, 2.962: 2402 levels 512000 states 1529696 transitions
pins2lts-mc, 5.314: 2402 levels 1024000 states 3099689 transitions
pins2lts-mc, 9.977: 2402 levels 2048000 states 6310756 transitions
pins2lts-mc, 19.955: 2402 levels 4096000 states 13376486 transitions
pins2lts-mc, 39.497: 2402 levels 8192000 states 27549194 transitions
pins2lts-mc, 77.679: 2402 levels 16384000 states 56445340 transitions
pins2lts-mc, 161.806: 2402 levels 32768000 states 120549665 transitions
pins2lts-mc, 332.601: 2402 levels 65536000 states 246938632 transitions
pins2lts-mc, 710.165: 2402 levels 131072000 states 501739215 transitions
pins2lts-mc, 802.809: Error: tree roots table full! Change -s/--ratio.
pins2lts-mc, 802.811:
pins2lts-mc, 802.811:
pins2lts-mc, 802.811: Explored 134194404 states 514335606 transitions, fanout: 3.833
pins2lts-mc, 802.811: Total exploration time 802.800 sec (802.800 sec minimum, 802.800 sec on average)
pins2lts-mc, 802.811: States per second: 167158, Transitions per second: 640677
pins2lts-mc, 802.811:
pins2lts-mc, 802.811: Progress states detected: 1
pins2lts-mc, 802.811: Redundant explorations: -0.0170
pins2lts-mc, 802.811:
pins2lts-mc, 802.811: Queue width: 8B, total height: 2403, memory: 0.02MB
pins2lts-mc, 802.811: Tree memory: 1113.6MB, 8.7 B/state, compr.: 7.9%
pins2lts-mc, 802.811: Tree fill ratio (roots/leafs): 99.0%/34.0%
pins2lts-mc, 802.811: Stored 18 string chucks using 0MB
pins2lts-mc, 802.811: Total memory used for chunk indexing: 0MB
pins2lts-mc, 802.811: Est. total memory use: 1113.6MB (~1024.0MB paged-in)
java.lang.RuntimeException: Unexpected exception when executing ltsmin :CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=1, --when, --ltl, [](<>(([]((LTLAP0==true)))U(X((LTLAP1==true))))), --buchi-type=spotba], workingDir=/home/mcc/execution]
255
at fr.lip6.move.gal.application.LTSminRunner.checkProperty(LTSminRunner.java:167)
at fr.lip6.move.gal.application.LTSminRunner.access$9(LTSminRunner.java:122)
at fr.lip6.move.gal.application.LTSminRunner$1.run(LTSminRunner.java:98)
at java.lang.Thread.run(Thread.java:748)

Sequence of Actions to be Executed by the VM

This is useful if one wants to reexecute the tool in the VM from the submitted image disk.

set -x
# this is for BenchKit: configuration of major elements for the test
export BK_INPUT="HouseConstruction-PT-200"
export BK_EXAMINATION="LTLFireability"
export BK_TOOL="itstools"
export BK_RESULT_DIR="/tmp/BK_RESULTS/OUTPUTS"
export BK_TIME_CONFINEMENT="3600"
export BK_MEMORY_CONFINEMENT="16384"

# this is specific to your benchmark or test

export BIN_DIR="$HOME/BenchKit/bin"

# remove the execution directoty if it exists (to avoid increse of .vmdk images)
if [ -d execution ] ; then
rm -rf execution
fi

tar xzf /home/mcc/BenchKit/INPUTS/HouseConstruction-PT-200.tgz
mv HouseConstruction-PT-200 execution
cd execution
pwd
ls -lh

# this is for BenchKit: explicit launching of the test
echo "====================================================================="
echo " Generated by BenchKit 2-3637"
echo " Executing tool itstools"
echo " Input is HouseConstruction-PT-200, examination is LTLFireability"
echo " Time confinement is $BK_TIME_CONFINEMENT seconds"
echo " Memory confinement is 16384 MBytes"
echo " Number of cores is 4"
echo " Run identifier is r212-smll-152732263000290"
echo "====================================================================="
echo
echo "--------------------"
echo "content from stdout:"
echo
echo "=== Data for post analysis generated by BenchKit (invocation template)"
echo
if [ "LTLFireability" = "UpperBounds" ] ; then
echo "The expected result is a vector of positive values"
echo NUM_VECTOR
elif [ "LTLFireability" != "StateSpace" ] ; then
echo "The expected result is a vector of booleans"
echo BOOL_VECTOR
else
echo "no data necessary for post analysis"
fi
echo
if [ -f "LTLFireability.txt" ] ; then
echo "here is the order used to build the result vector(from text file)"
for x in $(grep Property LTLFireability.txt | cut -d ' ' -f 2 | sort -u) ; do
echo "FORMULA_NAME $x"
done
elif [ -f "LTLFireability.xml" ] ; then # for cunf (txt files deleted;-)
echo echo "here is the order used to build the result vector(from xml file)"
for x in $(grep '' LTLFireability.xml | cut -d '>' -f 2 | cut -d '<' -f 1 | sort -u) ; do
echo "FORMULA_NAME $x"
done
fi
echo
echo "=== Now, execution of the tool begins"
echo
echo -n "BK_START "
date -u +%s%3N
echo
timeout -s 9 $BK_TIME_CONFINEMENT bash -c "/home/mcc/BenchKit/BenchKit_head.sh 2> STDERR ; echo ; echo -n \"BK_STOP \" ; date -u +%s%3N"
if [ $? -eq 137 ] ; then
echo
echo "BK_TIME_CONFINEMENT_REACHED"
fi
echo
echo "--------------------"
echo "content from stderr:"
echo
cat STDERR ;