About the Execution of ITS-Tools for DNAwalker-PT-05track28LR
Execution Summary | |||||
Max Memory Used (MB) |
Time wait (ms) | CPU Usage (ms) | I/O Wait (ms) | Computed Result | Execution Status |
15747.040 | 22442.00 | 45801.00 | 436.60 | FFFFFFFTFFFFFFFF | normal |
Execution Chart
We display below the execution chart for this examination (boot time has been removed).
Trace from the execution
Waiting for the VM to be ready (probing ssh)
..................
/home/mcc/execution
total 268K
-rw-r--r-- 1 mcc users 3.5K May 15 18:54 CTLCardinality.txt
-rw-r--r-- 1 mcc users 20K May 15 18:54 CTLCardinality.xml
-rw-r--r-- 1 mcc users 2.9K May 15 18:54 CTLFireability.txt
-rw-r--r-- 1 mcc users 19K May 15 18:54 CTLFireability.xml
-rw-r--r-- 1 mcc users 4.0K May 15 18:50 GenericPropertiesDefinition.xml
-rw-r--r-- 1 mcc users 5.6K May 15 18:50 GenericPropertiesVerdict.xml
-rw-r--r-- 1 mcc users 2.4K May 26 09:26 LTLCardinality.txt
-rw-r--r-- 1 mcc users 11K May 26 09:26 LTLCardinality.xml
-rw-r--r-- 1 mcc users 1.9K May 26 09:26 LTLFireability.txt
-rw-r--r-- 1 mcc users 8.0K May 26 09:26 LTLFireability.xml
-rw-r--r-- 1 mcc users 3.6K May 15 18:54 ReachabilityCardinality.txt
-rw-r--r-- 1 mcc users 19K May 15 18:54 ReachabilityCardinality.xml
-rw-r--r-- 1 mcc users 115 May 15 18:54 ReachabilityDeadlock.txt
-rw-r--r-- 1 mcc users 353 May 15 18:54 ReachabilityDeadlock.xml
-rw-r--r-- 1 mcc users 2.8K May 15 18:54 ReachabilityFireability.txt
-rw-r--r-- 1 mcc users 15K May 15 18:54 ReachabilityFireability.xml
-rw-r--r-- 1 mcc users 1.7K May 15 18:54 UpperBounds.txt
-rw-r--r-- 1 mcc users 3.8K May 15 18:54 UpperBounds.xml
-rw-r--r-- 1 mcc users 6 May 15 18:50 equiv_col
-rw-r--r-- 1 mcc users 12 May 15 18:50 instance
-rw-r--r-- 1 mcc users 6 May 15 18:50 iscolored
-rw-r--r-- 1 mcc users 108K May 15 18:50 model.pnml
=====================================================================
Generated by BenchKit 2-3637
Executing tool itstools
Input is DNAwalker-PT-05track28LR, examination is LTLFireability
Time confinement is 3600 seconds
Memory confinement is 16384 MBytes
Number of cores is 4
Run identifier is r212-smll-152732263000236
=====================================================================
--------------------
content from stdout:
=== Data for post analysis generated by BenchKit (invocation template)
The expected result is a vector of booleans
BOOL_VECTOR
here is the order used to build the result vector(from text file)
FORMULA_NAME DNAwalker-PT-05track28LR-LTLFireability-00
FORMULA_NAME DNAwalker-PT-05track28LR-LTLFireability-01
FORMULA_NAME DNAwalker-PT-05track28LR-LTLFireability-02
FORMULA_NAME DNAwalker-PT-05track28LR-LTLFireability-03
FORMULA_NAME DNAwalker-PT-05track28LR-LTLFireability-04
FORMULA_NAME DNAwalker-PT-05track28LR-LTLFireability-05
FORMULA_NAME DNAwalker-PT-05track28LR-LTLFireability-06
FORMULA_NAME DNAwalker-PT-05track28LR-LTLFireability-07
FORMULA_NAME DNAwalker-PT-05track28LR-LTLFireability-08
FORMULA_NAME DNAwalker-PT-05track28LR-LTLFireability-09
FORMULA_NAME DNAwalker-PT-05track28LR-LTLFireability-10
FORMULA_NAME DNAwalker-PT-05track28LR-LTLFireability-11
FORMULA_NAME DNAwalker-PT-05track28LR-LTLFireability-12
FORMULA_NAME DNAwalker-PT-05track28LR-LTLFireability-13
FORMULA_NAME DNAwalker-PT-05track28LR-LTLFireability-14
FORMULA_NAME DNAwalker-PT-05track28LR-LTLFireability-15
=== Now, execution of the tool begins
BK_START 1527934700434
Using solver Z3 to compute partial order matrices.
Built C files in :
/home/mcc/execution
Invoking ITS tools like this :CommandLine [args=[/home/mcc/BenchKit/itstools/plugins/fr.lip6.move.gal.itstools.binaries_1.0.0.201805151631/bin/its-ltl-linux64, --gc-threshold, 2000000, -i, /home/mcc/execution/LTLFireability.pnml.gal, -t, CGAL, -LTL, /home/mcc/execution/LTLFireability.ltl, -c, -stutter-deadlock], workingDir=/home/mcc/execution]
its-ltl command run as :
/home/mcc/BenchKit/itstools/plugins/fr.lip6.move.gal.itstools.binaries_1.0.0.201805151631/bin/its-ltl-linux64 --gc-threshold 2000000 -i /home/mcc/execution/LTLFireability.pnml.gal -t CGAL -LTL /home/mcc/execution/LTLFireability.ltl -c -stutter-deadlock
Read 16 LTL properties
Checking formula 0 : !(("((A9>=2)&&(A5>=1))"))
Formula 0 simplified : !"((A9>=2)&&(A5>=1))"
Presburger conditions satisfied. Using coverability to approximate state space in K-Induction.
Normalized transition count is 247
// Phase 1: matrix 247 rows 34 cols
Reverse transition relation is NOT exact ! Due to transitions tb9, tAb9, tb10, tAb10, tb15, tAb15, tb16, tAb16, tb23, tAb23, tb24, tAb24, t1_2, t1_3, t1_4, t1_5, t1_9, t2_3, t2_4, t2_5, t2_6, t2_9, t2_10, t3_2, t3_4, t3_5, t3_6, t3_7, t3_9, t3_10, t3_11, t4_2, t4_3, t4_5, t4_6, t4_7, t4_9, t4_10, t4_11, t5_2, t5_3, t5_4, t5_6, t5_7, t5_8, t5_9, t5_10, t5_11, t5_13, t6_3, t6_4, t6_5, t6_7, t6_8, t6_9, t6_10, t6_13, t6_14, t6_18, t6_19, t7_3, t7_4, t7_5, t7_6, t7_8, t7_9, t7_13, t7_14, t7_15, t7_18, t7_19, t8_5, t8_6, t8_7, t8_13, t8_14, t8_15, t8_16, t8_18, t8_19, t9_2, t9_3, t9_4, t9_5, t9_6, t9_7, t9_10, t9_11, t9_12, t9_21, t10_2, t10_3, t10_4, t10_5, t10_6, t10_9, t10_11, t10_12, t10_21, t10_22, t10_23, t10_24, t11_3, t11_4, t11_5, t11_9, t11_10, t11_12, t11_21, t11_22, t11_23, t11_24, t11_26, t12_9, t12_10, t12_11, t12_21, t12_22, t12_23, t12_24, t12_26, t12_27, t13_5, t13_6, t13_7, t13_8, t13_14, t13_15, t13_16, t13_17, t13_18, t13_19, t13_20, t14_19, t14_20, t15_7, t15_8, t15_13, t15_14, t15_16, t15_17, t15_18, t15_19, t15_20, t16_8, t16_13, t16_14, t16_15, t16_17, t16_18, t16_19, t18_19, t18_20, t18_25, t19_6, t19_7, t19_8, t19_13, t19_14, t19_15, t19_16, t19_18, t19_20, t19_24, t19_25, t21_9, t21_10, t21_11, t21_12, t21_22, t21_23, t21_24, t21_25, t21_26, t21_27, t21_28, t22_10, t22_11, t22_12, t22_21, t22_23, t22_24, t22_25, t22_26, t22_27, t22_28, t23_10, t23_11, t23_12, t23_20, t23_21, t23_22, t23_24, t23_25, t23_26, t23_27, t23_28, t24_10, t24_11, t24_12, t24_19, t24_20, t24_21, t24_22, t24_23, t24_25, t24_26, t24_27, t26_12, t26_21, t26_22, t26_23, t26_24, t26_25, t26_28, t27_24, Intersection with reachable at each step enabled. (destroyed/reverse/intersect/total) :5/29/216/250
Computing Next relation with stutter on 106288 deadlock states
3 unique states visited
3 strongly connected components in search stack
3 transitions explored
3 items max in DFS search stack
594 ticks for the emptiness check
Model ,|S| ,Time ,Mem(kb) ,fin. SDD ,fin. DDD ,peak SDD ,peak DDD ,SDD Hom ,SDD cache peak ,DDD Hom ,DDD cachepeak ,SHom cache
STATS,0,5.98358,141888,1,0,752,675989,517,311,2813,744296,603
an accepting run exists (use option '-e' to print it)
Formula 0 is FALSE accepting run found.
FORMULA DNAwalker-PT-05track28LR-LTLFireability-00 FALSE TECHNIQUES DECISION_DIAGRAMS TOPOLOGICAL
Checking formula 1 : !((F(F(F(F("((A7>=2)&&(A9>=1))"))))))
Formula 1 simplified : !F"((A7>=2)&&(A9>=1))"
Computing Next relation with stutter on 106288 deadlock states
2 unique states visited
2 strongly connected components in search stack
2 transitions explored
2 items max in DFS search stack
608 ticks for the emptiness check
Model ,|S| ,Time ,Mem(kb) ,fin. SDD ,fin. DDD ,peak SDD ,peak DDD ,SDD Hom ,SDD cache peak ,DDD Hom ,DDD cachepeak ,SHom cache
STATS,0,12.0556,259948,1,0,911,1.18134e+06,526,435,2816,1.53043e+06,886
an accepting run exists (use option '-e' to print it)
Formula 1 is FALSE accepting run found.
FORMULA DNAwalker-PT-05track28LR-LTLFireability-01 FALSE TECHNIQUES DECISION_DIAGRAMS TOPOLOGICAL
Checking formula 2 : !((F((G("((A24>=2)&&(A27>=1))"))U("((A21>=2)&&(A11>=1))"))))
Formula 2 simplified : !F(G"((A24>=2)&&(A27>=1))" U "((A21>=2)&&(A11>=1))")
Computing Next relation with stutter on 106288 deadlock states
Running compilation step : CommandLine [args=[gcc, -c, -I/home/mcc/BenchKit//lts_install_dir//include, -I., -std=c99, -fPIC, -O3, model.c], workingDir=/home/mcc/execution]
2 unique states visited
2 strongly connected components in search stack
2 transitions explored
2 items max in DFS search stack
432 ticks for the emptiness check
Model ,|S| ,Time ,Mem(kb) ,fin. SDD ,fin. DDD ,peak SDD ,peak DDD ,SDD Hom ,SDD cache peak ,DDD Hom ,DDD cachepeak ,SHom cache
STATS,0,16.3859,332716,1,0,1063,1.48186e+06,535,554,2819,2.01938e+06,1163
an accepting run exists (use option '-e' to print it)
Formula 2 is FALSE accepting run found.
FORMULA DNAwalker-PT-05track28LR-LTLFireability-02 FALSE TECHNIQUES DECISION_DIAGRAMS TOPOLOGICAL
Checking formula 3 : !(((F(("(A25>=2)")U("((A10>=2)&&(A12>=1))")))U("((A14>=2)&&(A16>=1))")))
Formula 3 simplified : !(F("(A25>=2)" U "((A10>=2)&&(A12>=1))") U "((A14>=2)&&(A16>=1))")
Computing Next relation with stutter on 106288 deadlock states
Compilation finished in 3812 ms.
Running link step : CommandLine [args=[gcc, -shared, -o, gal.so, model.o], workingDir=/home/mcc/execution]
Link finished in 44 ms.
Running LTSmin : CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=1, -p, --pins-guards, --when, --ltl, (<>(((LTLAP4==true))U((LTLAP5==true))))U((LTLAP6==true)), --buchi-type=spotba], workingDir=/home/mcc/execution]
LTSmin run took 56 ms.
FORMULA DNAwalker-PT-05track28LR-LTLFireability-03 FALSE TECHNIQUES PARTIAL_ORDER EXPLICIT LTSMIN SAT_SMT
Running LTSmin : CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=1, -p, --pins-guards, --when, --ltl, (LTLAP7==true), --buchi-type=spotba], workingDir=/home/mcc/execution]
LTSmin run took 43 ms.
FORMULA DNAwalker-PT-05track28LR-LTLFireability-04 FALSE TECHNIQUES PARTIAL_ORDER EXPLICIT LTSMIN SAT_SMT
Running LTSmin : CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=1, --when, --ltl, X([]([]([]([]((LTLAP8==true)))))), --buchi-type=spotba], workingDir=/home/mcc/execution]
LTSmin run took 18 ms.
FORMULA DNAwalker-PT-05track28LR-LTLFireability-05 FALSE TECHNIQUES PARTIAL_ORDER EXPLICIT LTSMIN SAT_SMT
Running LTSmin : CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=1, --when, --ltl, [](X(([]((LTLAP9==true)))U([]((LTLAP10==true))))), --buchi-type=spotba], workingDir=/home/mcc/execution]
LTSmin run took 19 ms.
FORMULA DNAwalker-PT-05track28LR-LTLFireability-06 FALSE TECHNIQUES PARTIAL_ORDER EXPLICIT LTSMIN SAT_SMT
Running LTSmin : CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=1, -p, --pins-guards, --when, --ltl, <>((LTLAP11==true)), --buchi-type=spotba], workingDir=/home/mcc/execution]
LTSmin run took 41 ms.
FORMULA DNAwalker-PT-05track28LR-LTLFireability-07 TRUE TECHNIQUES PARTIAL_ORDER EXPLICIT LTSMIN SAT_SMT
Running LTSmin : CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=1, --when, --ltl, ((LTLAP12==true))U([](<>(X((LTLAP13==true))))), --buchi-type=spotba], workingDir=/home/mcc/execution]
LTSmin run took 18 ms.
FORMULA DNAwalker-PT-05track28LR-LTLFireability-08 FALSE TECHNIQUES PARTIAL_ORDER EXPLICIT LTSMIN SAT_SMT
Running LTSmin : CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=1, -p, --pins-guards, --when, --ltl, (LTLAP14==true), --buchi-type=spotba], workingDir=/home/mcc/execution]
LTSmin run took 42 ms.
FORMULA DNAwalker-PT-05track28LR-LTLFireability-09 FALSE TECHNIQUES PARTIAL_ORDER EXPLICIT LTSMIN SAT_SMT
Running LTSmin : CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=1, -p, --pins-guards, --when, --ltl, []([](([]((LTLAP15==true)))U([]((LTLAP16==true))))), --buchi-type=spotba], workingDir=/home/mcc/execution]
LTSmin run took 46 ms.
FORMULA DNAwalker-PT-05track28LR-LTLFireability-10 FALSE TECHNIQUES PARTIAL_ORDER EXPLICIT LTSMIN SAT_SMT
Running LTSmin : CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=1, -p, --pins-guards, --when, --ltl, (LTLAP17==true), --buchi-type=spotba], workingDir=/home/mcc/execution]
LTSmin run took 43 ms.
FORMULA DNAwalker-PT-05track28LR-LTLFireability-11 FALSE TECHNIQUES PARTIAL_ORDER EXPLICIT LTSMIN SAT_SMT
Running LTSmin : CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=1, -p, --pins-guards, --when, --ltl, <>(<>((LTLAP18==true))), --buchi-type=spotba], workingDir=/home/mcc/execution]
LTSmin run took 43 ms.
FORMULA DNAwalker-PT-05track28LR-LTLFireability-12 FALSE TECHNIQUES PARTIAL_ORDER EXPLICIT LTSMIN SAT_SMT
Running LTSmin : CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=1, -p, --pins-guards, --when, --ltl, <>(<>(<>((LTLAP19==true)))), --buchi-type=spotba], workingDir=/home/mcc/execution]
LTSmin run took 43 ms.
FORMULA DNAwalker-PT-05track28LR-LTLFireability-13 FALSE TECHNIQUES PARTIAL_ORDER EXPLICIT LTSMIN SAT_SMT
Running LTSmin : CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=1, -p, --pins-guards, --when, --ltl, []([]((LTLAP20==true))), --buchi-type=spotba], workingDir=/home/mcc/execution]
LTSmin run took 43 ms.
FORMULA DNAwalker-PT-05track28LR-LTLFireability-14 FALSE TECHNIQUES PARTIAL_ORDER EXPLICIT LTSMIN SAT_SMT
Running LTSmin : CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=1, -p, --pins-guards, --when, --ltl, <>([](((LTLAP21==true))U(<>((LTLAP22==true))))), --buchi-type=spotba], workingDir=/home/mcc/execution]
LTSmin run took 47 ms.
FORMULA DNAwalker-PT-05track28LR-LTLFireability-15 FALSE TECHNIQUES PARTIAL_ORDER EXPLICIT LTSMIN SAT_SMT
ITS tools runner thread asked to quit. Dying gracefully.
BK_STOP 1527934722876
--------------------
content from stderr:
+ export BINDIR=/home/mcc/BenchKit/
+ BINDIR=/home/mcc/BenchKit/
++ pwd
+ export MODEL=/home/mcc/execution
+ MODEL=/home/mcc/execution
+ /home/mcc/BenchKit//runeclipse.sh /home/mcc/execution LTLFireability -its -ltsminpath /home/mcc/BenchKit//lts_install_dir/ -smt
+ ulimit -s 65536
+ [[ -z '' ]]
+ export LTSMIN_MEM_SIZE=8589934592
+ LTSMIN_MEM_SIZE=8589934592
+ /home/mcc/BenchKit//itstools/its-tools -consoleLog -data /home/mcc/execution/workspace -pnfolder /home/mcc/execution -examination LTLFireability -z3path /home/mcc/BenchKit//z3/bin/z3 -yices2path /home/mcc/BenchKit//yices/bin/yices -its -ltsminpath /home/mcc/BenchKit//lts_install_dir/ -smt -vmargs -Dosgi.locking=none -Declipse.stateSaveDelayInterval=-1 -Dosgi.configuration.area=/tmp/.eclipse -Xss8m -Xms40m -Xmx8192m -Dfile.encoding=UTF-8 -Dosgi.requiredJavaVersion=1.6
Jun 02, 2018 10:18:22 AM fr.lip6.move.gal.application.Application start
INFO: Running its-tools with arguments : [-pnfolder, /home/mcc/execution, -examination, LTLFireability, -z3path, /home/mcc/BenchKit//z3/bin/z3, -yices2path, /home/mcc/BenchKit//yices/bin/yices, -its, -ltsminpath, /home/mcc/BenchKit//lts_install_dir/, -smt]
Jun 02, 2018 10:18:22 AM fr.lip6.move.gal.application.MccTranslator transformPNML
INFO: Parsing pnml file : /home/mcc/execution/model.pnml
Jun 02, 2018 10:18:22 AM fr.lip6.move.gal.nupn.PTNetReader loadFromXML
INFO: Load time of PNML (sax parser for PT used): 93 ms
Jun 02, 2018 10:18:23 AM fr.lip6.move.gal.pnml.togal.PTGALTransformer handlePage
INFO: Transformed 34 places.
Jun 02, 2018 10:18:23 AM fr.lip6.move.gal.pnml.togal.PTGALTransformer handlePage
INFO: Transformed 250 transitions.
Jun 02, 2018 10:18:23 AM fr.lip6.move.serialization.SerializationUtil systemToFile
INFO: Time to serialize gal into /home/mcc/execution/model.pnml.img.gal : 19 ms
Jun 02, 2018 10:18:23 AM fr.lip6.move.gal.instantiate.GALRewriter flatten
INFO: Flatten gal took : 108 ms
Jun 02, 2018 10:18:23 AM fr.lip6.move.serialization.SerializationUtil systemToFile
INFO: Time to serialize gal into /home/mcc/execution/LTLFireability.pnml.gal : 6 ms
Jun 02, 2018 10:18:23 AM fr.lip6.move.serialization.SerializationUtil serializePropertiesForITSLTLTools
INFO: Time to serialize properties into /home/mcc/execution/LTLFireability.ltl : 2 ms
Jun 02, 2018 10:18:23 AM fr.lip6.move.gal.semantics.DeterministicNextBuilder getDeterministicNext
INFO: Input system was already deterministic with 250 transitions.
Jun 02, 2018 10:18:24 AM fr.lip6.move.gal.gal2smt.bmc.KInductionSolver computeAndDeclareInvariants
INFO: Computed 0 place invariants in 15 ms
Jun 02, 2018 10:18:24 AM fr.lip6.move.gal.gal2smt.bmc.KInductionSolver init
INFO: Proved 34 variables to be positive in 240 ms
Jun 02, 2018 10:18:24 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver computeAblingMatrix
INFO: Computing symmetric may disable matrix : 250 transitions.
Jun 02, 2018 10:18:24 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of disable matrix completed :0/250 took 0 ms. Total solver calls (SAT/UNSAT): 0(0/0)
Jun 02, 2018 10:18:24 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of Complete disable matrix. took 67 ms. Total solver calls (SAT/UNSAT): 0(0/0)
Jun 02, 2018 10:18:24 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver computeAblingMatrix
INFO: Computing symmetric may enable matrix : 250 transitions.
Jun 02, 2018 10:18:24 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of Complete enable matrix. took 9 ms. Total solver calls (SAT/UNSAT): 0(0/0)
Jun 02, 2018 10:18:26 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver computeCoEnablingMatrix
INFO: Computing symmetric co enabling matrix : 250 transitions.
Jun 02, 2018 10:18:27 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(42/250) took 1117 ms. Total solver calls (SAT/UNSAT): 775(775/0)
Jun 02, 2018 10:18:30 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(157/250) took 4121 ms. Total solver calls (SAT/UNSAT): 3090(3090/0)
Jun 02, 2018 10:18:32 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of Finished co-enabling matrix. took 5944 ms. Total solver calls (SAT/UNSAT): 4015(4015/0)
Jun 02, 2018 10:18:32 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver computeDoNotAccord
INFO: Computing Do-Not-Accords matrix : 250 transitions.
Jun 02, 2018 10:18:37 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of Completed DNA matrix. took 5033 ms. Total solver calls (SAT/UNSAT): 1055(0/1055)
Jun 02, 2018 10:18:37 AM fr.lip6.move.gal.gal2pins.Gal2PinsTransformerNext transform
INFO: Built C files in 13728ms conformant to PINS in folder :/home/mcc/execution
Sequence of Actions to be Executed by the VM
This is useful if one wants to reexecute the tool in the VM from the submitted image disk.
set -x
# this is for BenchKit: configuration of major elements for the test
export BK_INPUT="DNAwalker-PT-05track28LR"
export BK_EXAMINATION="LTLFireability"
export BK_TOOL="itstools"
export BK_RESULT_DIR="/tmp/BK_RESULTS/OUTPUTS"
export BK_TIME_CONFINEMENT="3600"
export BK_MEMORY_CONFINEMENT="16384"
# this is specific to your benchmark or test
export BIN_DIR="$HOME/BenchKit/bin"
# remove the execution directoty if it exists (to avoid increse of .vmdk images)
if [ -d execution ] ; then
rm -rf execution
fi
tar xzf /home/mcc/BenchKit/INPUTS/DNAwalker-PT-05track28LR.tgz
mv DNAwalker-PT-05track28LR execution
cd execution
pwd
ls -lh
# this is for BenchKit: explicit launching of the test
echo "====================================================================="
echo " Generated by BenchKit 2-3637"
echo " Executing tool itstools"
echo " Input is DNAwalker-PT-05track28LR, examination is LTLFireability"
echo " Time confinement is $BK_TIME_CONFINEMENT seconds"
echo " Memory confinement is 16384 MBytes"
echo " Number of cores is 4"
echo " Run identifier is r212-smll-152732263000236"
echo "====================================================================="
echo
echo "--------------------"
echo "content from stdout:"
echo
echo "=== Data for post analysis generated by BenchKit (invocation template)"
echo
if [ "LTLFireability" = "UpperBounds" ] ; then
echo "The expected result is a vector of positive values"
echo NUM_VECTOR
elif [ "LTLFireability" != "StateSpace" ] ; then
echo "The expected result is a vector of booleans"
echo BOOL_VECTOR
else
echo "no data necessary for post analysis"
fi
echo
if [ -f "LTLFireability.txt" ] ; then
echo "here is the order used to build the result vector(from text file)"
for x in $(grep Property LTLFireability.txt | cut -d ' ' -f 2 | sort -u) ; do
echo "FORMULA_NAME $x"
done
elif [ -f "LTLFireability.xml" ] ; then # for cunf (txt files deleted;-)
echo echo "here is the order used to build the result vector(from xml file)"
for x in $(grep '
echo "FORMULA_NAME $x"
done
fi
echo
echo "=== Now, execution of the tool begins"
echo
echo -n "BK_START "
date -u +%s%3N
echo
timeout -s 9 $BK_TIME_CONFINEMENT bash -c "/home/mcc/BenchKit/BenchKit_head.sh 2> STDERR ; echo ; echo -n \"BK_STOP \" ; date -u +%s%3N"
if [ $? -eq 137 ] ; then
echo
echo "BK_TIME_CONFINEMENT_REACHED"
fi
echo
echo "--------------------"
echo "content from stderr:"
echo
cat STDERR ;