Execution Chart

We display below the execution chart for this examination (boot time has been removed).

Trace from the execution

Waiting for the VM to be ready (probing ssh)
.....................
/home/mcc/execution
total 176K
-rw-r--r-- 1 mcc users 3.7K May 15 18:54 CTLCardinality.txt
-rw-r--r-- 1 mcc users 21K May 15 18:54 CTLCardinality.xml
-rw-r--r-- 1 mcc users 2.7K May 15 18:54 CTLFireability.txt
-rw-r--r-- 1 mcc users 19K May 15 18:54 CTLFireability.xml
-rw-r--r-- 1 mcc users 4.0K May 15 18:49 GenericPropertiesDefinition.xml
-rw-r--r-- 1 mcc users 6.2K May 15 18:49 GenericPropertiesVerdict.xml
-rw-r--r-- 1 mcc users 2.4K May 26 09:26 LTLCardinality.txt
-rw-r--r-- 1 mcc users 9.1K May 26 09:26 LTLCardinality.xml
-rw-r--r-- 1 mcc users 1.9K May 26 09:26 LTLFireability.txt
-rw-r--r-- 1 mcc users 7.5K May 26 09:26 LTLFireability.xml
-rw-r--r-- 1 mcc users 3.3K May 15 18:54 ReachabilityCardinality.txt
-rw-r--r-- 1 mcc users 16K May 15 18:54 ReachabilityCardinality.xml
-rw-r--r-- 1 mcc users 119 May 15 18:54 ReachabilityDeadlock.txt
-rw-r--r-- 1 mcc users 357 May 15 18:54 ReachabilityDeadlock.xml
-rw-r--r-- 1 mcc users 3.1K May 15 18:54 ReachabilityFireability.txt
-rw-r--r-- 1 mcc users 20K May 15 18:54 ReachabilityFireability.xml
-rw-r--r-- 1 mcc users 1.8K May 15 18:54 UpperBounds.txt
-rw-r--r-- 1 mcc users 3.8K May 15 18:54 UpperBounds.xml
-rw-r--r-- 1 mcc users 6 May 15 18:49 equiv_col
-rw-r--r-- 1 mcc users 8 May 15 18:49 instance
-rw-r--r-- 1 mcc users 6 May 15 18:49 iscolored
-rw-r--r-- 1 mcc users 9.2K May 15 18:49 model.pnml
=====================================================================
Generated by BenchKit 2-3637
Executing tool itstools
Input is ClientsAndServers-PT-N0020P1, examination is LTLFireability
Time confinement is 3600 seconds
Memory confinement is 16384 MBytes
Number of cores is 4
Run identifier is r212-smll-152732262700034
=====================================================================

--------------------
content from stdout:

=== Data for post analysis generated by BenchKit (invocation template)

The expected result is a vector of booleans
BOOL_VECTOR

here is the order used to build the result vector(from text file)
FORMULA_NAME ClientsAndServers-PT-N0020P1-LTLFireability-00
FORMULA_NAME ClientsAndServers-PT-N0020P1-LTLFireability-01
FORMULA_NAME ClientsAndServers-PT-N0020P1-LTLFireability-02
FORMULA_NAME ClientsAndServers-PT-N0020P1-LTLFireability-03
FORMULA_NAME ClientsAndServers-PT-N0020P1-LTLFireability-04
FORMULA_NAME ClientsAndServers-PT-N0020P1-LTLFireability-05
FORMULA_NAME ClientsAndServers-PT-N0020P1-LTLFireability-06
FORMULA_NAME ClientsAndServers-PT-N0020P1-LTLFireability-07
FORMULA_NAME ClientsAndServers-PT-N0020P1-LTLFireability-08
FORMULA_NAME ClientsAndServers-PT-N0020P1-LTLFireability-09
FORMULA_NAME ClientsAndServers-PT-N0020P1-LTLFireability-10
FORMULA_NAME ClientsAndServers-PT-N0020P1-LTLFireability-11
FORMULA_NAME ClientsAndServers-PT-N0020P1-LTLFireability-12
FORMULA_NAME ClientsAndServers-PT-N0020P1-LTLFireability-13
FORMULA_NAME ClientsAndServers-PT-N0020P1-LTLFireability-14
FORMULA_NAME ClientsAndServers-PT-N0020P1-LTLFireability-15

=== Now, execution of the tool begins

BK_START 1527792604635

Using solver Z3 to compute partial order matrices.
Built C files in :
/home/mcc/execution
Invoking ITS tools like this :CommandLine [args=[/home/mcc/BenchKit/itstools/plugins/fr.lip6.move.gal.itstools.binaries_1.0.0.201805151631/bin/its-ltl-linux64, --gc-threshold, 2000000, -i, /home/mcc/execution/LTLFireability.pnml.gal, -t, CGAL, -LTL, /home/mcc/execution/LTLFireability.ltl, -c, -stutter-deadlock], workingDir=/home/mcc/execution]

its-ltl command run as :

/home/mcc/BenchKit/itstools/plugins/fr.lip6.move.gal.itstools.binaries_1.0.0.201805151631/bin/its-ltl-linux64 --gc-threshold 2000000 -i /home/mcc/execution/LTLFireability.pnml.gal -t CGAL -LTL /home/mcc/execution/LTLFireability.ltl -c -stutter-deadlock
Read 16 LTL properties
Checking formula 0 : !(("(SpG>=1)"))
Formula 0 simplified : !"(SpG>=1)"
Presburger conditions satisfied. Using coverability to approximate state space in K-Induction.
// Phase 1: matrix 18 rows 25 cols
invariant :Uf + SF + CF + -1'CR + MtF + SG + MpG + -1'Si + -2'StR + -2'SwG + -1'SpG + -1'SwA + -1'SpA + Cb + CwG = 48
invariant :SA + SF + -1'MpG + -1'MwU + -1'Mi + -1'SwA = -57
invariant :CG + CR + StR + SwG + SpG + -1'CwG = 0
invariant :CwA + Cb + CwG + Ci = 160
invariant :StF + Si + StR + SwG + SpG + SwA + SpA = 40
invariant :SR + SG + MpG + MwU + -1'SwG = 0
invariant :CA + CF + -1'Si + -1'StR + -1'SwG + -1'SpG + Cb + CwG + Ci = 120
invariant :MpA + MtF + MpG + MwU + Mi = 57
Running compilation step : CommandLine [args=[gcc, -c, -I/home/mcc/BenchKit//lts_install_dir//include, -I., -std=c99, -fPIC, -O3, model.c], workingDir=/home/mcc/execution]
Compilation finished in 649 ms.
Running link step : CommandLine [args=[gcc, -shared, -o, gal.so, model.o], workingDir=/home/mcc/execution]
Link finished in 50 ms.
Running LTSmin : CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=1, -p, --pins-guards, --when, --ltl, (LTLAP0==true), --buchi-type=spotba], workingDir=/home/mcc/execution]
LTSmin run took 59 ms.
FORMULA ClientsAndServers-PT-N0020P1-LTLFireability-00 FALSE TECHNIQUES PARTIAL_ORDER EXPLICIT LTSMIN SAT_SMT
Running LTSmin : CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=1, --when, --ltl, X(<>((X((LTLAP1==true)))U(<>((LTLAP2==true))))), --buchi-type=spotba], workingDir=/home/mcc/execution]
WARNING : LTSmin timed out (>225 s) on command CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=1, --when, --ltl, X(<>((X((LTLAP1==true)))U(<>((LTLAP2==true))))), --buchi-type=spotba], workingDir=/home/mcc/execution]
Running LTSmin : CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=1, --when, --ltl, (<>(X([]((LTLAP3==true)))))U(X(X(<>((LTLAP4==true))))), --buchi-type=spotba], workingDir=/home/mcc/execution]
WARNING : LTSmin timed out (>225 s) on command CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=1, --when, --ltl, (<>(X([]((LTLAP3==true)))))U(X(X(<>((LTLAP4==true))))), --buchi-type=spotba], workingDir=/home/mcc/execution]
Running LTSmin : CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=1, -p, --pins-guards, --when, --ltl, (LTLAP5==true), --buchi-type=spotba], workingDir=/home/mcc/execution]
LTSmin run took 53 ms.
FORMULA ClientsAndServers-PT-N0020P1-LTLFireability-03 FALSE TECHNIQUES PARTIAL_ORDER EXPLICIT LTSMIN SAT_SMT
Running LTSmin : CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=1, -p, --pins-guards, --when, --ltl, (LTLAP3==true), --buchi-type=spotba], workingDir=/home/mcc/execution]
LTSmin run took 40 ms.
FORMULA ClientsAndServers-PT-N0020P1-LTLFireability-04 FALSE TECHNIQUES PARTIAL_ORDER EXPLICIT LTSMIN SAT_SMT
Running LTSmin : CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=1, -p, --pins-guards, --when, --ltl, <>((LTLAP6==true)), --buchi-type=spotba], workingDir=/home/mcc/execution]
LTSmin run took 21 ms.
FORMULA ClientsAndServers-PT-N0020P1-LTLFireability-05 TRUE TECHNIQUES PARTIAL_ORDER EXPLICIT LTSMIN SAT_SMT
Running LTSmin : CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=1, -p, --pins-guards, --when, --ltl, (LTLAP3==true), --buchi-type=spotba], workingDir=/home/mcc/execution]
LTSmin run took 39 ms.
FORMULA ClientsAndServers-PT-N0020P1-LTLFireability-06 FALSE TECHNIQUES PARTIAL_ORDER EXPLICIT LTSMIN SAT_SMT
Running LTSmin : CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=1, -p, --pins-guards, --when, --ltl, (LTLAP2==true), --buchi-type=spotba], workingDir=/home/mcc/execution]
LTSmin run took 51 ms.
FORMULA ClientsAndServers-PT-N0020P1-LTLFireability-07 FALSE TECHNIQUES PARTIAL_ORDER EXPLICIT LTSMIN SAT_SMT
Running LTSmin : CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=1, --when, --ltl, [](<>((<>((LTLAP7==true)))U(X((LTLAP8==true))))), --buchi-type=spotba], workingDir=/home/mcc/execution]
WARNING : LTSmin timed out (>225 s) on command CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=1, --when, --ltl, [](<>((<>((LTLAP7==true)))U(X((LTLAP8==true))))), --buchi-type=spotba], workingDir=/home/mcc/execution]
Running LTSmin : CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=1, -p, --pins-guards, --when, --ltl, ((LTLAP9==true))U((LTLAP6==true)), --buchi-type=spotba], workingDir=/home/mcc/execution]
LTSmin run took 59 ms.
FORMULA ClientsAndServers-PT-N0020P1-LTLFireability-09 FALSE TECHNIQUES PARTIAL_ORDER EXPLICIT LTSMIN SAT_SMT
Running LTSmin : CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=1, -p, --pins-guards, --when, --ltl, <>(((LTLAP6==true))U(((LTLAP0==true))U((LTLAP1==true)))), --buchi-type=spotba], workingDir=/home/mcc/execution]
LTSmin run took 15 ms.
FORMULA ClientsAndServers-PT-N0020P1-LTLFireability-10 TRUE TECHNIQUES PARTIAL_ORDER EXPLICIT LTSMIN SAT_SMT
Running LTSmin : CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=1, -p, --pins-guards, --when, --ltl, (LTLAP10==true), --buchi-type=spotba], workingDir=/home/mcc/execution]
LTSmin run took 16 ms.
FORMULA ClientsAndServers-PT-N0020P1-LTLFireability-11 FALSE TECHNIQUES PARTIAL_ORDER EXPLICIT LTSMIN SAT_SMT
Running LTSmin : CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=1, -p, --pins-guards, --when, --ltl, []((LTLAP11==true)), --buchi-type=spotba], workingDir=/home/mcc/execution]
LTSmin run took 20 ms.
FORMULA ClientsAndServers-PT-N0020P1-LTLFireability-12 FALSE TECHNIQUES PARTIAL_ORDER EXPLICIT LTSMIN SAT_SMT
Running LTSmin : CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=1, -p, --pins-guards, --when, --ltl, (LTLAP7==true), --buchi-type=spotba], workingDir=/home/mcc/execution]
LTSmin run took 20 ms.
FORMULA ClientsAndServers-PT-N0020P1-LTLFireability-13 FALSE TECHNIQUES PARTIAL_ORDER EXPLICIT LTSMIN SAT_SMT
Running LTSmin : CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=1, -p, --pins-guards, --when, --ltl, <>(<>((LTLAP6==true))), --buchi-type=spotba], workingDir=/home/mcc/execution]
LTSmin run took 21 ms.
FORMULA ClientsAndServers-PT-N0020P1-LTLFireability-14 TRUE TECHNIQUES PARTIAL_ORDER EXPLICIT LTSMIN SAT_SMT
Running LTSmin : CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=1, -p, --pins-guards, --when, --ltl, ([](((LTLAP12==true))U((LTLAP8==true))))U((LTLAP8==true)), --buchi-type=spotba], workingDir=/home/mcc/execution]
LTSmin run took 42 ms.
FORMULA ClientsAndServers-PT-N0020P1-LTLFireability-15 FALSE TECHNIQUES PARTIAL_ORDER EXPLICIT LTSMIN SAT_SMT
Retrying LTSmin with larger timeout 1800 s
Running LTSmin : CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=1, --when, --ltl, X(<>((X((LTLAP1==true)))U(<>((LTLAP2==true))))), --buchi-type=spotba], workingDir=/home/mcc/execution]
WARNING : LTS min runner thread failed on error :java.lang.RuntimeException: Unexpected exception when executing ltsmin :CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=1, --when, --ltl, X(<>((X((LTLAP1==true)))U(<>((LTLAP2==true))))), --buchi-type=spotba], workingDir=/home/mcc/execution]
255

BK_TIME_CONFINEMENT_REACHED

--------------------
content from stderr:

+ export BINDIR=/home/mcc/BenchKit/
+ BINDIR=/home/mcc/BenchKit/
++ pwd
+ export MODEL=/home/mcc/execution
+ MODEL=/home/mcc/execution
+ /home/mcc/BenchKit//runeclipse.sh /home/mcc/execution LTLFireability -its -ltsminpath /home/mcc/BenchKit//lts_install_dir/ -smt
+ ulimit -s 65536
+ [[ -z '' ]]
+ export LTSMIN_MEM_SIZE=8589934592
+ LTSMIN_MEM_SIZE=8589934592
+ /home/mcc/BenchKit//itstools/its-tools -consoleLog -data /home/mcc/execution/workspace -pnfolder /home/mcc/execution -examination LTLFireability -z3path /home/mcc/BenchKit//z3/bin/z3 -yices2path /home/mcc/BenchKit//yices/bin/yices -its -ltsminpath /home/mcc/BenchKit//lts_install_dir/ -smt -vmargs -Dosgi.locking=none -Declipse.stateSaveDelayInterval=-1 -Dosgi.configuration.area=/tmp/.eclipse -Xss8m -Xms40m -Xmx8192m -Dfile.encoding=UTF-8 -Dosgi.requiredJavaVersion=1.6
May 31, 2018 6:50:06 PM fr.lip6.move.gal.application.Application start
INFO: Running its-tools with arguments : [-pnfolder, /home/mcc/execution, -examination, LTLFireability, -z3path, /home/mcc/BenchKit//z3/bin/z3, -yices2path, /home/mcc/BenchKit//yices/bin/yices, -its, -ltsminpath, /home/mcc/BenchKit//lts_install_dir/, -smt]
May 31, 2018 6:50:06 PM fr.lip6.move.gal.application.MccTranslator transformPNML
INFO: Parsing pnml file : /home/mcc/execution/model.pnml
May 31, 2018 6:50:07 PM fr.lip6.move.gal.nupn.PTNetReader loadFromXML
INFO: Load time of PNML (sax parser for PT used): 34 ms
May 31, 2018 6:50:07 PM fr.lip6.move.gal.pnml.togal.PTGALTransformer handlePage
INFO: Transformed 25 places.
May 31, 2018 6:50:07 PM fr.lip6.move.gal.pnml.togal.PTGALTransformer handlePage
INFO: Transformed 18 transitions.
May 31, 2018 6:50:07 PM fr.lip6.move.serialization.SerializationUtil systemToFile
INFO: Time to serialize gal into /home/mcc/execution/model.pnml.img.gal : 7 ms
May 31, 2018 6:50:07 PM fr.lip6.move.gal.instantiate.GALRewriter flatten
INFO: Flatten gal took : 29 ms
May 31, 2018 6:50:07 PM fr.lip6.move.serialization.SerializationUtil systemToFile
INFO: Time to serialize gal into /home/mcc/execution/LTLFireability.pnml.gal : 2 ms
May 31, 2018 6:50:07 PM fr.lip6.move.serialization.SerializationUtil serializePropertiesForITSLTLTools
INFO: Time to serialize properties into /home/mcc/execution/LTLFireability.ltl : 1 ms
May 31, 2018 6:50:07 PM fr.lip6.move.gal.semantics.DeterministicNextBuilder getDeterministicNext
INFO: Input system was already deterministic with 18 transitions.
May 31, 2018 6:50:07 PM fr.lip6.move.gal.gal2smt.bmc.KInductionSolver computeAndDeclareInvariants
INFO: Computed 8 place invariants in 8 ms
May 31, 2018 6:50:07 PM fr.lip6.move.gal.gal2smt.bmc.KInductionSolver init
INFO: Proved 25 variables to be positive in 102 ms
May 31, 2018 6:50:07 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver computeAblingMatrix
INFO: Computing symmetric may disable matrix : 18 transitions.
May 31, 2018 6:50:07 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of disable matrix completed :0/18 took 0 ms. Total solver calls (SAT/UNSAT): 0(0/0)
May 31, 2018 6:50:07 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of Complete disable matrix. took 1 ms. Total solver calls (SAT/UNSAT): 0(0/0)
May 31, 2018 6:50:07 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver computeAblingMatrix
INFO: Computing symmetric may enable matrix : 18 transitions.
May 31, 2018 6:50:07 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of Complete enable matrix. took 1 ms. Total solver calls (SAT/UNSAT): 0(0/0)
May 31, 2018 6:50:08 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver computeCoEnablingMatrix
INFO: Computing symmetric co enabling matrix : 18 transitions.
May 31, 2018 6:50:08 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of Finished co-enabling matrix. took 330 ms. Total solver calls (SAT/UNSAT): 111(111/0)
May 31, 2018 6:50:08 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver computeDoNotAccord
INFO: Computing Do-Not-Accords matrix : 18 transitions.
May 31, 2018 6:50:08 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of Completed DNA matrix. took 182 ms. Total solver calls (SAT/UNSAT): 33(0/33)
May 31, 2018 6:50:08 PM fr.lip6.move.gal.gal2pins.Gal2PinsTransformerNext transform
INFO: Built C files in 1082ms conformant to PINS in folder :/home/mcc/execution
pins2lts-mc, 0.000: Registering PINS so language module
pins2lts-mc, 0.000: Loading model from ./gal.so
pins2lts-mc, 0.000: library has no initializer
pins2lts-mc, 0.000: loading model GAL
pins2lts-mc, 0.000: completed loading model GAL
pins2lts-mc, 0.000: LTL layer: formula: X(<>((X((LTLAP1==true)))U(<>((LTLAP2==true)))))
pins2lts-mc, 0.000: "X(<>((X((LTLAP1==true)))U(<>((LTLAP2==true)))))" is not a file, parsing as formula...
pins2lts-mc, 0.000: Using Spin LTL semantics
pins2lts-mc, 0.008: buchi has 2 states
pins2lts-mc, 0.008: Weak Buchi automaton detected, adding non-accepting as progress label.
pins2lts-mc, 0.009: DFS-FIFO for weak LTL, using special progress label 32
pins2lts-mc, 0.009: There are 33 state labels and 1 edge labels
pins2lts-mc, 0.009: State length is 26, there are 20 groups
pins2lts-mc, 0.009: Running dfsfifo using 1 core (sequential)
pins2lts-mc, 0.009: Using a tree table with 2^27 elements
pins2lts-mc, 0.009: Successor permutation: rr
pins2lts-mc, 0.009: Global bits: 2, count bits: 0, local bits: 0
pins2lts-mc, 0.092: 898 levels 1000 states 8611 transitions
pins2lts-mc, 0.100: 911 levels 2000 states 10241 transitions
pins2lts-mc, 0.118: 911 levels 4000 states 14337 transitions
pins2lts-mc, 0.155: 974 levels 8000 states 22147 transitions
pins2lts-mc, 0.219: 1505 levels 16000 states 36076 transitions
pins2lts-mc, 0.336: 1505 levels 32000 states 65895 transitions
pins2lts-mc, 0.546: 1505 levels 64000 states 126843 transitions
pins2lts-mc, 0.916: 1505 levels 128000 states 250194 transitions
pins2lts-mc, 1.562: 1505 levels 256000 states 499154 transitions
pins2lts-mc, 2.691: 1505 levels 512000 states 999182 transitions
pins2lts-mc, 4.795: 1505 levels 1024000 states 2097026 transitions
pins2lts-mc, 9.183: 1505 levels 2048000 states 4584505 transitions
pins2lts-mc, 17.913: 1505 levels 4096000 states 9602752 transitions
pins2lts-mc, 35.460: 1505 levels 8192000 states 19629634 transitions
pins2lts-mc, 70.849: 1505 levels 16384000 states 39669524 transitions
pins2lts-mc, 143.305: 1505 levels 32768000 states 79837737 transitions
pins2lts-mc, 301.805: 1505 levels 65536000 states 164907848 transitions
pins2lts-mc, 566.627: Error: tree leafs table full! Change -s/--ratio.
pins2lts-mc, 566.629:
pins2lts-mc, 566.629:
pins2lts-mc, 566.629: Explored 106857742 states 286404587 transitions, fanout: 2.680
pins2lts-mc, 566.629: Total exploration time 566.620 sec (566.620 sec minimum, 566.620 sec on average)
pins2lts-mc, 566.629: States per second: 188588, Transitions per second: 505461
pins2lts-mc, 566.630:
pins2lts-mc, 566.630: Progress states detected: 0
pins2lts-mc, 566.630: Redundant explorations: -0.0076
pins2lts-mc, 566.630:
pins2lts-mc, 566.630: Queue width: 8B, total height: 1506, memory: 0.01MB
pins2lts-mc, 566.630: Tree memory: 1071.3MB, 10.5 B/state, compr.: 9.9%
pins2lts-mc, 566.630: Tree fill ratio (roots/leafs): 79.0%/99.0%
pins2lts-mc, 566.630: Stored 18 string chucks using 0MB
pins2lts-mc, 566.630: Total memory used for chunk indexing: 0MB
pins2lts-mc, 566.630: Est. total memory use: 1071.3MB (~1024.0MB paged-in)
java.lang.RuntimeException: Unexpected exception when executing ltsmin :CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=1, --when, --ltl, X(<>((X((LTLAP1==true)))U(<>((LTLAP2==true))))), --buchi-type=spotba], workingDir=/home/mcc/execution]
255
at fr.lip6.move.gal.application.LTSminRunner.checkProperty(LTSminRunner.java:167)
at fr.lip6.move.gal.application.LTSminRunner.access$9(LTSminRunner.java:122)
at fr.lip6.move.gal.application.LTSminRunner$1.run(LTSminRunner.java:98)
at java.lang.Thread.run(Thread.java:748)

Sequence of Actions to be Executed by the VM

This is useful if one wants to reexecute the tool in the VM from the submitted image disk.

set -x
# this is for BenchKit: configuration of major elements for the test
export BK_INPUT="ClientsAndServers-PT-N0020P1"
export BK_EXAMINATION="LTLFireability"
export BK_TOOL="itstools"
export BK_RESULT_DIR="/tmp/BK_RESULTS/OUTPUTS"
export BK_TIME_CONFINEMENT="3600"
export BK_MEMORY_CONFINEMENT="16384"

# this is specific to your benchmark or test

export BIN_DIR="$HOME/BenchKit/bin"

# remove the execution directoty if it exists (to avoid increse of .vmdk images)
if [ -d execution ] ; then
rm -rf execution
fi

tar xzf /home/mcc/BenchKit/INPUTS/ClientsAndServers-PT-N0020P1.tgz
mv ClientsAndServers-PT-N0020P1 execution
cd execution
pwd
ls -lh

# this is for BenchKit: explicit launching of the test
echo "====================================================================="
echo " Generated by BenchKit 2-3637"
echo " Executing tool itstools"
echo " Input is ClientsAndServers-PT-N0020P1, examination is LTLFireability"
echo " Time confinement is $BK_TIME_CONFINEMENT seconds"
echo " Memory confinement is 16384 MBytes"
echo " Number of cores is 4"
echo " Run identifier is r212-smll-152732262700034"
echo "====================================================================="
echo
echo "--------------------"
echo "content from stdout:"
echo
echo "=== Data for post analysis generated by BenchKit (invocation template)"
echo
if [ "LTLFireability" = "UpperBounds" ] ; then
echo "The expected result is a vector of positive values"
echo NUM_VECTOR
elif [ "LTLFireability" != "StateSpace" ] ; then
echo "The expected result is a vector of booleans"
echo BOOL_VECTOR
else
echo "no data necessary for post analysis"
fi
echo
if [ -f "LTLFireability.txt" ] ; then
echo "here is the order used to build the result vector(from text file)"
for x in $(grep Property LTLFireability.txt | cut -d ' ' -f 2 | sort -u) ; do
echo "FORMULA_NAME $x"
done
elif [ -f "LTLFireability.xml" ] ; then # for cunf (txt files deleted;-)
echo echo "here is the order used to build the result vector(from xml file)"
for x in $(grep '' LTLFireability.xml | cut -d '>' -f 2 | cut -d '<' -f 1 | sort -u) ; do
echo "FORMULA_NAME $x"
done
fi
echo
echo "=== Now, execution of the tool begins"
echo
echo -n "BK_START "
date -u +%s%3N
echo
timeout -s 9 $BK_TIME_CONFINEMENT bash -c "/home/mcc/BenchKit/BenchKit_head.sh 2> STDERR ; echo ; echo -n \"BK_STOP \" ; date -u +%s%3N"
if [ $? -eq 137 ] ; then
echo
echo "BK_TIME_CONFINEMENT_REACHED"
fi
echo
echo "--------------------"
echo "content from stderr:"
echo
cat STDERR ;