About the Execution of ITS-Tools for CircularTrains-PT-384
Execution Summary | |||||
Max Memory Used (MB) |
Time wait (ms) | CPU Usage (ms) | I/O Wait (ms) | Computed Result | Execution Status |
15752.140 | 3600000.00 | 4219212.00 | 8173.10 | FFFFFFF????????? | normal |
Execution Chart
We display below the execution chart for this examination (boot time has been removed).
Trace from the execution
Waiting for the VM to be ready (probing ssh)
...................
/home/mcc/execution
total 460K
-rw-r--r-- 1 mcc users 3.7K May 15 18:54 CTLCardinality.txt
-rw-r--r-- 1 mcc users 19K May 15 18:54 CTLCardinality.xml
-rw-r--r-- 1 mcc users 3.0K May 15 18:54 CTLFireability.txt
-rw-r--r-- 1 mcc users 18K May 15 18:54 CTLFireability.xml
-rw-r--r-- 1 mcc users 4.0K May 15 18:49 GenericPropertiesDefinition.xml
-rw-r--r-- 1 mcc users 6.0K May 15 18:49 GenericPropertiesVerdict.xml
-rw-r--r-- 1 mcc users 2.6K May 26 09:26 LTLCardinality.txt
-rw-r--r-- 1 mcc users 12K May 26 09:26 LTLCardinality.xml
-rw-r--r-- 1 mcc users 2.0K May 26 09:26 LTLFireability.txt
-rw-r--r-- 1 mcc users 8.2K May 26 09:26 LTLFireability.xml
-rw-r--r-- 1 mcc users 3.4K May 15 18:54 ReachabilityCardinality.txt
-rw-r--r-- 1 mcc users 16K May 15 18:54 ReachabilityCardinality.xml
-rw-r--r-- 1 mcc users 112 May 15 18:54 ReachabilityDeadlock.txt
-rw-r--r-- 1 mcc users 350 May 15 18:54 ReachabilityDeadlock.xml
-rw-r--r-- 1 mcc users 3.2K May 15 18:54 ReachabilityFireability.txt
-rw-r--r-- 1 mcc users 17K May 15 18:54 ReachabilityFireability.xml
-rw-r--r-- 1 mcc users 1.8K May 15 18:54 UpperBounds.txt
-rw-r--r-- 1 mcc users 3.8K May 15 18:54 UpperBounds.xml
-rw-r--r-- 1 mcc users 6 May 15 18:49 equiv_col
-rw-r--r-- 1 mcc users 4 May 15 18:49 instance
-rw-r--r-- 1 mcc users 6 May 15 18:49 iscolored
-rw-r--r-- 1 mcc users 293K May 15 18:49 model.pnml
=====================================================================
Generated by BenchKit 2-3637
Executing tool itstools
Input is CircularTrains-PT-384, examination is LTLFireability
Time confinement is 3600 seconds
Memory confinement is 16384 MBytes
Number of cores is 4
Run identifier is r212-smll-152732262600012
=====================================================================
--------------------
content from stdout:
=== Data for post analysis generated by BenchKit (invocation template)
The expected result is a vector of booleans
BOOL_VECTOR
here is the order used to build the result vector(from text file)
FORMULA_NAME CircularTrains-PT-384-LTLFireability-00
FORMULA_NAME CircularTrains-PT-384-LTLFireability-01
FORMULA_NAME CircularTrains-PT-384-LTLFireability-02
FORMULA_NAME CircularTrains-PT-384-LTLFireability-03
FORMULA_NAME CircularTrains-PT-384-LTLFireability-04
FORMULA_NAME CircularTrains-PT-384-LTLFireability-05
FORMULA_NAME CircularTrains-PT-384-LTLFireability-06
FORMULA_NAME CircularTrains-PT-384-LTLFireability-07
FORMULA_NAME CircularTrains-PT-384-LTLFireability-08
FORMULA_NAME CircularTrains-PT-384-LTLFireability-09
FORMULA_NAME CircularTrains-PT-384-LTLFireability-10
FORMULA_NAME CircularTrains-PT-384-LTLFireability-11
FORMULA_NAME CircularTrains-PT-384-LTLFireability-12
FORMULA_NAME CircularTrains-PT-384-LTLFireability-13
FORMULA_NAME CircularTrains-PT-384-LTLFireability-14
FORMULA_NAME CircularTrains-PT-384-LTLFireability-15
=== Now, execution of the tool begins
BK_START 1527766447578
Using solver Z3 to compute partial order matrices.
Built C files in :
/home/mcc/execution
Invoking ITS tools like this :CommandLine [args=[/home/mcc/BenchKit/itstools/plugins/fr.lip6.move.gal.itstools.binaries_1.0.0.201805151631/bin/its-ltl-linux64, --gc-threshold, 2000000, -i, /home/mcc/execution/LTLFireability.pnml.gal, -t, CGAL, -LTL, /home/mcc/execution/LTLFireability.ltl, -c, -stutter-deadlock], workingDir=/home/mcc/execution]
its-ltl command run as :
/home/mcc/BenchKit/itstools/plugins/fr.lip6.move.gal.itstools.binaries_1.0.0.201805151631/bin/its-ltl-linux64 --gc-threshold 2000000 -i /home/mcc/execution/LTLFireability.pnml.gal -t CGAL -LTL /home/mcc/execution/LTLFireability.ltl -c -stutter-deadlock
Read 16 LTL properties
Checking formula 0 : !((G(G("((Section_192>=1)&&(F193>=1))"))))
Formula 0 simplified : !G"((Section_192>=1)&&(F193>=1))"
Presburger conditions satisfied. Using coverability to approximate state space in K-Induction.
// Phase 1: matrix 384 rows 768 cols
invariant :F277 + Section_278 + -1'Section_276 + -1'F276 = 0
invariant :F57 + -1'Section_56 + Section_58 + -1'F56 = -1
invariant :F145 + Section_145 + Section_146 = 1
invariant :Section_209 + Section_208 + F208 = 1
invariant :Section_286 + -1'Section_284 + F285 + -1'F284 = -1
invariant :F25 + -1'Section_24 + Section_26 + -1'F24 = 0
invariant :Section_231 + -1'Section_229 + -1'F229 + F230 = 1
invariant :Section_188 + F187 + Section_187 = 1
invariant :F74 + -1'Section_76 + -1'F75 + Section_74 = 1
invariant :Section_181 + F178 + -1'Section_177 + F180 + -1'F177 + -1'F179 = -1
invariant :F52 + Section_53 + Section_52 = 1
invariant :F357 + -1'F358 + Section_357 + -1'Section_359 = 0
invariant :Section_96 + F96 + Section_97 = 1
invariant :Section_197 + Section_196 + F196 = 1
invariant :F23 + Section_24 + -1'F22 + -1'Section_22 = 1
invariant :F176 + Section_177 + -1'F175 + -1'Section_175 = 1
invariant :Section_18 + Section_17 + F17 = 2
invariant :Section_344 + Section_341 + F343 + -1'F342 + F341 = 2
invariant :Section_41 + F40 + Section_40 = 1
invariant :Section_194 + F194 + Section_195 = 2
invariant :Section_16 + Section_15 + F15 = 1
invariant :F152 + Section_152 + Section_153 = 2
invariant :F161 + F163 + -1'Section_160 + Section_164 + -1'F162 + -1'F160 = 1
invariant :Section_38 + -1'F39 + -1'Section_40 + F38 = 1
invariant :F61 + Section_61 + Section_62 = 1
invariant :Section_289 + F288 + Section_288 = 1
invariant :Section_298 + F297 + Section_297 = 1
invariant :F292 + -1'Section_291 + -1'Section_294 + -1'F291 + -1'F293 = -2
invariant :Section_352 + Section_353 + F352 = 1
invariant :Section_119 + F118 + Section_118 = 1
invariant :Section_263 + Section_262 + F262 = 1
invariant :F64 + -1'Section_63 + -1'F63 + Section_65 = 0
invariant :F90 + -1'F91 + Section_90 + -1'Section_92 = 0
invariant :F264 + -1'F263 + -1'Section_266 + Section_262 + -1'F265 + F262 = -1
invariant :Section_66 + F65 + Section_65 = 2
invariant :F87 + Section_87 + Section_88 = 1
invariant :F207 + Section_208 + -1'F206 + Section_205 + F205 = 0
invariant :F345 + -1'F346 + -1'F344 + Section_341 + F343 + -1'F342 + -1'Section_347 + F341 = 0
invariant :F151 + Section_151 + Section_152 = 1
invariant :Section_358 + F358 + Section_359 = 1
invariant :Section_71 + Section_72 + F71 = 2
invariant :Section_256 + F256 + Section_257 = 1
invariant :Section_161 + Section_160 + F160 = 1
invariant :Section_302 + F301 + Section_301 = 1
invariant :F273 + -1'Section_272 + -1'F272 + Section_274 = -1
invariant :F221 + Section_219 + F219 + -1'F220 + Section_222 = 2
invariant :F228 + Section_228 + Section_229 = 1
invariant :F331 + Section_332 + Section_331 = 1
invariant :F193 + Section_191 + F191 + -1'F194 + -1'Section_195 + -1'F192 = 0
invariant :Section_75 + Section_76 + F75 = 1
invariant :Section_279 + Section_278 + F278 = 2
invariant :F168 + Section_169 + Section_168 = 1
invariant :F240 + Section_241 + -1'Section_239 + -1'F239 = -1
invariant :Section_199 + F199 + Section_200 = 1
invariant :F259 + Section_259 + Section_260 = 1
invariant :Section_108 + F107 + Section_107 = 2
invariant :F372 + Section_372 + Section_373 = 1
invariant :F198 + -1'F199 + Section_198 + -1'Section_200 = 0
invariant :Section_2 + F1 + Section_1 = 1
invariant :F283 + -1'F282 + Section_284 + Section_281 + F281 = 2
invariant :Section_158 + Section_157 + F157 = 1
invariant :F365 + Section_363 + Section_366 + F363 + -1'F364 = 2
invariant :Section_6 + Section_5 + F5 = 2
invariant :F127 + Section_127 + -1'F128 + -1'Section_129 = -1
invariant :F140 + -1'Section_139 + -1'F139 + Section_141 = 1
invariant :Section_375 + Section_376 + F375 = 1
invariant :F242 + -1'F241 + -1'Section_241 + Section_243 = 1
invariant :Section_4 + Section_5 + F4 = 1
invariant :Section_103 + Section_102 + F102 = 1
invariant :F374 + -1'Section_376 + -1'Section_373 + -1'F375 + -1'F373 = 0
invariant :F238 + Section_238 + Section_239 = 1
invariant :F321 + -1'Section_320 + Section_322 + -1'F320 = -1
invariant :F211 + -1'Section_208 + F209 + Section_212 + -1'F210 + -1'F208 = 1
invariant :Section_264 + F263 + -1'Section_262 + -1'F262 = 1
invariant :F48 + -1'F47 + Section_49 + -1'Section_47 = -1
invariant :Section_130 + Section_129 + F129 = 1
invariant :F69 + -1'F68 + Section_70 + -1'Section_68 = -1
invariant :F351 + Section_351 + -1'Section_353 + -1'F352 = 0
invariant :Section_342 + Section_341 + F341 = 2
invariant :Section_207 + F206 + -1'Section_205 + -1'F205 = 1
invariant :F252 + -1'Section_251 + -1'F251 + Section_253 = -1
invariant :F150 + Section_151 + Section_150 = 1
invariant :Section_236 + F235 + Section_235 = 1
invariant :Section_124 + F123 + Section_123 = 1
invariant :Section_73 + Section_72 + F72 = 1
invariant :F227 + -1'Section_226 + Section_228 + -1'F226 = 1
invariant :Section_25 + Section_24 + F24 = 1
invariant :Section_55 + F54 + -1'Section_53 + -1'F53 = -1
invariant :Section_50 + Section_49 + F49 = 1
invariant :Section_247 + F247 + Section_248 = 1
invariant :Section_273 + Section_272 + F272 = 2
invariant :Section_32 + F31 + Section_31 = 1
invariant :F126 + Section_127 + -1'Section_125 + -1'F125 = -1
invariant :Section_64 + Section_63 + F63 = 1
invariant :Section_128 + F128 + Section_129 = 2
invariant :F28 + Section_26 + -1'F27 + F26 + Section_29 = 2
invariant :F97 + -1'Section_99 + Section_97 + -1'F98 = -1
invariant :Section_360 + F360 + Section_361 = 1
invariant :F59 + Section_60 + Section_59 = 2
invariant :F3 + Section_3 + -1'Section_5 + -1'F4 = 0
invariant :Section_163 + F163 + Section_164 = 1
invariant :F215 + Section_216 + -1'Section_214 + -1'F214 = 1
invariant :Section_324 + Section_323 + F323 = 2
invariant :Section_89 + F88 + Section_88 = 1
invariant :F158 + -1'Section_157 + -1'F157 + Section_159 = 1
invariant :F18 + -1'Section_17 + Section_19 + -1'F17 = -1
invariant :Section_268 + -1'Section_266 + -1'F266 + F267 = -1
invariant :Section_115 + F114 + Section_114 = 1
invariant :F225 + Section_226 + Section_225 = 1
invariant :Section_178 + Section_177 + F177 = 1
invariant :F202 + Section_202 + Section_203 = 1
invariant :Section_183 + -1'F181 + F178 + -1'Section_177 + F182 + F180 + -1'F177 + -1'F179 = 0
invariant :F136 + Section_136 + -1'Section_138 + -1'F137 = -1
invariant :F73 + -1'Section_72 + -1'F72 + Section_74 = 0
invariant :F51 + Section_49 + F49 + Section_52 + -1'F50 = 0
invariant :Section_82 + F81 + -1'F80 + -1'Section_80 = -1
invariant :F334 + Section_332 + F332 + -1'F333 + Section_335 = 2
invariant :Section_190 + F189 + Section_189 = 1
invariant :F108 + Section_109 + -1'F107 + -1'Section_107 = -1
invariant :Section_230 + Section_229 + F229 = 1
invariant :Section_220 + Section_219 + F219 = 1
invariant :Section_346 + F346 + Section_347 = 1
invariant :Section_36 + Section_35 + F35 = 2
invariant :F85 + -1'F84 + -1'Section_84 + Section_86 = 0
invariant :F76 + Section_76 + Section_77 = 1
invariant :Section_37 + F36 + -1'Section_35 + -1'F35 = -1
invariant :Section_154 + Section_153 + F153 = 1
invariant :F14 + Section_15 + -1'F13 + -1'Section_13 = 1
invariant :Section_383 + -1'F381 + -1'Section_381 + F382 = 0
invariant :F233 + -1'Section_232 + -1'F232 + Section_234 = 1
invariant :F296 + Section_297 + -1'Section_295 + -1'F295 = 1
invariant :Section_210 + -1'Section_208 + F209 + -1'F208 = 1
invariant :Section_206 + Section_205 + F205 = 1
invariant :F103 + -1'F106 + -1'Section_102 + -1'F102 + F105 + -1'Section_107 + -1'F104 = -2
invariant :Section_42 + -1'F40 + -1'Section_40 + F41 = 1
invariant :F261 + Section_262 + -1'F260 + -1'Section_260 = -1
invariant :Section_380 + F379 + -1'Section_378 + -1'F378 = 0
invariant :F83 + Section_84 + Section_83 = 2
invariant :Section_104 + F106 + -1'F105 + Section_107 + F104 = 2
invariant :F42 + -1'F43 + F40 + Section_40 + -1'Section_44 + -1'F41 = -1
invariant :Section_95 + -1'F309 + -1'F328 + Section_60 + -1'F346 + -1'F96 + -1'F43 + -1'F217 + Section_219 + -1'F34 + -1'F384 + -1'Section_376 + Section_332 + -1'F247 + -1'F370 + Section_33 + -1'F248 + Section_250 + Section_228 + Section_351 + -1'F200 + Section_202 + Section_87 + -1'F254 + Section_306 + -1'F91 + Section_381 + Section_90 + Section_278 + -1'F344 + Section_127 + -1'F297 + -1'F257 + -1'F379 + -1'F199 + -1'F167 + -1'F263 + Section_367 + Section_151 + -1'F118 + -1'F313 + -1'F130 + -1'F299 + -1'F100 + Section_259 + -1'F339 + -1'F358 + Section_79 + Section_164 + -1'F148 + -1'F106 + -1'F29 + -1'F206 + -1'F1 + Section_45 + -1'F187 + Section_150 + -1'F109 + Section_363 + -1'F241 + -1'F162 + Section_216 + -1'F15 + -1'F184 + -1'F307 + -1'F68 + -1'F77 + -1'F54 + -1'F139 + Section_3 + Section_341 + -1'F333 + -1'F326 + Section_26 + Section_10 + -1'F220 + -1'F288 + Section_357 + -1'F360 + -1'F226 + -1'F123 + -1'F251 + -1'F178 + -1'Section_329 + -1'F84 + -1'F212 + -1'F282 + -1'F155 + -1'F47 + -1'F63 + -1'F8 + Section_145 + -1'F31 + Section_222 + Section_246 + -1'F235 + -1'F75 + Section_366 + Section_322 + -1'F320 + Section_335 + -1'F272 + Section_49 + -1'F244 + -1'F24 + Section_229 + -1'Section_72 + Section_177 + -1'F175 + -1'F182 + -1'F269 + Section_372 + -1'F72 + Section_191 + -1'F314 + -1'F189 + Section_323 + -1'F27 + -1'F88 + -1'F114 + -1'Section_5 + Section_70 + -1'F13 + Section_19 + -1'F223 + -1'F66 + Section_316 + Section_40 + -1'F36 + -1'F291 + -1'F107 + -1'F256 + -1'F232 + -1'F128 + -1'F382 + -1'F267 + -1'F196 + Section_262 + Section_61 + -1'F329 + -1'F210 + -1'F354 + -1'F93 + Section_205 + Section_152 + Section_74 + Section_198 + -1'F157 + Section_356 + -1'F134 + -1'F301 + -1'F180 + Section_58 + -1'F173 + Section_275 + -1'Section_310 + -1'F22 + -1'F342 + -1'F347 + -1'F160 + -1'F214 + -1'F260 + -1'F169 + -1'F203 + -1'F364 + -1'F293 + Section_338 + Section_136 + -1'F102 + -1'F81 + -1'F376 + -1'Section_370 + Section_7 + -1'Section_248 + -1'F369 + Section_378 + -1'F286 + -1'F125 + -1'F194 + Section_281 + -1'F361 + Section_83 + Section_53 + -1'F237 + -1'F5 + Section_186 + -1'F141 + Section_59 + -1'F265 + -1'F11 + -1'F279 + -1'F71 + Section_253 + -1'F116 + -1'F171 + -1'Section_347 + -1'F4 + -1'F165 + -1'F120 + -1'F303 + -1'F208 + -1'F352 + -1'F132 + Section_312 + -1'F317 + -1'F310 + -1'Section_107 + -1'F98 + -1'Section_200 + -1'F295 + -1'F324 + -1'Section_1 + -1'F41 + -1'F349 + Section_319 + -1'F375 + Section_113 + Section_243 + -1'F56 + Section_86 + Section_159 + -1'F104 + Section_52 + -1'Section_314 + Section_290 + -1'F111 + Section_62 + -1'F373 + -1'F20 + -1'F153 + Section_122 + -1'F17 + Section_271 + Section_305 + -1'F146 + -1'F284 + Section_274 + Section_65 + -1'F38 + -1'F336 + -1'F50 + -1'F276 + Section_331 + Section_234 + Section_46 + Section_225 + -1'F192 + -1'Section_257 + -1'F143 + -1'F239 + -1'F137 + -1'F230 + Section_80 + -1'Section_361 + Section_368 = -82
invariant :F245 + -1'Section_244 + Section_246 + -1'F244 = 1
invariant :F274 + Section_275 + Section_274 = 1
invariant :Section_317 + F316 + Section_316 = 1
invariant :Section_172 + F172 + Section_173 = 1
invariant :Section_144 + Section_143 + F143 = 2
invariant :Section_311 + Section_310 + F310 = 1
invariant :F2 + -1'F1 + Section_3 + -1'Section_1 = 1
invariant :Section_213 + F212 + Section_212 = 2
invariant :Section_48 + F47 + Section_47 = 2
invariant :Section_369 + Section_370 + F369 = 1
invariant :Section_9 + F8 + Section_8 = 2
invariant :Section_221 + -1'Section_219 + -1'F219 + F220 = 0
invariant :Section_277 + Section_276 + F276 = 1
invariant :F289 + -1'F288 + -1'Section_288 + Section_290 = 0
invariant :Section_245 + Section_244 + F244 = 1
invariant :Section_112 + Section_111 + F111 = 1
invariant :Section_242 + F241 + Section_241 = 1
invariant :Section_14 + F13 + Section_13 = 1
invariant :F294 + Section_294 + Section_295 = 1
invariant :Section_270 + F269 + Section_269 = 2
invariant :F133 + F135 + Section_133 + -1'F134 + Section_136 = 0
invariant :Section_39 + F39 + Section_40 = 1
invariant :Section_340 + F339 + -1'Section_338 + -1'F338 = -1
invariant :F222 + Section_223 + Section_222 = 1
invariant :F253 + Section_254 + Section_253 = 1
invariant :F366 + Section_367 + Section_366 = 1
invariant :Section_182 + F181 + -1'F178 + Section_177 + -1'F180 + F177 + F179 = 2
invariant :Section_135 + F135 + Section_136 = 1
invariant :Section_249 + F248 + Section_248 = 2
invariant :Section_147 + Section_146 + F146 = 2
invariant :Section_101 + Section_100 + F100 = 1
invariant :F170 + -1'Section_169 + F172 + -1'F169 + -1'F171 + Section_173 = 1
invariant :Section_309 + F309 + Section_310 = 1
invariant :F185 + -1'F184 + -1'Section_184 + Section_186 = 1
invariant :F159 + Section_160 + Section_159 = 1
invariant :Section_362 + F361 + Section_361 = 1
invariant :F377 + -1'Section_376 + -1'F376 + Section_378 = 1
invariant :Section_215 + Section_214 + F214 = 1
invariant :Section_339 + Section_338 + F338 = 2
invariant :Section_131 + F130 + -1'Section_129 + -1'F129 = 0
invariant :Section_364 + Section_363 + F363 = 1
invariant :F311 + -1'Section_310 + Section_312 + -1'F310 = 1
invariant :Section_156 + F155 + Section_155 = 2
invariant :Section_292 + Section_291 + F291 = 1
invariant :Section_303 + Section_304 + F303 = 1
invariant :F154 + Section_155 + -1'Section_153 + -1'F153 = 0
invariant :F243 + Section_244 + Section_243 = 1
invariant :Section_355 + -1'F353 + -1'Section_353 + F354 = -1
invariant :F312 + -1'F313 + Section_312 + -1'Section_314 = 0
invariant :F156 + Section_157 + -1'F155 + -1'Section_155 = -1
invariant :Section_318 + -1'F316 + -1'Section_316 + F317 = 1
invariant :F204 + Section_205 + -1'F203 + -1'Section_203 = -1
invariant :Section_265 + Section_266 + F265 = 1
invariant :F188 + -1'F187 + -1'Section_187 + Section_189 = 1
invariant :F270 + -1'F269 + -1'Section_269 + Section_271 = -1
invariant :F213 + -1'F212 + Section_214 + -1'Section_212 = -1
invariant :Section_354 + F353 + Section_353 = 2
invariant :Section_315 + F314 + Section_314 = 2
invariant :F186 + Section_187 + Section_186 = 1
invariant :Section_327 + F326 + Section_326 = 2
invariant :Section_134 + -1'F135 + F134 + -1'Section_136 = 1
invariant :Section_345 + F344 + -1'Section_341 + -1'F343 + F342 + -1'F341 = 0
invariant :F308 + -1'F309 + -1'F307 + -1'Section_310 + -1'Section_307 = 0
invariant :F16 + -1'Section_15 + Section_17 + -1'F15 = 0
invariant :Section_287 + Section_284 + -1'F285 + F286 + F284 = 2
invariant :Section_379 + Section_378 + F378 = 1
invariant :Section_233 + Section_232 + F232 = 1
invariant :Section_110 + Section_109 + F109 = 1
invariant :F290 + Section_291 + Section_290 = 2
invariant :Section_121 + F120 + Section_120 = 1
invariant :Section_333 + Section_332 + F332 = 2
invariant :Section_132 + Section_133 + F132 = 1
invariant :F9 + Section_10 + -1'F8 + -1'Section_8 = -1
invariant :F112 + -1'Section_111 + Section_113 + -1'F111 = 0
invariant :F174 + Section_175 + -1'F173 + -1'Section_173 = -1
invariant :F86 + Section_87 + Section_86 = 2
invariant :F337 + F335 + Section_335 + Section_338 + -1'F336 = 2
invariant :Section_330 + Section_329 + F329 = 2
invariant :F304 + Section_304 + Section_305 = 1
invariant :Section_337 + -1'F335 + -1'Section_335 + F336 = -1
invariant :F138 + Section_139 + Section_138 = 1
invariant :F231 + Section_229 + Section_232 + F229 + -1'F230 = 0
invariant :Section_217 + Section_216 + F216 = 1
invariant :F224 + -1'Section_223 + -1'F223 + Section_225 = 1
invariant :Section_43 + F43 + Section_44 = 1
invariant :F356 + Section_357 + Section_356 = 2
invariant :Section_321 + Section_320 + F320 = 2
invariant :F142 + Section_143 + -1'F141 + -1'Section_141 = 0
invariant :Section_382 + F381 + Section_381 = 1
invariant :F149 + -1'Section_148 + -1'F148 + Section_150 = 1
invariant :Section_176 + F175 + Section_175 = 1
invariant :F147 + Section_148 + -1'Section_146 + -1'F146 = -1
invariant :Section_343 + -1'Section_341 + F342 + -1'F341 = -1
invariant :F371 + -1'F370 + Section_372 + -1'Section_370 = 1
invariant :F124 + -1'F123 + Section_125 + -1'Section_123 = 0
invariant :F60 + Section_60 + Section_61 = 1
invariant :F195 + Section_196 + Section_195 = 1
invariant :F119 + -1'F118 + -1'Section_118 + Section_120 = 1
invariant :F330 + -1'Section_329 + -1'F329 + Section_331 = -1
invariant :F300 + -1'Section_299 + -1'F299 + Section_301 = -1
invariant :F78 + Section_79 + -1'F77 + -1'Section_77 = -1
invariant :Section_237 + Section_238 + F237 = 1
invariant :Section_126 + Section_125 + F125 = 2
invariant :F298 + Section_299 + -1'F297 + -1'Section_297 = 0
invariant :F280 + Section_278 + F278 + Section_281 + -1'F279 = 2
invariant :F368 + -1'Section_370 + -1'F369 + Section_368 = 1
invariant :F110 + -1'Section_109 + -1'F109 + Section_111 = 1
invariant :F33 + -1'F34 + Section_33 + -1'Section_35 = 0
invariant :Section_27 + Section_26 + F26 = 2
invariant :Section_85 + F84 + Section_84 = 1
invariant :Section_371 + F370 + Section_370 = 1
invariant :F115 + Section_116 + -1'F114 + -1'Section_114 = 0
invariant :F46 + Section_47 + Section_46 = 1
invariant :F340 + -1'F339 + Section_341 + Section_338 + F338 = 2
invariant :Section_252 + Section_251 + F251 = 2
invariant :Section_106 + F106 + Section_107 = 1
invariant :F315 + -1'F314 + Section_316 + -1'Section_314 = -1
invariant :F19 + Section_19 + Section_20 = 1
invariant :F131 + -1'F130 + -1'Section_133 + Section_129 + -1'F132 + F129 = 1
invariant :F62 + Section_63 + Section_62 = 2
invariant :Section_165 + Section_166 + F165 = 1
invariant :Section_105 + -1'F106 + F105 + -1'Section_107 = 0
invariant :F21 + -1'Section_20 + Section_22 + -1'F20 = -1
invariant :Section_282 + Section_281 + F281 = 2
invariant :F7 + Section_8 + Section_7 = 1
invariant :Section_137 + Section_138 + F137 = 2
invariant :F70 + -1'Section_72 + Section_70 + -1'F71 = -1
invariant :F319 + Section_320 + Section_319 = 1
invariant :Section_180 + -1'F178 + Section_177 + F177 + F179 = 2
invariant :F275 + Section_275 + Section_276 = 2
invariant :Section_350 + -1'F348 + F347 + Section_347 + F349 = 2
invariant :Section_193 + -1'Section_191 + -1'F191 + F192 = -1
invariant :Section_283 + F282 + -1'Section_281 + -1'F281 = -1
invariant :Section_267 + Section_266 + F266 = 2
invariant :Section_349 + F348 + -1'F347 + -1'Section_347 = -1
invariant :Section_313 + F313 + Section_314 = 1
invariant :Section_54 + Section_53 + F53 = 2
invariant :F30 + -1'F29 + Section_31 + -1'Section_29 = -1
invariant :Section_23 + F22 + Section_22 = 1
invariant :F12 + Section_10 + F10 + -1'F11 + Section_13 = 0
invariant :F327 + -1'F328 + -1'F326 + -1'Section_329 + -1'Section_326 = -2
invariant :Section_51 + -1'Section_49 + -1'F49 + F50 = 1
invariant :Section_30 + F29 + Section_29 = 2
invariant :F190 + Section_191 + -1'F189 + -1'Section_189 = 0
invariant :F122 + Section_123 + Section_122 = 2
invariant :Section_162 + -1'F163 + -1'Section_164 + F162 = 0
invariant :F318 + F316 + Section_316 + -1'F317 + Section_319 = 0
invariant :Section_384 + F384 + Section_1 = 1
invariant :F55 + Section_56 + -1'F54 + Section_53 + F53 = 2
invariant :F350 + Section_351 + F348 + -1'F347 + -1'Section_347 + -1'F349 = 0
invariant :Section_117 + Section_116 + F116 = 2
invariant :Section_170 + Section_169 + F169 = 1
invariant :F380 + Section_381 + -1'F379 + Section_378 + F378 = 2
invariant :Section_293 + Section_294 + F293 = 2
invariant :F201 + -1'F200 + Section_202 + -1'Section_200 = -1
invariant :F359 + -1'F360 + Section_359 + -1'Section_361 = 1
invariant :F121 + -1'F120 + Section_122 + -1'Section_120 = 0
invariant :F268 + Section_266 + F266 + Section_269 + -1'F267 = 2
invariant :Section_334 + -1'Section_332 + -1'F332 + F333 = -1
invariant :Section_325 + -1'Section_323 + -1'F323 + F324 = -1
invariant :Section_185 + F184 + Section_184 = 1
invariant :F94 + F309 + F328 + -1'Section_60 + F346 + F96 + F43 + F217 + -1'Section_219 + F34 + F384 + Section_376 + -1'Section_332 + F247 + F370 + -1'Section_33 + F248 + -1'Section_250 + -1'Section_228 + -1'Section_351 + F200 + -1'Section_202 + -1'Section_87 + F254 + -1'Section_306 + F91 + -1'Section_381 + -1'Section_90 + -1'Section_278 + F344 + -1'Section_127 + F297 + F257 + F379 + F199 + F167 + F263 + -1'Section_367 + -1'Section_151 + F118 + F313 + F130 + F299 + F100 + -1'Section_259 + F339 + F358 + -1'Section_79 + -1'Section_164 + F148 + F106 + F29 + F206 + F1 + -1'Section_45 + F187 + -1'Section_150 + F109 + -1'Section_363 + F241 + F162 + -1'Section_216 + F15 + F184 + F307 + F68 + F77 + F54 + F139 + -1'Section_3 + -1'Section_341 + F333 + F326 + -1'Section_26 + -1'Section_10 + F220 + F288 + -1'Section_357 + F360 + F226 + F123 + F251 + F178 + Section_329 + F84 + F212 + F282 + F155 + F47 + F63 + F8 + -1'Section_145 + F31 + -1'Section_222 + -1'Section_246 + F235 + F75 + -1'Section_366 + -1'Section_322 + F320 + -1'Section_335 + F272 + -1'Section_49 + F244 + F24 + -1'Section_229 + Section_72 + -1'Section_177 + F175 + F182 + F269 + -1'Section_372 + F72 + -1'Section_191 + F314 + F189 + -1'Section_323 + F27 + F88 + F114 + Section_5 + -1'Section_70 + F13 + -1'Section_19 + F223 + F66 + -1'Section_316 + -1'Section_40 + F36 + F291 + F107 + F256 + F232 + F128 + F382 + F267 + F196 + -1'Section_262 + -1'Section_61 + F329 + F210 + F354 + -1'Section_205 + -1'Section_152 + -1'Section_74 + -1'Section_198 + F157 + -1'Section_356 + F134 + F301 + F180 + -1'Section_58 + F173 + -1'Section_275 + Section_310 + F22 + F342 + F347 + F160 + F214 + F260 + F169 + F203 + F364 + F293 + -1'Section_338 + -1'Section_136 + F102 + F81 + F376 + Section_370 + -1'Section_7 + Section_248 + F369 + -1'Section_378 + F286 + F125 + F194 + -1'Section_281 + F361 + -1'Section_83 + -1'Section_53 + F237 + F5 + -1'Section_186 + F141 + -1'Section_59 + F265 + F11 + F279 + F71 + -1'Section_253 + F116 + F171 + Section_347 + F4 + F165 + F120 + F303 + F208 + F352 + F132 + -1'Section_312 + Section_92 + F317 + F310 + Section_107 + F98 + Section_200 + F295 + F324 + Section_1 + F41 + F349 + -1'Section_319 + F375 + -1'Section_113 + -1'Section_243 + F56 + -1'Section_86 + -1'Section_159 + F104 + -1'Section_52 + Section_314 + -1'Section_290 + F111 + -1'Section_62 + F373 + F20 + F153 + -1'Section_122 + F17 + -1'Section_271 + -1'Section_305 + F146 + F284 + -1'Section_274 + -1'Section_65 + F92 + F38 + F336 + F50 + F276 + -1'Section_331 + -1'Section_234 + -1'Section_46 + -1'Section_225 + F192 + Section_257 + F143 + F239 + F137 + F230 + -1'Section_80 + Section_361 + -1'Section_368 = 84
invariant :Section_308 + F307 + Section_307 = 1
invariant :F325 + Section_323 + F323 + Section_326 + -1'F324 = 2
invariant :F101 + -1'Section_100 + -1'F100 + Section_102 = 1
invariant :Section_174 + F173 + Section_173 = 2
invariant :Section_300 + Section_299 + F299 = 2
invariant :F302 + -1'Section_304 + -1'F301 + -1'Section_301 + -1'F303 = 0
invariant :F166 + -1'F167 + Section_166 + -1'Section_168 = -1
invariant :Section_11 + Section_10 + F10 = 1
invariant :Section_142 + F141 + Section_141 = 1
invariant :Section_192 + Section_191 + F191 = 2
invariant :F218 + -1'F217 + Section_219 + Section_216 + F216 = 2
invariant :F234 + Section_235 + Section_234 = 1
invariant :Section_336 + F335 + Section_335 = 2
invariant :F258 + -1'F257 + Section_259 + -1'Section_257 = -1
invariant :Section_285 + Section_284 + F284 = 2
invariant :Section_93 + Section_92 + F92 = 2
invariant :Section_261 + F260 + Section_260 = 2
invariant :F67 + -1'F66 + F65 + Section_68 + Section_65 = 2
invariant :F367 + Section_367 + Section_368 = 1
invariant :Section_81 + F80 + Section_80 = 2
invariant :F250 + Section_250 + Section_251 = 1
invariant :F362 + Section_363 + -1'F361 + -1'Section_361 = 1
invariant :Section_34 + F34 + Section_35 = 1
invariant :Section_28 + -1'Section_26 + F27 + -1'F26 = -1
invariant :F246 + -1'F247 + Section_246 + -1'Section_248 = 0
invariant :Section_167 + F167 + Section_168 = 2
invariant :F305 + Section_306 + Section_305 = 2
invariant :F306 + Section_306 + Section_307 = 1
invariant :Section_69 + F68 + Section_68 = 2
invariant :F117 + Section_118 + -1'Section_116 + -1'F116 = -1
invariant :F249 + -1'F248 + Section_250 + -1'Section_248 = -1
invariant :F383 + -1'F384 + F381 + Section_381 + -1'F382 + -1'Section_1 = 1
invariant :F6 + -1'Section_5 + Section_7 + -1'F5 = -1
invariant :F79 + Section_79 + Section_80 = 1
invariant :Section_227 + Section_226 + F226 = 1
invariant :F45 + Section_45 + Section_46 = 1
invariant :F236 + -1'F235 + -1'Section_238 + -1'Section_235 + -1'F237 = 0
invariant :F255 + -1'F254 + -1'Section_254 + -1'F256 + -1'Section_257 = -2
invariant :F113 + Section_114 + Section_113 = 2
invariant :Section_149 + Section_148 + F148 = 1
invariant :F197 + -1'Section_196 + -1'F196 + Section_198 = 1
invariant :F355 + F353 + Section_353 + -1'F354 + Section_356 = 2
invariant :Section_374 + Section_373 + F373 = 1
invariant :F95 + F309 + F328 + -1'Section_60 + F346 + F43 + F217 + -1'Section_219 + F34 + F384 + Section_376 + -1'Section_332 + F247 + F370 + -1'Section_33 + F248 + -1'Section_250 + -1'Section_228 + -1'Section_351 + F200 + -1'Section_202 + -1'Section_87 + F254 + -1'Section_306 + F91 + -1'Section_381 + -1'Section_90 + -1'Section_278 + F344 + -1'Section_127 + F297 + F257 + F379 + F199 + F167 + F263 + -1'Section_367 + -1'Section_151 + F118 + F313 + F130 + F299 + F100 + -1'Section_259 + F339 + F358 + -1'Section_79 + -1'Section_164 + F148 + F106 + F29 + F206 + F1 + -1'Section_45 + F187 + -1'Section_150 + F109 + -1'Section_363 + F241 + F162 + -1'Section_216 + F15 + F184 + F307 + F68 + F77 + F54 + F139 + -1'Section_3 + -1'Section_341 + F333 + F326 + -1'Section_26 + -1'Section_10 + F220 + F288 + -1'Section_357 + F360 + F226 + F123 + F251 + F178 + Section_329 + F84 + F212 + F282 + F155 + F47 + F63 + F8 + -1'Section_145 + F31 + -1'Section_222 + -1'Section_246 + F235 + F75 + -1'Section_366 + -1'Section_322 + F320 + -1'Section_335 + F272 + -1'Section_49 + F244 + F24 + -1'Section_229 + Section_72 + -1'Section_177 + F175 + F182 + F269 + -1'Section_372 + F72 + -1'Section_191 + F314 + F189 + -1'Section_323 + F27 + F88 + F114 + Section_5 + -1'Section_70 + F13 + -1'Section_19 + F223 + F66 + -1'Section_316 + -1'Section_40 + F36 + F291 + F107 + F256 + F232 + F128 + F382 + F267 + F196 + -1'Section_262 + -1'Section_61 + F329 + F210 + F354 + F93 + -1'Section_205 + -1'Section_152 + -1'Section_74 + -1'Section_198 + F157 + -1'Section_356 + F134 + F301 + F180 + -1'Section_58 + F173 + -1'Section_275 + -1'Section_97 + Section_310 + F22 + F342 + F347 + F160 + F214 + F260 + F169 + F203 + F364 + F293 + -1'Section_338 + -1'Section_136 + F102 + F81 + F376 + Section_370 + -1'Section_7 + Section_248 + F369 + -1'Section_378 + F286 + F125 + F194 + -1'Section_281 + F361 + -1'Section_83 + -1'Section_53 + F237 + F5 + -1'Section_186 + F141 + -1'Section_59 + F265 + F11 + F279 + F71 + -1'Section_253 + F116 + F171 + Section_347 + F4 + F165 + F120 + F303 + F208 + F352 + F132 + -1'Section_312 + F317 + F310 + Section_107 + F98 + Section_200 + F295 + F324 + Section_1 + F41 + F349 + -1'Section_319 + F375 + -1'Section_113 + -1'Section_243 + F56 + -1'Section_86 + -1'Section_159 + F104 + -1'Section_52 + Section_314 + -1'Section_290 + F111 + -1'Section_62 + F373 + F20 + F153 + -1'Section_122 + F17 + -1'Section_271 + -1'Section_305 + F146 + F284 + -1'Section_274 + -1'Section_65 + F38 + F336 + F50 + F276 + -1'Section_331 + -1'Section_234 + -1'Section_46 + -1'Section_225 + F192 + Section_257 + F143 + F239 + F137 + F230 + -1'Section_80 + Section_361 + -1'Section_368 = 83
invariant :F183 + F181 + -1'F178 + Section_177 + -1'F182 + Section_184 + -1'F180 + F177 + F179 = 1
invariant :Section_255 + F254 + Section_254 = 2
invariant :Section_179 + F178 + -1'Section_177 + -1'F177 = 0
invariant :F322 + Section_322 + Section_323 = 1
invariant :Section_296 + Section_295 + F295 = 1
invariant :Section_328 + F328 + Section_329 = 1
invariant :Section_57 + Section_56 + F56 = 2
invariant :F271 + Section_272 + Section_271 = 1
invariant :Section_12 + -1'Section_10 + -1'F10 + F11 = 1
invariant :Section_171 + -1'F172 + F171 + -1'Section_173 = 0
invariant :F99 + Section_99 + Section_100 = 1
invariant :F89 + Section_90 + -1'F88 + -1'Section_88 = 1
invariant :Section_240 + Section_239 + F239 = 2
invariant :F37 + F39 + Section_40 + -1'F36 + Section_35 + -1'F38 + F35 = 1
invariant :Section_377 + Section_376 + F376 = 1
invariant :Section_201 + F200 + Section_200 = 2
invariant :F32 + Section_33 + -1'F31 + -1'Section_31 = 1
invariant :Section_21 + Section_20 + F20 = 2
invariant :Section_91 + F91 + Section_92 = 1
invariant :F144 + Section_145 + -1'Section_143 + -1'F143 = -1
invariant :Section_280 + -1'Section_278 + -1'F278 + F279 = -1
invariant :F287 + -1'Section_284 + F285 + -1'F286 + Section_288 + -1'F284 = 0
invariant :F58 + Section_58 + Section_59 = 1
invariant :Section_365 + -1'Section_363 + -1'F363 + F364 = 0
invariant :Section_78 + F77 + Section_77 = 2
invariant :Section_348 + F347 + Section_347 = 2
invariant :Section_94 + F93 + -1'Section_92 + -1'F92 = -1
invariant :Section_211 + Section_208 + -1'F209 + F210 + F208 = 0
invariant :F82 + -1'F81 + F80 + Section_83 + Section_80 = 2
invariant :Section_98 + Section_99 + F98 = 2
invariant :Section_67 + F66 + -1'F65 + -1'Section_65 = -1
invariant :Section_258 + F257 + Section_257 = 2
invariant :Section_224 + Section_223 + F223 = 1
invariant :F44 + Section_45 + Section_44 = 2
invariant :Section_218 + F217 + -1'Section_216 + -1'F216 = 0
invariant :F164 + Section_164 + -1'Section_166 + -1'F165 = 1
invariant :Section_140 + Section_139 + F139 = 1
invariant :Section_204 + F203 + Section_203 = 2
Running compilation step : CommandLine [args=[gcc, -c, -I/home/mcc/BenchKit//lts_install_dir//include, -I., -std=c99, -fPIC, -O3, model.c], workingDir=/home/mcc/execution]
Compilation finished in 7822 ms.
Running link step : CommandLine [args=[gcc, -shared, -o, gal.so, model.o], workingDir=/home/mcc/execution]
Link finished in 47 ms.
Running LTSmin : CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=1, -p, --pins-guards, --when, --ltl, []([]((LTLAP0==true))), --buchi-type=spotba], workingDir=/home/mcc/execution]
LTSmin run took 7899 ms.
FORMULA CircularTrains-PT-384-LTLFireability-00 FALSE TECHNIQUES PARTIAL_ORDER EXPLICIT LTSMIN SAT_SMT
Running LTSmin : CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=1, -p, --pins-guards, --when, --ltl, ((LTLAP1==true))U((LTLAP2==true)), --buchi-type=spotba], workingDir=/home/mcc/execution]
LTSmin run took 8213 ms.
FORMULA CircularTrains-PT-384-LTLFireability-01 FALSE TECHNIQUES PARTIAL_ORDER EXPLICIT LTSMIN SAT_SMT
Running LTSmin : CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=1, -p, --pins-guards, --when, --ltl, (LTLAP3==true), --buchi-type=spotba], workingDir=/home/mcc/execution]
LTSmin run took 7645 ms.
FORMULA CircularTrains-PT-384-LTLFireability-02 FALSE TECHNIQUES PARTIAL_ORDER EXPLICIT LTSMIN SAT_SMT
Running LTSmin : CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=1, -p, --pins-guards, --when, --ltl, ((LTLAP4==true))U(<>(<>([]((LTLAP5==true))))), --buchi-type=spotba], workingDir=/home/mcc/execution]
LTSmin run took 7459 ms.
FORMULA CircularTrains-PT-384-LTLFireability-03 FALSE TECHNIQUES PARTIAL_ORDER EXPLICIT LTSMIN SAT_SMT
Running LTSmin : CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=1, -p, --pins-guards, --when, --ltl, []((LTLAP6==true)), --buchi-type=spotba], workingDir=/home/mcc/execution]
LTSmin run took 7469 ms.
FORMULA CircularTrains-PT-384-LTLFireability-04 FALSE TECHNIQUES PARTIAL_ORDER EXPLICIT LTSMIN SAT_SMT
Running LTSmin : CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=1, --when, --ltl, X((((LTLAP7==true))U((LTLAP8==true)))U(X([]((LTLAP9==true))))), --buchi-type=spotba], workingDir=/home/mcc/execution]
LTSmin run took 2031 ms.
FORMULA CircularTrains-PT-384-LTLFireability-05 FALSE TECHNIQUES PARTIAL_ORDER EXPLICIT LTSMIN SAT_SMT
Running LTSmin : CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=1, -p, --pins-guards, --when, --ltl, (<>(<>([]((LTLAP10==true)))))U((LTLAP11==true)), --buchi-type=spotba], workingDir=/home/mcc/execution]
LTSmin run took 7289 ms.
FORMULA CircularTrains-PT-384-LTLFireability-06 FALSE TECHNIQUES PARTIAL_ORDER EXPLICIT LTSMIN SAT_SMT
Running LTSmin : CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=1, --when, --ltl, <>(X(<>((LTLAP12==true)))), --buchi-type=spotba], workingDir=/home/mcc/execution]
WARNING : LTSmin timed out (>225 s) on command CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=1, --when, --ltl, <>(X(<>((LTLAP12==true)))), --buchi-type=spotba], workingDir=/home/mcc/execution]
Running LTSmin : CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=1, --when, --ltl, (<>((LTLAP13==true)))U(X([](<>((LTLAP14==true))))), --buchi-type=spotba], workingDir=/home/mcc/execution]
WARNING : LTSmin timed out (>225 s) on command CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=1, --when, --ltl, (<>((LTLAP13==true)))U(X([](<>((LTLAP14==true))))), --buchi-type=spotba], workingDir=/home/mcc/execution]
Running LTSmin : CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=1, --when, --ltl, []([](X([]([]((LTLAP15==true)))))), --buchi-type=spotba], workingDir=/home/mcc/execution]
WARNING : LTS min runner thread failed on error :java.lang.RuntimeException: Unexpected exception when executing ltsmin :CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=1, --when, --ltl, []([](X([]([]((LTLAP15==true)))))), --buchi-type=spotba], workingDir=/home/mcc/execution]
255
Reverse transition relation is exact ! Faster fixpoint algorithm enabled.
BK_TIME_CONFINEMENT_REACHED
--------------------
content from stderr:
+ export BINDIR=/home/mcc/BenchKit/
+ BINDIR=/home/mcc/BenchKit/
++ pwd
+ export MODEL=/home/mcc/execution
+ MODEL=/home/mcc/execution
+ /home/mcc/BenchKit//runeclipse.sh /home/mcc/execution LTLFireability -its -ltsminpath /home/mcc/BenchKit//lts_install_dir/ -smt
+ ulimit -s 65536
+ [[ -z '' ]]
+ export LTSMIN_MEM_SIZE=8589934592
+ LTSMIN_MEM_SIZE=8589934592
+ /home/mcc/BenchKit//itstools/its-tools -consoleLog -data /home/mcc/execution/workspace -pnfolder /home/mcc/execution -examination LTLFireability -z3path /home/mcc/BenchKit//z3/bin/z3 -yices2path /home/mcc/BenchKit//yices/bin/yices -its -ltsminpath /home/mcc/BenchKit//lts_install_dir/ -smt -vmargs -Dosgi.locking=none -Declipse.stateSaveDelayInterval=-1 -Dosgi.configuration.area=/tmp/.eclipse -Xss8m -Xms40m -Xmx8192m -Dfile.encoding=UTF-8 -Dosgi.requiredJavaVersion=1.6
May 31, 2018 11:34:09 AM fr.lip6.move.gal.application.Application start
INFO: Running its-tools with arguments : [-pnfolder, /home/mcc/execution, -examination, LTLFireability, -z3path, /home/mcc/BenchKit//z3/bin/z3, -yices2path, /home/mcc/BenchKit//yices/bin/yices, -its, -ltsminpath, /home/mcc/BenchKit//lts_install_dir/, -smt]
May 31, 2018 11:34:09 AM fr.lip6.move.gal.application.MccTranslator transformPNML
INFO: Parsing pnml file : /home/mcc/execution/model.pnml
May 31, 2018 11:34:09 AM fr.lip6.move.gal.nupn.PTNetReader loadFromXML
INFO: Load time of PNML (sax parser for PT used): 122 ms
May 31, 2018 11:34:10 AM fr.lip6.move.gal.pnml.togal.PTGALTransformer handlePage
INFO: Transformed 768 places.
May 31, 2018 11:34:10 AM fr.lip6.move.gal.pnml.togal.PTGALTransformer handlePage
INFO: Transformed 384 transitions.
May 31, 2018 11:34:10 AM fr.lip6.move.serialization.SerializationUtil systemToFile
INFO: Time to serialize gal into /home/mcc/execution/model.pnml.img.gal : 29 ms
May 31, 2018 11:34:10 AM fr.lip6.move.gal.instantiate.GALRewriter flatten
INFO: Flatten gal took : 175 ms
May 31, 2018 11:34:10 AM fr.lip6.move.serialization.SerializationUtil systemToFile
INFO: Time to serialize gal into /home/mcc/execution/LTLFireability.pnml.gal : 7 ms
May 31, 2018 11:34:10 AM fr.lip6.move.serialization.SerializationUtil serializePropertiesForITSLTLTools
INFO: Time to serialize properties into /home/mcc/execution/LTLFireability.ltl : 1 ms
May 31, 2018 11:34:10 AM fr.lip6.move.gal.semantics.DeterministicNextBuilder getDeterministicNext
INFO: Input system was already deterministic with 384 transitions.
May 31, 2018 11:34:11 AM fr.lip6.move.gal.gal2smt.bmc.KInductionSolver computeAndDeclareInvariants
INFO: Computed 385 place invariants in 417 ms
May 31, 2018 11:34:13 AM fr.lip6.move.gal.gal2smt.bmc.KInductionSolver init
INFO: Proved 768 variables to be positive in 1962 ms
May 31, 2018 11:34:13 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver computeAblingMatrix
INFO: Computing symmetric may disable matrix : 384 transitions.
May 31, 2018 11:34:13 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of disable matrix completed :0/384 took 1 ms. Total solver calls (SAT/UNSAT): 0(0/0)
May 31, 2018 11:34:13 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of Complete disable matrix. took 69 ms. Total solver calls (SAT/UNSAT): 0(0/0)
May 31, 2018 11:34:13 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver computeAblingMatrix
INFO: Computing symmetric may enable matrix : 384 transitions.
May 31, 2018 11:34:13 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of Complete enable matrix. took 19 ms. Total solver calls (SAT/UNSAT): 0(0/0)
May 31, 2018 11:34:13 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver computeCoEnablingMatrix
INFO: Computing symmetric co enabling matrix : 384 transitions.
May 31, 2018 11:34:16 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(6/384) took 2967 ms. Total solver calls (SAT/UNSAT): 596(582/14)
May 31, 2018 11:34:21 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(16/384) took 7249 ms. Total solver calls (SAT/UNSAT): 1380(1342/38)
May 31, 2018 11:34:26 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(20/384) took 12691 ms. Total solver calls (SAT/UNSAT): 1946(1897/49)
May 31, 2018 11:34:30 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(35/384) took 16465 ms. Total solver calls (SAT/UNSAT): 2547(2472/75)
May 31, 2018 11:34:33 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(44/384) took 19814 ms. Total solver calls (SAT/UNSAT): 3289(3191/98)
SMT solver raised 'unknown', retrying with same input.
SMT solver raised 'unknown' twice, overapproximating result to 1.
May 31, 2018 11:34:37 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(51/384) took 24051 ms. Total solver calls (SAT/UNSAT): 3832(3715/117)
May 31, 2018 11:34:37 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of Finished co-enabling matrix. took 24065 ms. Total solver calls (SAT/UNSAT): 3832(3715/117)
May 31, 2018 11:34:37 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver computeDoNotAccord
INFO: Computing Do-Not-Accords matrix : 384 transitions.
May 31, 2018 11:34:38 AM fr.lip6.move.gal.gal2smt.bmc.NextBMCSolver checkSat
WARNING: SMT solver unexpectedly returned 'unknown' answer, retrying.
Skipping mayMatrices nes/nds SMT solver raised an error :unknown
java.lang.RuntimeException: SMT solver raised an error :unknown
at fr.lip6.move.gal.gal2smt.bmc.NextBMCSolver.checkSat(NextBMCSolver.java:318)
at fr.lip6.move.gal.gal2smt.bmc.NextBMCSolver.checkSat(NextBMCSolver.java:305)
at fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver.computeDoNotAccord(NecessaryEnablingsolver.java:628)
at fr.lip6.move.gal.gal2pins.Gal2PinsTransformerNext.printLabels(Gal2PinsTransformerNext.java:538)
at fr.lip6.move.gal.gal2pins.Gal2PinsTransformerNext.printDependencyMatrix(Gal2PinsTransformerNext.java:209)
at fr.lip6.move.gal.gal2pins.Gal2PinsTransformerNext.buildBodyFile(Gal2PinsTransformerNext.java:85)
at fr.lip6.move.gal.gal2pins.Gal2PinsTransformerNext.transform(Gal2PinsTransformerNext.java:830)
at fr.lip6.move.gal.application.LTSminRunner$1.run(LTSminRunner.java:71)
at java.lang.Thread.run(Thread.java:748)
May 31, 2018 11:34:38 AM fr.lip6.move.gal.gal2pins.Gal2PinsTransformerNext transform
INFO: Built C files in 27933ms conformant to PINS in folder :/home/mcc/execution
pins2lts-mc, 0.000: Registering PINS so language module
pins2lts-mc, 0.000: Loading model from ./gal.so
pins2lts-mc, 0.000: library has no initializer
pins2lts-mc, 0.000: loading model GAL
pins2lts-mc, 0.000: completed loading model GAL
pins2lts-mc, 0.000: LTL layer: formula: []([](X([]([]((LTLAP15==true))))))
pins2lts-mc, 0.000: "[]([](X([]([]((LTLAP15==true))))))" is not a file, parsing as formula...
pins2lts-mc, 0.001: Using Spin LTL semantics
pins2lts-mc, 0.008: buchi has 3 states
pins2lts-mc, 0.008: Weak Buchi automaton detected, adding non-accepting as progress label.
pins2lts-mc, 0.022: DFS-FIFO for weak LTL, using special progress label 407
pins2lts-mc, 0.022: There are 408 state labels and 1 edge labels
pins2lts-mc, 0.022: State length is 769, there are 388 groups
pins2lts-mc, 0.022: Running dfsfifo using 1 core (sequential)
pins2lts-mc, 0.022: Using a tree table with 2^27 elements
pins2lts-mc, 0.022: Successor permutation: rr
pins2lts-mc, 0.022: Global bits: 2, count bits: 0, local bits: 0
pins2lts-mc, 1.259: 984 levels 1000 states 83606 transitions
pins2lts-mc, 2.051: 1984 levels 2000 states 159959 transitions
pins2lts-mc, 3.468: 3984 levels 4000 states 302568 transitions
pins2lts-mc, 6.225: 7984 levels 8000 states 597853 transitions
pins2lts-mc, 11.580: 15984 levels 16000 states 1174101 transitions
pins2lts-mc, 21.861: 31984 levels 32000 states 2326825 transitions
pins2lts-mc, 44.936: 63984 levels 64000 states 4635256 transitions
pins2lts-mc, 64.934: Error: tree leafs table full! Change -s/--ratio.
pins2lts-mc, 65.407:
pins2lts-mc, 65.407:
pins2lts-mc, 65.407: Explored 70265 states 5093590 transitions, fanout: 72.491
pins2lts-mc, 65.407: Total exploration time 65.380 sec (65.380 sec minimum, 65.380 sec on average)
pins2lts-mc, 65.407: States per second: 1075, Transitions per second: 77907
pins2lts-mc, 65.407:
pins2lts-mc, 65.407: Progress states detected: 1943
pins2lts-mc, 65.407: Redundant explorations: -98.6205
pins2lts-mc, 65.407:
pins2lts-mc, 65.407: Queue width: 8B, total height: 72306, memory: 0.55MB
pins2lts-mc, 65.407: Tree memory: 294.9MB, 60.7 B/state, compr.: 2.0%
pins2lts-mc, 65.407: Tree fill ratio (roots/leafs): 3.0%/99.0%
pins2lts-mc, 65.407: Stored 386 string chucks using 0MB
pins2lts-mc, 65.407: Total memory used for chunk indexing: 0MB
pins2lts-mc, 65.407: Est. total memory use: 295.4MB (~1024.6MB paged-in)
java.lang.RuntimeException: Unexpected exception when executing ltsmin :CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=1, --when, --ltl, []([](X([]([]((LTLAP15==true)))))), --buchi-type=spotba], workingDir=/home/mcc/execution]
255
at fr.lip6.move.gal.application.LTSminRunner.checkProperty(LTSminRunner.java:167)
at fr.lip6.move.gal.application.LTSminRunner.access$9(LTSminRunner.java:122)
at fr.lip6.move.gal.application.LTSminRunner$1.run(LTSminRunner.java:91)
at java.lang.Thread.run(Thread.java:748)
Sequence of Actions to be Executed by the VM
This is useful if one wants to reexecute the tool in the VM from the submitted image disk.
set -x
# this is for BenchKit: configuration of major elements for the test
export BK_INPUT="CircularTrains-PT-384"
export BK_EXAMINATION="LTLFireability"
export BK_TOOL="itstools"
export BK_RESULT_DIR="/tmp/BK_RESULTS/OUTPUTS"
export BK_TIME_CONFINEMENT="3600"
export BK_MEMORY_CONFINEMENT="16384"
# this is specific to your benchmark or test
export BIN_DIR="$HOME/BenchKit/bin"
# remove the execution directoty if it exists (to avoid increse of .vmdk images)
if [ -d execution ] ; then
rm -rf execution
fi
tar xzf /home/mcc/BenchKit/INPUTS/CircularTrains-PT-384.tgz
mv CircularTrains-PT-384 execution
cd execution
pwd
ls -lh
# this is for BenchKit: explicit launching of the test
echo "====================================================================="
echo " Generated by BenchKit 2-3637"
echo " Executing tool itstools"
echo " Input is CircularTrains-PT-384, examination is LTLFireability"
echo " Time confinement is $BK_TIME_CONFINEMENT seconds"
echo " Memory confinement is 16384 MBytes"
echo " Number of cores is 4"
echo " Run identifier is r212-smll-152732262600012"
echo "====================================================================="
echo
echo "--------------------"
echo "content from stdout:"
echo
echo "=== Data for post analysis generated by BenchKit (invocation template)"
echo
if [ "LTLFireability" = "UpperBounds" ] ; then
echo "The expected result is a vector of positive values"
echo NUM_VECTOR
elif [ "LTLFireability" != "StateSpace" ] ; then
echo "The expected result is a vector of booleans"
echo BOOL_VECTOR
else
echo "no data necessary for post analysis"
fi
echo
if [ -f "LTLFireability.txt" ] ; then
echo "here is the order used to build the result vector(from text file)"
for x in $(grep Property LTLFireability.txt | cut -d ' ' -f 2 | sort -u) ; do
echo "FORMULA_NAME $x"
done
elif [ -f "LTLFireability.xml" ] ; then # for cunf (txt files deleted;-)
echo echo "here is the order used to build the result vector(from xml file)"
for x in $(grep '
echo "FORMULA_NAME $x"
done
fi
echo
echo "=== Now, execution of the tool begins"
echo
echo -n "BK_START "
date -u +%s%3N
echo
timeout -s 9 $BK_TIME_CONFINEMENT bash -c "/home/mcc/BenchKit/BenchKit_head.sh 2> STDERR ; echo ; echo -n \"BK_STOP \" ; date -u +%s%3N"
if [ $? -eq 137 ] ; then
echo
echo "BK_TIME_CONFINEMENT_REACHED"
fi
echo
echo "--------------------"
echo "content from stderr:"
echo
cat STDERR ;