Execution Chart

We display below the execution chart for this examination (boot time has been removed).

Trace from the execution

Waiting for the VM to be ready (probing ssh)
.......................
/home/mcc/execution
total 256K
-rw-r--r-- 1 mcc users 3.7K May 15 18:54 CTLCardinality.txt
-rw-r--r-- 1 mcc users 21K May 15 18:54 CTLCardinality.xml
-rw-r--r-- 1 mcc users 2.2K May 15 18:54 CTLFireability.txt
-rw-r--r-- 1 mcc users 14K May 15 18:54 CTLFireability.xml
-rw-r--r-- 1 mcc users 4.0K May 15 18:49 GenericPropertiesDefinition.xml
-rw-r--r-- 1 mcc users 6.2K May 15 18:49 GenericPropertiesVerdict.xml
-rw-r--r-- 1 mcc users 2.3K May 26 09:26 LTLCardinality.txt
-rw-r--r-- 1 mcc users 11K May 26 09:26 LTLCardinality.xml
-rw-r--r-- 1 mcc users 1.8K May 26 09:26 LTLFireability.txt
-rw-r--r-- 1 mcc users 8.5K May 26 09:26 LTLFireability.xml
-rw-r--r-- 1 mcc users 3.4K May 15 18:54 ReachabilityCardinality.txt
-rw-r--r-- 1 mcc users 18K May 15 18:54 ReachabilityCardinality.xml
-rw-r--r-- 1 mcc users 108 May 15 18:54 ReachabilityDeadlock.txt
-rw-r--r-- 1 mcc users 346 May 15 18:54 ReachabilityDeadlock.xml
-rw-r--r-- 1 mcc users 2.9K May 15 18:54 ReachabilityFireability.txt
-rw-r--r-- 1 mcc users 19K May 15 18:54 ReachabilityFireability.xml
-rw-r--r-- 1 mcc users 1.6K May 15 18:54 UpperBounds.txt
-rw-r--r-- 1 mcc users 3.7K May 15 18:54 UpperBounds.xml
-rw-r--r-- 1 mcc users 6 May 15 18:49 equiv_col
-rw-r--r-- 1 mcc users 4 May 15 18:49 instance
-rw-r--r-- 1 mcc users 6 May 15 18:49 iscolored
-rw-r--r-- 1 mcc users 85K May 15 18:49 model.pnml
=====================================================================
Generated by BenchKit 2-3637
Executing tool itstools
Input is AutoFlight-PT-12a, examination is LTLFireability
Time confinement is 3600 seconds
Memory confinement is 16384 MBytes
Number of cores is 4
Run identifier is r200-qhx1-152732197100040
=====================================================================

--------------------
content from stdout:

=== Data for post analysis generated by BenchKit (invocation template)

The expected result is a vector of booleans
BOOL_VECTOR

here is the order used to build the result vector(from text file)
FORMULA_NAME AutoFlight-PT-12a-LTLFireability-00
FORMULA_NAME AutoFlight-PT-12a-LTLFireability-01
FORMULA_NAME AutoFlight-PT-12a-LTLFireability-02
FORMULA_NAME AutoFlight-PT-12a-LTLFireability-03
FORMULA_NAME AutoFlight-PT-12a-LTLFireability-04
FORMULA_NAME AutoFlight-PT-12a-LTLFireability-05
FORMULA_NAME AutoFlight-PT-12a-LTLFireability-06
FORMULA_NAME AutoFlight-PT-12a-LTLFireability-07
FORMULA_NAME AutoFlight-PT-12a-LTLFireability-08
FORMULA_NAME AutoFlight-PT-12a-LTLFireability-09
FORMULA_NAME AutoFlight-PT-12a-LTLFireability-10
FORMULA_NAME AutoFlight-PT-12a-LTLFireability-11
FORMULA_NAME AutoFlight-PT-12a-LTLFireability-12
FORMULA_NAME AutoFlight-PT-12a-LTLFireability-13
FORMULA_NAME AutoFlight-PT-12a-LTLFireability-14
FORMULA_NAME AutoFlight-PT-12a-LTLFireability-15

=== Now, execution of the tool begins

BK_START 1527406780065

Using solver Z3 to compute partial order matrices.
Built C files in :
/home/mcc/execution
Invoking ITS tools like this :CommandLine [args=[/home/mcc/BenchKit/itstools/plugins/fr.lip6.move.gal.itstools.binaries_1.0.0.201805151631/bin/its-ltl-linux64, --gc-threshold, 2000000, -i, /home/mcc/execution/LTLFireability.pnml.gal, -t, CGAL, -LTL, /home/mcc/execution/LTLFireability.ltl, -c, -stutter-deadlock], workingDir=/home/mcc/execution]

its-ltl command run as :

/home/mcc/BenchKit/itstools/plugins/fr.lip6.move.gal.itstools.binaries_1.0.0.201805151631/bin/its-ltl-linux64 --gc-threshold 2000000 -i /home/mcc/execution/LTLFireability.pnml.gal -t CGAL -LTL /home/mcc/execution/LTLFireability.ltl -c -stutter-deadlock
Read 16 LTL properties
Checking formula 0 : !(((X("((u31.p71>=1)&&(u61.p180>=1))"))U(X(("((u25.p59>=1)&&(u71.p282>=1))")U("((u30.p70>=1)&&(u61.p167>=1))")))))
Formula 0 simplified : !(X"((u31.p71>=1)&&(u61.p180>=1))" U X("((u25.p59>=1)&&(u71.p282>=1))" U "((u30.p70>=1)&&(u61.p167>=1))"))
built 111 ordering constraints for composite.
Presburger conditions satisfied. Using coverability to approximate state space in K-Induction.
// Phase 1: matrix 245 rows 307 cols
invariant :u72:p287 + u72:p288 + u72:p289 + u72:p290 + u72:p291 + u72:p292 + u76:p0 = 1
invariant :u32:p74 + u32:p75 + u32:p76 + u76:p0 = 1
invariant :u54:p111 + u76:p0 = 1
invariant :u12:p28 + u76:p0 = 1
invariant :u11:p25 + u11:p26 + u11:p27 + u76:p0 = 1
invariant :u70:p275 + u70:p276 + u70:p277 + u70:p278 + u70:p279 + u70:p280 + u76:p0 = 1
invariant :u75:p305 + u75:p306 + u76:p0 = 1
invariant :u35:p81 + u35:p82 + u35:p83 + u76:p0 = 1
invariant :u45:p97 + u45:p98 + u76:p0 = 1
invariant :u74:p299 + u74:p300 + u74:p301 + u74:p302 + u74:p303 + u74:p304 + u76:p0 = 1
invariant :u22:p50 + u22:p51 + u22:p52 + u76:p0 = 1
invariant :u64:p239 + u64:p240 + u64:p241 + u64:p242 + u64:p243 + u64:p244 + u76:p0 = 1
invariant :u61:p121 + u61:p122 + u61:p123 + u61:p124 + u61:p125 + u61:p126 + u61:p127 + u61:p128 + u61:p129 + u61:p130 + u61:p131 + u61:p132 + u61:p133 + u61:p134 + u61:p135 + u61:p136 + u61:p137 + u61:p138 + u61:p139 + u61:p140 + u61:p141 + u61:p142 + u61:p143 + u61:p144 + u61:p145 + u61:p146 + u61:p147 + u61:p148 + u61:p149 + u61:p150 + u61:p151 + u61:p152 + u61:p153 + u61:p154 + u61:p155 + u61:p156 + u61:p157 + u61:p158 + u61:p159 + u61:p160 + u61:p161 + u61:p162 + u61:p163 + u61:p164 + u61:p165 + u61:p166 + u61:p167 + u61:p168 + u61:p169 + u61:p170 + u61:p171 + u61:p172 + u61:p173 + u61:p174 + u61:p175 + u61:p176 + u61:p177 + u61:p178 + u61:p179 + u61:p180 + u61:p181 + -1'u62:p232 + -1'u63:p238 + -1'u64:p244 + -1'u65:p250 + -1'u66:p256 + -1'u67:p262 + -1'u68:p268 + -1'u69:p274 + -1'u70:p280 + -1'u71:p286 + -1'u72:p292 + -1'u73:p298 + -1'u74:p304 + -1'u75:p306 + -13'u76:p0 = -13
invariant :u34:p78 + u34:p79 + u34:p80 + u76:p0 = 1
invariant :u48:p102 + u76:p0 = 1
invariant :u51:p106 + u51:p107 + u76:p0 = 1
invariant :u26:p60 + u26:p61 + u26:p62 + u76:p0 = 1
invariant :u19:p43 + u19:p44 + u19:p45 + u76:p0 = 1
invariant :u65:p245 + u65:p246 + u65:p247 + u65:p248 + u65:p249 + u65:p250 + u76:p0 = 1
invariant :u29:p67 + u29:p68 + u29:p69 + u76:p0 = 1
invariant :u43:p94 + u43:p95 + u76:p0 = 1
invariant :u68:p263 + u68:p264 + u68:p265 + u68:p266 + u68:p267 + u68:p268 + u76:p0 = 1
invariant :u27:p63 + u76:p0 = 1
invariant :u46:p99 + u76:p0 = 1
invariant :u47:p100 + u47:p101 + u76:p0 = 1
invariant :u2:p4 + u2:p5 + u2:p6 + u76:p0 = 1
invariant :u1:p1 + u1:p2 + u1:p3 + u76:p0 = 1
invariant :u41:p91 + u41:p92 + u76:p0 = 1
invariant :u62:p183 + u62:p184 + u62:p185 + u62:p186 + u62:p187 + u62:p188 + u62:p189 + u62:p190 + u62:p191 + u62:p192 + u62:p193 + u62:p194 + u62:p195 + u62:p196 + u62:p197 + u62:p198 + u62:p199 + u62:p200 + u62:p201 + u62:p202 + u62:p203 + u62:p204 + u62:p205 + u62:p206 + u62:p207 + u62:p208 + u62:p209 + u62:p210 + u62:p211 + u62:p212 + u62:p213 + u62:p214 + u62:p215 + u62:p216 + u62:p217 + u62:p218 + u62:p219 + u62:p220 + u62:p221 + u62:p222 + u62:p223 + u62:p224 + u62:p225 + u62:p226 + u62:p227 + u62:p228 + u62:p229 + u62:p230 + u62:p231 + u62:p232 + u76:p0 = 1
invariant :u55:p112 + u55:p113 + u76:p0 = 1
invariant :u59:p118 + u59:p119 + u76:p0 = 1
invariant :u56:p114 + u76:p0 = 1
invariant :u71:p281 + u71:p282 + u71:p283 + u71:p284 + u71:p285 + u71:p286 + u76:p0 = 1
invariant :u5:p11 + u5:p12 + u5:p13 + u76:p0 = 1
invariant :u73:p293 + u73:p294 + u73:p295 + u73:p296 + u73:p297 + u73:p298 + u76:p0 = 1
invariant :u50:p105 + u76:p0 = 1
invariant :u10:p22 + u10:p23 + u10:p24 + u76:p0 = 1
invariant :u37:p85 + u37:p86 + u76:p0 = 1
invariant :u14:p32 + u14:p33 + u14:p34 + u76:p0 = 1
invariant :u16:p36 + u16:p37 + u16:p38 + u76:p0 = 1
invariant :u53:p109 + u53:p110 + u76:p0 = 1
invariant :u39:p88 + u39:p89 + u76:p0 = 1
invariant :u69:p269 + u69:p270 + u69:p271 + u69:p272 + u69:p273 + u69:p274 + u76:p0 = 1
invariant :u9:p21 + u76:p0 = 1
invariant :u24:p56 + u76:p0 = 1
invariant :u36:p84 + u76:p0 = 1
invariant :u38:p87 + u76:p0 = 1
invariant :u57:p115 + u57:p116 + u76:p0 = 1
invariant :u52:p108 + u76:p0 = 1
invariant :u66:p251 + u66:p252 + u66:p253 + u66:p254 + u66:p255 + u66:p256 + u76:p0 = 1
invariant :u4:p8 + u4:p9 + u4:p10 + u76:p0 = 1
invariant :u8:p18 + u8:p19 + u8:p20 + u76:p0 = 1
invariant :u31:p71 + u31:p72 + u31:p73 + u76:p0 = 1
invariant :u6:p14 + u76:p0 = 1
invariant :u28:p64 + u28:p65 + u28:p66 + u76:p0 = 1
invariant :u58:p117 + u76:p0 = 1
invariant :u25:p57 + u25:p58 + u25:p59 + u76:p0 = 1
invariant :u60:p120 + u76:p0 = 1
invariant :u18:p42 + u76:p0 = 1
invariant :u67:p257 + u67:p258 + u67:p259 + u67:p260 + u67:p261 + u67:p262 + u76:p0 = 1
invariant :u17:p39 + u17:p40 + u17:p41 + u76:p0 = 1
invariant :u63:p233 + u63:p234 + u63:p235 + u63:p236 + u63:p237 + u63:p238 + u76:p0 = 1
invariant :u40:p90 + u76:p0 = 1
invariant :u23:p53 + u23:p54 + u23:p55 + u76:p0 = 1
invariant :u49:p103 + u49:p104 + u76:p0 = 1
invariant :u15:p35 + u76:p0 = 1
invariant :u7:p15 + u7:p16 + u7:p17 + u76:p0 = 1
invariant :u20:p46 + u20:p47 + u20:p48 + u76:p0 = 1
invariant :u33:p77 + u76:p0 = 1
invariant :u42:p93 + u76:p0 = 1
invariant :u30:p70 + u76:p0 = 1
invariant :u13:p29 + u13:p30 + u13:p31 + u76:p0 = 1
invariant :u21:p49 + u76:p0 = 1
invariant :u44:p96 + u76:p0 = 1
invariant :u61:p182 + u62:p232 + u63:p238 + u64:p244 + u65:p250 + u66:p256 + u67:p262 + u68:p268 + u69:p274 + u70:p280 + u71:p286 + u72:p292 + u73:p298 + u74:p304 + u75:p306 + 14'u76:p0 = 14
invariant :u3:p7 + u76:p0 = 1
Reverse transition relation is NOT exact ! Due to transitions t283, t284, u1.t0, u1.t118, u2.t1, u2.t115, u4.t2, u4.t112, u5.t3, u5.t109, u7.t4, u7.t106, u8.t5, u8.t103, u10.t6, u10.t100, u11.t7, u11.t97, u13.t8, u13.t94, u14.t9, u14.t91, u16.t10, u16.t88, u17.t11, u17.t85, u19.t12, u19.t82, u20.t13, u20.t79, u22.t14, u22.t76, u23.t15, u23.t73, u25.t16, u25.t70, u26.t17, u26.t67, u28.t18, u28.t64, u29.t19, u29.t61, u31.t20, u31.t58, u32.t21, u32.t55, u34.t22, u34.t52, u35.t23, u35.t49, Intersection with reachable at each step enabled. (destroyed/reverse/intersect/total) :60/219/26/305
Computing Next relation with stutter on 24 deadlock states
4 unique states visited
4 strongly connected components in search stack
4 transitions explored
4 items max in DFS search stack
3300 ticks for the emptiness check
Model ,|S| ,Time ,Mem(kb) ,fin. SDD ,fin. DDD ,peak SDD ,peak DDD ,SDD Hom ,SDD cache peak ,DDD Hom ,DDD cachepeak ,SHom cache
STATS,0,33.1832,416692,1,0,481419,14182,3087,1.9281e+06,1417,42071,2590369
an accepting run exists (use option '-e' to print it)
Formula 0 is FALSE accepting run found.
FORMULA AutoFlight-PT-12a-LTLFireability-00 FALSE TECHNIQUES DECISION_DIAGRAMS TOPOLOGICAL USE_NUPN
Checking formula 1 : !(("((u73.p298>=1)&&(u75.p305>=1))"))
Formula 1 simplified : !"((u73.p298>=1)&&(u75.p305>=1))"
Computing Next relation with stutter on 24 deadlock states
3 unique states visited
3 strongly connected components in search stack
3 transitions explored
3 items max in DFS search stack
4 ticks for the emptiness check
Model ,|S| ,Time ,Mem(kb) ,fin. SDD ,fin. DDD ,peak SDD ,peak DDD ,SDD Hom ,SDD cache peak ,DDD Hom ,DDD cachepeak ,SHom cache
STATS,0,33.2163,417276,1,0,483128,14187,3094,1.92951e+06,1417,42114,2594233
an accepting run exists (use option '-e' to print it)
Formula 1 is FALSE accepting run found.
FORMULA AutoFlight-PT-12a-LTLFireability-01 FALSE TECHNIQUES DECISION_DIAGRAMS TOPOLOGICAL USE_NUPN
Checking formula 2 : !((X(G(G(F("(u62.p201>=1)"))))))
Formula 2 simplified : !XGF"(u62.p201>=1)"
Computing Next relation with stutter on 24 deadlock states
Running compilation step : CommandLine [args=[gcc, -c, -I/home/mcc/BenchKit//lts_install_dir//include, -I., -std=c99, -fPIC, -O3, model.c], workingDir=/home/mcc/execution]
Compilation finished in 6471 ms.
Running link step : CommandLine [args=[gcc, -shared, -o, gal.so, model.o], workingDir=/home/mcc/execution]
Link finished in 98 ms.
Running LTSmin : CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=1, --when, --ltl, X([]([](<>((LTLAP4==true))))), --buchi-type=spotba], workingDir=/home/mcc/execution]
LTSmin run took 192 ms.
FORMULA AutoFlight-PT-12a-LTLFireability-02 FALSE TECHNIQUES PARTIAL_ORDER EXPLICIT LTSMIN SAT_SMT
Running LTSmin : CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=1, -p, --pins-guards, --when, --ltl, <>(([](<>((LTLAP5==true))))U((LTLAP6==true))), --buchi-type=spotba], workingDir=/home/mcc/execution]
LTSmin run took 219 ms.
FORMULA AutoFlight-PT-12a-LTLFireability-03 FALSE TECHNIQUES PARTIAL_ORDER EXPLICIT LTSMIN SAT_SMT
Running LTSmin : CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=1, -p, --pins-guards, --when, --ltl, <>((((LTLAP7==true))U((LTLAP8==true)))U([](<>((LTLAP9==true))))), --buchi-type=spotba], workingDir=/home/mcc/execution]
LTSmin run took 228 ms.
FORMULA AutoFlight-PT-12a-LTLFireability-04 FALSE TECHNIQUES PARTIAL_ORDER EXPLICIT LTSMIN SAT_SMT
Running LTSmin : CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=1, --when, --ltl, X(X(X(X(X((LTLAP10==true)))))), --buchi-type=spotba], workingDir=/home/mcc/execution]
LTSmin run took 9862 ms.
FORMULA AutoFlight-PT-12a-LTLFireability-05 FALSE TECHNIQUES PARTIAL_ORDER EXPLICIT LTSMIN SAT_SMT
Running LTSmin : CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=1, --when, --ltl, X(<>(<>([](<>((LTLAP11==true)))))), --buchi-type=spotba], workingDir=/home/mcc/execution]
LTSmin run took 217 ms.
FORMULA AutoFlight-PT-12a-LTLFireability-06 FALSE TECHNIQUES PARTIAL_ORDER EXPLICIT LTSMIN SAT_SMT
Running LTSmin : CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=1, -p, --pins-guards, --when, --ltl, <>((LTLAP12==true)), --buchi-type=spotba], workingDir=/home/mcc/execution]
LTSmin run took 220 ms.
FORMULA AutoFlight-PT-12a-LTLFireability-07 TRUE TECHNIQUES PARTIAL_ORDER EXPLICIT LTSMIN SAT_SMT
Running LTSmin : CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=1, -p, --pins-guards, --when, --ltl, <>((LTLAP13==true)), --buchi-type=spotba], workingDir=/home/mcc/execution]
LTSmin run took 259 ms.
FORMULA AutoFlight-PT-12a-LTLFireability-08 FALSE TECHNIQUES PARTIAL_ORDER EXPLICIT LTSMIN SAT_SMT
Running LTSmin : CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=1, --when, --ltl, <>(<>((X((LTLAP14==true)))U((LTLAP15==true)))), --buchi-type=spotba], workingDir=/home/mcc/execution]
LTSmin run took 65 ms.
FORMULA AutoFlight-PT-12a-LTLFireability-09 TRUE TECHNIQUES PARTIAL_ORDER EXPLICIT LTSMIN SAT_SMT
Running LTSmin : CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=1, -p, --pins-guards, --when, --ltl, <>(((LTLAP0==true))U((LTLAP16==true))), --buchi-type=spotba], workingDir=/home/mcc/execution]
LTSmin run took 200 ms.
FORMULA AutoFlight-PT-12a-LTLFireability-10 TRUE TECHNIQUES PARTIAL_ORDER EXPLICIT LTSMIN SAT_SMT
Running LTSmin : CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=1, -p, --pins-guards, --when, --ltl, [](<>((LTLAP17==true))), --buchi-type=spotba], workingDir=/home/mcc/execution]
LTSmin run took 263 ms.
FORMULA AutoFlight-PT-12a-LTLFireability-11 FALSE TECHNIQUES PARTIAL_ORDER EXPLICIT LTSMIN SAT_SMT
Running LTSmin : CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=1, -p, --pins-guards, --when, --ltl, <>((LTLAP18==true)), --buchi-type=spotba], workingDir=/home/mcc/execution]
LTSmin run took 223 ms.
FORMULA AutoFlight-PT-12a-LTLFireability-12 FALSE TECHNIQUES PARTIAL_ORDER EXPLICIT LTSMIN SAT_SMT
Running LTSmin : CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=1, --when, --ltl, (X([]((LTLAP19==true))))U([](<>(<>((LTLAP20==true))))), --buchi-type=spotba], workingDir=/home/mcc/execution]
LTSmin run took 146 ms.
FORMULA AutoFlight-PT-12a-LTLFireability-13 FALSE TECHNIQUES PARTIAL_ORDER EXPLICIT LTSMIN SAT_SMT
Running LTSmin : CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=1, --when, --ltl, X([]((LTLAP21==true))), --buchi-type=spotba], workingDir=/home/mcc/execution]
LTSmin run took 159 ms.
FORMULA AutoFlight-PT-12a-LTLFireability-14 FALSE TECHNIQUES PARTIAL_ORDER EXPLICIT LTSMIN SAT_SMT
Running LTSmin : CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=1, --when, --ltl, [](<>(<>(<>(X((LTLAP22==true)))))), --buchi-type=spotba], workingDir=/home/mcc/execution]
LTSmin run took 146 ms.
FORMULA AutoFlight-PT-12a-LTLFireability-15 FALSE TECHNIQUES PARTIAL_ORDER EXPLICIT LTSMIN SAT_SMT
ITS tools runner thread asked to quit. Dying gracefully.

BK_STOP 1527406837933

--------------------
content from stderr:

+ export BINDIR=/home/mcc/BenchKit/
+ BINDIR=/home/mcc/BenchKit/
++ pwd
+ export MODEL=/home/mcc/execution
+ MODEL=/home/mcc/execution
+ /home/mcc/BenchKit//runeclipse.sh /home/mcc/execution LTLFireability -its -ltsminpath /home/mcc/BenchKit//lts_install_dir/ -smt
+ ulimit -s 65536
+ [[ -z '' ]]
+ export LTSMIN_MEM_SIZE=8589934592
+ LTSMIN_MEM_SIZE=8589934592
+ /home/mcc/BenchKit//itstools/its-tools -consoleLog -data /home/mcc/execution/workspace -pnfolder /home/mcc/execution -examination LTLFireability -z3path /home/mcc/BenchKit//z3/bin/z3 -yices2path /home/mcc/BenchKit//yices/bin/yices -its -ltsminpath /home/mcc/BenchKit//lts_install_dir/ -smt -vmargs -Dosgi.locking=none -Declipse.stateSaveDelayInterval=-1 -Dosgi.configuration.area=/tmp/.eclipse -Xss8m -Xms40m -Xmx8192m -Dfile.encoding=UTF-8 -Dosgi.requiredJavaVersion=1.6
May 27, 2018 7:39:42 AM fr.lip6.move.gal.application.Application start
INFO: Running its-tools with arguments : [-pnfolder, /home/mcc/execution, -examination, LTLFireability, -z3path, /home/mcc/BenchKit//z3/bin/z3, -yices2path, /home/mcc/BenchKit//yices/bin/yices, -its, -ltsminpath, /home/mcc/BenchKit//lts_install_dir/, -smt]
May 27, 2018 7:39:42 AM fr.lip6.move.gal.application.MccTranslator transformPNML
INFO: Parsing pnml file : /home/mcc/execution/model.pnml
May 27, 2018 7:39:42 AM fr.lip6.move.gal.nupn.PTNetReader loadFromXML
INFO: Load time of PNML (sax parser for PT used): 106 ms
May 27, 2018 7:39:42 AM fr.lip6.move.gal.pnml.togal.PTGALTransformer handlePage
INFO: Transformed 307 places.
May 27, 2018 7:39:43 AM fr.lip6.move.gal.pnml.togal.PTGALTransformer handlePage
INFO: Transformed 305 transitions.
May 27, 2018 7:39:43 AM fr.lip6.move.gal.pnml.togal.PnmlToGalTransformer transform
INFO: Found NUPN structural information;
May 27, 2018 7:39:43 AM fr.lip6.move.serialization.SerializationUtil systemToFile
INFO: Time to serialize gal into /home/mcc/execution/model.pnml.img.gal : 26 ms
May 27, 2018 7:39:43 AM fr.lip6.move.gal.application.MccTranslator applyOrder
INFO: Applying decomposition
May 27, 2018 7:39:43 AM fr.lip6.move.gal.instantiate.CompositeBuilder decomposeWithOrder
INFO: Decomposing Gal with order
May 27, 2018 7:39:43 AM fr.lip6.move.gal.instantiate.GALRewriter flatten
INFO: Flatten gal took : 117 ms
May 27, 2018 7:39:43 AM fr.lip6.move.gal.instantiate.CompositeBuilder rewriteArraysToAllowPartition
INFO: Rewriting arrays to variables to allow decomposition.
May 27, 2018 7:39:43 AM fr.lip6.move.gal.instantiate.Instantiator fuseIsomorphicEffects
INFO: Removed a total of 62 redundant transitions.
May 27, 2018 7:39:43 AM fr.lip6.move.serialization.SerializationUtil systemToFile
INFO: Time to serialize gal into /home/mcc/execution/LTLFireability.pnml.gal : 22 ms
May 27, 2018 7:39:43 AM fr.lip6.move.serialization.SerializationUtil serializePropertiesForITSLTLTools
INFO: Time to serialize properties into /home/mcc/execution/LTLFireability.ltl : 3 ms
May 27, 2018 7:39:44 AM fr.lip6.move.gal.semantics.CompositeNextBuilder getNextForLabel
INFO: Semantic construction discarded 60 identical transitions.
May 27, 2018 7:39:44 AM fr.lip6.move.gal.semantics.DeterministicNextBuilder getDeterministicNext
INFO: Input system was already deterministic with 245 transitions.
May 27, 2018 7:39:44 AM fr.lip6.move.gal.gal2smt.bmc.KInductionSolver computeAndDeclareInvariants
INFO: Computed 76 place invariants in 119 ms
May 27, 2018 7:39:45 AM fr.lip6.move.gal.gal2smt.bmc.KInductionSolver init
INFO: Proved 307 variables to be positive in 905 ms
May 27, 2018 7:39:45 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver computeAblingMatrix
INFO: Computing symmetric may disable matrix : 245 transitions.
May 27, 2018 7:39:45 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of disable matrix completed :0/245 took 0 ms. Total solver calls (SAT/UNSAT): 0(0/0)
May 27, 2018 7:39:45 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of Complete disable matrix. took 26 ms. Total solver calls (SAT/UNSAT): 0(0/0)
May 27, 2018 7:39:45 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver computeAblingMatrix
INFO: Computing symmetric may enable matrix : 245 transitions.
May 27, 2018 7:39:45 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of Complete enable matrix. took 23 ms. Total solver calls (SAT/UNSAT): 0(0/0)
May 27, 2018 7:39:47 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver computeCoEnablingMatrix
INFO: Computing symmetric co enabling matrix : 245 transitions.
May 27, 2018 7:39:48 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(13/245) took 859 ms. Total solver calls (SAT/UNSAT): 312(6/306)
May 27, 2018 7:39:51 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(38/245) took 3968 ms. Total solver calls (SAT/UNSAT): 1511(1153/358)
May 27, 2018 7:39:54 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(56/245) took 7025 ms. Total solver calls (SAT/UNSAT): 2694(2316/378)
May 27, 2018 7:39:57 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(108/245) took 10048 ms. Total solver calls (SAT/UNSAT): 4135(2532/1603)
May 27, 2018 7:40:03 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(127/245) took 16243 ms. Total solver calls (SAT/UNSAT): 4540(2776/1764)
May 27, 2018 7:40:07 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(134/245) took 19562 ms. Total solver calls (SAT/UNSAT): 4827(2941/1886)
May 27, 2018 7:40:10 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(142/245) took 22653 ms. Total solver calls (SAT/UNSAT): 5083(3185/1898)
May 27, 2018 7:40:13 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(156/245) took 25660 ms. Total solver calls (SAT/UNSAT): 5246(3344/1902)
May 27, 2018 7:40:16 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(223/245) took 28709 ms. Total solver calls (SAT/UNSAT): 5506(3584/1922)
May 27, 2018 7:40:17 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of Finished co-enabling matrix. took 29718 ms. Total solver calls (SAT/UNSAT): 5608(3620/1988)
May 27, 2018 7:40:17 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver computeDoNotAccord
INFO: Computing Do-Not-Accords matrix : 245 transitions.
May 27, 2018 7:40:17 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of Completed DNA matrix. took 149 ms. Total solver calls (SAT/UNSAT): 61(0/61)
May 27, 2018 7:40:17 AM fr.lip6.move.gal.gal2pins.Gal2PinsTransformerNext transform
INFO: Built C files in 33752ms conformant to PINS in folder :/home/mcc/execution

Sequence of Actions to be Executed by the VM

This is useful if one wants to reexecute the tool in the VM from the submitted image disk.

set -x
# this is for BenchKit: configuration of major elements for the test
export BK_INPUT="AutoFlight-PT-12a"
export BK_EXAMINATION="LTLFireability"
export BK_TOOL="itstools"
export BK_RESULT_DIR="/tmp/BK_RESULTS/OUTPUTS"
export BK_TIME_CONFINEMENT="3600"
export BK_MEMORY_CONFINEMENT="16384"

# this is specific to your benchmark or test

export BIN_DIR="$HOME/BenchKit/bin"

# remove the execution directoty if it exists (to avoid increse of .vmdk images)
if [ -d execution ] ; then
rm -rf execution
fi

tar xzf /home/mcc/BenchKit/INPUTS/AutoFlight-PT-12a.tgz
mv AutoFlight-PT-12a execution
cd execution
pwd
ls -lh

# this is for BenchKit: explicit launching of the test
echo "====================================================================="
echo " Generated by BenchKit 2-3637"
echo " Executing tool itstools"
echo " Input is AutoFlight-PT-12a, examination is LTLFireability"
echo " Time confinement is $BK_TIME_CONFINEMENT seconds"
echo " Memory confinement is 16384 MBytes"
echo " Number of cores is 4"
echo " Run identifier is r200-qhx1-152732197100040"
echo "====================================================================="
echo
echo "--------------------"
echo "content from stdout:"
echo
echo "=== Data for post analysis generated by BenchKit (invocation template)"
echo
if [ "LTLFireability" = "UpperBounds" ] ; then
echo "The expected result is a vector of positive values"
echo NUM_VECTOR
elif [ "LTLFireability" != "StateSpace" ] ; then
echo "The expected result is a vector of booleans"
echo BOOL_VECTOR
else
echo "no data necessary for post analysis"
fi
echo
if [ -f "LTLFireability.txt" ] ; then
echo "here is the order used to build the result vector(from text file)"
for x in $(grep Property LTLFireability.txt | cut -d ' ' -f 2 | sort -u) ; do
echo "FORMULA_NAME $x"
done
elif [ -f "LTLFireability.xml" ] ; then # for cunf (txt files deleted;-)
echo echo "here is the order used to build the result vector(from xml file)"
for x in $(grep '' LTLFireability.xml | cut -d '>' -f 2 | cut -d '<' -f 1 | sort -u) ; do
echo "FORMULA_NAME $x"
done
fi
echo
echo "=== Now, execution of the tool begins"
echo
echo -n "BK_START "
date -u +%s%3N
echo
timeout -s 9 $BK_TIME_CONFINEMENT bash -c "/home/mcc/BenchKit/BenchKit_head.sh 2> STDERR ; echo ; echo -n \"BK_STOP \" ; date -u +%s%3N"
if [ $? -eq 137 ] ; then
echo
echo "BK_TIME_CONFINEMENT_REACHED"
fi
echo
echo "--------------------"
echo "content from stderr:"
echo
cat STDERR ;