Execution Chart

We display below the execution chart for this examination (boot time has been removed).

Trace from the execution

Waiting for the VM to be ready (probing ssh)
.........................................................................
/home/mcc/execution
total 256K
-rw-r--r-- 1 mcc users 3.5K May 15 18:54 CTLCardinality.txt
-rw-r--r-- 1 mcc users 20K May 15 18:54 CTLCardinality.xml
-rw-r--r-- 1 mcc users 2.5K May 15 18:54 CTLFireability.txt
-rw-r--r-- 1 mcc users 17K May 15 18:54 CTLFireability.xml
-rw-r--r-- 1 mcc users 4.0K May 15 18:49 GenericPropertiesDefinition.xml
-rw-r--r-- 1 mcc users 6.2K May 15 18:49 GenericPropertiesVerdict.xml
-rw-r--r-- 1 mcc users 2.5K May 26 09:26 LTLCardinality.txt
-rw-r--r-- 1 mcc users 12K May 26 09:26 LTLCardinality.xml
-rw-r--r-- 1 mcc users 2.0K May 26 09:26 LTLFireability.txt
-rw-r--r-- 1 mcc users 11K May 26 09:26 LTLFireability.xml
-rw-r--r-- 1 mcc users 3.7K May 15 18:54 ReachabilityCardinality.txt
-rw-r--r-- 1 mcc users 19K May 15 18:54 ReachabilityCardinality.xml
-rw-r--r-- 1 mcc users 108 May 15 18:54 ReachabilityDeadlock.txt
-rw-r--r-- 1 mcc users 346 May 15 18:54 ReachabilityDeadlock.xml
-rw-r--r-- 1 mcc users 2.5K May 15 18:54 ReachabilityFireability.txt
-rw-r--r-- 1 mcc users 15K May 15 18:54 ReachabilityFireability.xml
-rw-r--r-- 1 mcc users 1.6K May 15 18:54 UpperBounds.txt
-rw-r--r-- 1 mcc users 3.7K May 15 18:54 UpperBounds.xml
-rw-r--r-- 1 mcc users 6 May 15 18:49 equiv_col
-rw-r--r-- 1 mcc users 4 May 15 18:49 instance
-rw-r--r-- 1 mcc users 6 May 15 18:49 iscolored
-rw-r--r-- 1 mcc users 91K May 15 18:49 model.pnml
=====================================================================
Generated by BenchKit 2-3637
Executing tool itstools
Input is AutoFlight-PT-04b, examination is LTLFireability
Time confinement is 3600 seconds
Memory confinement is 16384 MBytes
Number of cores is 4
Run identifier is r200-qhx1-152732197100030
=====================================================================

--------------------
content from stdout:

=== Data for post analysis generated by BenchKit (invocation template)

The expected result is a vector of booleans
BOOL_VECTOR

here is the order used to build the result vector(from text file)
FORMULA_NAME AutoFlight-PT-04b-LTLFireability-00
FORMULA_NAME AutoFlight-PT-04b-LTLFireability-01
FORMULA_NAME AutoFlight-PT-04b-LTLFireability-02
FORMULA_NAME AutoFlight-PT-04b-LTLFireability-03
FORMULA_NAME AutoFlight-PT-04b-LTLFireability-04
FORMULA_NAME AutoFlight-PT-04b-LTLFireability-05
FORMULA_NAME AutoFlight-PT-04b-LTLFireability-06
FORMULA_NAME AutoFlight-PT-04b-LTLFireability-07
FORMULA_NAME AutoFlight-PT-04b-LTLFireability-08
FORMULA_NAME AutoFlight-PT-04b-LTLFireability-09
FORMULA_NAME AutoFlight-PT-04b-LTLFireability-10
FORMULA_NAME AutoFlight-PT-04b-LTLFireability-11
FORMULA_NAME AutoFlight-PT-04b-LTLFireability-12
FORMULA_NAME AutoFlight-PT-04b-LTLFireability-13
FORMULA_NAME AutoFlight-PT-04b-LTLFireability-14
FORMULA_NAME AutoFlight-PT-04b-LTLFireability-15

=== Now, execution of the tool begins

BK_START 1527402843838

Using solver Z3 to compute partial order matrices.
Built C files in :
/home/mcc/execution
Invoking ITS tools like this :CommandLine [args=[/home/mcc/BenchKit/itstools/plugins/fr.lip6.move.gal.itstools.binaries_1.0.0.201805151631/bin/its-ltl-linux64, --gc-threshold, 2000000, -i, /home/mcc/execution/LTLFireability.pnml.gal, -t, CGAL, -LTL, /home/mcc/execution/LTLFireability.ltl, -c, -stutter-deadlock], workingDir=/home/mcc/execution]

its-ltl command run as :

/home/mcc/BenchKit/itstools/plugins/fr.lip6.move.gal.itstools.binaries_1.0.0.201805151631/bin/its-ltl-linux64 --gc-threshold 2000000 -i /home/mcc/execution/LTLFireability.pnml.gal -t CGAL -LTL /home/mcc/execution/LTLFireability.ltl -c -stutter-deadlock
Read 16 LTL properties
Checking formula 0 : !((F((X(F("(u36.p220>=1)")))U(("(u26.p100>=1)")U("(u25.p91>=1)")))))
Formula 0 simplified : !F(XF"(u36.p220>=1)" U ("(u26.p100>=1)" U "(u25.p91>=1)"))
built 64 ordering constraints for composite.
Presburger conditions satisfied. Using coverability to approximate state space in K-Induction.
// Phase 1: matrix 388 rows 390 cols
invariant :u22:p44 + u22:p45 + u22:p46 + u22:p47 + u22:p48 + u22:p49 + u22:p50 + u22:p51 + u22:p52 + u22:p53 + u22:p54 + u22:p55 + u22:p56 + u22:p57 + u22:p58 + u22:p59 + u22:p60 + u71:p20 + u65:p19 + u67:p18 + u63:p17 + u64:p16 + u61:p15 + u62:p14 + u59:p13 + u60:p12 + u78:p11 + u77:p10 + u76:p9 + u75:p8 + u74:p7 + u73:p6 + u72:p5 + u70:p4 + u68:p3 + u66:p0 + u66:p1 + u66:p2 = 1
invariant :u26:p100 + u26:p101 + u26:p102 + u26:p103 + u26:p104 + u26:p105 + u26:p106 + u26:p107 + u26:p108 + u26:p109 + u26:p110 + u64:p16 + u61:p15 + u62:p14 + u59:p13 + u60:p12 + u78:p11 + u77:p10 + u76:p9 + u75:p8 + u74:p7 + u73:p6 + u72:p5 + u70:p4 + u68:p3 + u66:p0 + u66:p1 + u66:p2 = 1
invariant :u47:p292 + u47:p293 + u47:p294 + u47:p295 + u47:p296 + u47:p297 + u47:p298 + u47:p299 + u47:p300 + u47:p301 + u47:p302 + u47:p303 + u47:p304 + u47:p305 + u47:p306 + u47:p307 + u47:p308 + u47:p309 + u47:p310 + u47:p311 + u47:p312 + u47:p313 + u47:p314 + u47:p315 + u47:p316 + u47:p317 + u58:p251 + u56:p250 + u57:p249 + u54:p248 + u55:p247 + u53:p246 + u66:p0 + u66:p1 + u66:p2 = 1
invariant :u49:p335 + u49:p336 + u49:p337 + u49:p338 + u49:p339 + u49:p340 + u49:p341 + u49:p342 + u49:p343 + u49:p344 + u49:p345 + u49:p346 + u49:p347 + u49:p348 + u49:p349 + u49:p350 + u49:p351 + u57:p249 + u54:p248 + u55:p247 + u53:p246 + u66:p0 + u66:p1 + u66:p2 = 1
invariant :u27:p111 + u27:p112 + u27:p113 + u27:p114 + u27:p115 + u27:p116 + u27:p117 + u27:p118 + u27:p119 + u27:p120 + u27:p121 + u61:p15 + u62:p14 + u59:p13 + u60:p12 + u78:p11 + u77:p10 + u76:p9 + u75:p8 + u74:p7 + u73:p6 + u72:p5 + u70:p4 + u68:p3 + u66:p0 + u66:p1 + u66:p2 = 1
invariant :u48:p318 + u48:p319 + u48:p320 + u48:p321 + u48:p322 + u48:p323 + u48:p324 + u48:p325 + u48:p326 + u48:p327 + u48:p328 + u48:p329 + u48:p330 + u48:p331 + u48:p332 + u48:p333 + u48:p334 + u56:p250 + u57:p249 + u54:p248 + u55:p247 + u53:p246 + u66:p0 + u66:p1 + u66:p2 = 1
invariant :u35:p208 + u35:p209 + u35:p210 + u35:p211 + u74:p7 + u73:p6 + u72:p5 + u70:p4 + u68:p3 + u66:p0 + u66:p1 + u66:p2 = 1
invariant :u34:p195 + u34:p196 + u34:p197 + u34:p198 + u34:p199 + u34:p200 + u34:p201 + u34:p202 + u34:p203 + u34:p204 + u34:p205 + u34:p206 + u34:p207 + u75:p8 + u74:p7 + u73:p6 + u72:p5 + u70:p4 + u68:p3 + u66:p0 + u66:p1 + u66:p2 = 1
invariant :u46:p252 + u46:p253 + u46:p254 + u46:p255 + u46:p256 + u46:p257 + u46:p258 + u46:p259 + u46:p260 + u46:p261 + u46:p262 + u46:p263 + u46:p264 + u46:p265 + u46:p266 + u46:p267 + u46:p268 + u46:p269 + u46:p270 + u46:p271 + u46:p272 + u46:p273 + u46:p274 + u46:p275 + u46:p276 + u46:p277 + u46:p278 + u46:p279 + u46:p280 + u46:p281 + u46:p282 + u46:p283 + u46:p284 + u46:p285 + u46:p286 + u46:p287 + u46:p288 + u46:p289 + u46:p290 + u46:p291 + u58:p251 + u56:p250 + u57:p249 + u54:p248 + u55:p247 + u53:p246 + u66:p0 + u66:p1 + u66:p2 = 1
invariant :u25:p83 + u25:p84 + u25:p85 + u25:p86 + u25:p87 + u25:p88 + u25:p89 + u25:p90 + u25:p91 + u25:p92 + u25:p93 + u25:p94 + u25:p95 + u25:p96 + u25:p97 + u25:p98 + u25:p99 + u63:p17 + u64:p16 + u61:p15 + u62:p14 + u59:p13 + u60:p12 + u78:p11 + u77:p10 + u76:p9 + u75:p8 + u74:p7 + u73:p6 + u72:p5 + u70:p4 + u68:p3 + u66:p0 + u66:p1 + u66:p2 = 1
invariant :u21:p33 + u21:p34 + u21:p35 + u21:p36 + u21:p37 + u21:p38 + u21:p39 + u21:p40 + u21:p41 + u21:p42 + u21:p43 + u69:p21 + u71:p20 + u65:p19 + u67:p18 + u63:p17 + u64:p16 + u61:p15 + u62:p14 + u59:p13 + u60:p12 + u78:p11 + u77:p10 + u76:p9 + u75:p8 + u74:p7 + u73:p6 + u72:p5 + u70:p4 + u68:p3 + u66:p0 + u66:p1 + u66:p2 = 1
invariant :u23:p61 + u23:p62 + u23:p63 + u23:p64 + u23:p65 + u23:p66 + u23:p67 + u23:p68 + u23:p69 + u23:p70 + u23:p71 + u65:p19 + u67:p18 + u63:p17 + u64:p16 + u61:p15 + u62:p14 + u59:p13 + u60:p12 + u78:p11 + u77:p10 + u76:p9 + u75:p8 + u74:p7 + u73:p6 + u72:p5 + u70:p4 + u68:p3 + u66:p0 + u66:p1 + u66:p2 = 1
invariant :u46:p254 + u46:p255 + u46:p256 + u46:p257 + u46:p258 + u46:p259 + u46:p260 + u46:p261 + u46:p262 + u46:p263 + u46:p264 + u46:p265 + u46:p266 + u46:p267 + u46:p268 + u46:p269 + u46:p270 + u46:p271 + u46:p272 + u46:p273 + u46:p274 + u46:p275 + u46:p276 + u47:p294 + u47:p295 + u47:p296 + u47:p297 + u47:p298 + u47:p299 + u47:p300 + u47:p301 + u47:p302 + u47:p303 + u47:p304 + u47:p305 + u47:p306 + u47:p307 + u47:p308 + u47:p309 + u47:p310 + u47:p311 + u47:p312 + u48:p320 + u48:p321 + u48:p322 + u48:p323 + u48:p324 + u48:p325 + u48:p326 + u49:p337 + u49:p338 + u49:p339 + u49:p340 + u49:p341 + u49:p342 + u49:p343 + u50:p354 + u50:p355 + u50:p356 + u50:p357 + u50:p358 + u50:p359 + u50:p360 + u51:p371 + u51:p372 + u51:p373 + u51:p374 + u51:p375 + u51:p376 + u51:p377 + u52:p386 + u52:p387 + u53:p246 + u66:p0 + u66:p1 + u66:p2 = 1
invariant :u24:p72 + u24:p73 + u24:p74 + u24:p75 + u24:p76 + u24:p77 + u24:p78 + u24:p79 + u24:p80 + u24:p81 + u24:p82 + u67:p18 + u63:p17 + u64:p16 + u61:p15 + u62:p14 + u59:p13 + u60:p12 + u78:p11 + u77:p10 + u76:p9 + u75:p8 + u74:p7 + u73:p6 + u72:p5 + u70:p4 + u68:p3 + u66:p0 + u66:p1 + u66:p2 = 1
invariant :u38:p229 + u38:p230 + u38:p231 + u38:p232 + u38:p233 + u38:p234 + u38:p235 + u38:p236 + u38:p237 + u38:p238 + u38:p239 + u38:p240 + u38:p241 + u70:p4 + u68:p3 + u66:p0 + u66:p1 + u66:p2 = 1
invariant :u29:p139 + u29:p140 + u29:p141 + u29:p142 + u29:p143 + u29:p144 + u29:p145 + u29:p146 + u29:p147 + u29:p148 + u29:p149 + u59:p13 + u60:p12 + u78:p11 + u77:p10 + u76:p9 + u75:p8 + u74:p7 + u73:p6 + u72:p5 + u70:p4 + u68:p3 + u66:p0 + u66:p1 + u66:p2 = 1
invariant :u31:p161 + u31:p162 + u31:p163 + u31:p164 + u31:p165 + u31:p166 + u31:p167 + u31:p168 + u31:p169 + u31:p170 + u31:p171 + u31:p172 + u31:p173 + u31:p174 + u31:p175 + u31:p176 + u31:p177 + u78:p11 + u77:p10 + u76:p9 + u75:p8 + u74:p7 + u73:p6 + u72:p5 + u70:p4 + u68:p3 + u66:p0 + u66:p1 + u66:p2 = 1
invariant :u33:p191 + u33:p192 + u33:p193 + u33:p194 + u76:p9 + u75:p8 + u74:p7 + u73:p6 + u72:p5 + u70:p4 + u68:p3 + u66:p0 + u66:p1 + u66:p2 = 1
invariant :u28:p122 + u28:p123 + u28:p124 + u28:p125 + u28:p126 + u28:p127 + u28:p128 + u28:p129 + u28:p130 + u28:p131 + u28:p132 + u28:p133 + u28:p134 + u28:p135 + u28:p136 + u28:p137 + u28:p138 + u62:p14 + u59:p13 + u60:p12 + u78:p11 + u77:p10 + u76:p9 + u75:p8 + u74:p7 + u73:p6 + u72:p5 + u70:p4 + u68:p3 + u66:p0 + u66:p1 + u66:p2 = 1
invariant :u39:p242 + u39:p243 + u39:p244 + u39:p245 + u68:p3 + u66:p0 + u66:p1 + u66:p2 = 1
invariant :u36:p212 + u36:p213 + u36:p214 + u36:p215 + u36:p216 + u36:p217 + u36:p218 + u36:p219 + u36:p220 + u36:p221 + u36:p222 + u36:p223 + u36:p224 + u73:p6 + u72:p5 + u70:p4 + u68:p3 + u66:p0 + u66:p1 + u66:p2 = 1
invariant :u20:p22 + u20:p23 + u20:p24 + u20:p25 + u20:p26 + u20:p27 + u20:p28 + u20:p29 + u20:p30 + u20:p31 + u20:p32 + u69:p21 + u71:p20 + u65:p19 + u67:p18 + u63:p17 + u64:p16 + u61:p15 + u62:p14 + u59:p13 + u60:p12 + u78:p11 + u77:p10 + u76:p9 + u75:p8 + u74:p7 + u73:p6 + u72:p5 + u70:p4 + u68:p3 + u66:p0 + u66:p1 + u66:p2 = 1
invariant :-1'u46:p254 + -1'u46:p255 + -1'u46:p256 + -1'u46:p257 + -1'u46:p258 + -1'u46:p259 + -1'u46:p260 + -1'u46:p261 + -1'u46:p262 + -1'u46:p263 + -1'u46:p264 + -1'u46:p265 + -1'u46:p266 + -1'u46:p267 + -1'u46:p268 + -1'u46:p269 + -1'u46:p270 + -1'u46:p271 + -1'u46:p272 + -1'u46:p273 + -1'u46:p274 + -1'u46:p275 + -1'u46:p276 + -1'u47:p294 + -1'u47:p295 + -1'u47:p296 + -1'u47:p297 + -1'u47:p298 + -1'u47:p299 + -1'u47:p300 + -1'u47:p301 + -1'u47:p302 + -1'u47:p303 + -1'u47:p304 + -1'u47:p305 + -1'u47:p306 + -1'u47:p307 + -1'u47:p308 + -1'u47:p309 + -1'u47:p310 + -1'u47:p311 + -1'u47:p312 + -1'u48:p320 + -1'u48:p321 + -1'u48:p322 + -1'u48:p323 + -1'u48:p324 + -1'u48:p325 + -1'u48:p326 + -1'u49:p337 + -1'u49:p338 + -1'u49:p339 + -1'u49:p340 + -1'u49:p341 + -1'u49:p342 + -1'u49:p343 + -1'u50:p354 + -1'u50:p355 + -1'u50:p356 + -1'u50:p357 + -1'u50:p358 + -1'u50:p359 + -1'u50:p360 + -1'u51:p371 + -1'u51:p372 + -1'u51:p373 + -1'u51:p374 + -1'u51:p375 + -1'u51:p376 + -1'u51:p377 + u52:p388 + u52:p389 = 0
invariant :u37:p225 + u37:p226 + u37:p227 + u37:p228 + u72:p5 + u70:p4 + u68:p3 + u66:p0 + u66:p1 + u66:p2 = 1
invariant :u30:p150 + u30:p151 + u30:p152 + u30:p153 + u30:p154 + u30:p155 + u30:p156 + u30:p157 + u30:p158 + u30:p159 + u30:p160 + u60:p12 + u78:p11 + u77:p10 + u76:p9 + u75:p8 + u74:p7 + u73:p6 + u72:p5 + u70:p4 + u68:p3 + u66:p0 + u66:p1 + u66:p2 = 1
invariant :u32:p178 + u32:p179 + u32:p180 + u32:p181 + u32:p182 + u32:p183 + u32:p184 + u32:p185 + u32:p186 + u32:p187 + u32:p188 + u32:p189 + u32:p190 + u77:p10 + u76:p9 + u75:p8 + u74:p7 + u73:p6 + u72:p5 + u70:p4 + u68:p3 + u66:p0 + u66:p1 + u66:p2 = 1
invariant :u51:p369 + u51:p370 + u51:p371 + u51:p372 + u51:p373 + u51:p374 + u51:p375 + u51:p376 + u51:p377 + u51:p378 + u51:p379 + u51:p380 + u51:p381 + u51:p382 + u51:p383 + u51:p384 + u51:p385 + u55:p247 + u53:p246 + u66:p0 + u66:p1 + u66:p2 = 1
invariant :u50:p352 + u50:p353 + u50:p354 + u50:p355 + u50:p356 + u50:p357 + u50:p358 + u50:p359 + u50:p360 + u50:p361 + u50:p362 + u50:p363 + u50:p364 + u50:p365 + u50:p366 + u50:p367 + u50:p368 + u54:p248 + u55:p247 + u53:p246 + u66:p0 + u66:p1 + u66:p2 = 1
Running compilation step : CommandLine [args=[gcc, -c, -I/home/mcc/BenchKit//lts_install_dir//include, -I., -std=c99, -fPIC, -O3, model.c], workingDir=/home/mcc/execution]
Compilation finished in 9399 ms.
Running link step : CommandLine [args=[gcc, -shared, -o, gal.so, model.o], workingDir=/home/mcc/execution]
Link finished in 114 ms.
Running LTSmin : CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=1, --when, --ltl, <>((X(<>((LTLAP0==true))))U(((LTLAP1==true))U((LTLAP2==true)))), --buchi-type=spotba], workingDir=/home/mcc/execution]
LTSmin run took 314 ms.
FORMULA AutoFlight-PT-04b-LTLFireability-00 FALSE TECHNIQUES PARTIAL_ORDER EXPLICIT LTSMIN SAT_SMT
Running LTSmin : CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=1, --when, --ltl, <>(X([](X(<>((LTLAP3==true)))))), --buchi-type=spotba], workingDir=/home/mcc/execution]
Reverse transition relation is NOT exact ! Due to transitions t129, t145, t161, t177, t376, t377, t378, t379, t380, t381, u20.t0, u20.t1, u20.t2, u20.t316, u20.t323, u21.t3, u21.t4, u21.t5, u21.t307, u21.t314, u22.t6, u22.t7, u22.t8, u22.t9, u22.t296, u22.t304, u23.t10, u23.t11, u23.t12, u23.t284, u23.t291, u24.t13, u24.t14, u24.t15, u24.t274, u24.t281, u25.t16, u25.t17, u25.t18, u25.t19, u25.t263, u25.t271, u26.t20, u26.t21, u26.t22, u26.t251, u26.t258, u27.t23, u27.t24, u27.t25, u27.t241, u27.t248, u28.t26, u28.t27, u28.t28, u28.t29, u28.t230, u28.t238, u29.t30, u29.t31, u29.t32, u29.t218, u29.t225, u30.t33, u30.t34, u30.t35, u30.t208, u30.t215, u31.t36, u31.t37, u31.t38, u31.t39, u31.t197, u31.t205, u32.t182, u32.t192, u33.t179, u34.t166, u34.t176, u35.t163, u36.t150, u36.t160, u37.t147, u38.t134, u38.t144, u39.t131, u46.t125, u46.t128, u47.t107, u47.t110, u48.t98, u48.t101, u49.t86, u49.t89, u50.t74, u50.t77, u51.t62, u51.t65, u52.t53, Intersection with reachable at each step enabled. (destroyed/reverse/intersect/total) :0/289/99/388
Computing Next relation with stutter on 320 deadlock states
WARNING : LTSmin timed out (>225 s) on command CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=1, --when, --ltl, <>(X([](X(<>((LTLAP3==true)))))), --buchi-type=spotba], workingDir=/home/mcc/execution]
Running LTSmin : CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=1, --when, --ltl, ((X((LTLAP4==true)))U(X((LTLAP5==true))))U(([]((LTLAP6==true)))U((LTLAP7==true))), --buchi-type=spotba], workingDir=/home/mcc/execution]
LTSmin run took 458 ms.
FORMULA AutoFlight-PT-04b-LTLFireability-02 FALSE TECHNIQUES PARTIAL_ORDER EXPLICIT LTSMIN SAT_SMT
Running LTSmin : CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=1, -p, --pins-guards, --when, --ltl, (<>([](<>((LTLAP8==true)))))U(<>(<>(<>((LTLAP9==true))))), --buchi-type=spotba], workingDir=/home/mcc/execution]
LTSmin run took 563 ms.
FORMULA AutoFlight-PT-04b-LTLFireability-03 FALSE TECHNIQUES PARTIAL_ORDER EXPLICIT LTSMIN SAT_SMT
Running LTSmin : CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=1, --when, --ltl, [](X((LTLAP10==true))), --buchi-type=spotba], workingDir=/home/mcc/execution]
LTSmin run took 242 ms.
FORMULA AutoFlight-PT-04b-LTLFireability-04 FALSE TECHNIQUES PARTIAL_ORDER EXPLICIT LTSMIN SAT_SMT
Running LTSmin : CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=1, -p, --pins-guards, --when, --ltl, []((((LTLAP11==true))U((LTLAP12==true)))U(<>((LTLAP13==true)))), --buchi-type=spotba], workingDir=/home/mcc/execution]
LTSmin run took 584 ms.
FORMULA AutoFlight-PT-04b-LTLFireability-05 FALSE TECHNIQUES PARTIAL_ORDER EXPLICIT LTSMIN SAT_SMT
Running LTSmin : CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=1, --when, --ltl, [](X([]([]((LTLAP14==true))))), --buchi-type=spotba], workingDir=/home/mcc/execution]
LTSmin run took 269 ms.
FORMULA AutoFlight-PT-04b-LTLFireability-06 FALSE TECHNIQUES PARTIAL_ORDER EXPLICIT LTSMIN SAT_SMT
Running LTSmin : CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=1, --when, --ltl, X(X(<>(X(<>((LTLAP15==true)))))), --buchi-type=spotba], workingDir=/home/mcc/execution]
2 unique states visited
2 strongly connected components in search stack
2 transitions explored
2 items max in DFS search stack
45370 ticks for the emptiness check
Model ,|S| ,Time ,Mem(kb) ,fin. SDD ,fin. DDD ,peak SDD ,peak DDD ,SDD Hom ,SDD cache peak ,DDD Hom ,DDD cachepeak ,SHom cache
STATS,0,453.927,3256304,1,0,7.45087e+06,36602,1253,1.10936e+07,881,203678,6074944
an accepting run exists (use option '-e' to print it)
Formula 0 is FALSE accepting run found.
FORMULA AutoFlight-PT-04b-LTLFireability-00 FALSE TECHNIQUES DECISION_DIAGRAMS TOPOLOGICAL USE_NUPN
Checking formula 1 : !((F(X(G(X(F("(u74.p7>=1)")))))))
Formula 1 simplified : !FXGXF"(u74.p7>=1)"
Computing Next relation with stutter on 320 deadlock states
WARNING : LTSmin timed out (>225 s) on command CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=1, --when, --ltl, X(X(<>(X(<>((LTLAP15==true)))))), --buchi-type=spotba], workingDir=/home/mcc/execution]
Running LTSmin : CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=1, --when, --ltl, (X(<>(X((LTLAP16==true)))))U(([]((LTLAP17==true)))U(X((LTLAP18==true)))), --buchi-type=spotba], workingDir=/home/mcc/execution]
LTSmin run took 402 ms.
FORMULA AutoFlight-PT-04b-LTLFireability-08 FALSE TECHNIQUES PARTIAL_ORDER EXPLICIT LTSMIN SAT_SMT
Running LTSmin : CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=1, --when, --ltl, X((<>(X((LTLAP19==true))))U(X([]((LTLAP8==true))))), --buchi-type=spotba], workingDir=/home/mcc/execution]
WARNING : LTSmin timed out (>225 s) on command CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=1, --when, --ltl, X((<>(X((LTLAP19==true))))U(X([]((LTLAP8==true))))), --buchi-type=spotba], workingDir=/home/mcc/execution]
Running LTSmin : CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=1, --when, --ltl, <>(<>([](<>(X((LTLAP20==true)))))), --buchi-type=spotba], workingDir=/home/mcc/execution]
LTSmin run took 600 ms.
FORMULA AutoFlight-PT-04b-LTLFireability-10 FALSE TECHNIQUES PARTIAL_ORDER EXPLICIT LTSMIN SAT_SMT
Running LTSmin : CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=1, -p, --pins-guards, --when, --ltl, []((((LTLAP18==true))U((LTLAP21==true)))U([](<>((LTLAP22==true))))), --buchi-type=spotba], workingDir=/home/mcc/execution]
LTSmin run took 5634 ms.
FORMULA AutoFlight-PT-04b-LTLFireability-11 FALSE TECHNIQUES PARTIAL_ORDER EXPLICIT LTSMIN SAT_SMT
Running LTSmin : CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=1, --when, --ltl, <>((X([]((LTLAP23==true))))U((LTLAP24==true))), --buchi-type=spotba], workingDir=/home/mcc/execution]
LTSmin run took 279 ms.
FORMULA AutoFlight-PT-04b-LTLFireability-12 FALSE TECHNIQUES PARTIAL_ORDER EXPLICIT LTSMIN SAT_SMT
Running LTSmin : CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=1, -p, --pins-guards, --when, --ltl, (LTLAP25==true), --buchi-type=spotba], workingDir=/home/mcc/execution]
LTSmin run took 603 ms.
FORMULA AutoFlight-PT-04b-LTLFireability-13 FALSE TECHNIQUES PARTIAL_ORDER EXPLICIT LTSMIN SAT_SMT
Running LTSmin : CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=1, -p, --pins-guards, --when, --ltl, ((<>((LTLAP26==true)))U((LTLAP27==true)))U((LTLAP28==true)), --buchi-type=spotba], workingDir=/home/mcc/execution]
LTSmin run took 620 ms.
FORMULA AutoFlight-PT-04b-LTLFireability-14 FALSE TECHNIQUES PARTIAL_ORDER EXPLICIT LTSMIN SAT_SMT
Running LTSmin : CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=1, -p, --pins-guards, --when, --ltl, (LTLAP18==true), --buchi-type=spotba], workingDir=/home/mcc/execution]
LTSmin run took 600 ms.
FORMULA AutoFlight-PT-04b-LTLFireability-15 FALSE TECHNIQUES PARTIAL_ORDER EXPLICIT LTSMIN SAT_SMT
Retrying LTSmin with larger timeout 1800 s
Running LTSmin : CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=1, --when, --ltl, <>(X([](X(<>((LTLAP3==true)))))), --buchi-type=spotba], workingDir=/home/mcc/execution]
224 unique states visited
224 strongly connected components in search stack
225 transitions explored
224 items max in DFS search stack
87672 ticks for the emptiness check
Model ,|S| ,Time ,Mem(kb) ,fin. SDD ,fin. DDD ,peak SDD ,peak DDD ,SDD Hom ,SDD cache peak ,DDD Hom ,DDD cachepeak ,SHom cache
STATS,0,1331.06,3997064,1,0,7.45087e+06,36602,1274,2.15334e+07,881,203678,5833834
an accepting run exists (use option '-e' to print it)
Formula 1 is FALSE accepting run found.
FORMULA AutoFlight-PT-04b-LTLFireability-01 FALSE TECHNIQUES DECISION_DIAGRAMS TOPOLOGICAL USE_NUPN
Checking formula 2 : !((((X("(u34.p205>=1)"))U(X("(u51.p385>=1)")))U((G("((u31.p173>=1)&&(u46.p259>=1))"))U("(u36.p218>=1)"))))
Formula 2 simplified : !((X"(u34.p205>=1)" U X"(u51.p385>=1)") U (G"((u31.p173>=1)&&(u46.p259>=1))" U "(u36.p218>=1)"))
Computing Next relation with stutter on 320 deadlock states
4 unique states visited
4 strongly connected components in search stack
4 transitions explored
4 items max in DFS search stack
32806 ticks for the emptiness check
Model ,|S| ,Time ,Mem(kb) ,fin. SDD ,fin. DDD ,peak SDD ,peak DDD ,SDD Hom ,SDD cache peak ,DDD Hom ,DDD cachepeak ,SHom cache
STATS,0,1659.12,4796180,1,0,7.45087e+06,36602,1286,2.45616e+07,883,258123,6492390
an accepting run exists (use option '-e' to print it)
Formula 2 is FALSE accepting run found.
FORMULA AutoFlight-PT-04b-LTLFireability-02 FALSE TECHNIQUES DECISION_DIAGRAMS TOPOLOGICAL USE_NUPN
Checking formula 3 : !(((F(G(F("(u24.p73>=1)"))))U(F(F(F("((u46.p254>=1)&&(u52.p388>=1))"))))))
Formula 3 simplified : !(FGF"(u24.p73>=1)" U F"((u46.p254>=1)&&(u52.p388>=1))")
Computing Next relation with stutter on 320 deadlock states
2 unique states visited
2 strongly connected components in search stack
2 transitions explored
2 items max in DFS search stack
41062 ticks for the emptiness check
Model ,|S| ,Time ,Mem(kb) ,fin. SDD ,fin. DDD ,peak SDD ,peak DDD ,SDD Hom ,SDD cache peak ,DDD Hom ,DDD cachepeak ,SHom cache
STATS,0,2070.1,5280092,1,0,9.07395e+06,36602,1195,2.45616e+07,828,258123,6453858
an accepting run exists (use option '-e' to print it)
Formula 3 is FALSE accepting run found.
FORMULA AutoFlight-PT-04b-LTLFireability-03 FALSE TECHNIQUES DECISION_DIAGRAMS TOPOLOGICAL USE_NUPN
Checking formula 4 : !((G(X("(u26.p101>=1)"))))
Formula 4 simplified : !GX"(u26.p101>=1)"
Computing Next relation with stutter on 320 deadlock states
4 unique states visited
4 strongly connected components in search stack
4 transitions explored
4 items max in DFS search stack
18992 ticks for the emptiness check
Model ,|S| ,Time ,Mem(kb) ,fin. SDD ,fin. DDD ,peak SDD ,peak DDD ,SDD Hom ,SDD cache peak ,DDD Hom ,DDD cachepeak ,SHom cache
STATS,0,2260.03,5285372,1,0,9.07395e+06,36602,1605,2.45616e+07,994,258123,16105719
an accepting run exists (use option '-e' to print it)
Formula 4 is FALSE accepting run found.
FORMULA AutoFlight-PT-04b-LTLFireability-04 FALSE TECHNIQUES DECISION_DIAGRAMS TOPOLOGICAL USE_NUPN
Checking formula 5 : !((G((("(u25.p83>=1)")U("(u35.p209>=1)"))U(F("(u28.p123>=1)")))))
Formula 5 simplified : !G(("(u25.p83>=1)" U "(u35.p209>=1)") U F"(u28.p123>=1)")
Computing Next relation with stutter on 320 deadlock states
WARNING : LTSmin timed out (>1800 s) on command CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=1, --when, --ltl, <>(X([](X(<>((LTLAP3==true)))))), --buchi-type=spotba], workingDir=/home/mcc/execution]
Running LTSmin : CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=1, --when, --ltl, X(X(<>(X(<>((LTLAP15==true)))))), --buchi-type=spotba], workingDir=/home/mcc/execution]
LTSmin run took 496 ms.
FORMULA AutoFlight-PT-04b-LTLFireability-07 FALSE TECHNIQUES PARTIAL_ORDER EXPLICIT LTSMIN SAT_SMT
Running LTSmin : CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=1, --when, --ltl, X((<>(X((LTLAP19==true))))U(X([]((LTLAP8==true))))), --buchi-type=spotba], workingDir=/home/mcc/execution]

BK_TIME_CONFINEMENT_REACHED

--------------------
content from stderr:

+ export BINDIR=/home/mcc/BenchKit/
+ BINDIR=/home/mcc/BenchKit/
++ pwd
+ export MODEL=/home/mcc/execution
+ MODEL=/home/mcc/execution
+ /home/mcc/BenchKit//runeclipse.sh /home/mcc/execution LTLFireability -its -ltsminpath /home/mcc/BenchKit//lts_install_dir/ -smt
+ ulimit -s 65536
+ [[ -z '' ]]
+ export LTSMIN_MEM_SIZE=8589934592
+ LTSMIN_MEM_SIZE=8589934592
+ /home/mcc/BenchKit//itstools/its-tools -consoleLog -data /home/mcc/execution/workspace -pnfolder /home/mcc/execution -examination LTLFireability -z3path /home/mcc/BenchKit//z3/bin/z3 -yices2path /home/mcc/BenchKit//yices/bin/yices -its -ltsminpath /home/mcc/BenchKit//lts_install_dir/ -smt -vmargs -Dosgi.locking=none -Declipse.stateSaveDelayInterval=-1 -Dosgi.configuration.area=/tmp/.eclipse -Xss8m -Xms40m -Xmx8192m -Dfile.encoding=UTF-8 -Dosgi.requiredJavaVersion=1.6
May 27, 2018 6:34:06 AM fr.lip6.move.gal.application.Application start
INFO: Running its-tools with arguments : [-pnfolder, /home/mcc/execution, -examination, LTLFireability, -z3path, /home/mcc/BenchKit//z3/bin/z3, -yices2path, /home/mcc/BenchKit//yices/bin/yices, -its, -ltsminpath, /home/mcc/BenchKit//lts_install_dir/, -smt]
May 27, 2018 6:34:06 AM fr.lip6.move.gal.application.MccTranslator transformPNML
INFO: Parsing pnml file : /home/mcc/execution/model.pnml
May 27, 2018 6:34:07 AM fr.lip6.move.gal.nupn.PTNetReader loadFromXML
INFO: Load time of PNML (sax parser for PT used): 153 ms
May 27, 2018 6:34:07 AM fr.lip6.move.gal.pnml.togal.PTGALTransformer handlePage
INFO: Transformed 390 places.
May 27, 2018 6:34:07 AM fr.lip6.move.gal.pnml.togal.PTGALTransformer handlePage
INFO: Transformed 388 transitions.
May 27, 2018 6:34:07 AM fr.lip6.move.gal.pnml.togal.PnmlToGalTransformer transform
INFO: Found NUPN structural information;
May 27, 2018 6:34:07 AM fr.lip6.move.serialization.SerializationUtil systemToFile
INFO: Time to serialize gal into /home/mcc/execution/model.pnml.img.gal : 31 ms
May 27, 2018 6:34:07 AM fr.lip6.move.gal.application.MccTranslator applyOrder
INFO: Applying decomposition
May 27, 2018 6:34:07 AM fr.lip6.move.gal.instantiate.CompositeBuilder decomposeWithOrder
INFO: Decomposing Gal with order
May 27, 2018 6:34:07 AM fr.lip6.move.gal.instantiate.GALRewriter flatten
INFO: Flatten gal took : 119 ms
May 27, 2018 6:34:07 AM fr.lip6.move.gal.instantiate.CompositeBuilder rewriteArraysToAllowPartition
INFO: Rewriting arrays to variables to allow decomposition.
May 27, 2018 6:34:08 AM fr.lip6.move.gal.instantiate.Instantiator fuseIsomorphicEffects
INFO: Removed a total of 10 redundant transitions.
May 27, 2018 6:34:08 AM fr.lip6.move.serialization.SerializationUtil systemToFile
INFO: Time to serialize gal into /home/mcc/execution/LTLFireability.pnml.gal : 18 ms
May 27, 2018 6:34:08 AM fr.lip6.move.serialization.SerializationUtil serializePropertiesForITSLTLTools
INFO: Time to serialize properties into /home/mcc/execution/LTLFireability.ltl : 2 ms
May 27, 2018 6:34:08 AM fr.lip6.move.gal.semantics.DeterministicNextBuilder getDeterministicNext
INFO: Input system was already deterministic with 388 transitions.
May 27, 2018 6:34:09 AM fr.lip6.move.gal.gal2smt.bmc.KInductionSolver computeAndDeclareInvariants
INFO: Computed 28 place invariants in 184 ms
May 27, 2018 6:34:10 AM fr.lip6.move.gal.gal2smt.bmc.KInductionSolver init
INFO: Proved 390 variables to be positive in 1721 ms
May 27, 2018 6:34:10 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver computeAblingMatrix
INFO: Computing symmetric may disable matrix : 388 transitions.
May 27, 2018 6:34:10 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of disable matrix completed :0/388 took 0 ms. Total solver calls (SAT/UNSAT): 0(0/0)
May 27, 2018 6:34:10 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of Complete disable matrix. took 72 ms. Total solver calls (SAT/UNSAT): 0(0/0)
May 27, 2018 6:34:10 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver computeAblingMatrix
INFO: Computing symmetric may enable matrix : 388 transitions.
May 27, 2018 6:34:10 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of Complete enable matrix. took 22 ms. Total solver calls (SAT/UNSAT): 0(0/0)
May 27, 2018 6:34:13 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver computeCoEnablingMatrix
INFO: Computing symmetric co enabling matrix : 388 transitions.
May 27, 2018 6:34:14 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(0/388) took 554 ms. Total solver calls (SAT/UNSAT): 386(0/386)
May 27, 2018 6:34:17 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(14/388) took 3943 ms. Total solver calls (SAT/UNSAT): 3060(0/3060)
May 27, 2018 6:34:20 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(30/388) took 7099 ms. Total solver calls (SAT/UNSAT): 4820(9/4811)
May 27, 2018 6:34:23 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(38/388) took 10274 ms. Total solver calls (SAT/UNSAT): 5608(29/5579)
May 27, 2018 6:34:27 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(48/388) took 13621 ms. Total solver calls (SAT/UNSAT): 6497(45/6452)
May 27, 2018 6:34:30 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(59/388) took 16833 ms. Total solver calls (SAT/UNSAT): 7282(62/7220)
May 27, 2018 6:34:33 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(73/388) took 20128 ms. Total solver calls (SAT/UNSAT): 8005(81/7924)
May 27, 2018 6:34:36 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(112/388) took 23161 ms. Total solver calls (SAT/UNSAT): 8471(92/8379)
May 27, 2018 6:34:39 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(184/388) took 26197 ms. Total solver calls (SAT/UNSAT): 9051(101/8950)
May 27, 2018 6:34:42 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(251/388) took 29220 ms. Total solver calls (SAT/UNSAT): 9595(108/9487)
May 27, 2018 6:34:45 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(317/388) took 32283 ms. Total solver calls (SAT/UNSAT): 10267(112/10155)
May 27, 2018 6:34:48 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(336/388) took 35392 ms. Total solver calls (SAT/UNSAT): 10587(124/10463)
May 27, 2018 6:34:51 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(371/388) took 38476 ms. Total solver calls (SAT/UNSAT): 10891(133/10758)
May 27, 2018 6:34:52 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of Finished co-enabling matrix. took 39437 ms. Total solver calls (SAT/UNSAT): 10977(135/10842)
May 27, 2018 6:34:52 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver computeDoNotAccord
INFO: Computing Do-Not-Accords matrix : 388 transitions.
May 27, 2018 6:34:53 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of Completed DNA matrix. took 120 ms. Total solver calls (SAT/UNSAT): 6(0/6)
May 27, 2018 6:34:53 AM fr.lip6.move.gal.gal2pins.Gal2PinsTransformerNext transform
INFO: Built C files in 44956ms conformant to PINS in folder :/home/mcc/execution

Sequence of Actions to be Executed by the VM

This is useful if one wants to reexecute the tool in the VM from the submitted image disk.

set -x
# this is for BenchKit: configuration of major elements for the test
export BK_INPUT="AutoFlight-PT-04b"
export BK_EXAMINATION="LTLFireability"
export BK_TOOL="itstools"
export BK_RESULT_DIR="/tmp/BK_RESULTS/OUTPUTS"
export BK_TIME_CONFINEMENT="3600"
export BK_MEMORY_CONFINEMENT="16384"

# this is specific to your benchmark or test

export BIN_DIR="$HOME/BenchKit/bin"

# remove the execution directoty if it exists (to avoid increse of .vmdk images)
if [ -d execution ] ; then
rm -rf execution
fi

tar xzf /home/mcc/BenchKit/INPUTS/AutoFlight-PT-04b.tgz
mv AutoFlight-PT-04b execution
cd execution
pwd
ls -lh

# this is for BenchKit: explicit launching of the test
echo "====================================================================="
echo " Generated by BenchKit 2-3637"
echo " Executing tool itstools"
echo " Input is AutoFlight-PT-04b, examination is LTLFireability"
echo " Time confinement is $BK_TIME_CONFINEMENT seconds"
echo " Memory confinement is 16384 MBytes"
echo " Number of cores is 4"
echo " Run identifier is r200-qhx1-152732197100030"
echo "====================================================================="
echo
echo "--------------------"
echo "content from stdout:"
echo
echo "=== Data for post analysis generated by BenchKit (invocation template)"
echo
if [ "LTLFireability" = "UpperBounds" ] ; then
echo "The expected result is a vector of positive values"
echo NUM_VECTOR
elif [ "LTLFireability" != "StateSpace" ] ; then
echo "The expected result is a vector of booleans"
echo BOOL_VECTOR
else
echo "no data necessary for post analysis"
fi
echo
if [ -f "LTLFireability.txt" ] ; then
echo "here is the order used to build the result vector(from text file)"
for x in $(grep Property LTLFireability.txt | cut -d ' ' -f 2 | sort -u) ; do
echo "FORMULA_NAME $x"
done
elif [ -f "LTLFireability.xml" ] ; then # for cunf (txt files deleted;-)
echo echo "here is the order used to build the result vector(from xml file)"
for x in $(grep '' LTLFireability.xml | cut -d '>' -f 2 | cut -d '<' -f 1 | sort -u) ; do
echo "FORMULA_NAME $x"
done
fi
echo
echo "=== Now, execution of the tool begins"
echo
echo -n "BK_START "
date -u +%s%3N
echo
timeout -s 9 $BK_TIME_CONFINEMENT bash -c "/home/mcc/BenchKit/BenchKit_head.sh 2> STDERR ; echo ; echo -n \"BK_STOP \" ; date -u +%s%3N"
if [ $? -eq 137 ] ; then
echo
echo "BK_TIME_CONFINEMENT_REACHED"
fi
echo
echo "--------------------"
echo "content from stderr:"
echo
cat STDERR ;