Execution Chart

We display below the execution chart for this examination (boot time has been removed).

Trace from the execution

Waiting for the VM to be ready (probing ssh)
...............................................................................
/home/mcc/execution
total 208K
-rw-r--r-- 1 mcc users 3.4K May 15 18:54 CTLCardinality.txt
-rw-r--r-- 1 mcc users 19K May 15 18:54 CTLCardinality.xml
-rw-r--r-- 1 mcc users 2.7K May 15 18:54 CTLFireability.txt
-rw-r--r-- 1 mcc users 19K May 15 18:54 CTLFireability.xml
-rw-r--r-- 1 mcc users 4.0K May 15 18:49 GenericPropertiesDefinition.xml
-rw-r--r-- 1 mcc users 6.2K May 15 18:49 GenericPropertiesVerdict.xml
-rw-r--r-- 1 mcc users 2.1K May 26 09:26 LTLCardinality.txt
-rw-r--r-- 1 mcc users 8.6K May 26 09:26 LTLCardinality.xml
-rw-r--r-- 1 mcc users 1.8K May 26 09:26 LTLFireability.txt
-rw-r--r-- 1 mcc users 9.1K May 26 09:26 LTLFireability.xml
-rw-r--r-- 1 mcc users 3.0K May 15 18:54 ReachabilityCardinality.txt
-rw-r--r-- 1 mcc users 15K May 15 18:54 ReachabilityCardinality.xml
-rw-r--r-- 1 mcc users 108 May 15 18:54 ReachabilityDeadlock.txt
-rw-r--r-- 1 mcc users 346 May 15 18:54 ReachabilityDeadlock.xml
-rw-r--r-- 1 mcc users 2.5K May 15 18:54 ReachabilityFireability.txt
-rw-r--r-- 1 mcc users 15K May 15 18:54 ReachabilityFireability.xml
-rw-r--r-- 1 mcc users 1.6K May 15 18:54 UpperBounds.txt
-rw-r--r-- 1 mcc users 3.7K May 15 18:54 UpperBounds.xml
-rw-r--r-- 1 mcc users 6 May 15 18:49 equiv_col
-rw-r--r-- 1 mcc users 4 May 15 18:49 instance
-rw-r--r-- 1 mcc users 6 May 15 18:49 iscolored
-rw-r--r-- 1 mcc users 48K May 15 18:49 model.pnml
=====================================================================
Generated by BenchKit 2-3637
Executing tool itstools
Input is AutoFlight-PT-02b, examination is LTLFireability
Time confinement is 3600 seconds
Memory confinement is 16384 MBytes
Number of cores is 4
Run identifier is r200-qhx1-152732197100022
=====================================================================

--------------------
content from stdout:

=== Data for post analysis generated by BenchKit (invocation template)

The expected result is a vector of booleans
BOOL_VECTOR

here is the order used to build the result vector(from text file)
FORMULA_NAME AutoFlight-PT-02b-LTLFireability-00
FORMULA_NAME AutoFlight-PT-02b-LTLFireability-01
FORMULA_NAME AutoFlight-PT-02b-LTLFireability-02
FORMULA_NAME AutoFlight-PT-02b-LTLFireability-03
FORMULA_NAME AutoFlight-PT-02b-LTLFireability-04
FORMULA_NAME AutoFlight-PT-02b-LTLFireability-05
FORMULA_NAME AutoFlight-PT-02b-LTLFireability-06
FORMULA_NAME AutoFlight-PT-02b-LTLFireability-07
FORMULA_NAME AutoFlight-PT-02b-LTLFireability-08
FORMULA_NAME AutoFlight-PT-02b-LTLFireability-09
FORMULA_NAME AutoFlight-PT-02b-LTLFireability-10
FORMULA_NAME AutoFlight-PT-02b-LTLFireability-11
FORMULA_NAME AutoFlight-PT-02b-LTLFireability-12
FORMULA_NAME AutoFlight-PT-02b-LTLFireability-13
FORMULA_NAME AutoFlight-PT-02b-LTLFireability-14
FORMULA_NAME AutoFlight-PT-02b-LTLFireability-15

=== Now, execution of the tool begins

BK_START 1527402709746

Using solver Z3 to compute partial order matrices.
Built C files in :
/home/mcc/execution
Invoking ITS tools like this :CommandLine [args=[/home/mcc/BenchKit/itstools/plugins/fr.lip6.move.gal.itstools.binaries_1.0.0.201805151631/bin/its-ltl-linux64, --gc-threshold, 2000000, -i, /home/mcc/execution/LTLFireability.pnml.gal, -t, CGAL, -LTL, /home/mcc/execution/LTLFireability.ltl, -c, -stutter-deadlock], workingDir=/home/mcc/execution]

its-ltl command run as :

/home/mcc/BenchKit/itstools/plugins/fr.lip6.move.gal.itstools.binaries_1.0.0.201805151631/bin/its-ltl-linux64 --gc-threshold 2000000 -i /home/mcc/execution/LTLFireability.pnml.gal -t CGAL -LTL /home/mcc/execution/LTLFireability.ltl -c -stutter-deadlock
Read 16 LTL properties
Checking formula 0 : !((G(G(X(X(G("(u25.p160>=1)")))))))
Formula 0 simplified : !GXXG"(u25.p160>=1)"
built 34 ordering constraints for composite.
Presburger conditions satisfied. Using coverability to approximate state space in K-Induction.
// Phase 1: matrix 204 rows 206 cols
invariant :u13:p51 + u13:p52 + u13:p53 + u13:p54 + u13:p55 + u13:p56 + u13:p57 + u13:p58 + u13:p59 + u13:p60 + u13:p61 + u36:p9 + u35:p8 + u34:p7 + u33:p6 + u32:p5 + u31:p4 + u30:p3 + u29:p0 + u29:p1 + u29:p2 = 1
invariant :u15:p73 + u15:p74 + u15:p75 + u15:p76 + u15:p77 + u15:p78 + u15:p79 + u15:p80 + u15:p81 + u15:p82 + u15:p83 + u15:p84 + u15:p85 + u15:p86 + u15:p87 + u15:p88 + u15:p89 + u34:p7 + u33:p6 + u32:p5 + u31:p4 + u30:p3 + u29:p0 + u29:p1 + u29:p2 = 1
invariant :u11:p23 + u11:p24 + u11:p25 + u11:p26 + u11:p27 + u11:p28 + u11:p29 + u11:p30 + u11:p31 + u11:p32 + u11:p33 + u38:p11 + u37:p10 + u36:p9 + u35:p8 + u34:p7 + u33:p6 + u32:p5 + u31:p4 + u30:p3 + u29:p0 + u29:p1 + u29:p2 = 1
invariant :u14:p62 + u14:p63 + u14:p64 + u14:p65 + u14:p66 + u14:p67 + u14:p68 + u14:p69 + u14:p70 + u14:p71 + u14:p72 + u35:p8 + u34:p7 + u33:p6 + u32:p5 + u31:p4 + u30:p3 + u29:p0 + u29:p1 + u29:p2 = 1
invariant :u17:p103 + u17:p104 + u17:p105 + u17:p106 + u32:p5 + u31:p4 + u30:p3 + u29:p0 + u29:p1 + u29:p2 = 1
invariant :u18:p107 + u18:p108 + u18:p109 + u18:p110 + u18:p111 + u18:p112 + u18:p113 + u18:p114 + u18:p115 + u18:p116 + u18:p117 + u18:p118 + u18:p119 + u31:p4 + u30:p3 + u29:p0 + u29:p1 + u29:p2 = 1
invariant :u12:p34 + u12:p35 + u12:p36 + u12:p37 + u12:p38 + u12:p39 + u12:p40 + u12:p41 + u12:p42 + u12:p43 + u12:p44 + u12:p45 + u12:p46 + u12:p47 + u12:p48 + u12:p49 + u12:p50 + u37:p10 + u36:p9 + u35:p8 + u34:p7 + u33:p6 + u32:p5 + u31:p4 + u30:p3 + u29:p0 + u29:p1 + u29:p2 = 1
invariant :u24:p130 + u24:p131 + u24:p132 + u24:p133 + u24:p134 + u24:p135 + u24:p136 + u24:p137 + u24:p138 + u24:p139 + u24:p140 + u24:p141 + u24:p142 + u25:p154 + u25:p155 + u25:p156 + u25:p157 + u25:p158 + u25:p159 + u25:p160 + u25:p161 + u25:p162 + u25:p163 + u25:p164 + u26:p170 + u26:p171 + u26:p172 + u26:p173 + u26:p174 + u26:p175 + u26:p176 + u27:p187 + u27:p188 + u27:p189 + u27:p190 + u27:p191 + u27:p192 + u27:p193 + u28:p202 + u28:p203 + u39:p124 + u29:p0 + u29:p1 + u29:p2 = 1
invariant :u24:p128 + u24:p129 + u24:p130 + u24:p131 + u24:p132 + u24:p133 + u24:p134 + u24:p135 + u24:p136 + u24:p137 + u24:p138 + u24:p139 + u24:p140 + u24:p141 + u24:p142 + u24:p143 + u24:p144 + u24:p145 + u24:p146 + u24:p147 + u24:p148 + u24:p149 + u24:p150 + u24:p151 + u42:p127 + u40:p126 + u41:p125 + u39:p124 + u29:p0 + u29:p1 + u29:p2 = 1
invariant :u10:p12 + u10:p13 + u10:p14 + u10:p15 + u10:p16 + u10:p17 + u10:p18 + u10:p19 + u10:p20 + u10:p21 + u10:p22 + u38:p11 + u37:p10 + u36:p9 + u35:p8 + u34:p7 + u33:p6 + u32:p5 + u31:p4 + u30:p3 + u29:p0 + u29:p1 + u29:p2 = 1
invariant :u16:p90 + u16:p91 + u16:p92 + u16:p93 + u16:p94 + u16:p95 + u16:p96 + u16:p97 + u16:p98 + u16:p99 + u16:p100 + u16:p101 + u16:p102 + u33:p6 + u32:p5 + u31:p4 + u30:p3 + u29:p0 + u29:p1 + u29:p2 = 1
invariant :u25:p152 + u25:p153 + u25:p154 + u25:p155 + u25:p156 + u25:p157 + u25:p158 + u25:p159 + u25:p160 + u25:p161 + u25:p162 + u25:p163 + u25:p164 + u25:p165 + u25:p166 + u25:p167 + u42:p127 + u40:p126 + u41:p125 + u39:p124 + u29:p0 + u29:p1 + u29:p2 = 1
invariant :u27:p185 + u27:p186 + u27:p187 + u27:p188 + u27:p189 + u27:p190 + u27:p191 + u27:p192 + u27:p193 + u27:p194 + u27:p195 + u27:p196 + u27:p197 + u27:p198 + u27:p199 + u27:p200 + u27:p201 + u41:p125 + u39:p124 + u29:p0 + u29:p1 + u29:p2 = 1
invariant :u19:p120 + u19:p121 + u19:p122 + u19:p123 + u30:p3 + u29:p0 + u29:p1 + u29:p2 = 1
invariant :u26:p168 + u26:p169 + u26:p170 + u26:p171 + u26:p172 + u26:p173 + u26:p174 + u26:p175 + u26:p176 + u26:p177 + u26:p178 + u26:p179 + u26:p180 + u26:p181 + u26:p182 + u26:p183 + u26:p184 + u40:p126 + u41:p125 + u39:p124 + u29:p0 + u29:p1 + u29:p2 = 1
invariant :-1'u24:p130 + -1'u24:p131 + -1'u24:p132 + -1'u24:p133 + -1'u24:p134 + -1'u24:p135 + -1'u24:p136 + -1'u24:p137 + -1'u24:p138 + -1'u24:p139 + -1'u24:p140 + -1'u24:p141 + -1'u24:p142 + -1'u25:p154 + -1'u25:p155 + -1'u25:p156 + -1'u25:p157 + -1'u25:p158 + -1'u25:p159 + -1'u25:p160 + -1'u25:p161 + -1'u25:p162 + -1'u25:p163 + -1'u25:p164 + -1'u26:p170 + -1'u26:p171 + -1'u26:p172 + -1'u26:p173 + -1'u26:p174 + -1'u26:p175 + -1'u26:p176 + -1'u27:p187 + -1'u27:p188 + -1'u27:p189 + -1'u27:p190 + -1'u27:p191 + -1'u27:p192 + -1'u27:p193 + u28:p204 + u28:p205 = 0
Reverse transition relation is NOT exact ! Due to transitions t73, t89, t196, t197, t198, t199, u10.t0, u10.t1, u10.t2, u10.t162, u10.t169, u11.t3, u11.t4, u11.t5, u11.t153, u11.t160, u12.t6, u12.t7, u12.t8, u12.t9, u12.t142, u12.t150, u13.t10, u13.t11, u13.t12, u13.t130, u13.t137, u14.t13, u14.t14, u14.t15, u14.t120, u14.t127, u15.t16, u15.t17, u15.t18, u15.t19, u15.t109, u15.t117, u16.t94, u16.t104, u17.t91, u18.t78, u18.t88, u19.t75, u24.t69, u24.t72, u25.t57, u25.t60, u26.t50, u26.t53, u27.t38, u27.t41, u28.t29, Intersection with reachable at each step enabled. (destroyed/reverse/intersect/total) :0/151/53/204
Computing Next relation with stutter on 40 deadlock states
5 unique states visited
5 strongly connected components in search stack
5 transitions explored
5 items max in DFS search stack
951 ticks for the emptiness check
Model ,|S| ,Time ,Mem(kb) ,fin. SDD ,fin. DDD ,peak SDD ,peak DDD ,SDD Hom ,SDD cache peak ,DDD Hom ,DDD cachepeak ,SHom cache
STATS,0,9.64928,175504,1,0,324208,11938,1580,432576,1250,72879,760407
an accepting run exists (use option '-e' to print it)
Formula 0 is FALSE accepting run found.
FORMULA AutoFlight-PT-02b-LTLFireability-00 FALSE TECHNIQUES DECISION_DIAGRAMS TOPOLOGICAL USE_NUPN
Checking formula 1 : !((G(G(F(X(F("(u27.p191>=1)")))))))
Formula 1 simplified : !GFXF"(u27.p191>=1)"
Computing Next relation with stutter on 40 deadlock states
Running compilation step : CommandLine [args=[gcc, -c, -I/home/mcc/BenchKit//lts_install_dir//include, -I., -std=c99, -fPIC, -O3, model.c], workingDir=/home/mcc/execution]
Compilation finished in 4432 ms.
Running link step : CommandLine [args=[gcc, -shared, -o, gal.so, model.o], workingDir=/home/mcc/execution]
Link finished in 95 ms.
Running LTSmin : CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=1, --when, --ltl, []([](<>(X(<>((LTLAP1==true)))))), --buchi-type=spotba], workingDir=/home/mcc/execution]
LTSmin run took 162 ms.
FORMULA AutoFlight-PT-02b-LTLFireability-01 FALSE TECHNIQUES PARTIAL_ORDER EXPLICIT LTSMIN SAT_SMT
Running LTSmin : CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=1, -p, --pins-guards, --when, --ltl, ((<>((LTLAP2==true)))U(<>((LTLAP3==true))))U((<>((LTLAP4==true)))U([]((LTLAP5==true)))), --buchi-type=spotba], workingDir=/home/mcc/execution]
LTSmin run took 169 ms.
FORMULA AutoFlight-PT-02b-LTLFireability-02 FALSE TECHNIQUES PARTIAL_ORDER EXPLICIT LTSMIN SAT_SMT
Running LTSmin : CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=1, -p, --pins-guards, --when, --ltl, <>((LTLAP6==true)), --buchi-type=spotba], workingDir=/home/mcc/execution]
LTSmin run took 154 ms.
FORMULA AutoFlight-PT-02b-LTLFireability-03 FALSE TECHNIQUES PARTIAL_ORDER EXPLICIT LTSMIN SAT_SMT
Running LTSmin : CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=1, --when, --ltl, [](X(([]((LTLAP7==true)))U((LTLAP8==true)))), --buchi-type=spotba], workingDir=/home/mcc/execution]
LTSmin run took 143 ms.
FORMULA AutoFlight-PT-02b-LTLFireability-04 FALSE TECHNIQUES PARTIAL_ORDER EXPLICIT LTSMIN SAT_SMT
Running LTSmin : CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=1, -p, --pins-guards, --when, --ltl, [](((LTLAP9==true))U((LTLAP10==true))), --buchi-type=spotba], workingDir=/home/mcc/execution]
LTSmin run took 157 ms.
FORMULA AutoFlight-PT-02b-LTLFireability-05 FALSE TECHNIQUES PARTIAL_ORDER EXPLICIT LTSMIN SAT_SMT
Running LTSmin : CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=1, --when, --ltl, X([]([](X([]((LTLAP11==true)))))), --buchi-type=spotba], workingDir=/home/mcc/execution]
LTSmin run took 113 ms.
FORMULA AutoFlight-PT-02b-LTLFireability-06 FALSE TECHNIQUES PARTIAL_ORDER EXPLICIT LTSMIN SAT_SMT
Running LTSmin : CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=1, -p, --pins-guards, --when, --ltl, (LTLAP12==true), --buchi-type=spotba], workingDir=/home/mcc/execution]
LTSmin run took 159 ms.
FORMULA AutoFlight-PT-02b-LTLFireability-07 FALSE TECHNIQUES PARTIAL_ORDER EXPLICIT LTSMIN SAT_SMT
Running LTSmin : CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=1, --when, --ltl, X(([]([]((LTLAP13==true))))U(X((LTLAP14==true)))), --buchi-type=spotba], workingDir=/home/mcc/execution]
LTSmin run took 109 ms.
FORMULA AutoFlight-PT-02b-LTLFireability-08 FALSE TECHNIQUES PARTIAL_ORDER EXPLICIT LTSMIN SAT_SMT
Running LTSmin : CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=1, -p, --pins-guards, --when, --ltl, (LTLAP15==true), --buchi-type=spotba], workingDir=/home/mcc/execution]
LTSmin run took 153 ms.
FORMULA AutoFlight-PT-02b-LTLFireability-09 FALSE TECHNIQUES PARTIAL_ORDER EXPLICIT LTSMIN SAT_SMT
Running LTSmin : CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=1, --when, --ltl, X(X(([]((LTLAP16==true)))U([]((LTLAP17==true))))), --buchi-type=spotba], workingDir=/home/mcc/execution]
LTSmin run took 129 ms.
FORMULA AutoFlight-PT-02b-LTLFireability-10 FALSE TECHNIQUES PARTIAL_ORDER EXPLICIT LTSMIN SAT_SMT
Running LTSmin : CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=1, -p, --pins-guards, --when, --ltl, (LTLAP5==true), --buchi-type=spotba], workingDir=/home/mcc/execution]
LTSmin run took 157 ms.
FORMULA AutoFlight-PT-02b-LTLFireability-11 FALSE TECHNIQUES PARTIAL_ORDER EXPLICIT LTSMIN SAT_SMT
Running LTSmin : CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=1, --when, --ltl, (X(<>((LTLAP18==true))))U(X(((LTLAP19==true))U((LTLAP20==true)))), --buchi-type=spotba], workingDir=/home/mcc/execution]
115 unique states visited
115 strongly connected components in search stack
116 transitions explored
115 items max in DFS search stack
1498 ticks for the emptiness check
Model ,|S| ,Time ,Mem(kb) ,fin. SDD ,fin. DDD ,peak SDD ,peak DDD ,SDD Hom ,SDD cache peak ,DDD Hom ,DDD cachepeak ,SHom cache
STATS,0,24.6311,341368,1,0,549515,17587,1619,1.16742e+06,1251,142399,1197826
an accepting run exists (use option '-e' to print it)
Formula 1 is FALSE accepting run found.
FORMULA AutoFlight-PT-02b-LTLFireability-01 FALSE TECHNIQUES DECISION_DIAGRAMS TOPOLOGICAL USE_NUPN
Checking formula 2 : !((((F("(u13.p61>=1)"))U(F("(u14.p68>=1)")))U((F("(u18.p116>=1)"))U(G("(u13.p51>=1)")))))
Formula 2 simplified : !((F"(u13.p61>=1)" U F"(u14.p68>=1)") U (F"(u18.p116>=1)" U G"(u13.p51>=1)"))
Computing Next relation with stutter on 40 deadlock states
LTSmin run took 640 ms.
FORMULA AutoFlight-PT-02b-LTLFireability-12 FALSE TECHNIQUES PARTIAL_ORDER EXPLICIT LTSMIN SAT_SMT
Running LTSmin : CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=1, -p, --pins-guards, --when, --ltl, (LTLAP21==true), --buchi-type=spotba], workingDir=/home/mcc/execution]
LTSmin run took 172 ms.
FORMULA AutoFlight-PT-02b-LTLFireability-13 FALSE TECHNIQUES PARTIAL_ORDER EXPLICIT LTSMIN SAT_SMT
Running LTSmin : CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=1, --when, --ltl, (X(X([]((LTLAP7==true)))))U((LTLAP22==true)), --buchi-type=spotba], workingDir=/home/mcc/execution]
LTSmin run took 161 ms.
FORMULA AutoFlight-PT-02b-LTLFireability-14 FALSE TECHNIQUES PARTIAL_ORDER EXPLICIT LTSMIN SAT_SMT
Running LTSmin : CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=1, -p, --pins-guards, --when, --ltl, ([](<>([]((LTLAP23==true)))))U((LTLAP24==true)), --buchi-type=spotba], workingDir=/home/mcc/execution]
LTSmin run took 161 ms.
FORMULA AutoFlight-PT-02b-LTLFireability-15 FALSE TECHNIQUES PARTIAL_ORDER EXPLICIT LTSMIN SAT_SMT
ITS tools runner thread asked to quit. Dying gracefully.

BK_STOP 1527402754369

--------------------
content from stderr:

+ export BINDIR=/home/mcc/BenchKit/
+ BINDIR=/home/mcc/BenchKit/
++ pwd
+ export MODEL=/home/mcc/execution
+ MODEL=/home/mcc/execution
+ /home/mcc/BenchKit//runeclipse.sh /home/mcc/execution LTLFireability -its -ltsminpath /home/mcc/BenchKit//lts_install_dir/ -smt
+ ulimit -s 65536
+ [[ -z '' ]]
+ export LTSMIN_MEM_SIZE=8589934592
+ LTSMIN_MEM_SIZE=8589934592
+ /home/mcc/BenchKit//itstools/its-tools -consoleLog -data /home/mcc/execution/workspace -pnfolder /home/mcc/execution -examination LTLFireability -z3path /home/mcc/BenchKit//z3/bin/z3 -yices2path /home/mcc/BenchKit//yices/bin/yices -its -ltsminpath /home/mcc/BenchKit//lts_install_dir/ -smt -vmargs -Dosgi.locking=none -Declipse.stateSaveDelayInterval=-1 -Dosgi.configuration.area=/tmp/.eclipse -Xss8m -Xms40m -Xmx8192m -Dfile.encoding=UTF-8 -Dosgi.requiredJavaVersion=1.6
May 27, 2018 6:32:06 AM fr.lip6.move.gal.application.Application start
INFO: Running its-tools with arguments : [-pnfolder, /home/mcc/execution, -examination, LTLFireability, -z3path, /home/mcc/BenchKit//z3/bin/z3, -yices2path, /home/mcc/BenchKit//yices/bin/yices, -its, -ltsminpath, /home/mcc/BenchKit//lts_install_dir/, -smt]
May 27, 2018 6:32:06 AM fr.lip6.move.gal.application.MccTranslator transformPNML
INFO: Parsing pnml file : /home/mcc/execution/model.pnml
May 27, 2018 6:32:06 AM fr.lip6.move.gal.nupn.PTNetReader loadFromXML
INFO: Load time of PNML (sax parser for PT used): 82 ms
May 27, 2018 6:32:06 AM fr.lip6.move.gal.pnml.togal.PTGALTransformer handlePage
INFO: Transformed 206 places.
May 27, 2018 6:32:06 AM fr.lip6.move.gal.pnml.togal.PTGALTransformer handlePage
INFO: Transformed 204 transitions.
May 27, 2018 6:32:06 AM fr.lip6.move.gal.pnml.togal.PnmlToGalTransformer transform
INFO: Found NUPN structural information;
May 27, 2018 6:32:06 AM fr.lip6.move.serialization.SerializationUtil systemToFile
INFO: Time to serialize gal into /home/mcc/execution/model.pnml.img.gal : 18 ms
May 27, 2018 6:32:06 AM fr.lip6.move.gal.application.MccTranslator applyOrder
INFO: Applying decomposition
May 27, 2018 6:32:06 AM fr.lip6.move.gal.instantiate.CompositeBuilder decomposeWithOrder
INFO: Decomposing Gal with order
May 27, 2018 6:32:06 AM fr.lip6.move.gal.instantiate.GALRewriter flatten
INFO: Flatten gal took : 81 ms
May 27, 2018 6:32:06 AM fr.lip6.move.gal.instantiate.CompositeBuilder rewriteArraysToAllowPartition
INFO: Rewriting arrays to variables to allow decomposition.
May 27, 2018 6:32:07 AM fr.lip6.move.gal.instantiate.Instantiator fuseIsomorphicEffects
INFO: Removed a total of 6 redundant transitions.
May 27, 2018 6:32:07 AM fr.lip6.move.serialization.SerializationUtil systemToFile
INFO: Time to serialize gal into /home/mcc/execution/LTLFireability.pnml.gal : 8 ms
May 27, 2018 6:32:07 AM fr.lip6.move.serialization.SerializationUtil serializePropertiesForITSLTLTools
INFO: Time to serialize properties into /home/mcc/execution/LTLFireability.ltl : 2 ms
May 27, 2018 6:32:07 AM fr.lip6.move.gal.semantics.DeterministicNextBuilder getDeterministicNext
INFO: Input system was already deterministic with 204 transitions.
May 27, 2018 6:32:08 AM fr.lip6.move.gal.gal2smt.bmc.KInductionSolver computeAndDeclareInvariants
INFO: Computed 16 place invariants in 75 ms
May 27, 2018 6:32:09 AM fr.lip6.move.gal.gal2smt.bmc.KInductionSolver init
INFO: Proved 206 variables to be positive in 696 ms
May 27, 2018 6:32:09 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver computeAblingMatrix
INFO: Computing symmetric may disable matrix : 204 transitions.
May 27, 2018 6:32:09 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of disable matrix completed :0/204 took 0 ms. Total solver calls (SAT/UNSAT): 0(0/0)
May 27, 2018 6:32:09 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of Complete disable matrix. took 26 ms. Total solver calls (SAT/UNSAT): 0(0/0)
May 27, 2018 6:32:09 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver computeAblingMatrix
INFO: Computing symmetric may enable matrix : 204 transitions.
May 27, 2018 6:32:09 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of Complete enable matrix. took 15 ms. Total solver calls (SAT/UNSAT): 0(0/0)
May 27, 2018 6:32:11 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver computeCoEnablingMatrix
INFO: Computing symmetric co enabling matrix : 204 transitions.
May 27, 2018 6:32:12 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(5/204) took 1089 ms. Total solver calls (SAT/UNSAT): 604(0/604)
May 27, 2018 6:32:15 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(25/204) took 4259 ms. Total solver calls (SAT/UNSAT): 2048(24/2024)
May 27, 2018 6:32:18 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(64/204) took 7277 ms. Total solver calls (SAT/UNSAT): 2842(46/2796)
May 27, 2018 6:32:21 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(138/204) took 10404 ms. Total solver calls (SAT/UNSAT): 3455(53/3402)
May 27, 2018 6:32:24 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(187/204) took 13468 ms. Total solver calls (SAT/UNSAT): 3917(66/3851)
May 27, 2018 6:32:25 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of Finished co-enabling matrix. took 14209 ms. Total solver calls (SAT/UNSAT): 4003(68/3935)
May 27, 2018 6:32:25 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver computeDoNotAccord
INFO: Computing Do-Not-Accords matrix : 204 transitions.
May 27, 2018 6:32:25 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of Completed DNA matrix. took 39 ms. Total solver calls (SAT/UNSAT): 4(0/4)
May 27, 2018 6:32:25 AM fr.lip6.move.gal.gal2pins.Gal2PinsTransformerNext transform
INFO: Built C files in 18343ms conformant to PINS in folder :/home/mcc/execution

Sequence of Actions to be Executed by the VM

This is useful if one wants to reexecute the tool in the VM from the submitted image disk.

set -x
# this is for BenchKit: configuration of major elements for the test
export BK_INPUT="AutoFlight-PT-02b"
export BK_EXAMINATION="LTLFireability"
export BK_TOOL="itstools"
export BK_RESULT_DIR="/tmp/BK_RESULTS/OUTPUTS"
export BK_TIME_CONFINEMENT="3600"
export BK_MEMORY_CONFINEMENT="16384"

# this is specific to your benchmark or test

export BIN_DIR="$HOME/BenchKit/bin"

# remove the execution directoty if it exists (to avoid increse of .vmdk images)
if [ -d execution ] ; then
rm -rf execution
fi

tar xzf /home/mcc/BenchKit/INPUTS/AutoFlight-PT-02b.tgz
mv AutoFlight-PT-02b execution
cd execution
pwd
ls -lh

# this is for BenchKit: explicit launching of the test
echo "====================================================================="
echo " Generated by BenchKit 2-3637"
echo " Executing tool itstools"
echo " Input is AutoFlight-PT-02b, examination is LTLFireability"
echo " Time confinement is $BK_TIME_CONFINEMENT seconds"
echo " Memory confinement is 16384 MBytes"
echo " Number of cores is 4"
echo " Run identifier is r200-qhx1-152732197100022"
echo "====================================================================="
echo
echo "--------------------"
echo "content from stdout:"
echo
echo "=== Data for post analysis generated by BenchKit (invocation template)"
echo
if [ "LTLFireability" = "UpperBounds" ] ; then
echo "The expected result is a vector of positive values"
echo NUM_VECTOR
elif [ "LTLFireability" != "StateSpace" ] ; then
echo "The expected result is a vector of booleans"
echo BOOL_VECTOR
else
echo "no data necessary for post analysis"
fi
echo
if [ -f "LTLFireability.txt" ] ; then
echo "here is the order used to build the result vector(from text file)"
for x in $(grep Property LTLFireability.txt | cut -d ' ' -f 2 | sort -u) ; do
echo "FORMULA_NAME $x"
done
elif [ -f "LTLFireability.xml" ] ; then # for cunf (txt files deleted;-)
echo echo "here is the order used to build the result vector(from xml file)"
for x in $(grep '' LTLFireability.xml | cut -d '>' -f 2 | cut -d '<' -f 1 | sort -u) ; do
echo "FORMULA_NAME $x"
done
fi
echo
echo "=== Now, execution of the tool begins"
echo
echo -n "BK_START "
date -u +%s%3N
echo
timeout -s 9 $BK_TIME_CONFINEMENT bash -c "/home/mcc/BenchKit/BenchKit_head.sh 2> STDERR ; echo ; echo -n \"BK_STOP \" ; date -u +%s%3N"
if [ $? -eq 137 ] ; then
echo
echo "BK_TIME_CONFINEMENT_REACHED"
fi
echo
echo "--------------------"
echo "content from stderr:"
echo
cat STDERR ;