Execution Chart

We display below the execution chart for this examination (boot time has been removed).

Trace from the execution

Waiting for the VM to be ready (probing ssh)
.........................
/home/mcc/execution
total 196K
-rw-r--r-- 1 mcc users 3.5K May 15 18:54 CTLCardinality.txt
-rw-r--r-- 1 mcc users 18K May 15 18:54 CTLCardinality.xml
-rw-r--r-- 1 mcc users 2.5K May 15 18:54 CTLFireability.txt
-rw-r--r-- 1 mcc users 18K May 15 18:54 CTLFireability.xml
-rw-r--r-- 1 mcc users 4.0K May 15 18:49 GenericPropertiesDefinition.xml
-rw-r--r-- 1 mcc users 6.0K May 15 18:49 GenericPropertiesVerdict.xml
-rw-r--r-- 1 mcc users 2.7K May 26 09:26 LTLCardinality.txt
-rw-r--r-- 1 mcc users 13K May 26 09:26 LTLCardinality.xml
-rw-r--r-- 1 mcc users 1.8K May 26 09:26 LTLFireability.txt
-rw-r--r-- 1 mcc users 7.6K May 26 09:26 LTLFireability.xml
-rw-r--r-- 1 mcc users 3.6K May 15 18:54 ReachabilityCardinality.txt
-rw-r--r-- 1 mcc users 16K May 15 18:54 ReachabilityCardinality.xml
-rw-r--r-- 1 mcc users 109 May 15 18:54 ReachabilityDeadlock.txt
-rw-r--r-- 1 mcc users 347 May 15 18:54 ReachabilityDeadlock.xml
-rw-r--r-- 1 mcc users 2.4K May 15 18:54 ReachabilityFireability.txt
-rw-r--r-- 1 mcc users 14K May 15 18:54 ReachabilityFireability.xml
-rw-r--r-- 1 mcc users 1.7K May 15 18:54 UpperBounds.txt
-rw-r--r-- 1 mcc users 3.7K May 15 18:54 UpperBounds.xml
-rw-r--r-- 1 mcc users 6 May 15 18:49 equiv_col
-rw-r--r-- 1 mcc users 3 May 15 18:49 instance
-rw-r--r-- 1 mcc users 6 May 15 18:49 iscolored
-rw-r--r-- 1 mcc users 33K May 15 18:49 model.pnml
=====================================================================
Generated by BenchKit 2-3637
Executing tool itstools
Input is Angiogenesis-PT-50, examination is LTLFireability
Time confinement is 3600 seconds
Memory confinement is 16384 MBytes
Number of cores is 4
Run identifier is r200-qhx1-152732197000014
=====================================================================

--------------------
content from stdout:

=== Data for post analysis generated by BenchKit (invocation template)

The expected result is a vector of booleans
BOOL_VECTOR

here is the order used to build the result vector(from text file)
FORMULA_NAME Angiogenesis-PT-50-LTLFireability-00
FORMULA_NAME Angiogenesis-PT-50-LTLFireability-01
FORMULA_NAME Angiogenesis-PT-50-LTLFireability-02
FORMULA_NAME Angiogenesis-PT-50-LTLFireability-03
FORMULA_NAME Angiogenesis-PT-50-LTLFireability-04
FORMULA_NAME Angiogenesis-PT-50-LTLFireability-05
FORMULA_NAME Angiogenesis-PT-50-LTLFireability-06
FORMULA_NAME Angiogenesis-PT-50-LTLFireability-07
FORMULA_NAME Angiogenesis-PT-50-LTLFireability-08
FORMULA_NAME Angiogenesis-PT-50-LTLFireability-09
FORMULA_NAME Angiogenesis-PT-50-LTLFireability-10
FORMULA_NAME Angiogenesis-PT-50-LTLFireability-11
FORMULA_NAME Angiogenesis-PT-50-LTLFireability-12
FORMULA_NAME Angiogenesis-PT-50-LTLFireability-13
FORMULA_NAME Angiogenesis-PT-50-LTLFireability-14
FORMULA_NAME Angiogenesis-PT-50-LTLFireability-15

=== Now, execution of the tool begins

BK_START 1527402609220

Using solver Z3 to compute partial order matrices.
Built C files in :
/home/mcc/execution
Invoking ITS tools like this :CommandLine [args=[/home/mcc/BenchKit/itstools/plugins/fr.lip6.move.gal.itstools.binaries_1.0.0.201805151631/bin/its-ltl-linux64, --gc-threshold, 2000000, -i, /home/mcc/execution/LTLFireability.pnml.gal, -t, CGAL, -LTL, /home/mcc/execution/LTLFireability.ltl, -c, -stutter-deadlock], workingDir=/home/mcc/execution]

its-ltl command run as :

/home/mcc/BenchKit/itstools/plugins/fr.lip6.move.gal.itstools.binaries_1.0.0.201805151631/bin/its-ltl-linux64 --gc-threshold 2000000 -i /home/mcc/execution/LTLFireability.pnml.gal -t CGAL -LTL /home/mcc/execution/LTLFireability.ltl -c -stutter-deadlock
Read 16 LTL properties
Checking formula 0 : !(("(PtP3>=1)"))
Formula 0 simplified : !"(PtP3>=1)"
Presburger conditions satisfied. Using coverability to approximate state space in K-Induction.
// Phase 1: matrix 64 rows 39 cols
invariant :GStarP3kP3 + KdStarGStarP3k + KdStarGStarP3kP3 + KdStarGStarP3kStar + KdStarGStarP3kStarP2 + KdStarGStarP3kStarP3 + KdStarGStarP3kStarP3P2 + P3k = 50
invariant :Pten + PtP2 + PtP3 + PtP3P2 = 50
invariant :Akt + AktP3 + AktStar = 50
invariant :DAGE + Enz = 50
invariant :Gab1 + GP3 + GStarP3 + KdStarG + KdStarGP3 + KdStarGStar + KdStarGStarP3 + -1'KdStarPg + -1'KdStarPgStar + -1'KdStarPgStarP2 + -1'P3k + -1'Pg = -50
invariant :GStarPgP3 + KdStarGStarPg + KdStarGStarPgP3 + KdStarGStarPgStar + KdStarGStarPgStarP2 + KdStarGStarPgStarP3 + KdStarGStarPgStarP3P2 + KdStarPg + KdStarPgStar + KdStarPgStarP2 + Pg = 50
invariant :KdStar + KdStarG + KdStarGP3 + KdStarGStar + KdStarGStarP3 + KdStarGStarP3k + KdStarGStarP3kP3 + KdStarGStarP3kStar + KdStarGStarP3kStarP2 + KdStarGStarP3kStarP3 + KdStarGStarP3kStarP3P2 + KdStarGStarPg + KdStarGStarPgP3 + KdStarGStarPgStar + KdStarGStarPgStarP2 + KdStarGStarPgStarP3 + KdStarGStarPgStarP3P2 + KdStarPg + KdStarPgStar + KdStarPgStarP2 = 50
invariant :AktP3 + DAG + -1'Enz + -1'Gab1 + -1'KdStarG + -1'KdStarGStar + -1'KdStarGStarP3k + -1'KdStarGStarP3kStar + KdStarGStarP3kStarP3P2 + -1'KdStarGStarPg + -1'KdStarGStarPgStar + KdStarGStarPgStarP3P2 + KdStarPgStarP2 + Pip2 + Pip3 + PtP2 + PtP3 + 2'PtP3P2 = -50
Running compilation step : CommandLine [args=[gcc, -c, -I/home/mcc/BenchKit//lts_install_dir//include, -I., -std=c99, -fPIC, -O3, model.c], workingDir=/home/mcc/execution]
Compilation finished in 2153 ms.
Running link step : CommandLine [args=[gcc, -shared, -o, gal.so, model.o], workingDir=/home/mcc/execution]
Link finished in 90 ms.
Running LTSmin : CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=1, -p, --pins-guards, --when, --ltl, (LTLAP0==true), --buchi-type=spotba], workingDir=/home/mcc/execution]
LTSmin run took 122 ms.
FORMULA Angiogenesis-PT-50-LTLFireability-00 FALSE TECHNIQUES PARTIAL_ORDER EXPLICIT LTSMIN SAT_SMT
Running LTSmin : CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=1, -p, --pins-guards, --when, --ltl, (LTLAP0==true), --buchi-type=spotba], workingDir=/home/mcc/execution]
LTSmin run took 60 ms.
FORMULA Angiogenesis-PT-50-LTLFireability-01 FALSE TECHNIQUES PARTIAL_ORDER EXPLICIT LTSMIN SAT_SMT
Running LTSmin : CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=1, -p, --pins-guards, --when, --ltl, (LTLAP1==true), --buchi-type=spotba], workingDir=/home/mcc/execution]
LTSmin run took 49 ms.
FORMULA Angiogenesis-PT-50-LTLFireability-02 FALSE TECHNIQUES PARTIAL_ORDER EXPLICIT LTSMIN SAT_SMT
Running LTSmin : CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=1, -p, --pins-guards, --when, --ltl, ((LTLAP2==true))U((<>((LTLAP3==true)))U(<>((LTLAP4==true)))), --buchi-type=spotba], workingDir=/home/mcc/execution]
LTSmin run took 92 ms.
FORMULA Angiogenesis-PT-50-LTLFireability-03 TRUE TECHNIQUES PARTIAL_ORDER EXPLICIT LTSMIN SAT_SMT
Running LTSmin : CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=1, -p, --pins-guards, --when, --ltl, <>(<>((LTLAP5==true))), --buchi-type=spotba], workingDir=/home/mcc/execution]
LTSmin run took 89 ms.
FORMULA Angiogenesis-PT-50-LTLFireability-04 FALSE TECHNIQUES PARTIAL_ORDER EXPLICIT LTSMIN SAT_SMT
Running LTSmin : CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=1, -p, --pins-guards, --when, --ltl, []((LTLAP6==true)), --buchi-type=spotba], workingDir=/home/mcc/execution]
LTSmin run took 58 ms.
FORMULA Angiogenesis-PT-50-LTLFireability-05 FALSE TECHNIQUES PARTIAL_ORDER EXPLICIT LTSMIN SAT_SMT
Running LTSmin : CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=1, -p, --pins-guards, --when, --ltl, (LTLAP3==true), --buchi-type=spotba], workingDir=/home/mcc/execution]
LTSmin run took 61 ms.
FORMULA Angiogenesis-PT-50-LTLFireability-06 FALSE TECHNIQUES PARTIAL_ORDER EXPLICIT LTSMIN SAT_SMT
Running LTSmin : CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=1, --when, --ltl, X(X(X((LTLAP7==true)))), --buchi-type=spotba], workingDir=/home/mcc/execution]
LTSmin run took 67 ms.
FORMULA Angiogenesis-PT-50-LTLFireability-07 FALSE TECHNIQUES PARTIAL_ORDER EXPLICIT LTSMIN SAT_SMT
Running LTSmin : CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=1, --when, --ltl, X(X([](<>(X((LTLAP8==true)))))), --buchi-type=spotba], workingDir=/home/mcc/execution]
LTSmin run took 61 ms.
FORMULA Angiogenesis-PT-50-LTLFireability-08 FALSE TECHNIQUES PARTIAL_ORDER EXPLICIT LTSMIN SAT_SMT
Running LTSmin : CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=1, --when, --ltl, X(([](X((LTLAP9==true))))U([](<>((LTLAP10==true))))), --buchi-type=spotba], workingDir=/home/mcc/execution]
LTSmin run took 75 ms.
FORMULA Angiogenesis-PT-50-LTLFireability-09 FALSE TECHNIQUES PARTIAL_ORDER EXPLICIT LTSMIN SAT_SMT
Running LTSmin : CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=1, --when, --ltl, (X([](<>((LTLAP11==true)))))U(X(X([]((LTLAP3==true))))), --buchi-type=spotba], workingDir=/home/mcc/execution]
LTSmin run took 1865 ms.
FORMULA Angiogenesis-PT-50-LTLFireability-10 FALSE TECHNIQUES PARTIAL_ORDER EXPLICIT LTSMIN SAT_SMT
Running LTSmin : CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=1, -p, --pins-guards, --when, --ltl, <>((LTLAP12==true)), --buchi-type=spotba], workingDir=/home/mcc/execution]
LTSmin run took 52 ms.
FORMULA Angiogenesis-PT-50-LTLFireability-11 FALSE TECHNIQUES PARTIAL_ORDER EXPLICIT LTSMIN SAT_SMT
Running LTSmin : CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=1, -p, --pins-guards, --when, --ltl, <>((LTLAP13==true)), --buchi-type=spotba], workingDir=/home/mcc/execution]
LTSmin run took 65 ms.
FORMULA Angiogenesis-PT-50-LTLFireability-12 FALSE TECHNIQUES PARTIAL_ORDER EXPLICIT LTSMIN SAT_SMT
Running LTSmin : CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=1, --when, --ltl, X(<>((LTLAP5==true))), --buchi-type=spotba], workingDir=/home/mcc/execution]
LTSmin run took 50 ms.
FORMULA Angiogenesis-PT-50-LTLFireability-13 FALSE TECHNIQUES PARTIAL_ORDER EXPLICIT LTSMIN SAT_SMT
Running LTSmin : CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=1, -p, --pins-guards, --when, --ltl, ([](((LTLAP14==true))U((LTLAP4==true))))U(((LTLAP2==true))U([]((LTLAP7==true)))), --buchi-type=spotba], workingDir=/home/mcc/execution]
LTSmin run took 76 ms.
FORMULA Angiogenesis-PT-50-LTLFireability-14 FALSE TECHNIQUES PARTIAL_ORDER EXPLICIT LTSMIN SAT_SMT
Running LTSmin : CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=1, -p, --pins-guards, --when, --ltl, (LTLAP15==true), --buchi-type=spotba], workingDir=/home/mcc/execution]
LTSmin run took 53 ms.
FORMULA Angiogenesis-PT-50-LTLFireability-15 FALSE TECHNIQUES PARTIAL_ORDER EXPLICIT LTSMIN SAT_SMT
ITS tools runner thread asked to quit. Dying gracefully.

BK_STOP 1527402640253

--------------------
content from stderr:

+ export BINDIR=/home/mcc/BenchKit/
+ BINDIR=/home/mcc/BenchKit/
++ pwd
+ export MODEL=/home/mcc/execution
+ MODEL=/home/mcc/execution
+ /home/mcc/BenchKit//runeclipse.sh /home/mcc/execution LTLFireability -its -ltsminpath /home/mcc/BenchKit//lts_install_dir/ -smt
+ ulimit -s 65536
+ [[ -z '' ]]
+ export LTSMIN_MEM_SIZE=8589934592
+ LTSMIN_MEM_SIZE=8589934592
+ /home/mcc/BenchKit//itstools/its-tools -consoleLog -data /home/mcc/execution/workspace -pnfolder /home/mcc/execution -examination LTLFireability -z3path /home/mcc/BenchKit//z3/bin/z3 -yices2path /home/mcc/BenchKit//yices/bin/yices -its -ltsminpath /home/mcc/BenchKit//lts_install_dir/ -smt -vmargs -Dosgi.locking=none -Declipse.stateSaveDelayInterval=-1 -Dosgi.configuration.area=/tmp/.eclipse -Xss8m -Xms40m -Xmx8192m -Dfile.encoding=UTF-8 -Dosgi.requiredJavaVersion=1.6
May 27, 2018 6:30:19 AM fr.lip6.move.gal.application.Application start
INFO: Running its-tools with arguments : [-pnfolder, /home/mcc/execution, -examination, LTLFireability, -z3path, /home/mcc/BenchKit//z3/bin/z3, -yices2path, /home/mcc/BenchKit//yices/bin/yices, -its, -ltsminpath, /home/mcc/BenchKit//lts_install_dir/, -smt]
May 27, 2018 6:30:19 AM fr.lip6.move.gal.application.MccTranslator transformPNML
INFO: Parsing pnml file : /home/mcc/execution/model.pnml
May 27, 2018 6:30:19 AM fr.lip6.move.gal.nupn.PTNetReader loadFromXML
INFO: Load time of PNML (sax parser for PT used): 62 ms
May 27, 2018 6:30:19 AM fr.lip6.move.gal.pnml.togal.PTGALTransformer handlePage
INFO: Transformed 39 places.
May 27, 2018 6:30:20 AM fr.lip6.move.gal.pnml.togal.PTGALTransformer handlePage
INFO: Transformed 64 transitions.
May 27, 2018 6:30:20 AM fr.lip6.move.serialization.SerializationUtil systemToFile
INFO: Time to serialize gal into /home/mcc/execution/model.pnml.img.gal : 12 ms
May 27, 2018 6:30:20 AM fr.lip6.move.gal.instantiate.GALRewriter flatten
INFO: Flatten gal took : 55 ms
May 27, 2018 6:30:20 AM fr.lip6.move.serialization.SerializationUtil systemToFile
INFO: Time to serialize gal into /home/mcc/execution/LTLFireability.pnml.gal : 5 ms
May 27, 2018 6:30:20 AM fr.lip6.move.serialization.SerializationUtil serializePropertiesForITSLTLTools
INFO: Time to serialize properties into /home/mcc/execution/LTLFireability.ltl : 1 ms
May 27, 2018 6:30:20 AM fr.lip6.move.gal.semantics.DeterministicNextBuilder getDeterministicNext
INFO: Input system was already deterministic with 64 transitions.
May 27, 2018 6:30:20 AM fr.lip6.move.gal.gal2smt.bmc.KInductionSolver computeAndDeclareInvariants
INFO: Computed 8 place invariants in 18 ms
May 27, 2018 6:30:20 AM fr.lip6.move.gal.gal2smt.bmc.KInductionSolver init
INFO: Proved 39 variables to be positive in 160 ms
May 27, 2018 6:30:20 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver computeAblingMatrix
INFO: Computing symmetric may disable matrix : 64 transitions.
May 27, 2018 6:30:20 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of disable matrix completed :0/64 took 0 ms. Total solver calls (SAT/UNSAT): 0(0/0)
May 27, 2018 6:30:20 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of Complete disable matrix. took 3 ms. Total solver calls (SAT/UNSAT): 0(0/0)
May 27, 2018 6:30:20 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver computeAblingMatrix
INFO: Computing symmetric may enable matrix : 64 transitions.
May 27, 2018 6:30:20 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of Complete enable matrix. took 2 ms. Total solver calls (SAT/UNSAT): 0(0/0)
May 27, 2018 6:30:22 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver computeCoEnablingMatrix
INFO: Computing symmetric co enabling matrix : 64 transitions.
May 27, 2018 6:30:23 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(9/64) took 1544 ms. Total solver calls (SAT/UNSAT): 442(442/0)
May 27, 2018 6:30:27 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(27/64) took 4636 ms. Total solver calls (SAT/UNSAT): 1026(1026/0)
May 27, 2018 6:30:29 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of Finished co-enabling matrix. took 7230 ms. Total solver calls (SAT/UNSAT): 1437(1437/0)
May 27, 2018 6:30:29 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver computeDoNotAccord
INFO: Computing Do-Not-Accords matrix : 64 transitions.
May 27, 2018 6:30:33 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of Completed DNA matrix. took 3848 ms. Total solver calls (SAT/UNSAT): 371(0/371)
May 27, 2018 6:30:33 AM fr.lip6.move.gal.gal2pins.Gal2PinsTransformerNext transform
INFO: Built C files in 13145ms conformant to PINS in folder :/home/mcc/execution

Sequence of Actions to be Executed by the VM

This is useful if one wants to reexecute the tool in the VM from the submitted image disk.

set -x
# this is for BenchKit: configuration of major elements for the test
export BK_INPUT="Angiogenesis-PT-50"
export BK_EXAMINATION="LTLFireability"
export BK_TOOL="itstools"
export BK_RESULT_DIR="/tmp/BK_RESULTS/OUTPUTS"
export BK_TIME_CONFINEMENT="3600"
export BK_MEMORY_CONFINEMENT="16384"

# this is specific to your benchmark or test

export BIN_DIR="$HOME/BenchKit/bin"

# remove the execution directoty if it exists (to avoid increse of .vmdk images)
if [ -d execution ] ; then
rm -rf execution
fi

tar xzf /home/mcc/BenchKit/INPUTS/Angiogenesis-PT-50.tgz
mv Angiogenesis-PT-50 execution
cd execution
pwd
ls -lh

# this is for BenchKit: explicit launching of the test
echo "====================================================================="
echo " Generated by BenchKit 2-3637"
echo " Executing tool itstools"
echo " Input is Angiogenesis-PT-50, examination is LTLFireability"
echo " Time confinement is $BK_TIME_CONFINEMENT seconds"
echo " Memory confinement is 16384 MBytes"
echo " Number of cores is 4"
echo " Run identifier is r200-qhx1-152732197000014"
echo "====================================================================="
echo
echo "--------------------"
echo "content from stdout:"
echo
echo "=== Data for post analysis generated by BenchKit (invocation template)"
echo
if [ "LTLFireability" = "UpperBounds" ] ; then
echo "The expected result is a vector of positive values"
echo NUM_VECTOR
elif [ "LTLFireability" != "StateSpace" ] ; then
echo "The expected result is a vector of booleans"
echo BOOL_VECTOR
else
echo "no data necessary for post analysis"
fi
echo
if [ -f "LTLFireability.txt" ] ; then
echo "here is the order used to build the result vector(from text file)"
for x in $(grep Property LTLFireability.txt | cut -d ' ' -f 2 | sort -u) ; do
echo "FORMULA_NAME $x"
done
elif [ -f "LTLFireability.xml" ] ; then # for cunf (txt files deleted;-)
echo echo "here is the order used to build the result vector(from xml file)"
for x in $(grep '' LTLFireability.xml | cut -d '>' -f 2 | cut -d '<' -f 1 | sort -u) ; do
echo "FORMULA_NAME $x"
done
fi
echo
echo "=== Now, execution of the tool begins"
echo
echo -n "BK_START "
date -u +%s%3N
echo
timeout -s 9 $BK_TIME_CONFINEMENT bash -c "/home/mcc/BenchKit/BenchKit_head.sh 2> STDERR ; echo ; echo -n \"BK_STOP \" ; date -u +%s%3N"
if [ $? -eq 137 ] ; then
echo
echo "BK_TIME_CONFINEMENT_REACHED"
fi
echo
echo "--------------------"
echo "content from stderr:"
echo
cat STDERR ;