Execution Chart

We display below the execution chart for this examination (boot time has been removed).

Trace from the execution

Waiting for the VM to be ready (probing ssh)
.................................................................................................................
/home/mcc/execution
total 268K
-rw-r--r-- 1 mcc users 3.4K May 15 18:54 CTLCardinality.txt
-rw-r--r-- 1 mcc users 18K May 15 18:54 CTLCardinality.xml
-rw-r--r-- 1 mcc users 2.5K May 15 18:54 CTLFireability.txt
-rw-r--r-- 1 mcc users 15K May 15 18:54 CTLFireability.xml
-rw-r--r-- 1 mcc users 4.0K May 15 18:50 GenericPropertiesDefinition.xml
-rw-r--r-- 1 mcc users 6.3K May 15 18:50 GenericPropertiesVerdict.xml
-rw-r--r-- 1 mcc users 2.5K May 26 09:27 LTLCardinality.txt
-rw-r--r-- 1 mcc users 11K May 26 09:27 LTLCardinality.xml
-rw-r--r-- 1 mcc users 2.1K May 26 09:27 LTLFireability.txt
-rw-r--r-- 1 mcc users 11K May 26 09:27 LTLFireability.xml
-rw-r--r-- 1 mcc users 3.8K May 15 18:54 ReachabilityCardinality.txt
-rw-r--r-- 1 mcc users 19K May 15 18:54 ReachabilityCardinality.xml
-rw-r--r-- 1 mcc users 116 May 15 18:54 ReachabilityDeadlock.txt
-rw-r--r-- 1 mcc users 354 May 15 18:54 ReachabilityDeadlock.xml
-rw-r--r-- 1 mcc users 3.1K May 15 18:54 ReachabilityFireability.txt
-rw-r--r-- 1 mcc users 20K May 15 18:54 ReachabilityFireability.xml
-rw-r--r-- 1 mcc users 1.8K May 15 18:54 UpperBounds.txt
-rw-r--r-- 1 mcc users 3.8K May 15 18:54 UpperBounds.xml
-rw-r--r-- 1 mcc users 6 May 15 18:50 equiv_col
-rw-r--r-- 1 mcc users 9 May 15 18:50 instance
-rw-r--r-- 1 mcc users 6 May 15 18:50 iscolored
-rw-r--r-- 1 mcc users 103K May 15 18:50 model.pnml
=====================================================================
Generated by BenchKit 2-3637
Executing tool itstoolsl
Input is ResAllocation-PT-R003C015, examination is LTLFireability
Time confinement is 3600 seconds
Memory confinement is 16384 MBytes
Number of cores is 4
Run identifier is r189-qhx2-152732140900140
=====================================================================

--------------------
content from stdout:

=== Data for post analysis generated by BenchKit (invocation template)

The expected result is a vector of booleans
BOOL_VECTOR

here is the order used to build the result vector(from text file)
FORMULA_NAME ResAllocation-PT-R003C015-LTLFireability-00
FORMULA_NAME ResAllocation-PT-R003C015-LTLFireability-01
FORMULA_NAME ResAllocation-PT-R003C015-LTLFireability-02
FORMULA_NAME ResAllocation-PT-R003C015-LTLFireability-03
FORMULA_NAME ResAllocation-PT-R003C015-LTLFireability-04
FORMULA_NAME ResAllocation-PT-R003C015-LTLFireability-05
FORMULA_NAME ResAllocation-PT-R003C015-LTLFireability-06
FORMULA_NAME ResAllocation-PT-R003C015-LTLFireability-07
FORMULA_NAME ResAllocation-PT-R003C015-LTLFireability-08
FORMULA_NAME ResAllocation-PT-R003C015-LTLFireability-09
FORMULA_NAME ResAllocation-PT-R003C015-LTLFireability-10
FORMULA_NAME ResAllocation-PT-R003C015-LTLFireability-11
FORMULA_NAME ResAllocation-PT-R003C015-LTLFireability-12
FORMULA_NAME ResAllocation-PT-R003C015-LTLFireability-13
FORMULA_NAME ResAllocation-PT-R003C015-LTLFireability-14
FORMULA_NAME ResAllocation-PT-R003C015-LTLFireability-15

=== Now, execution of the tool begins

BK_START 1528325103112

Converted graph to binary with : CommandLine [args=[/home/mcc/BenchKit/itstools/plugins/fr.lip6.move.gal.louvain.binaries_1.0.0.201805241334/bin/convert-linux64, -i, /tmp/graph5072164663904741093.txt, -o, /tmp/graph5072164663904741093.bin, -w, /tmp/graph5072164663904741093.weights], workingDir=null]
Built communities with : CommandLine [args=[/home/mcc/BenchKit/itstools/plugins/fr.lip6.move.gal.louvain.binaries_1.0.0.201805241334/bin/louvain-linux64, /tmp/graph5072164663904741093.bin, -l, -1, -v, -w, /tmp/graph5072164663904741093.weights, -q, 0, -e, 0.001], workingDir=null]
Using solver Z3 to compute partial order matrices.
Built C files in :
/home/mcc/execution
Invoking ITS tools like this :CommandLine [args=[/home/mcc/BenchKit/itstools/plugins/fr.lip6.move.gal.itstools.binaries_1.0.0.201805241334/bin/its-ltl-linux64, --gc-threshold, 2000000, -i, /home/mcc/execution/LTLFireability.pnml.gal, -t, CGAL, -LTL, /home/mcc/execution/LTLFireability.ltl, -c, -stutter-deadlock], workingDir=/home/mcc/execution]

its-ltl command run as :

/home/mcc/BenchKit/itstools/plugins/fr.lip6.move.gal.itstools.binaries_1.0.0.201805241334/bin/its-ltl-linux64 --gc-threshold 2000000 -i /home/mcc/execution/LTLFireability.pnml.gal -t CGAL -LTL /home/mcc/execution/LTLFireability.ltl -c -stutter-deadlock
Read 16 LTL properties
Checking formula 0 : !(((X("(i0.u0.r_0_0>=1)"))U((X("(((i3.u17.p_8_1>=1)&&(i3.u19.r_8_2>=1))&&(i3.u19.r_7_2>=1))"))U(X("((i3.u19.r_7_2>=1)&&(i2.u15.r_6_2>=1))")))))
Formula 0 simplified : !(X"(i0.u0.r_0_0>=1)" U (X"(((i3.u17.p_8_1>=1)&&(i3.u19.r_8_2>=1))&&(i3.u19.r_7_2>=1))" U X"((i3.u19.r_7_2>=1)&&(i2.u15.r_6_2>=1))"))
built 13 ordering constraints for composite.
built 10 ordering constraints for composite.
built 13 ordering constraints for composite.
built 14 ordering constraints for composite.
built 15 ordering constraints for composite.
built 9 ordering constraints for composite.
built 11 ordering constraints for composite.
Presburger conditions satisfied. Using coverability to approximate state space in K-Induction.
// Phase 1: matrix 60 rows 90 cols
invariant :i1:u10:p_4_1 + i1:u10:r_4_1 + -1'i2:u14:r_5_1 + i2:u18:r_6_1 + -1'i3:u17:r_7_1 + i3:u17:r_8_1 + -1'i3:u21:r_9_1 + i4:u24:r_10_1 + -1'i4:u24:r_11_1 + i5:u27:r_12_1 + -1'i5:u30:r_13_1 + i5:u30:r_14_1 = 1
invariant :i4:u24:p_11_1 + i4:u24:r_11_1 + -1'i5:u27:r_12_1 + i5:u30:r_13_1 + -1'i5:u30:r_14_1 = 0
invariant :i1:u8:p_2_2 + i1:u8:r_2_2 + -1'i1:u10:r_3_2 + i1:u10:r_4_2 + -1'i2:u13:r_5_2 + i2:u15:r_6_2 + -1'i3:u19:r_7_2 + i3:u19:r_8_2 + -1'i3:u22:r_9_2 + i4:u24:r_10_2 + -1'i4:u24:r_11_2 + i4:u28:r_12_2 + -1'i5:u29:r_13_2 + i5:u31:r_14_2 = 1
invariant :i4:u28:p_12_2 + i4:u28:r_12_2 + -1'i5:u29:r_13_2 + i5:u31:r_14_2 = 1
invariant :i3:u23:p_10_0 + i3:u23:r_10_0 + -1'i5:u25:r_11_0 + i5:u26:r_12_0 + -1'i5:u30:r_13_0 + i5:u30:r_14_0 = 1
invariant :i4:u24:p_11_2 + i4:u24:r_11_2 + -1'i4:u28:r_12_2 + i5:u29:r_13_2 + -1'i5:u31:r_14_2 = 0
invariant :i5:u25:p_12_0 + i5:u26:r_12_0 + -1'i5:u30:r_13_0 + i5:u30:r_14_0 = 1
invariant :i0:u4:p_1_1 + i0:u4:r_1_1 + -1'i1:u7:r_2_1 + i1:u10:r_3_1 + -1'i1:u10:r_4_1 + i2:u14:r_5_1 + -1'i2:u18:r_6_1 + i3:u17:r_7_1 + -1'i3:u17:r_8_1 + i3:u21:r_9_1 + -1'i4:u24:r_10_1 + i4:u24:r_11_1 + -1'i5:u27:r_12_1 + i5:u30:r_13_1 + -1'i5:u30:r_14_1 = 0
invariant :i5:u26:p_13_0 + i5:u30:r_13_0 + -1'i5:u30:r_14_0 = 0
invariant :i1:u6:p_2_0 + i1:u6:r_2_0 + -1'i1:u9:r_3_0 + i2:u11:r_4_0 + -1'i2:u12:r_5_0 + i2:u16:r_6_0 + -1'i3:u17:r_7_0 + i3:u17:r_8_0 + -1'i3:u20:r_9_0 + i3:u23:r_10_0 + -1'i5:u25:r_11_0 + i5:u26:r_12_0 + -1'i5:u30:r_13_0 + i5:u30:r_14_0 = 1
invariant :i5:u27:p_13_1 + i5:u30:r_13_1 + -1'i5:u30:r_14_1 = 0
invariant :i3:u19:p_8_2 + i3:u19:r_8_2 + -1'i3:u22:r_9_2 + i4:u24:r_10_2 + -1'i4:u24:r_11_2 + i4:u28:r_12_2 + -1'i5:u29:r_13_2 + i5:u31:r_14_2 = 1
invariant :i5:u25:p_11_0 + i5:u25:r_11_0 + -1'i5:u26:r_12_0 + i5:u30:r_13_0 + -1'i5:u30:r_14_0 = 0
invariant :i2:u11:p_5_0 + i2:u12:r_5_0 + -1'i2:u16:r_6_0 + i3:u17:r_7_0 + -1'i3:u17:r_8_0 + i3:u20:r_9_0 + -1'i3:u23:r_10_0 + i5:u25:r_11_0 + -1'i5:u26:r_12_0 + i5:u30:r_13_0 + -1'i5:u30:r_14_0 = 0
invariant :i2:u13:p_6_2 + i2:u15:r_6_2 + -1'i3:u19:r_7_2 + i3:u19:r_8_2 + -1'i3:u22:r_9_2 + i4:u24:r_10_2 + -1'i4:u24:r_11_2 + i4:u28:r_12_2 + -1'i5:u29:r_13_2 + i5:u31:r_14_2 = 1
invariant :i5:u29:p_13_2 + i5:u29:r_13_2 + -1'i5:u31:r_14_2 = 0
invariant :i1:u9:p_4_0 + i2:u11:r_4_0 + -1'i2:u12:r_5_0 + i2:u16:r_6_0 + -1'i3:u17:r_7_0 + i3:u17:r_8_0 + -1'i3:u20:r_9_0 + i3:u23:r_10_0 + -1'i5:u25:r_11_0 + i5:u26:r_12_0 + -1'i5:u30:r_13_0 + i5:u30:r_14_0 = 1
invariant :i2:u18:p_7_1 + i3:u17:r_7_1 + -1'i3:u17:r_8_1 + i3:u21:r_9_1 + -1'i4:u24:r_10_1 + i4:u24:r_11_1 + -1'i5:u27:r_12_1 + i5:u30:r_13_1 + -1'i5:u30:r_14_1 = 0
invariant :i3:u21:p_10_1 + i4:u24:r_10_1 + -1'i4:u24:r_11_1 + i5:u27:r_12_1 + -1'i5:u30:r_13_1 + i5:u30:r_14_1 = 1
invariant :i0:u3:p_1_0 + i0:u3:r_1_0 + -1'i1:u6:r_2_0 + i1:u9:r_3_0 + -1'i2:u11:r_4_0 + i2:u12:r_5_0 + -1'i2:u16:r_6_0 + i3:u17:r_7_0 + -1'i3:u17:r_8_0 + i3:u20:r_9_0 + -1'i3:u23:r_10_0 + i5:u25:r_11_0 + -1'i5:u26:r_12_0 + i5:u30:r_13_0 + -1'i5:u30:r_14_0 = 0
invariant :i1:u10:p_4_2 + i1:u10:r_4_2 + -1'i2:u13:r_5_2 + i2:u15:r_6_2 + -1'i3:u19:r_7_2 + i3:u19:r_8_2 + -1'i3:u22:r_9_2 + i4:u24:r_10_2 + -1'i4:u24:r_11_2 + i4:u28:r_12_2 + -1'i5:u29:r_13_2 + i5:u31:r_14_2 = 1
invariant :i2:u14:p_6_1 + i2:u18:r_6_1 + -1'i3:u17:r_7_1 + i3:u17:r_8_1 + -1'i3:u21:r_9_1 + i4:u24:r_10_1 + -1'i4:u24:r_11_1 + i5:u27:r_12_1 + -1'i5:u30:r_13_1 + i5:u30:r_14_1 = 1
invariant :i3:u20:p_9_0 + i3:u20:r_9_0 + -1'i3:u23:r_10_0 + i5:u25:r_11_0 + -1'i5:u26:r_12_0 + i5:u30:r_13_0 + -1'i5:u30:r_14_0 = 0
invariant :i5:u30:p_14_0 + i5:u30:r_14_0 = 1
invariant :i5:u30:p_14_1 + i5:u30:r_14_1 = 1
invariant :i0:u2:p_0_2 + i0:u2:r_0_2 + -1'i0:u5:r_1_2 + i1:u8:r_2_2 + -1'i1:u10:r_3_2 + i1:u10:r_4_2 + -1'i2:u13:r_5_2 + i2:u15:r_6_2 + -1'i3:u19:r_7_2 + i3:u19:r_8_2 + -1'i3:u22:r_9_2 + i4:u24:r_10_2 + -1'i4:u24:r_11_2 + i4:u28:r_12_2 + -1'i5:u29:r_13_2 + i5:u31:r_14_2 = 1
invariant :i2:u13:p_5_2 + i2:u13:r_5_2 + -1'i2:u15:r_6_2 + i3:u19:r_7_2 + -1'i3:u19:r_8_2 + i3:u22:r_9_2 + -1'i4:u24:r_10_2 + i4:u24:r_11_2 + -1'i4:u28:r_12_2 + i5:u29:r_13_2 + -1'i5:u31:r_14_2 = 0
invariant :i2:u16:p_7_0 + i3:u17:r_7_0 + -1'i3:u17:r_8_0 + i3:u20:r_9_0 + -1'i3:u23:r_10_0 + i5:u25:r_11_0 + -1'i5:u26:r_12_0 + i5:u30:r_13_0 + -1'i5:u30:r_14_0 = 0
invariant :i3:u17:p_8_1 + i3:u17:r_8_1 + -1'i3:u21:r_9_1 + i4:u24:r_10_1 + -1'i4:u24:r_11_1 + i5:u27:r_12_1 + -1'i5:u30:r_13_1 + i5:u30:r_14_1 = 1
invariant :i2:u12:p_6_0 + i2:u16:r_6_0 + -1'i3:u17:r_7_0 + i3:u17:r_8_0 + -1'i3:u20:r_9_0 + i3:u23:r_10_0 + -1'i5:u25:r_11_0 + i5:u26:r_12_0 + -1'i5:u30:r_13_0 + i5:u30:r_14_0 = 1
invariant :i0:u1:p_0_1 + i0:u1:r_0_1 + -1'i0:u4:r_1_1 + i1:u7:r_2_1 + -1'i1:u10:r_3_1 + i1:u10:r_4_1 + -1'i2:u14:r_5_1 + i2:u18:r_6_1 + -1'i3:u17:r_7_1 + i3:u17:r_8_1 + -1'i3:u21:r_9_1 + i4:u24:r_10_1 + -1'i4:u24:r_11_1 + i5:u27:r_12_1 + -1'i5:u30:r_13_1 + i5:u30:r_14_1 = 1
invariant :i5:u27:p_12_1 + i5:u27:r_12_1 + -1'i5:u30:r_13_1 + i5:u30:r_14_1 = 1
invariant :i2:u14:p_5_1 + i2:u14:r_5_1 + -1'i2:u18:r_6_1 + i3:u17:r_7_1 + -1'i3:u17:r_8_1 + i3:u21:r_9_1 + -1'i4:u24:r_10_1 + i4:u24:r_11_1 + -1'i5:u27:r_12_1 + i5:u30:r_13_1 + -1'i5:u30:r_14_1 = 0
invariant :i3:u17:p_8_0 + i3:u17:r_8_0 + -1'i3:u20:r_9_0 + i3:u23:r_10_0 + -1'i5:u25:r_11_0 + i5:u26:r_12_0 + -1'i5:u30:r_13_0 + i5:u30:r_14_0 = 1
invariant :i2:u15:p_7_2 + i3:u19:r_7_2 + -1'i3:u19:r_8_2 + i3:u22:r_9_2 + -1'i4:u24:r_10_2 + i4:u24:r_11_2 + -1'i4:u28:r_12_2 + i5:u29:r_13_2 + -1'i5:u31:r_14_2 = 0
invariant :i0:u4:p_2_1 + i1:u7:r_2_1 + -1'i1:u10:r_3_1 + i1:u10:r_4_1 + -1'i2:u14:r_5_1 + i2:u18:r_6_1 + -1'i3:u17:r_7_1 + i3:u17:r_8_1 + -1'i3:u21:r_9_1 + i4:u24:r_10_1 + -1'i4:u24:r_11_1 + i5:u27:r_12_1 + -1'i5:u30:r_13_1 + i5:u30:r_14_1 = 1
invariant :i1:u8:p_3_2 + i1:u10:r_3_2 + -1'i1:u10:r_4_2 + i2:u13:r_5_2 + -1'i2:u15:r_6_2 + i3:u19:r_7_2 + -1'i3:u19:r_8_2 + i3:u22:r_9_2 + -1'i4:u24:r_10_2 + i4:u24:r_11_2 + -1'i4:u28:r_12_2 + i5:u29:r_13_2 + -1'i5:u31:r_14_2 = 0
invariant :i3:u22:p_10_2 + i4:u24:r_10_2 + -1'i4:u24:r_11_2 + i4:u28:r_12_2 + -1'i5:u29:r_13_2 + i5:u31:r_14_2 = 1
invariant :i1:u6:p_3_0 + i1:u9:r_3_0 + -1'i2:u11:r_4_0 + i2:u12:r_5_0 + -1'i2:u16:r_6_0 + i3:u17:r_7_0 + -1'i3:u17:r_8_0 + i3:u20:r_9_0 + -1'i3:u23:r_10_0 + i5:u25:r_11_0 + -1'i5:u26:r_12_0 + i5:u30:r_13_0 + -1'i5:u30:r_14_0 = 0
invariant :i3:u21:p_9_1 + i3:u21:r_9_1 + -1'i4:u24:r_10_1 + i4:u24:r_11_1 + -1'i5:u27:r_12_1 + i5:u30:r_13_1 + -1'i5:u30:r_14_1 = 0
invariant :i0:u0:p_0_0 + i0:u0:r_0_0 + -1'i0:u3:r_1_0 + i1:u6:r_2_0 + -1'i1:u9:r_3_0 + i2:u11:r_4_0 + -1'i2:u12:r_5_0 + i2:u16:r_6_0 + -1'i3:u17:r_7_0 + i3:u17:r_8_0 + -1'i3:u20:r_9_0 + i3:u23:r_10_0 + -1'i5:u25:r_11_0 + i5:u26:r_12_0 + -1'i5:u30:r_13_0 + i5:u30:r_14_0 = 1
invariant :i5:u31:p_14_2 + i5:u31:r_14_2 = 1
invariant :i3:u22:p_9_2 + i3:u22:r_9_2 + -1'i4:u24:r_10_2 + i4:u24:r_11_2 + -1'i4:u28:r_12_2 + i5:u29:r_13_2 + -1'i5:u31:r_14_2 = 0
invariant :i1:u7:p_3_1 + i1:u10:r_3_1 + -1'i1:u10:r_4_1 + i2:u14:r_5_1 + -1'i2:u18:r_6_1 + i3:u17:r_7_1 + -1'i3:u17:r_8_1 + i3:u21:r_9_1 + -1'i4:u24:r_10_1 + i4:u24:r_11_1 + -1'i5:u27:r_12_1 + i5:u30:r_13_1 + -1'i5:u30:r_14_1 = 0
invariant :i0:u5:p_1_2 + i0:u5:r_1_2 + -1'i1:u8:r_2_2 + i1:u10:r_3_2 + -1'i1:u10:r_4_2 + i2:u13:r_5_2 + -1'i2:u15:r_6_2 + i3:u19:r_7_2 + -1'i3:u19:r_8_2 + i3:u22:r_9_2 + -1'i4:u24:r_10_2 + i4:u24:r_11_2 + -1'i4:u28:r_12_2 + i5:u29:r_13_2 + -1'i5:u31:r_14_2 = 0
Reverse transition relation is NOT exact ! Due to transitions t_1_0, t_2_3, t_3_0, t_5_0, t_6_3, t_7_0, t_9_0, t_10_3, t_11_0, t_12_3, t_13_0, t_14_3, i0.u2.t_0_3, i1.u10.t_4_3, i3.u19.t_8_3, Intersection with reachable at each step enabled. (destroyed/reverse/intersect/total) :0/45/15/60
Computing Next relation with stutter on 65 deadlock states
3 unique states visited
3 strongly connected components in search stack
3 transitions explored
3 items max in DFS search stack
64 ticks for the emptiness check
Model ,|S| ,Time ,Mem(kb) ,fin. SDD ,fin. DDD ,peak SDD ,peak DDD ,SDD Hom ,SDD cache peak ,DDD Hom ,DDD cachepeak ,SHom cache
STATS,0,0.779505,33356,1,0,33266,769,1173,74351,300,2603,58826
an accepting run exists (use option '-e' to print it)
Formula 0 is FALSE accepting run found.
FORMULA ResAllocation-PT-R003C015-LTLFireability-00 FALSE TECHNIQUES DECISION_DIAGRAMS TOPOLOGICAL USE_NUPN
Checking formula 1 : !((("(i2.u13.p_6_2>=1)")U(F(X(F("(((i5.u30.r_13_0>=1)&&(i5.u27.p_13_1>=1))&&(i5.u26.r_12_0>=1))"))))))
Formula 1 simplified : !("(i2.u13.p_6_2>=1)" U FXF"(((i5.u30.r_13_0>=1)&&(i5.u27.p_13_1>=1))&&(i5.u26.r_12_0>=1))")
Computing Next relation with stutter on 65 deadlock states
3 unique states visited
3 strongly connected components in search stack
3 transitions explored
3 items max in DFS search stack
4 ticks for the emptiness check
Model ,|S| ,Time ,Mem(kb) ,fin. SDD ,fin. DDD ,peak SDD ,peak DDD ,SDD Hom ,SDD cache peak ,DDD Hom ,DDD cachepeak ,SHom cache
STATS,0,0.830526,34448,1,0,35262,779,1202,81671,300,2669,64135
an accepting run exists (use option '-e' to print it)
Formula 1 is FALSE accepting run found.
FORMULA ResAllocation-PT-R003C015-LTLFireability-01 FALSE TECHNIQUES DECISION_DIAGRAMS TOPOLOGICAL USE_NUPN
Checking formula 2 : !((G("((i5.u30.r_14_0>=1)&&(i5.u30.r_13_0>=1))")))
Formula 2 simplified : !G"((i5.u30.r_14_0>=1)&&(i5.u30.r_13_0>=1))"
Computing Next relation with stutter on 65 deadlock states
3 unique states visited
3 strongly connected components in search stack
3 transitions explored
3 items max in DFS search stack
1 ticks for the emptiness check
Model ,|S| ,Time ,Mem(kb) ,fin. SDD ,fin. DDD ,peak SDD ,peak DDD ,SDD Hom ,SDD cache peak ,DDD Hom ,DDD cachepeak ,SHom cache
STATS,0,0.847002,34968,1,0,35808,800,1224,84170,304,2725,65355
an accepting run exists (use option '-e' to print it)
Formula 2 is FALSE accepting run found.
FORMULA ResAllocation-PT-R003C015-LTLFireability-02 FALSE TECHNIQUES DECISION_DIAGRAMS TOPOLOGICAL USE_NUPN
Checking formula 3 : !((F(G(G("((i3.u22.r_9_2>=1)&&(i3.u19.r_8_2>=1))")))))
Formula 3 simplified : !FG"((i3.u22.r_9_2>=1)&&(i3.u19.r_8_2>=1))"
Computing Next relation with stutter on 65 deadlock states
2 unique states visited
2 strongly connected components in search stack
2 transitions explored
2 items max in DFS search stack
19 ticks for the emptiness check
Model ,|S| ,Time ,Mem(kb) ,fin. SDD ,fin. DDD ,peak SDD ,peak DDD ,SDD Hom ,SDD cache peak ,DDD Hom ,DDD cachepeak ,SHom cache
STATS,0,1.04797,39556,1,0,43832,804,1254,117711,304,2750,78899
an accepting run exists (use option '-e' to print it)
Formula 3 is FALSE accepting run found.
FORMULA ResAllocation-PT-R003C015-LTLFireability-03 FALSE TECHNIQUES DECISION_DIAGRAMS TOPOLOGICAL USE_NUPN
Checking formula 4 : !((G(F(F(("(i2.u16.p_7_0>=1)")U("(i0.u3.p_1_0>=1)"))))))
Formula 4 simplified : !GF("(i2.u16.p_7_0>=1)" U "(i0.u3.p_1_0>=1)")
Computing Next relation with stutter on 65 deadlock states
3 unique states visited
3 strongly connected components in search stack
4 transitions explored
3 items max in DFS search stack
2 ticks for the emptiness check
Model ,|S| ,Time ,Mem(kb) ,fin. SDD ,fin. DDD ,peak SDD ,peak DDD ,SDD Hom ,SDD cache peak ,DDD Hom ,DDD cachepeak ,SHom cache
STATS,0,1.07164,40072,1,0,45057,804,1281,118517,305,2750,80117
an accepting run exists (use option '-e' to print it)
Formula 4 is FALSE accepting run found.
FORMULA ResAllocation-PT-R003C015-LTLFireability-04 FALSE TECHNIQUES DECISION_DIAGRAMS TOPOLOGICAL USE_NUPN
Checking formula 5 : !(((F(("((i4.u24.r_11_2>=1)&&(i4.u24.r_10_2>=1))")U("(((i3.u17.p_8_1>=1)&&(i3.u19.r_8_2>=1))&&(i3.u19.r_7_2>=1))")))U(X(X("(i3.u19.p_8_2>=1)")))))
Formula 5 simplified : !(F("((i4.u24.r_11_2>=1)&&(i4.u24.r_10_2>=1))" U "(((i3.u17.p_8_1>=1)&&(i3.u19.r_8_2>=1))&&(i3.u19.r_7_2>=1))") U XX"(i3.u19.p_8_2>=1)")
Computing Next relation with stutter on 65 deadlock states
5 unique states visited
5 strongly connected components in search stack
5 transitions explored
5 items max in DFS search stack
10 ticks for the emptiness check
Model ,|S| ,Time ,Mem(kb) ,fin. SDD ,fin. DDD ,peak SDD ,peak DDD ,SDD Hom ,SDD cache peak ,DDD Hom ,DDD cachepeak ,SHom cache
STATS,0,1.1668,42560,1,0,49740,820,1299,132179,305,2822,89286
an accepting run exists (use option '-e' to print it)
Formula 5 is FALSE accepting run found.
FORMULA ResAllocation-PT-R003C015-LTLFireability-05 FALSE TECHNIQUES DECISION_DIAGRAMS TOPOLOGICAL USE_NUPN
Checking formula 6 : !(("(((i5.u30.r_13_1>=1)&&(i5.u29.p_13_2>=1))&&(i5.u27.r_12_1>=1))"))
Formula 6 simplified : !"(((i5.u30.r_13_1>=1)&&(i5.u29.p_13_2>=1))&&(i5.u27.r_12_1>=1))"
Computing Next relation with stutter on 65 deadlock states
3 unique states visited
3 strongly connected components in search stack
3 transitions explored
3 items max in DFS search stack
0 ticks for the emptiness check
Model ,|S| ,Time ,Mem(kb) ,fin. SDD ,fin. DDD ,peak SDD ,peak DDD ,SDD Hom ,SDD cache peak ,DDD Hom ,DDD cachepeak ,SHom cache
STATS,0,1.16932,42824,1,0,49742,820,1318,132180,305,2822,89304
an accepting run exists (use option '-e' to print it)
Formula 6 is FALSE accepting run found.
FORMULA ResAllocation-PT-R003C015-LTLFireability-06 FALSE TECHNIQUES DECISION_DIAGRAMS TOPOLOGICAL USE_NUPN
Checking formula 7 : !((X(("(((i3.u20.r_9_0>=1)&&(i3.u21.p_9_1>=1))&&(i3.u17.r_8_0>=1))")U("((i5.u29.r_13_2>=1)&&(i4.u28.r_12_2>=1))"))))
Formula 7 simplified : !X("(((i3.u20.r_9_0>=1)&&(i3.u21.p_9_1>=1))&&(i3.u17.r_8_0>=1))" U "((i5.u29.r_13_2>=1)&&(i4.u28.r_12_2>=1))")
Computing Next relation with stutter on 65 deadlock states
4 unique states visited
4 strongly connected components in search stack
4 transitions explored
4 items max in DFS search stack
1 ticks for the emptiness check
Model ,|S| ,Time ,Mem(kb) ,fin. SDD ,fin. DDD ,peak SDD ,peak DDD ,SDD Hom ,SDD cache peak ,DDD Hom ,DDD cachepeak ,SHom cache
STATS,0,1.17271,43080,1,0,49758,820,1345,132202,305,2822,89412
an accepting run exists (use option '-e' to print it)
Formula 7 is FALSE accepting run found.
FORMULA ResAllocation-PT-R003C015-LTLFireability-07 FALSE TECHNIQUES DECISION_DIAGRAMS TOPOLOGICAL USE_NUPN
Checking formula 8 : !((((X("(i2.u16.p_7_0>=1)"))U(X("(((i2.u12.r_5_0>=1)&&(i2.u14.p_5_1>=1))&&(i2.u11.r_4_0>=1))")))U((G("(i3.u20.p_9_0>=1)"))U(F("((i3.u22.r_9_2>=1)&&(i3.u19.r_8_2>=1))")))))
Formula 8 simplified : !((X"(i2.u16.p_7_0>=1)" U X"(((i2.u12.r_5_0>=1)&&(i2.u14.p_5_1>=1))&&(i2.u11.r_4_0>=1))") U (G"(i3.u20.p_9_0>=1)" U F"((i3.u22.r_9_2>=1)&&(i3.u19.r_8_2>=1))"))
Computing Next relation with stutter on 65 deadlock states
1 unique states visited
0 strongly connected components in search stack
0 transitions explored
1 items max in DFS search stack
0 ticks for the emptiness check
Model ,|S| ,Time ,Mem(kb) ,fin. SDD ,fin. DDD ,peak SDD ,peak DDD ,SDD Hom ,SDD cache peak ,DDD Hom ,DDD cachepeak ,SHom cache
STATS,0,1.17944,43832,1,0,49758,820,1356,132202,305,2822,89423
no accepting run found
Formula 8 is TRUE no accepting run found.
FORMULA ResAllocation-PT-R003C015-LTLFireability-08 TRUE TECHNIQUES DECISION_DIAGRAMS TOPOLOGICAL USE_NUPN
Checking formula 9 : !((G((("(i2.u13.p_6_2>=1)")U("(((i5.u30.r_13_1>=1)&&(i5.u29.p_13_2>=1))&&(i5.u27.r_12_1>=1))"))U(G(G("((i2.u16.r_6_0>=1)&&(i2.u12.r_5_0>=1))"))))))
Formula 9 simplified : !G(("(i2.u13.p_6_2>=1)" U "(((i5.u30.r_13_1>=1)&&(i5.u29.p_13_2>=1))&&(i5.u27.r_12_1>=1))") U G"((i2.u16.r_6_0>=1)&&(i2.u12.r_5_0>=1))")
Computing Next relation with stutter on 65 deadlock states
4 unique states visited
4 strongly connected components in search stack
4 transitions explored
4 items max in DFS search stack
11 ticks for the emptiness check
Model ,|S| ,Time ,Mem(kb) ,fin. SDD ,fin. DDD ,peak SDD ,peak DDD ,SDD Hom ,SDD cache peak ,DDD Hom ,DDD cachepeak ,SHom cache
STATS,0,1.28598,44872,1,0,52989,820,1443,135755,305,2824,94453
an accepting run exists (use option '-e' to print it)
Formula 9 is FALSE accepting run found.
FORMULA ResAllocation-PT-R003C015-LTLFireability-09 FALSE TECHNIQUES DECISION_DIAGRAMS TOPOLOGICAL USE_NUPN
Checking formula 10 : !((X("(i3.u19.p_8_2>=1)")))
Formula 10 simplified : !X"(i3.u19.p_8_2>=1)"
Computing Next relation with stutter on 65 deadlock states
4 unique states visited
4 strongly connected components in search stack
4 transitions explored
4 items max in DFS search stack
0 ticks for the emptiness check
Model ,|S| ,Time ,Mem(kb) ,fin. SDD ,fin. DDD ,peak SDD ,peak DDD ,SDD Hom ,SDD cache peak ,DDD Hom ,DDD cachepeak ,SHom cache
STATS,0,1.28962,44872,1,0,53020,820,1444,135805,305,2824,94651
an accepting run exists (use option '-e' to print it)
Formula 10 is FALSE accepting run found.
FORMULA ResAllocation-PT-R003C015-LTLFireability-10 FALSE TECHNIQUES DECISION_DIAGRAMS TOPOLOGICAL USE_NUPN
Checking formula 11 : !((G(F(G(G("((i5.u26.r_12_0>=1)&&(i5.u25.r_11_0>=1))"))))))
Formula 11 simplified : !GFG"((i5.u26.r_12_0>=1)&&(i5.u25.r_11_0>=1))"
Computing Next relation with stutter on 65 deadlock states
2 unique states visited
2 strongly connected components in search stack
2 transitions explored
2 items max in DFS search stack
2 ticks for the emptiness check
Model ,|S| ,Time ,Mem(kb) ,fin. SDD ,fin. DDD ,peak SDD ,peak DDD ,SDD Hom ,SDD cache peak ,DDD Hom ,DDD cachepeak ,SHom cache
STATS,0,1.31041,45400,1,0,54034,832,1467,140376,305,2879,96996
an accepting run exists (use option '-e' to print it)
Formula 11 is FALSE accepting run found.
FORMULA ResAllocation-PT-R003C015-LTLFireability-11 FALSE TECHNIQUES DECISION_DIAGRAMS TOPOLOGICAL USE_NUPN
Checking formula 12 : !((G((G("(((i5.u30.r_13_1>=1)&&(i5.u29.p_13_2>=1))&&(i5.u27.r_12_1>=1))"))U("(((i1.u10.p_4_1>=1)&&(i1.u10.r_4_2>=1))&&(i1.u10.r_3_2>=1))"))))
Formula 12 simplified : !G(G"(((i5.u30.r_13_1>=1)&&(i5.u29.p_13_2>=1))&&(i5.u27.r_12_1>=1))" U "(((i1.u10.p_4_1>=1)&&(i1.u10.r_4_2>=1))&&(i1.u10.r_3_2>=1))")
Computing Next relation with stutter on 65 deadlock states
3 unique states visited
3 strongly connected components in search stack
3 transitions explored
3 items max in DFS search stack
1 ticks for the emptiness check
Model ,|S| ,Time ,Mem(kb) ,fin. SDD ,fin. DDD ,peak SDD ,peak DDD ,SDD Hom ,SDD cache peak ,DDD Hom ,DDD cachepeak ,SHom cache
STATS,0,1.31631,45884,1,0,54034,832,1512,140376,314,2879,97021
an accepting run exists (use option '-e' to print it)
Formula 12 is FALSE accepting run found.
FORMULA ResAllocation-PT-R003C015-LTLFireability-12 FALSE TECHNIQUES DECISION_DIAGRAMS TOPOLOGICAL USE_NUPN
Checking formula 13 : !(((X(X(F("(((i0.u3.r_1_0>=1)&&(i0.u4.p_1_1>=1))&&(i0.u0.r_0_0>=1))"))))U(G(("(((i5.u30.r_13_1>=1)&&(i5.u29.p_13_2>=1))&&(i5.u27.r_12_1>=1))")U("(i2.u13.p_6_2>=1)")))))
Formula 13 simplified : !(XXF"(((i0.u3.r_1_0>=1)&&(i0.u4.p_1_1>=1))&&(i0.u0.r_0_0>=1))" U G("(((i5.u30.r_13_1>=1)&&(i5.u29.p_13_2>=1))&&(i5.u27.r_12_1>=1))" U "(i2.u13.p_6_2>=1)"))
Computing Next relation with stutter on 65 deadlock states
2 unique states visited
2 strongly connected components in search stack
2 transitions explored
2 items max in DFS search stack
2 ticks for the emptiness check
Model ,|S| ,Time ,Mem(kb) ,fin. SDD ,fin. DDD ,peak SDD ,peak DDD ,SDD Hom ,SDD cache peak ,DDD Hom ,DDD cachepeak ,SHom cache
STATS,0,1.34108,46272,1,0,54689,834,1529,141765,314,2889,98822
an accepting run exists (use option '-e' to print it)
Formula 13 is FALSE accepting run found.
FORMULA ResAllocation-PT-R003C015-LTLFireability-13 FALSE TECHNIQUES DECISION_DIAGRAMS TOPOLOGICAL USE_NUPN
Checking formula 14 : !(("(((i3.u20.r_9_0>=1)&&(i3.u21.p_9_1>=1))&&(i3.u17.r_8_0>=1))"))
Formula 14 simplified : !"(((i3.u20.r_9_0>=1)&&(i3.u21.p_9_1>=1))&&(i3.u17.r_8_0>=1))"
Computing Next relation with stutter on 65 deadlock states
3 unique states visited
3 strongly connected components in search stack
3 transitions explored
3 items max in DFS search stack
0 ticks for the emptiness check
Model ,|S| ,Time ,Mem(kb) ,fin. SDD ,fin. DDD ,peak SDD ,peak DDD ,SDD Hom ,SDD cache peak ,DDD Hom ,DDD cachepeak ,SHom cache
STATS,0,1.34417,46272,1,0,54689,834,1530,141765,314,2889,98825
an accepting run exists (use option '-e' to print it)
Formula 14 is FALSE accepting run found.
FORMULA ResAllocation-PT-R003C015-LTLFireability-14 FALSE TECHNIQUES DECISION_DIAGRAMS TOPOLOGICAL USE_NUPN
Checking formula 15 : !((((G("(((i3.u23.p_10_0>=1)&&(i4.u24.r_10_1>=1))&&(i3.u21.r_9_1>=1))"))U("((i1.u6.r_2_0>=1)&&(i0.u3.r_1_0>=1))"))U((F("(((i5.u25.p_12_0>=1)&&(i5.u27.r_12_1>=1))&&(i4.u24.r_11_1>=1))"))U(F("(i3.u22.p_10_2>=1)")))))
Formula 15 simplified : !((G"(((i3.u23.p_10_0>=1)&&(i4.u24.r_10_1>=1))&&(i3.u21.r_9_1>=1))" U "((i1.u6.r_2_0>=1)&&(i0.u3.r_1_0>=1))") U (F"(((i5.u25.p_12_0>=1)&&(i5.u27.r_12_1>=1))&&(i4.u24.r_11_1>=1))" U F"(i3.u22.p_10_2>=1)"))
Computing Next relation with stutter on 65 deadlock states
2 unique states visited
2 strongly connected components in search stack
2 transitions explored
2 items max in DFS search stack
2 ticks for the emptiness check
Model ,|S| ,Time ,Mem(kb) ,fin. SDD ,fin. DDD ,peak SDD ,peak DDD ,SDD Hom ,SDD cache peak ,DDD Hom ,DDD cachepeak ,SHom cache
STATS,0,1.36719,46504,1,0,55844,834,1545,143770,314,2889,100785
an accepting run exists (use option '-e' to print it)
Formula 15 is FALSE accepting run found.
FORMULA ResAllocation-PT-R003C015-LTLFireability-15 FALSE TECHNIQUES DECISION_DIAGRAMS TOPOLOGICAL USE_NUPN
Running compilation step : CommandLine [args=[gcc, -c, -I/home/mcc/BenchKit//lts_install_dir//include, -I., -std=c99, -fPIC, -O3, model.c], workingDir=/home/mcc/execution]
WARNING : LTS min runner thread was asked to interrupt. Dying gracefully.

BK_STOP 1528325110446

--------------------
content from stderr:

+ export BINDIR=/home/mcc/BenchKit/
+ BINDIR=/home/mcc/BenchKit/
++ pwd
+ export MODEL=/home/mcc/execution
+ MODEL=/home/mcc/execution
+ /home/mcc/BenchKit//runeclipse.sh /home/mcc/execution LTLFireability -its -ltsminpath /home/mcc/BenchKit//lts_install_dir/ -louvain -smt
+ ulimit -s 65536
+ [[ -z '' ]]
+ export LTSMIN_MEM_SIZE=8589934592
+ LTSMIN_MEM_SIZE=8589934592
+ /home/mcc/BenchKit//itstools/its-tools -consoleLog -data /home/mcc/execution/workspace -pnfolder /home/mcc/execution -examination LTLFireability -z3path /home/mcc/BenchKit//z3/bin/z3 -yices2path /home/mcc/BenchKit//yices/bin/yices -its -ltsminpath /home/mcc/BenchKit//lts_install_dir/ -louvain -smt -vmargs -Dosgi.locking=none -Declipse.stateSaveDelayInterval=-1 -Dosgi.configuration.area=/tmp/.eclipse -Xss8m -Xms40m -Xmx8192m -Dfile.encoding=UTF-8 -Dosgi.requiredJavaVersion=1.6
Jun 06, 2018 10:45:06 PM fr.lip6.move.gal.application.Application start
INFO: Running its-tools with arguments : [-pnfolder, /home/mcc/execution, -examination, LTLFireability, -z3path, /home/mcc/BenchKit//z3/bin/z3, -yices2path, /home/mcc/BenchKit//yices/bin/yices, -its, -ltsminpath, /home/mcc/BenchKit//lts_install_dir/, -louvain, -smt]
Jun 06, 2018 10:45:06 PM fr.lip6.move.gal.application.MccTranslator transformPNML
INFO: Parsing pnml file : /home/mcc/execution/model.pnml
Jun 06, 2018 10:45:06 PM fr.lip6.move.gal.nupn.PTNetReader loadFromXML
INFO: Load time of PNML (sax parser for PT used): 186 ms
Jun 06, 2018 10:45:06 PM fr.lip6.move.gal.pnml.togal.PTGALTransformer handlePage
INFO: Transformed 90 places.
Jun 06, 2018 10:45:06 PM fr.lip6.move.gal.pnml.togal.PTGALTransformer handlePage
INFO: Transformed 60 transitions.
Jun 06, 2018 10:45:06 PM fr.lip6.move.serialization.SerializationUtil systemToFile
INFO: Time to serialize gal into /home/mcc/execution/model.pnml.img.gal : 15 ms
Jun 06, 2018 10:45:06 PM fr.lip6.move.gal.application.MccTranslator applyOrder
INFO: Applying decomposition
Jun 06, 2018 10:45:06 PM fr.lip6.move.gal.instantiate.GALRewriter flatten
INFO: Flatten gal took : 75 ms
Jun 06, 2018 10:45:06 PM fr.lip6.move.gal.instantiate.GALRewriter flatten
INFO: Flatten gal took : 31 ms
Begin: Wed Jun 6 22:45:07 2018

Computation of communities with the Newman-Girvan Modularity quality function

level 0:
start computation: Wed Jun 6 22:45:07 2018
network size: 90 nodes, 406 links, 120 weight
quality increased from -0.0119676 to 0.465586
end computation: Wed Jun 6 22:45:07 2018
level 1:
start computation: Wed Jun 6 22:45:07 2018
network size: 32 nodes, 192 links, 120 weight
quality increased from 0.465586 to 0.63581
end computation: Wed Jun 6 22:45:07 2018
level 2:
start computation: Wed Jun 6 22:45:07 2018
network size: 11 nodes, 49 links, 120 weight
quality increased from 0.63581 to 0.655509
end computation: Wed Jun 6 22:45:07 2018
level 3:
start computation: Wed Jun 6 22:45:07 2018
network size: 6 nodes, 18 links, 120 weight
quality increased from 0.655509 to 0.655509
end computation: Wed Jun 6 22:45:07 2018
End: Wed Jun 6 22:45:07 2018
Total duration: 0 sec
0.655509
Jun 06, 2018 10:45:07 PM fr.lip6.move.gal.instantiate.CompositeBuilder decomposeWithOrder
INFO: Decomposing Gal with order
Jun 06, 2018 10:45:07 PM fr.lip6.move.gal.instantiate.GALRewriter flatten
INFO: Flatten gal took : 29 ms
Jun 06, 2018 10:45:07 PM fr.lip6.move.gal.instantiate.CompositeBuilder rewriteArraysToAllowPartition
INFO: Rewriting arrays to variables to allow decomposition.
Jun 06, 2018 10:45:07 PM fr.lip6.move.serialization.SerializationUtil systemToFile
INFO: Time to serialize gal into /home/mcc/execution/LTLFireability.pnml.gal : 11 ms
Jun 06, 2018 10:45:07 PM fr.lip6.move.serialization.SerializationUtil serializePropertiesForITSLTLTools
INFO: Time to serialize properties into /home/mcc/execution/LTLFireability.ltl : 3 ms
Jun 06, 2018 10:45:07 PM fr.lip6.move.gal.semantics.DeterministicNextBuilder getDeterministicNext
INFO: Input system was already deterministic with 60 transitions.
Jun 06, 2018 10:45:07 PM fr.lip6.move.gal.gal2smt.bmc.KInductionSolver computeAndDeclareInvariants
INFO: Computed 45 place invariants in 41 ms
Jun 06, 2018 10:45:08 PM fr.lip6.move.gal.gal2smt.bmc.KInductionSolver init
INFO: Proved 90 variables to be positive in 368 ms
Jun 06, 2018 10:45:08 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver computeAblingMatrix
INFO: Computing symmetric may disable matrix : 60 transitions.
Jun 06, 2018 10:45:08 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of disable matrix completed :0/60 took 0 ms. Total solver calls (SAT/UNSAT): 0(0/0)
Jun 06, 2018 10:45:08 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of Complete disable matrix. took 4 ms. Total solver calls (SAT/UNSAT): 0(0/0)
Jun 06, 2018 10:45:08 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver computeAblingMatrix
INFO: Computing symmetric may enable matrix : 60 transitions.
Jun 06, 2018 10:45:08 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of Complete enable matrix. took 2 ms. Total solver calls (SAT/UNSAT): 0(0/0)
Skipping mayMatrices nes/nds SMT solver raised an error :unknown
java.lang.RuntimeException: SMT solver raised an error :unknown
at fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver.computeAblingForPredicate(NecessaryEnablingsolver.java:766)
at fr.lip6.move.gal.gal2pins.Gal2PinsTransformerNext.printLabels(Gal2PinsTransformerNext.java:502)
at fr.lip6.move.gal.gal2pins.Gal2PinsTransformerNext.printDependencyMatrix(Gal2PinsTransformerNext.java:209)
at fr.lip6.move.gal.gal2pins.Gal2PinsTransformerNext.buildBodyFile(Gal2PinsTransformerNext.java:85)
at fr.lip6.move.gal.gal2pins.Gal2PinsTransformerNext.transform(Gal2PinsTransformerNext.java:830)
at fr.lip6.move.gal.application.LTSminRunner$1.run(LTSminRunner.java:71)
at java.lang.Thread.run(Thread.java:748)
Jun 06, 2018 10:45:09 PM fr.lip6.move.gal.gal2pins.Gal2PinsTransformerNext transform
INFO: Built C files in 1750ms conformant to PINS in folder :/home/mcc/execution

Sequence of Actions to be Executed by the VM

This is useful if one wants to reexecute the tool in the VM from the submitted image disk.

set -x
# this is for BenchKit: configuration of major elements for the test
export BK_INPUT="ResAllocation-PT-R003C015"
export BK_EXAMINATION="LTLFireability"
export BK_TOOL="itstoolsl"
export BK_RESULT_DIR="/tmp/BK_RESULTS/OUTPUTS"
export BK_TIME_CONFINEMENT="3600"
export BK_MEMORY_CONFINEMENT="16384"

# this is specific to your benchmark or test

export BIN_DIR="$HOME/BenchKit/bin"

# remove the execution directoty if it exists (to avoid increse of .vmdk images)
if [ -d execution ] ; then
rm -rf execution
fi

tar xzf /home/mcc/BenchKit/INPUTS/ResAllocation-PT-R003C015.tgz
mv ResAllocation-PT-R003C015 execution
cd execution
pwd
ls -lh

# this is for BenchKit: explicit launching of the test
echo "====================================================================="
echo " Generated by BenchKit 2-3637"
echo " Executing tool itstoolsl"
echo " Input is ResAllocation-PT-R003C015, examination is LTLFireability"
echo " Time confinement is $BK_TIME_CONFINEMENT seconds"
echo " Memory confinement is 16384 MBytes"
echo " Number of cores is 4"
echo " Run identifier is r189-qhx2-152732140900140"
echo "====================================================================="
echo
echo "--------------------"
echo "content from stdout:"
echo
echo "=== Data for post analysis generated by BenchKit (invocation template)"
echo
if [ "LTLFireability" = "UpperBounds" ] ; then
echo "The expected result is a vector of positive values"
echo NUM_VECTOR
elif [ "LTLFireability" != "StateSpace" ] ; then
echo "The expected result is a vector of booleans"
echo BOOL_VECTOR
else
echo "no data necessary for post analysis"
fi
echo
if [ -f "LTLFireability.txt" ] ; then
echo "here is the order used to build the result vector(from text file)"
for x in $(grep Property LTLFireability.txt | cut -d ' ' -f 2 | sort -u) ; do
echo "FORMULA_NAME $x"
done
elif [ -f "LTLFireability.xml" ] ; then # for cunf (txt files deleted;-)
echo echo "here is the order used to build the result vector(from xml file)"
for x in $(grep '' LTLFireability.xml | cut -d '>' -f 2 | cut -d '<' -f 1 | sort -u) ; do
echo "FORMULA_NAME $x"
done
fi
echo
echo "=== Now, execution of the tool begins"
echo
echo -n "BK_START "
date -u +%s%3N
echo
timeout -s 9 $BK_TIME_CONFINEMENT bash -c "/home/mcc/BenchKit/BenchKit_head.sh 2> STDERR ; echo ; echo -n \"BK_STOP \" ; date -u +%s%3N"
if [ $? -eq 137 ] ; then
echo
echo "BK_TIME_CONFINEMENT_REACHED"
fi
echo
echo "--------------------"
echo "content from stderr:"
echo
cat STDERR ;