About the Execution of ITS-Tools.L for Raft-PT-09
Execution Summary | |||||
Max Memory Used (MB) |
Time wait (ms) | CPU Usage (ms) | I/O Wait (ms) | Computed Result | Execution Status |
15758.860 | 21471.00 | 52588.00 | 550.90 | FFFFFFFFFTFTFFFF | normal |
Execution Chart
We display below the execution chart for this examination (boot time has been removed).
Trace from the execution
Waiting for the VM to be ready (probing ssh)
.............................................
/home/mcc/execution
total 368K
-rw-r--r-- 1 mcc users 4.0K May 15 18:54 CTLCardinality.txt
-rw-r--r-- 1 mcc users 24K May 15 18:54 CTLCardinality.xml
-rw-r--r-- 1 mcc users 2.6K May 15 18:54 CTLFireability.txt
-rw-r--r-- 1 mcc users 19K May 15 18:54 CTLFireability.xml
-rw-r--r-- 1 mcc users 4.0K May 15 18:50 GenericPropertiesDefinition.xml
-rw-r--r-- 1 mcc users 5.8K May 15 18:50 GenericPropertiesVerdict.xml
-rw-r--r-- 1 mcc users 2.2K May 26 09:27 LTLCardinality.txt
-rw-r--r-- 1 mcc users 11K May 26 09:27 LTLCardinality.xml
-rw-r--r-- 1 mcc users 1.7K May 26 09:27 LTLFireability.txt
-rw-r--r-- 1 mcc users 8.6K May 26 09:27 LTLFireability.xml
-rw-r--r-- 1 mcc users 3.5K May 15 18:54 ReachabilityCardinality.txt
-rw-r--r-- 1 mcc users 19K May 15 18:54 ReachabilityCardinality.xml
-rw-r--r-- 1 mcc users 101 May 15 18:54 ReachabilityDeadlock.txt
-rw-r--r-- 1 mcc users 339 May 15 18:54 ReachabilityDeadlock.xml
-rw-r--r-- 1 mcc users 2.8K May 15 18:54 ReachabilityFireability.txt
-rw-r--r-- 1 mcc users 18K May 15 18:54 ReachabilityFireability.xml
-rw-r--r-- 1 mcc users 1.5K May 15 18:54 UpperBounds.txt
-rw-r--r-- 1 mcc users 3.5K May 15 18:54 UpperBounds.xml
-rw-r--r-- 1 mcc users 6 May 15 18:50 equiv_col
-rw-r--r-- 1 mcc users 3 May 15 18:50 instance
-rw-r--r-- 1 mcc users 6 May 15 18:50 iscolored
-rw-r--r-- 1 mcc users 196K May 15 18:50 model.pnml
=====================================================================
Generated by BenchKit 2-3637
Executing tool itstoolsl
Input is Raft-PT-09, examination is LTLFireability
Time confinement is 3600 seconds
Memory confinement is 16384 MBytes
Number of cores is 4
Run identifier is r189-qhx2-152732140900084
=====================================================================
--------------------
content from stdout:
=== Data for post analysis generated by BenchKit (invocation template)
The expected result is a vector of booleans
BOOL_VECTOR
here is the order used to build the result vector(from text file)
FORMULA_NAME Raft-PT-09-LTLFireability-00
FORMULA_NAME Raft-PT-09-LTLFireability-01
FORMULA_NAME Raft-PT-09-LTLFireability-02
FORMULA_NAME Raft-PT-09-LTLFireability-03
FORMULA_NAME Raft-PT-09-LTLFireability-04
FORMULA_NAME Raft-PT-09-LTLFireability-05
FORMULA_NAME Raft-PT-09-LTLFireability-06
FORMULA_NAME Raft-PT-09-LTLFireability-07
FORMULA_NAME Raft-PT-09-LTLFireability-08
FORMULA_NAME Raft-PT-09-LTLFireability-09
FORMULA_NAME Raft-PT-09-LTLFireability-10
FORMULA_NAME Raft-PT-09-LTLFireability-11
FORMULA_NAME Raft-PT-09-LTLFireability-12
FORMULA_NAME Raft-PT-09-LTLFireability-13
FORMULA_NAME Raft-PT-09-LTLFireability-14
FORMULA_NAME Raft-PT-09-LTLFireability-15
=== Now, execution of the tool begins
BK_START 1528318477378
Using solver Z3 to compute partial order matrices.
Built C files in :
/home/mcc/execution
Invoking ITS tools like this :CommandLine [args=[/home/mcc/BenchKit/itstools/plugins/fr.lip6.move.gal.itstools.binaries_1.0.0.201805241334/bin/its-ltl-linux64, --gc-threshold, 2000000, -i, /home/mcc/execution/LTLFireability.pnml.gal, -t, CGAL, -LTL, /home/mcc/execution/LTLFireability.ltl, -c, -stutter-deadlock], workingDir=/home/mcc/execution]
its-ltl command run as :
/home/mcc/BenchKit/itstools/plugins/fr.lip6.move.gal.itstools.binaries_1.0.0.201805241334/bin/its-ltl-linux64 --gc-threshold 2000000 -i /home/mcc/execution/LTLFireability.pnml.gal -t CGAL -LTL /home/mcc/execution/LTLFireability.ltl -c -stutter-deadlock
Read 16 LTL properties
Checking formula 0 : !((G("((u79.p395>=1)&&(u46.p226>=1))")))
Formula 0 simplified : !G"((u79.p395>=1)&&(u46.p226>=1))"
built 164 ordering constraints for composite.
Presburger conditions satisfied. Using coverability to approximate state space in K-Induction.
Normalized transition count is 631
// Phase 1: matrix 631 rows 413 cols
invariant :u37:p181 + u37:p182 + u37:p183 + u37:p184 + u37:p185 + u84:p0 = 1
invariant :u32:p156 + u32:p157 + u32:p158 + u32:p159 + u32:p160 + u84:p0 = 1
invariant :u57:p281 + u57:p282 + u57:p283 + u57:p284 + u57:p285 + u84:p0 = 1
invariant :u1:p1 + u1:p2 + u1:p3 + u1:p4 + u1:p5 + u84:p0 = 1
invariant :u18:p86 + u18:p87 + u18:p88 + u18:p89 + u18:p90 + u84:p0 = 1
invariant :u59:p291 + u59:p292 + u59:p293 + u59:p294 + u59:p295 + u84:p0 = 1
invariant :u15:p71 + u15:p72 + u15:p73 + u15:p74 + u15:p75 + u84:p0 = 1
invariant :u10:p46 + u10:p47 + u10:p48 + u10:p49 + u10:p50 + u84:p0 = 1
invariant :u13:p61 + u13:p62 + u13:p63 + u13:p64 + u13:p65 + u84:p0 = 1
invariant :u28:p136 + u28:p137 + u28:p138 + u28:p139 + u28:p140 + u84:p0 = 1
invariant :u48:p236 + u48:p237 + u48:p238 + u48:p239 + u48:p240 + u84:p0 = 1
invariant :u51:p251 + u51:p252 + u51:p253 + u51:p254 + u51:p255 + u84:p0 = 1
invariant :u78:p386 + u78:p387 + u78:p388 + u78:p389 + u78:p390 + u84:p0 = 1
invariant :u44:p216 + u44:p217 + u44:p218 + u44:p219 + u44:p220 + u84:p0 = 1
invariant :u43:p211 + u43:p212 + u43:p213 + u43:p214 + u43:p215 + u84:p0 = 1
invariant :u65:p321 + u65:p322 + u65:p323 + u65:p324 + u65:p325 + u84:p0 = 1
invariant :u31:p151 + u31:p152 + u31:p153 + u31:p154 + u31:p155 + u84:p0 = 1
invariant :u39:p191 + u39:p192 + u39:p193 + u39:p194 + u39:p195 + u84:p0 = 1
invariant :u2:p6 + u2:p7 + u2:p8 + u2:p9 + u2:p10 + u84:p0 = 1
invariant :u7:p31 + u7:p32 + u7:p33 + u7:p34 + u7:p35 + u84:p0 = 1
invariant :u11:p51 + u11:p52 + u11:p53 + u11:p54 + u11:p55 + u84:p0 = 1
invariant :u21:p101 + u21:p102 + u21:p103 + u21:p104 + u21:p105 + u84:p0 = 1
invariant :u16:p76 + u16:p77 + u16:p78 + u16:p79 + u16:p80 + u84:p0 = 1
invariant :u6:p26 + u6:p27 + u6:p28 + u6:p29 + u6:p30 + u84:p0 = 1
invariant :u34:p166 + u34:p167 + u34:p168 + u34:p169 + u34:p170 + u84:p0 = 1
invariant :u73:p361 + u73:p362 + u73:p363 + u73:p364 + u73:p365 + u84:p0 = 1
invariant :u63:p311 + u63:p312 + u63:p313 + u63:p314 + u63:p315 + u84:p0 = 1
invariant :u70:p346 + u70:p347 + u70:p348 + u70:p349 + u70:p350 + u84:p0 = 1
invariant :u58:p286 + u58:p287 + u58:p288 + u58:p289 + u58:p290 + u84:p0 = 1
invariant :u75:p371 + u75:p372 + u75:p373 + u75:p374 + u75:p375 + u84:p0 = 1
invariant :u81:p401 + u81:p402 + u81:p403 + u81:p404 + u81:p405 + u84:p0 = 1
invariant :u55:p271 + u55:p272 + u55:p273 + u55:p274 + u55:p275 + u84:p0 = 1
invariant :u76:p376 + u76:p377 + u76:p378 + u76:p379 + u76:p380 + u84:p0 = 1
invariant :u20:p96 + u20:p97 + u20:p98 + u20:p99 + u20:p100 + u84:p0 = 1
invariant :u50:p246 + u50:p247 + u50:p248 + u50:p249 + u50:p250 + u84:p0 = 1
invariant :u35:p171 + u35:p172 + u35:p173 + u35:p174 + u35:p175 + u84:p0 = 1
invariant :u8:p36 + u8:p37 + u8:p38 + u8:p39 + u8:p40 + u84:p0 = 1
invariant :u52:p256 + u52:p257 + u52:p258 + u52:p259 + u52:p260 + u84:p0 = 1
invariant :u4:p16 + u4:p17 + u4:p18 + u4:p19 + u4:p20 + u84:p0 = 1
invariant :u22:p106 + u22:p107 + u22:p108 + u22:p109 + u22:p110 + u84:p0 = 1
invariant :u71:p351 + u71:p352 + u71:p353 + u71:p354 + u71:p355 + u84:p0 = 1
invariant :u24:p116 + u24:p117 + u24:p118 + u24:p119 + u24:p120 + u84:p0 = 1
invariant :u54:p266 + u54:p267 + u54:p268 + u54:p269 + u54:p270 + u84:p0 = 1
invariant :u67:p331 + u67:p332 + u67:p333 + u67:p334 + u67:p335 + u84:p0 = 1
invariant :u12:p56 + u12:p57 + u12:p58 + u12:p59 + u12:p60 + u84:p0 = 1
invariant :u38:p186 + u38:p187 + u38:p188 + u38:p189 + u38:p190 + u84:p0 = 1
invariant :u42:p206 + u42:p207 + u42:p208 + u42:p209 + u42:p210 + u84:p0 = 1
invariant :u74:p366 + u74:p367 + u74:p368 + u74:p369 + u74:p370 + u84:p0 = 1
invariant :u80:p396 + u80:p397 + u80:p398 + u80:p399 + u80:p400 + u84:p0 = 1
invariant :u68:p336 + u68:p337 + u68:p338 + u68:p339 + u68:p340 + u84:p0 = 1
invariant :u60:p296 + u60:p297 + u60:p298 + u60:p299 + u60:p300 + u84:p0 = 1
invariant :u19:p91 + u19:p92 + u19:p93 + u19:p94 + u19:p95 + u84:p0 = 1
invariant :u45:p221 + u45:p222 + u45:p223 + u45:p224 + u45:p225 + u84:p0 = 1
invariant :u62:p306 + u62:p307 + u62:p308 + u62:p309 + u62:p310 + u84:p0 = 1
invariant :u26:p126 + u26:p127 + u26:p128 + u26:p129 + u26:p130 + u84:p0 = 1
invariant :u77:p381 + u77:p382 + u77:p383 + u77:p384 + u77:p385 + u84:p0 = 1
invariant :u64:p316 + u64:p317 + u64:p318 + u64:p319 + u64:p320 + u84:p0 = 1
invariant :u5:p21 + u5:p22 + u5:p23 + u5:p24 + u5:p25 + u84:p0 = 1
invariant :u3:p11 + u3:p12 + u3:p13 + u3:p14 + u3:p15 + u84:p0 = 1
invariant :u61:p301 + u61:p302 + u61:p303 + u61:p304 + u61:p305 + u84:p0 = 1
invariant :u30:p146 + u30:p147 + u30:p148 + u30:p149 + u30:p150 + u84:p0 = 1
invariant :u56:p276 + u56:p277 + u56:p278 + u56:p279 + u56:p280 + u84:p0 = 1
invariant :u36:p176 + u36:p177 + u36:p178 + u36:p179 + u36:p180 + u84:p0 = 1
invariant :u14:p66 + u14:p67 + u14:p68 + u14:p69 + u14:p70 + u84:p0 = 1
invariant :u79:p391 + u79:p392 + u79:p393 + u79:p394 + u79:p395 + u84:p0 = 1
invariant :u49:p241 + u49:p242 + u49:p243 + u49:p244 + u49:p245 + u84:p0 = 1
invariant :u9:p41 + u9:p42 + u9:p43 + u9:p44 + u9:p45 + u84:p0 = 1
invariant :u27:p131 + u27:p132 + u27:p133 + u27:p134 + u27:p135 + u84:p0 = 1
invariant :u29:p141 + u29:p142 + u29:p143 + u29:p144 + u29:p145 + u84:p0 = 1
invariant :u66:p326 + u66:p327 + u66:p328 + u66:p329 + u66:p330 + u84:p0 = 1
invariant :u40:p196 + u40:p197 + u40:p198 + u40:p199 + u40:p200 + u84:p0 = 1
invariant :u53:p261 + u53:p262 + u53:p263 + u53:p264 + u53:p265 + u84:p0 = 1
invariant :u23:p111 + u23:p112 + u23:p113 + u23:p114 + u23:p115 + u84:p0 = 1
invariant :u41:p201 + u41:p202 + u41:p203 + u41:p204 + u41:p205 + u84:p0 = 1
invariant :u47:p231 + u47:p232 + u47:p233 + u47:p234 + u47:p235 + u84:p0 = 1
invariant :u72:p356 + u72:p357 + u72:p358 + u72:p359 + u72:p360 + u84:p0 = 1
invariant :u69:p341 + u69:p342 + u69:p343 + u69:p344 + u69:p345 + u84:p0 = 1
invariant :u17:p81 + u17:p82 + u17:p83 + u17:p84 + u17:p85 + u84:p0 = 1
invariant :u25:p121 + u25:p122 + u25:p123 + u25:p124 + u25:p125 + u84:p0 = 1
invariant :u46:p226 + u46:p227 + u46:p228 + u46:p229 + u46:p230 + u84:p0 = 1
invariant :u33:p161 + u33:p162 + u33:p163 + u33:p164 + u33:p165 + u84:p0 = 1
Reverse transition relation is NOT exact ! Due to transitions t709, u73.t53, u73.t54, u73.t55, u73.t56, u73.t58, u74.t47, u74.t48, u74.t49, u74.t50, u74.t52, u75.t41, u75.t42, u75.t43, u75.t44, u75.t46, u76.t35, u76.t36, u76.t37, u76.t38, u76.t40, u77.t29, u77.t30, u77.t31, u77.t32, u77.t34, u78.t23, u78.t24, u78.t25, u78.t26, u78.t28, u79.t17, u79.t18, u79.t19, u79.t20, u79.t22, u80.t11, u80.t12, u80.t13, u80.t14, u80.t16, u81.t5, u81.t6, u81.t7, u81.t8, u81.t10, u83.t707, Intersection with reachable at each step enabled. (destroyed/reverse/intersect/total) :38/634/38/710
3 unique states visited
3 strongly connected components in search stack
3 transitions explored
3 items max in DFS search stack
274 ticks for the emptiness check
Model ,|S| ,Time ,Mem(kb) ,fin. SDD ,fin. DDD ,peak SDD ,peak DDD ,SDD Hom ,SDD cache peak ,DDD Hom ,DDD cachepeak ,SHom cache
STATS,0,3.07317,55624,1,0,79899,443,6569,104087,200,1019,256377
an accepting run exists (use option '-e' to print it)
Formula 0 is FALSE accepting run found.
FORMULA Raft-PT-09-LTLFireability-00 FALSE TECHNIQUES DECISION_DIAGRAMS TOPOLOGICAL USE_NUPN
Checking formula 1 : !((F(F(X(X(F("((u73.p365>=1)&&(u1.p5>=1))")))))))
Formula 1 simplified : !FXXF"((u73.p365>=1)&&(u1.p5>=1))"
4 unique states visited
4 strongly connected components in search stack
4 transitions explored
4 items max in DFS search stack
164 ticks for the emptiness check
Model ,|S| ,Time ,Mem(kb) ,fin. SDD ,fin. DDD ,peak SDD ,peak DDD ,SDD Hom ,SDD cache peak ,DDD Hom ,DDD cachepeak ,SHom cache
STATS,0,4.71797,87444,1,0,144681,443,6747,222649,200,1097,406980
an accepting run exists (use option '-e' to print it)
Formula 1 is FALSE accepting run found.
FORMULA Raft-PT-09-LTLFireability-01 FALSE TECHNIQUES DECISION_DIAGRAMS TOPOLOGICAL USE_NUPN
Checking formula 2 : !((G((("((u74.p370>=1)&&(u82.p408>=1))")U("((u81.p405>=1)&&(u66.p330>=1))"))U(F(X("((u80.p400>=1)&&(u61.p305>=1))"))))))
Formula 2 simplified : !G(("((u74.p370>=1)&&(u82.p408>=1))" U "((u81.p405>=1)&&(u66.p330>=1))") U FX"((u80.p400>=1)&&(u61.p305>=1))")
4 unique states visited
4 strongly connected components in search stack
5 transitions explored
4 items max in DFS search stack
35 ticks for the emptiness check
Model ,|S| ,Time ,Mem(kb) ,fin. SDD ,fin. DDD ,peak SDD ,peak DDD ,SDD Hom ,SDD cache peak ,DDD Hom ,DDD cachepeak ,SHom cache
STATS,0,5.09967,94928,1,0,155616,443,6793,247733,200,1115,438172
an accepting run exists (use option '-e' to print it)
Formula 2 is FALSE accepting run found.
FORMULA Raft-PT-09-LTLFireability-02 FALSE TECHNIQUES DECISION_DIAGRAMS TOPOLOGICAL USE_NUPN
Checking formula 3 : !((("((u75.p375>=1)&&(u67.p331>=1))")U(G(F(F("((u78.p390>=1)&&(u47.p235>=1))"))))))
Formula 3 simplified : !("((u75.p375>=1)&&(u67.p331>=1))" U GF"((u78.p390>=1)&&(u47.p235>=1))")
4 unique states visited
4 strongly connected components in search stack
5 transitions explored
4 items max in DFS search stack
6 ticks for the emptiness check
Model ,|S| ,Time ,Mem(kb) ,fin. SDD ,fin. DDD ,peak SDD ,peak DDD ,SDD Hom ,SDD cache peak ,DDD Hom ,DDD cachepeak ,SHom cache
STATS,0,5.15348,96172,1,0,157106,443,6885,250863,200,1119,439894
an accepting run exists (use option '-e' to print it)
Formula 3 is FALSE accepting run found.
FORMULA Raft-PT-09-LTLFireability-03 FALSE TECHNIQUES DECISION_DIAGRAMS TOPOLOGICAL USE_NUPN
Checking formula 4 : !(("((u80.p400>=1)&&(u61.p305>=1))"))
Formula 4 simplified : !"((u80.p400>=1)&&(u61.p305>=1))"
3 unique states visited
3 strongly connected components in search stack
3 transitions explored
3 items max in DFS search stack
0 ticks for the emptiness check
Model ,|S| ,Time ,Mem(kb) ,fin. SDD ,fin. DDD ,peak SDD ,peak DDD ,SDD Hom ,SDD cache peak ,DDD Hom ,DDD cachepeak ,SHom cache
STATS,0,5.15574,96436,1,0,157106,443,6885,250863,200,1119,439899
an accepting run exists (use option '-e' to print it)
Formula 4 is FALSE accepting run found.
FORMULA Raft-PT-09-LTLFireability-04 FALSE TECHNIQUES DECISION_DIAGRAMS TOPOLOGICAL USE_NUPN
Checking formula 5 : !((("((u81.p405>=1)&&(u68.p340>=1))")U((X("((u73.p365>=1)&&(u65.p324>=1))"))U("((u73.p365>=1)&&(u41.p202>=1))"))))
Formula 5 simplified : !("((u81.p405>=1)&&(u68.p340>=1))" U (X"((u73.p365>=1)&&(u65.p324>=1))" U "((u73.p365>=1)&&(u41.p202>=1))"))
4 unique states visited
4 strongly connected components in search stack
4 transitions explored
4 items max in DFS search stack
33 ticks for the emptiness check
Model ,|S| ,Time ,Mem(kb) ,fin. SDD ,fin. DDD ,peak SDD ,peak DDD ,SDD Hom ,SDD cache peak ,DDD Hom ,DDD cachepeak ,SHom cache
STATS,0,5.48304,103752,1,0,169727,443,6939,284926,200,1119,474601
an accepting run exists (use option '-e' to print it)
Formula 5 is FALSE accepting run found.
FORMULA Raft-PT-09-LTLFireability-05 FALSE TECHNIQUES DECISION_DIAGRAMS TOPOLOGICAL USE_NUPN
Checking formula 6 : !((F((X(F("((u74.p370>=1)&&(u13.p65>=1))")))U(X(X("((u77.p385>=1)&&(u12.p57>=1))"))))))
Formula 6 simplified : !F(XF"((u74.p370>=1)&&(u13.p65>=1))" U XX"((u77.p385>=1)&&(u12.p57>=1))")
4 unique states visited
4 strongly connected components in search stack
4 transitions explored
4 items max in DFS search stack
222 ticks for the emptiness check
Model ,|S| ,Time ,Mem(kb) ,fin. SDD ,fin. DDD ,peak SDD ,peak DDD ,SDD Hom ,SDD cache peak ,DDD Hom ,DDD cachepeak ,SHom cache
STATS,0,7.71156,145464,1,0,249444,443,7094,451631,200,1161,666613
an accepting run exists (use option '-e' to print it)
Formula 6 is FALSE accepting run found.
FORMULA Raft-PT-09-LTLFireability-06 FALSE TECHNIQUES DECISION_DIAGRAMS TOPOLOGICAL USE_NUPN
Checking formula 7 : !(("((u81.p405>=1)&&(u66.p330>=1))"))
Formula 7 simplified : !"((u81.p405>=1)&&(u66.p330>=1))"
3 unique states visited
3 strongly connected components in search stack
3 transitions explored
3 items max in DFS search stack
0 ticks for the emptiness check
Model ,|S| ,Time ,Mem(kb) ,fin. SDD ,fin. DDD ,peak SDD ,peak DDD ,SDD Hom ,SDD cache peak ,DDD Hom ,DDD cachepeak ,SHom cache
STATS,0,7.71323,145728,1,0,249444,443,7099,451631,200,1161,666616
an accepting run exists (use option '-e' to print it)
Formula 7 is FALSE accepting run found.
FORMULA Raft-PT-09-LTLFireability-07 FALSE TECHNIQUES DECISION_DIAGRAMS TOPOLOGICAL USE_NUPN
Checking formula 8 : !(("((u74.p370>=1)&&(u10.p50>=1))"))
Formula 8 simplified : !"((u74.p370>=1)&&(u10.p50>=1))"
3 unique states visited
3 strongly connected components in search stack
3 transitions explored
3 items max in DFS search stack
1 ticks for the emptiness check
Model ,|S| ,Time ,Mem(kb) ,fin. SDD ,fin. DDD ,peak SDD ,peak DDD ,SDD Hom ,SDD cache peak ,DDD Hom ,DDD cachepeak ,SHom cache
STATS,0,7.71682,145728,1,0,249444,443,7104,451631,200,1161,666695
an accepting run exists (use option '-e' to print it)
Formula 8 is FALSE accepting run found.
FORMULA Raft-PT-09-LTLFireability-08 FALSE TECHNIQUES DECISION_DIAGRAMS TOPOLOGICAL USE_NUPN
Checking formula 9 : !((F("((u73.p365>=1)&&(u5.p25>=1))")))
Formula 9 simplified : !F"((u73.p365>=1)&&(u5.p25>=1))"
1 unique states visited
0 strongly connected components in search stack
0 transitions explored
1 items max in DFS search stack
5 ticks for the emptiness check
Model ,|S| ,Time ,Mem(kb) ,fin. SDD ,fin. DDD ,peak SDD ,peak DDD ,SDD Hom ,SDD cache peak ,DDD Hom ,DDD cachepeak ,SHom cache
STATS,0,7.76895,146256,1,0,249444,443,7277,451633,200,1161,667095
no accepting run found
Formula 9 is TRUE no accepting run found.
FORMULA Raft-PT-09-LTLFireability-09 TRUE TECHNIQUES DECISION_DIAGRAMS TOPOLOGICAL USE_NUPN
Checking formula 10 : !((F(X(X(F(F("((u76.p380>=1)&&(u19.p91>=1))")))))))
Formula 10 simplified : !FXXF"((u76.p380>=1)&&(u19.p91>=1))"
4 unique states visited
4 strongly connected components in search stack
4 transitions explored
4 items max in DFS search stack
211 ticks for the emptiness check
Model ,|S| ,Time ,Mem(kb) ,fin. SDD ,fin. DDD ,peak SDD ,peak DDD ,SDD Hom ,SDD cache peak ,DDD Hom ,DDD cachepeak ,SHom cache
STATS,0,9.88599,190344,1,0,333619,443,7433,627562,200,1170,872079
an accepting run exists (use option '-e' to print it)
Formula 10 is FALSE accepting run found.
FORMULA Raft-PT-09-LTLFireability-10 FALSE TECHNIQUES DECISION_DIAGRAMS TOPOLOGICAL USE_NUPN
Checking formula 11 : !((X("((u77.p385>=1)&&(u34.p170>=1))")))
Formula 11 simplified : !X"((u77.p385>=1)&&(u34.p170>=1))"
2 unique states visited
0 strongly connected components in search stack
1 transitions explored
2 items max in DFS search stack
0 ticks for the emptiness check
Model ,|S| ,Time ,Mem(kb) ,fin. SDD ,fin. DDD ,peak SDD ,peak DDD ,SDD Hom ,SDD cache peak ,DDD Hom ,DDD cachepeak ,SHom cache
STATS,0,9.88798,190608,1,0,333619,443,7438,627562,200,1170,872143
no accepting run found
Formula 11 is TRUE no accepting run found.
FORMULA Raft-PT-09-LTLFireability-11 TRUE TECHNIQUES DECISION_DIAGRAMS TOPOLOGICAL USE_NUPN
Checking formula 12 : !(((G(G(G("((u75.p375>=1)&&(u51.p254>=1))"))))U(X(X(X("((u76.p380>=1)&&(u25.p125>=1))"))))))
Formula 12 simplified : !(G"((u75.p375>=1)&&(u51.p254>=1))" U XXX"((u76.p380>=1)&&(u25.p125>=1))")
6 unique states visited
6 strongly connected components in search stack
6 transitions explored
6 items max in DFS search stack
44 ticks for the emptiness check
Model ,|S| ,Time ,Mem(kb) ,fin. SDD ,fin. DDD ,peak SDD ,peak DDD ,SDD Hom ,SDD cache peak ,DDD Hom ,DDD cachepeak ,SHom cache
STATS,0,10.3416,201584,1,0,355628,443,7450,666443,200,1181,918990
an accepting run exists (use option '-e' to print it)
Formula 12 is FALSE accepting run found.
FORMULA Raft-PT-09-LTLFireability-12 FALSE TECHNIQUES DECISION_DIAGRAMS TOPOLOGICAL USE_NUPN
Checking formula 13 : !((("(u73.p365>=1)")U(X(G(G("(u73.p364>=1)"))))))
Formula 13 simplified : !("(u73.p365>=1)" U XG"(u73.p364>=1)")
4 unique states visited
4 strongly connected components in search stack
4 transitions explored
4 items max in DFS search stack
2 ticks for the emptiness check
Model ,|S| ,Time ,Mem(kb) ,fin. SDD ,fin. DDD ,peak SDD ,peak DDD ,SDD Hom ,SDD cache peak ,DDD Hom ,DDD cachepeak ,SHom cache
STATS,0,10.3575,202108,1,0,355628,443,7482,666443,204,1181,919340
an accepting run exists (use option '-e' to print it)
Formula 13 is FALSE accepting run found.
FORMULA Raft-PT-09-LTLFireability-13 FALSE TECHNIQUES DECISION_DIAGRAMS TOPOLOGICAL USE_NUPN
Checking formula 14 : !(((X(("((u75.p375>=1)&&(u21.p105>=1))")U("((u73.p365>=1)&&(u3.p15>=1))")))U("((u77.p385>=1)&&(u69.p342>=1))")))
Formula 14 simplified : !(X("((u75.p375>=1)&&(u21.p105>=1))" U "((u73.p365>=1)&&(u3.p15>=1))") U "((u77.p385>=1)&&(u69.p342>=1))")
2 unique states visited
2 strongly connected components in search stack
2 transitions explored
2 items max in DFS search stack
108 ticks for the emptiness check
Model ,|S| ,Time ,Mem(kb) ,fin. SDD ,fin. DDD ,peak SDD ,peak DDD ,SDD Hom ,SDD cache peak ,DDD Hom ,DDD cachepeak ,SHom cache
STATS,0,11.4406,224548,1,0,402729,443,7782,747733,204,1211,1033304
an accepting run exists (use option '-e' to print it)
Formula 14 is FALSE accepting run found.
FORMULA Raft-PT-09-LTLFireability-14 FALSE TECHNIQUES DECISION_DIAGRAMS TOPOLOGICAL USE_NUPN
Checking formula 15 : !((G(X(F("((u74.p370>=1)&&(u13.p65>=1))")))))
Formula 15 simplified : !GXF"((u74.p370>=1)&&(u13.p65>=1))"
4 unique states visited
4 strongly connected components in search stack
5 transitions explored
4 items max in DFS search stack
18 ticks for the emptiness check
Model ,|S| ,Time ,Mem(kb) ,fin. SDD ,fin. DDD ,peak SDD ,peak DDD ,SDD Hom ,SDD cache peak ,DDD Hom ,DDD cachepeak ,SHom cache
STATS,0,11.6273,227716,1,0,408069,443,7983,759444,204,1211,1039940
an accepting run exists (use option '-e' to print it)
Formula 15 is FALSE accepting run found.
FORMULA Raft-PT-09-LTLFireability-15 FALSE TECHNIQUES DECISION_DIAGRAMS TOPOLOGICAL USE_NUPN
Running compilation step : CommandLine [args=[gcc, -c, -I/home/mcc/BenchKit//lts_install_dir//include, -I., -std=c99, -fPIC, -O3, model.c], workingDir=/home/mcc/execution]
WARNING : LTS min runner thread was asked to interrupt. Dying gracefully.
BK_STOP 1528318498849
--------------------
content from stderr:
+ export BINDIR=/home/mcc/BenchKit/
+ BINDIR=/home/mcc/BenchKit/
++ pwd
+ export MODEL=/home/mcc/execution
+ MODEL=/home/mcc/execution
+ /home/mcc/BenchKit//runeclipse.sh /home/mcc/execution LTLFireability -its -ltsminpath /home/mcc/BenchKit//lts_install_dir/ -louvain -smt
+ ulimit -s 65536
+ [[ -z '' ]]
+ export LTSMIN_MEM_SIZE=8589934592
+ LTSMIN_MEM_SIZE=8589934592
+ /home/mcc/BenchKit//itstools/its-tools -consoleLog -data /home/mcc/execution/workspace -pnfolder /home/mcc/execution -examination LTLFireability -z3path /home/mcc/BenchKit//z3/bin/z3 -yices2path /home/mcc/BenchKit//yices/bin/yices -its -ltsminpath /home/mcc/BenchKit//lts_install_dir/ -louvain -smt -vmargs -Dosgi.locking=none -Declipse.stateSaveDelayInterval=-1 -Dosgi.configuration.area=/tmp/.eclipse -Xss8m -Xms40m -Xmx8192m -Dfile.encoding=UTF-8 -Dosgi.requiredJavaVersion=1.6
Jun 06, 2018 8:54:40 PM fr.lip6.move.gal.application.Application start
INFO: Running its-tools with arguments : [-pnfolder, /home/mcc/execution, -examination, LTLFireability, -z3path, /home/mcc/BenchKit//z3/bin/z3, -yices2path, /home/mcc/BenchKit//yices/bin/yices, -its, -ltsminpath, /home/mcc/BenchKit//lts_install_dir/, -louvain, -smt]
Jun 06, 2018 8:54:40 PM fr.lip6.move.gal.application.MccTranslator transformPNML
INFO: Parsing pnml file : /home/mcc/execution/model.pnml
Jun 06, 2018 8:54:40 PM fr.lip6.move.gal.nupn.PTNetReader loadFromXML
INFO: Load time of PNML (sax parser for PT used): 163 ms
Jun 06, 2018 8:54:41 PM fr.lip6.move.gal.pnml.togal.PTGALTransformer handlePage
INFO: Transformed 413 places.
Jun 06, 2018 8:54:41 PM fr.lip6.move.gal.pnml.togal.PTGALTransformer handlePage
INFO: Transformed 710 transitions.
Jun 06, 2018 8:54:41 PM fr.lip6.move.gal.pnml.togal.PnmlToGalTransformer transform
INFO: Found NUPN structural information;
Jun 06, 2018 8:54:41 PM fr.lip6.move.serialization.SerializationUtil systemToFile
INFO: Time to serialize gal into /home/mcc/execution/model.pnml.img.gal : 50 ms
Jun 06, 2018 8:54:41 PM fr.lip6.move.gal.application.MccTranslator applyOrder
INFO: Applying decomposition
Jun 06, 2018 8:54:41 PM fr.lip6.move.gal.instantiate.GALRewriter flatten
INFO: Flatten gal took : 295 ms
Jun 06, 2018 8:54:41 PM fr.lip6.move.gal.instantiate.GALRewriter flatten
INFO: Flatten gal took : 238 ms
Jun 06, 2018 8:54:41 PM fr.lip6.move.gal.instantiate.CompositeBuilder decomposeWithOrder
INFO: Decomposing Gal with order
Jun 06, 2018 8:54:42 PM fr.lip6.move.gal.instantiate.GALRewriter flatten
INFO: Flatten gal took : 114 ms
Jun 06, 2018 8:54:42 PM fr.lip6.move.gal.instantiate.CompositeBuilder rewriteArraysToAllowPartition
INFO: Rewriting arrays to variables to allow decomposition.
Jun 06, 2018 8:54:42 PM fr.lip6.move.gal.instantiate.Instantiator fuseIsomorphicEffects
INFO: Removed a total of 592 redundant transitions.
Jun 06, 2018 8:54:42 PM fr.lip6.move.serialization.SerializationUtil systemToFile
INFO: Time to serialize gal into /home/mcc/execution/LTLFireability.pnml.gal : 20 ms
Jun 06, 2018 8:54:42 PM fr.lip6.move.serialization.SerializationUtil serializePropertiesForITSLTLTools
INFO: Time to serialize properties into /home/mcc/execution/LTLFireability.ltl : 1 ms
Jun 06, 2018 8:54:43 PM fr.lip6.move.gal.semantics.CompositeNextBuilder getNextForLabel
INFO: Semantic construction discarded 38 identical transitions.
Jun 06, 2018 8:54:43 PM fr.lip6.move.gal.semantics.DeterministicNextBuilder getDeterministicNext
INFO: Input system was already deterministic with 672 transitions.
Jun 06, 2018 8:54:44 PM fr.lip6.move.gal.gal2smt.bmc.KInductionSolver computeAndDeclareInvariants
INFO: Computed 81 place invariants in 249 ms
Jun 06, 2018 8:54:45 PM fr.lip6.move.gal.gal2smt.bmc.KInductionSolver init
INFO: Proved 413 variables to be positive in 2009 ms
Jun 06, 2018 8:54:45 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver computeAblingMatrix
INFO: Computing symmetric may disable matrix : 672 transitions.
Jun 06, 2018 8:54:45 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of disable matrix completed :0/672 took 1 ms. Total solver calls (SAT/UNSAT): 0(0/0)
Jun 06, 2018 8:54:46 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of Complete disable matrix. took 97 ms. Total solver calls (SAT/UNSAT): 0(0/0)
Jun 06, 2018 8:54:46 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver computeAblingMatrix
INFO: Computing symmetric may enable matrix : 672 transitions.
Jun 06, 2018 8:54:46 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of Complete enable matrix. took 40 ms. Total solver calls (SAT/UNSAT): 0(0/0)
Jun 06, 2018 8:54:53 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver computeCoEnablingMatrix
INFO: Computing symmetric co enabling matrix : 672 transitions.
Jun 06, 2018 8:54:54 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(0/672) took 1141 ms. Total solver calls (SAT/UNSAT): 666(0/666)
Skipping mayMatrices nes/nds SMT solver raised an exception or timeout.
java.lang.RuntimeException: SMT solver raised an exception or timeout.
at fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver.computeCoEnablingMatrix(NecessaryEnablingsolver.java:480)
at fr.lip6.move.gal.gal2pins.Gal2PinsTransformerNext.printLabels(Gal2PinsTransformerNext.java:530)
at fr.lip6.move.gal.gal2pins.Gal2PinsTransformerNext.printDependencyMatrix(Gal2PinsTransformerNext.java:209)
at fr.lip6.move.gal.gal2pins.Gal2PinsTransformerNext.buildBodyFile(Gal2PinsTransformerNext.java:85)
at fr.lip6.move.gal.gal2pins.Gal2PinsTransformerNext.transform(Gal2PinsTransformerNext.java:830)
at fr.lip6.move.gal.application.LTSminRunner$1.run(LTSminRunner.java:71)
at java.lang.Thread.run(Thread.java:748)
Jun 06, 2018 8:54:57 PM fr.lip6.move.gal.gal2pins.Gal2PinsTransformerNext transform
INFO: Built C files in 14820ms conformant to PINS in folder :/home/mcc/execution
Sequence of Actions to be Executed by the VM
This is useful if one wants to reexecute the tool in the VM from the submitted image disk.
set -x
# this is for BenchKit: configuration of major elements for the test
export BK_INPUT="Raft-PT-09"
export BK_EXAMINATION="LTLFireability"
export BK_TOOL="itstoolsl"
export BK_RESULT_DIR="/tmp/BK_RESULTS/OUTPUTS"
export BK_TIME_CONFINEMENT="3600"
export BK_MEMORY_CONFINEMENT="16384"
# this is specific to your benchmark or test
export BIN_DIR="$HOME/BenchKit/bin"
# remove the execution directoty if it exists (to avoid increse of .vmdk images)
if [ -d execution ] ; then
rm -rf execution
fi
tar xzf /home/mcc/BenchKit/INPUTS/Raft-PT-09.tgz
mv Raft-PT-09 execution
cd execution
pwd
ls -lh
# this is for BenchKit: explicit launching of the test
echo "====================================================================="
echo " Generated by BenchKit 2-3637"
echo " Executing tool itstoolsl"
echo " Input is Raft-PT-09, examination is LTLFireability"
echo " Time confinement is $BK_TIME_CONFINEMENT seconds"
echo " Memory confinement is 16384 MBytes"
echo " Number of cores is 4"
echo " Run identifier is r189-qhx2-152732140900084"
echo "====================================================================="
echo
echo "--------------------"
echo "content from stdout:"
echo
echo "=== Data for post analysis generated by BenchKit (invocation template)"
echo
if [ "LTLFireability" = "UpperBounds" ] ; then
echo "The expected result is a vector of positive values"
echo NUM_VECTOR
elif [ "LTLFireability" != "StateSpace" ] ; then
echo "The expected result is a vector of booleans"
echo BOOL_VECTOR
else
echo "no data necessary for post analysis"
fi
echo
if [ -f "LTLFireability.txt" ] ; then
echo "here is the order used to build the result vector(from text file)"
for x in $(grep Property LTLFireability.txt | cut -d ' ' -f 2 | sort -u) ; do
echo "FORMULA_NAME $x"
done
elif [ -f "LTLFireability.xml" ] ; then # for cunf (txt files deleted;-)
echo echo "here is the order used to build the result vector(from xml file)"
for x in $(grep '
echo "FORMULA_NAME $x"
done
fi
echo
echo "=== Now, execution of the tool begins"
echo
echo -n "BK_START "
date -u +%s%3N
echo
timeout -s 9 $BK_TIME_CONFINEMENT bash -c "/home/mcc/BenchKit/BenchKit_head.sh 2> STDERR ; echo ; echo -n \"BK_STOP \" ; date -u +%s%3N"
if [ $? -eq 137 ] ; then
echo
echo "BK_TIME_CONFINEMENT_REACHED"
fi
echo
echo "--------------------"
echo "content from stderr:"
echo
cat STDERR ;