About the Execution of ITS-Tools.L for ProductionCell-PT-none
Execution Summary | |||||
Max Memory Used (MB) |
Time wait (ms) | CPU Usage (ms) | I/O Wait (ms) | Computed Result | Execution Status |
15755.660 | 268889.00 | 534738.00 | 3243.70 | FFFFTFFFFFFFFFFF | normal |
Execution Chart
We display below the execution chart for this examination (boot time has been removed).
Trace from the execution
Waiting for the VM to be ready (probing ssh)
............................................................................
/home/mcc/execution
total 212K
-rw-r--r-- 1 mcc users 3.6K May 15 18:54 CTLCardinality.txt
-rw-r--r-- 1 mcc users 20K May 15 18:54 CTLCardinality.xml
-rw-r--r-- 1 mcc users 2.8K May 15 18:54 CTLFireability.txt
-rw-r--r-- 1 mcc users 21K May 15 18:54 CTLFireability.xml
-rw-r--r-- 1 mcc users 4.0K May 15 18:50 GenericPropertiesDefinition.xml
-rw-r--r-- 1 mcc users 5.8K May 15 18:50 GenericPropertiesVerdict.xml
-rw-r--r-- 1 mcc users 2.3K May 26 09:27 LTLCardinality.txt
-rw-r--r-- 1 mcc users 9.4K May 26 09:27 LTLCardinality.xml
-rw-r--r-- 1 mcc users 2.0K May 26 09:27 LTLFireability.txt
-rw-r--r-- 1 mcc users 11K May 26 09:27 LTLFireability.xml
-rw-r--r-- 1 mcc users 3.6K May 15 18:54 ReachabilityCardinality.txt
-rw-r--r-- 1 mcc users 18K May 15 18:54 ReachabilityCardinality.xml
-rw-r--r-- 1 mcc users 113 May 15 18:54 ReachabilityDeadlock.txt
-rw-r--r-- 1 mcc users 351 May 15 18:54 ReachabilityDeadlock.xml
-rw-r--r-- 1 mcc users 2.5K May 15 18:54 ReachabilityFireability.txt
-rw-r--r-- 1 mcc users 14K May 15 18:54 ReachabilityFireability.xml
-rw-r--r-- 1 mcc users 1.7K May 15 18:54 UpperBounds.txt
-rw-r--r-- 1 mcc users 3.7K May 15 18:54 UpperBounds.xml
-rw-r--r-- 1 mcc users 6 May 15 18:50 equiv_col
-rw-r--r-- 1 mcc users 5 May 15 18:50 instance
-rw-r--r-- 1 mcc users 6 May 15 18:50 iscolored
-rw-r--r-- 1 mcc users 43K May 15 18:50 model.pnml
=====================================================================
Generated by BenchKit 2-3637
Executing tool itstoolsl
Input is ProductionCell-PT-none, examination is LTLFireability
Time confinement is 3600 seconds
Memory confinement is 16384 MBytes
Number of cores is 4
Run identifier is r189-qhx2-152732140800040
=====================================================================
--------------------
content from stdout:
=== Data for post analysis generated by BenchKit (invocation template)
The expected result is a vector of booleans
BOOL_VECTOR
here is the order used to build the result vector(from text file)
FORMULA_NAME ProductionCell-PT-none-LTLFireability-00
FORMULA_NAME ProductionCell-PT-none-LTLFireability-01
FORMULA_NAME ProductionCell-PT-none-LTLFireability-02
FORMULA_NAME ProductionCell-PT-none-LTLFireability-03
FORMULA_NAME ProductionCell-PT-none-LTLFireability-04
FORMULA_NAME ProductionCell-PT-none-LTLFireability-05
FORMULA_NAME ProductionCell-PT-none-LTLFireability-06
FORMULA_NAME ProductionCell-PT-none-LTLFireability-07
FORMULA_NAME ProductionCell-PT-none-LTLFireability-08
FORMULA_NAME ProductionCell-PT-none-LTLFireability-09
FORMULA_NAME ProductionCell-PT-none-LTLFireability-10
FORMULA_NAME ProductionCell-PT-none-LTLFireability-11
FORMULA_NAME ProductionCell-PT-none-LTLFireability-12
FORMULA_NAME ProductionCell-PT-none-LTLFireability-13
FORMULA_NAME ProductionCell-PT-none-LTLFireability-14
FORMULA_NAME ProductionCell-PT-none-LTLFireability-15
=== Now, execution of the tool begins
BK_START 1528311622519
Using solver Z3 to compute partial order matrices.
Built C files in :
/home/mcc/execution
Invoking ITS tools like this :CommandLine [args=[/home/mcc/BenchKit/itstools/plugins/fr.lip6.move.gal.itstools.binaries_1.0.0.201805241334/bin/its-ltl-linux64, --gc-threshold, 2000000, -i, /home/mcc/execution/LTLFireability.pnml.gal, -t, CGAL, -LTL, /home/mcc/execution/LTLFireability.ltl, -c, -stutter-deadlock], workingDir=/home/mcc/execution]
its-ltl command run as :
/home/mcc/BenchKit/itstools/plugins/fr.lip6.move.gal.itstools.binaries_1.0.0.201805241334/bin/its-ltl-linux64 --gc-threshold 2000000 -i /home/mcc/execution/LTLFireability.pnml.gal -t CGAL -LTL /home/mcc/execution/LTLFireability.ltl -c -stutter-deadlock
Read 16 LTL properties
Checking formula 0 : !(((X(G(G("((u15.p55>=1)&&(u16.p61>=1))"))))U(F(("((u11.p37>=1)&&(u12.p40>=1))")U("(u6.p14>=1)")))))
Formula 0 simplified : !(XG"((u15.p55>=1)&&(u16.p61>=1))" U F("((u11.p37>=1)&&(u12.p40>=1))" U "(u6.p14>=1)"))
built 35 ordering constraints for composite.
built 6 ordering constraints for composite.
built 23 ordering constraints for composite.
Presburger conditions satisfied. Using coverability to approximate state space in K-Induction.
// Phase 1: matrix 134 rows 176 cols
invariant :u18:p72 + u18:p73 + u18:p74 + u18:p93 + u18:p94 + u18:p95 + u18:p96 + u18:p97 + u18:p98 + u18:p99 + u18:p100 + u18:p101 + -1'u26:p141 + -1'u26:p142 + -1'u26:p143 + -1'u26:p144 = 0
invariant :u19:p102 + u19:p105 + -1'u22:p116 + -1'u22:p117 + -1'u22:p118 = 0
invariant :u22:p113 + u22:p114 + u22:p115 + u22:p116 + u22:p117 + u22:p118 + u38:p0 = 1
invariant :u20:p107 + u20:p108 + u20:p109 + u24:p121 + u24:p125 + u24:p126 + u24:p127 + u38:p0 = 1
invariant :u38:p0 + i1:u4:p8 + i1:u4:p9 + i1:u39:p3 + i1:u39:p4 + i1:u39:p5 = 1
invariant :i24:u28:p156 + i24:u28:p157 + -1'i24:u37:p174 + -1'i24:u37:p175 = 0
invariant :u17:p66 + u17:p67 + u38:p0 = 1
invariant :u12:p39 + u12:p40 + u12:p41 + u12:p42 + u12:p43 + u12:p44 + u12:p45 + u38:p0 = 1
invariant :u19:p103 + u19:p104 + u22:p116 + u22:p117 + u22:p118 + u38:p0 = 1
invariant :i24:u29:p158 + i24:u29:p159 + -1'i24:u37:p174 + -1'i24:u37:p175 = 0
invariant :u10:p33 + u10:p34 + u10:p35 + -1'u12:p42 = 0
invariant :i24:u30:p160 + i24:u30:p161 + -1'i24:u37:p174 + -1'i24:u37:p175 = 0
invariant :u21:p111 + u21:p112 + u38:p0 = 1
invariant :i24:u31:p162 + i24:u31:p163 + -1'i24:u37:p174 + -1'i24:u37:p175 = 0
invariant :u18:p81 + u18:p82 + u18:p83 + u18:p99 + u18:p100 + u18:p101 + -1'u26:p131 + -1'u26:p132 + -1'u26:p133 + -1'u26:p134 + -1'u26:p135 + -1'u26:p142 + -1'u26:p143 + -1'u26:p144 = 0
invariant :u38:p0 + i1:u3:p6 + i1:u3:p7 + i1:u39:p3 + i1:u39:p4 + i1:u39:p5 = 1
invariant :i24:u32:p164 + i24:u32:p165 + -1'i24:u37:p174 + -1'i24:u37:p175 = 0
invariant :i24:u36:p172 + i24:u36:p173 + -1'i24:u37:p174 + -1'i24:u37:p175 = 0
invariant :u1:p1 + u1:p2 + u38:p0 = 1
invariant :i24:u35:p170 + i24:u35:p171 + -1'i24:u37:p174 + -1'i24:u37:p175 = 0
invariant :i24:u33:p166 + i24:u33:p167 + -1'i24:u37:p174 + -1'i24:u37:p175 = 0
invariant :u6:p15 + u6:p16 + u6:p17 + u7:p19 + 2'u7:p20 + 3'u7:p21 + 4'u7:p22 + 5'u7:p23 + -1'u12:p42 + -1'u12:p43 + -1'u12:p44 + -1'u12:p45 + u16:p60 + u16:p61 + u16:p62 + u16:p63 + -1'u22:p116 + -1'u22:p117 + -1'u22:p118 + -1'u24:p121 + -1'u24:p125 + -1'u24:p126 + -1'u24:p127 + -1'u26:p137 + -1'u26:p138 + -1'u26:p139 + -1'u26:p140 + -1'u26:p141 + -1'u26:p142 + -1'u26:p143 + -1'u26:p144 + -1'i1:u3:p7 + i1:u4:p9 + -1'i1:u39:p5 = 0
invariant :i24:u34:p168 + i24:u34:p169 + -1'i24:u37:p174 + -1'i24:u37:p175 = 0
invariant :u18:p84 + u18:p85 + u18:p86 + -1'u26:p136 = 0
invariant :u8:p25 + u8:p26 + u12:p42 + u12:p43 + u12:p44 + u12:p45 + u38:p0 = 1
invariant :u18:p69 + u18:p70 + u18:p71 + u18:p90 + u18:p91 + u18:p92 + -1'u26:p138 + -1'u26:p139 + -1'u26:p140 = 0
invariant :u18:p68 + -1'u18:p90 + -1'u18:p91 + -1'u18:p92 + -1'u18:p93 + -1'u18:p94 + -1'u18:p95 + -1'u18:p96 + -1'u18:p97 + -1'u18:p98 + -1'u18:p99 + -1'u18:p100 + -1'u18:p101 + u22:p116 + u22:p117 + u22:p118 + u26:p138 + u26:p139 + u26:p140 + u26:p141 + u26:p142 + u26:p143 + u26:p144 + u38:p0 = 1
invariant :u10:p30 + u10:p31 + u10:p32 + u12:p42 + u12:p43 + u12:p44 + u12:p45 + u38:p0 = 1
invariant :u18:p78 + u18:p79 + u18:p80 + u18:p96 + u18:p97 + u18:p98 + -1'u24:p121 + -1'u24:p125 + -1'u24:p126 + -1'u24:p127 + u26:p131 + u26:p132 + u26:p133 + u26:p134 + u26:p135 + u26:p136 + u26:p142 + u26:p143 + u26:p144 = 0
invariant :u24:p121 + u24:p122 + u24:p123 + u24:p124 + u24:p125 + u24:p126 + u24:p127 + u38:p0 = 1
invariant :u6:p13 + u6:p14 + -1'u16:p63 = 0
invariant :u26:p130 + u26:p131 + u26:p132 + u26:p133 + u26:p134 + u26:p135 + u26:p136 + u26:p137 + u26:p138 + u26:p139 + u26:p140 + u26:p141 + u26:p142 + u26:p143 + u26:p144 + u38:p0 = 1
invariant :u10:p36 + -1'u12:p43 + -1'u12:p44 + -1'u12:p45 = 0
invariant :u16:p59 + u20:p107 + u24:p121 + u24:p125 + u24:p126 + u24:p127 + u38:p0 = 1
invariant :u20:p106 + u20:p110 + -1'u24:p121 + -1'u24:p125 + -1'u24:p126 + -1'u24:p127 = 0
invariant :u9:p28 + u9:p29 + u38:p0 = 1
invariant :u14:p50 + u14:p51 + u14:p52 + -1'u16:p60 + -1'u16:p61 + -1'u16:p62 = 0
invariant :u25:p128 + u25:p129 + u38:p0 = 1
invariant :u15:p55 + u15:p56 + u38:p0 = 1
invariant :u38:p0 + i24:u37:p174 + i24:u37:p175 + i24:u40:p145 + i24:u40:p146 + i24:u40:p147 + i24:u40:p148 + i24:u40:p149 + i24:u40:p150 + i24:u40:p151 + i24:u40:p152 + i24:u40:p153 + i24:u40:p154 + i24:u40:p155 = 1
invariant :u11:p37 + u11:p38 + u38:p0 = 1
invariant :u18:p87 + u18:p88 + u18:p89 + u18:p90 + u18:p91 + u18:p92 + u18:p93 + u18:p94 + u18:p95 + u18:p96 + u18:p97 + u18:p98 + u18:p99 + u18:p100 + u18:p101 + -1'u22:p116 + -1'u22:p117 + -1'u22:p118 + -1'u26:p137 + -1'u26:p138 + -1'u26:p139 + -1'u26:p140 + -1'u26:p141 + -1'u26:p142 + -1'u26:p143 + -1'u26:p144 + -1'u38:p0 = -1
invariant :u6:p12 + u6:p18 + -1'u7:p19 + -2'u7:p20 + -3'u7:p21 + -4'u7:p22 + -5'u7:p23 + u12:p42 + u12:p43 + u12:p44 + u12:p45 + -1'u16:p60 + -1'u16:p61 + -1'u16:p62 + u22:p116 + u22:p117 + u22:p118 + u24:p121 + u24:p125 + u24:p126 + u24:p127 + u26:p137 + u26:p138 + u26:p139 + u26:p140 + u26:p141 + u26:p142 + u26:p143 + u26:p144 + u38:p0 + i1:u3:p7 + -1'i1:u4:p9 + i1:u39:p5 = 1
invariant :u23:p119 + u23:p120 + u38:p0 = 1
invariant :u14:p48 + u14:p49 + u14:p53 + u14:p54 + u16:p60 + u16:p61 + u16:p62 + u16:p63 + -1'u20:p107 + -1'u24:p121 + -1'u24:p125 + -1'u24:p126 + -1'u24:p127 = 0
invariant :u8:p24 + u8:p27 + -1'u12:p42 + -1'u12:p43 + -1'u12:p44 + -1'u12:p45 = 0
invariant :u18:p75 + u18:p76 + u18:p77 + -1'u18:p96 + -1'u18:p97 + -1'u18:p98 + -1'u18:p99 + -1'u18:p100 + -1'u18:p101 + u24:p121 + u24:p125 + u24:p126 + u24:p127 + u26:p137 + u26:p138 + u26:p139 + u26:p140 + u26:p141 + u26:p142 + u26:p143 + u26:p144 + u38:p0 = 1
invariant :u13:p46 + u13:p47 + u38:p0 = 1
invariant :u16:p57 + u16:p58 + u16:p60 + u16:p61 + u16:p62 + u16:p63 + u16:p64 + u16:p65 + -1'u20:p107 + -1'u24:p121 + -1'u24:p125 + -1'u24:p126 + -1'u24:p127 = 0
invariant :u5:p10 + u5:p11 + u38:p0 = 1
Running compilation step : CommandLine [args=[gcc, -c, -I/home/mcc/BenchKit//lts_install_dir//include, -I., -std=c99, -fPIC, -O3, model.c], workingDir=/home/mcc/execution]
Compilation finished in 5442 ms.
Running link step : CommandLine [args=[gcc, -shared, -o, gal.so, model.o], workingDir=/home/mcc/execution]
Link finished in 164 ms.
Running LTSmin : CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=1, --when, --ltl, (X([]([]((LTLAP0==true)))))U(<>(((LTLAP1==true))U((LTLAP2==true)))), --buchi-type=spotba], workingDir=/home/mcc/execution]
LTSmin run took 222 ms.
FORMULA ProductionCell-PT-none-LTLFireability-00 FALSE TECHNIQUES PARTIAL_ORDER EXPLICIT LTSMIN SAT_SMT
Running LTSmin : CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=1, --when, --ltl, (X(<>(<>((LTLAP3==true)))))U([]([]([]((LTLAP4==true))))), --buchi-type=spotba], workingDir=/home/mcc/execution]
Reverse transition relation is NOT exact ! Due to transitions t28, t30, t46, t52, t60, t62, t121, t128, u6.t43, u8.t38, u19.t27, u20.t85, u24.t87, u24.t89, Intersection with reachable at each step enabled. (destroyed/reverse/intersect/total) :7/113/14/134
2 unique states visited
2 strongly connected components in search stack
2 transitions explored
2 items max in DFS search stack
9067 ticks for the emptiness check
Model ,|S| ,Time ,Mem(kb) ,fin. SDD ,fin. DDD ,peak SDD ,peak DDD ,SDD Hom ,SDD cache peak ,DDD Hom ,DDD cachepeak ,SHom cache
STATS,0,90.818,609292,1,0,466685,3943,2045,6.39761e+06,912,11870,273842
an accepting run exists (use option '-e' to print it)
Formula 0 is FALSE accepting run found.
FORMULA ProductionCell-PT-none-LTLFireability-00 FALSE TECHNIQUES DECISION_DIAGRAMS TOPOLOGICAL USE_NUPN
Checking formula 1 : !(((X(F(F("(u25.p128>=1)"))))U(G(G(G("(u18.p83>=1)"))))))
Formula 1 simplified : !(XF"(u25.p128>=1)" U G"(u18.p83>=1)")
2 unique states visited
2 strongly connected components in search stack
2 transitions explored
2 items max in DFS search stack
4586 ticks for the emptiness check
Model ,|S| ,Time ,Mem(kb) ,fin. SDD ,fin. DDD ,peak SDD ,peak DDD ,SDD Hom ,SDD cache peak ,DDD Hom ,DDD cachepeak ,SHom cache
STATS,0,136.68,764612,1,0,741868,4562,2153,7.49856e+06,913,18117,989216
an accepting run exists (use option '-e' to print it)
Formula 1 is FALSE accepting run found.
FORMULA ProductionCell-PT-none-LTLFireability-01 FALSE TECHNIQUES DECISION_DIAGRAMS TOPOLOGICAL USE_NUPN
Checking formula 2 : !(("(u18.p83>=1)"))
Formula 2 simplified : !"(u18.p83>=1)"
3 unique states visited
3 strongly connected components in search stack
3 transitions explored
3 items max in DFS search stack
1 ticks for the emptiness check
Model ,|S| ,Time ,Mem(kb) ,fin. SDD ,fin. DDD ,peak SDD ,peak DDD ,SDD Hom ,SDD cache peak ,DDD Hom ,DDD cachepeak ,SHom cache
STATS,0,136.845,764612,1,0,742200,4583,2155,7.49931e+06,913,18345,989299
an accepting run exists (use option '-e' to print it)
Formula 2 is FALSE accepting run found.
FORMULA ProductionCell-PT-none-LTLFireability-02 FALSE TECHNIQUES DECISION_DIAGRAMS TOPOLOGICAL USE_NUPN
Checking formula 3 : !((("(u20.p109>=1)")U("(u16.p58>=1)")))
Formula 3 simplified : !("(u20.p109>=1)" U "(u16.p58>=1)")
3 unique states visited
3 strongly connected components in search stack
3 transitions explored
3 items max in DFS search stack
0 ticks for the emptiness check
Model ,|S| ,Time ,Mem(kb) ,fin. SDD ,fin. DDD ,peak SDD ,peak DDD ,SDD Hom ,SDD cache peak ,DDD Hom ,DDD cachepeak ,SHom cache
STATS,0,136.848,764856,1,0,742200,4583,2170,7.49931e+06,915,18345,989329
an accepting run exists (use option '-e' to print it)
Formula 3 is FALSE accepting run found.
FORMULA ProductionCell-PT-none-LTLFireability-03 FALSE TECHNIQUES DECISION_DIAGRAMS TOPOLOGICAL USE_NUPN
Checking formula 4 : !(((G(("((i24.u40.p154>=1)&&(u25.p129>=1))")U("(u24.p124>=1)")))U((X("(u20.p106>=1)"))U(F("((u13.p46>=1)&&(u14.p54>=1))")))))
Formula 4 simplified : !(G("((i24.u40.p154>=1)&&(u25.p129>=1))" U "(u24.p124>=1)") U (X"(u20.p106>=1)" U F"((u13.p46>=1)&&(u14.p54>=1))"))
1 unique states visited
0 strongly connected components in search stack
0 transitions explored
1 items max in DFS search stack
3668 ticks for the emptiness check
Model ,|S| ,Time ,Mem(kb) ,fin. SDD ,fin. DDD ,peak SDD ,peak DDD ,SDD Hom ,SDD cache peak ,DDD Hom ,DDD cachepeak ,SHom cache
STATS,0,173.534,887028,1,0,909047,4583,2223,8.4326e+06,915,18380,1158793
no accepting run found
Formula 4 is TRUE no accepting run found.
FORMULA ProductionCell-PT-none-LTLFireability-04 TRUE TECHNIQUES DECISION_DIAGRAMS TOPOLOGICAL USE_NUPN
Checking formula 5 : !((G(F(X(("((u10.p36>=1)&&(u12.p43>=1))")U("((u9.p28>=1)&&(u10.p34>=1))"))))))
Formula 5 simplified : !GFX("((u10.p36>=1)&&(u12.p43>=1))" U "((u9.p28>=1)&&(u10.p34>=1))")
4 unique states visited
4 strongly connected components in search stack
5 transitions explored
4 items max in DFS search stack
17 ticks for the emptiness check
Model ,|S| ,Time ,Mem(kb) ,fin. SDD ,fin. DDD ,peak SDD ,peak DDD ,SDD Hom ,SDD cache peak ,DDD Hom ,DDD cachepeak ,SHom cache
STATS,0,173.845,891508,1,0,919878,4747,2281,8.45416e+06,915,19473,1164263
an accepting run exists (use option '-e' to print it)
Formula 5 is FALSE accepting run found.
FORMULA ProductionCell-PT-none-LTLFireability-05 FALSE TECHNIQUES DECISION_DIAGRAMS TOPOLOGICAL USE_NUPN
Checking formula 6 : !(("((u17.p66>=1)&&(u18.p73>=1))"))
Formula 6 simplified : !"((u17.p66>=1)&&(u18.p73>=1))"
3 unique states visited
3 strongly connected components in search stack
3 transitions explored
3 items max in DFS search stack
1 ticks for the emptiness check
Model ,|S| ,Time ,Mem(kb) ,fin. SDD ,fin. DDD ,peak SDD ,peak DDD ,SDD Hom ,SDD cache peak ,DDD Hom ,DDD cachepeak ,SHom cache
STATS,0,173.853,891772,1,0,919878,4747,2288,8.45416e+06,915,19473,1164278
an accepting run exists (use option '-e' to print it)
Formula 6 is FALSE accepting run found.
FORMULA ProductionCell-PT-none-LTLFireability-06 FALSE TECHNIQUES DECISION_DIAGRAMS TOPOLOGICAL USE_NUPN
Checking formula 7 : !((F(F(X(F(F("((((u24.p122>=1)&&(u18.p87>=1))&&(u20.p107>=1))&&(u26.p137>=1))")))))))
Formula 7 simplified : !FXF"((((u24.p122>=1)&&(u18.p87>=1))&&(u20.p107>=1))&&(u26.p137>=1))"
3 unique states visited
3 strongly connected components in search stack
3 transitions explored
3 items max in DFS search stack
1326 ticks for the emptiness check
Model ,|S| ,Time ,Mem(kb) ,fin. SDD ,fin. DDD ,peak SDD ,peak DDD ,SDD Hom ,SDD cache peak ,DDD Hom ,DDD cachepeak ,SHom cache
STATS,0,187.116,966220,1,0,1.01774e+06,4890,2331,9.13484e+06,915,20438,1262646
an accepting run exists (use option '-e' to print it)
Formula 7 is FALSE accepting run found.
FORMULA ProductionCell-PT-none-LTLFireability-07 FALSE TECHNIQUES DECISION_DIAGRAMS TOPOLOGICAL USE_NUPN
Checking formula 8 : !(((G(X("(u6.p14>=1)")))U((G("((i24.u40.p154>=1)&&(u25.p129>=1))"))U(X("(u18.p83>=1)")))))
Formula 8 simplified : !(GX"(u6.p14>=1)" U (G"((i24.u40.p154>=1)&&(u25.p129>=1))" U X"(u18.p83>=1)"))
4 unique states visited
4 strongly connected components in search stack
4 transitions explored
4 items max in DFS search stack
119 ticks for the emptiness check
Model ,|S| ,Time ,Mem(kb) ,fin. SDD ,fin. DDD ,peak SDD ,peak DDD ,SDD Hom ,SDD cache peak ,DDD Hom ,DDD cachepeak ,SHom cache
STATS,0,188.408,967216,1,0,1.0178e+06,4894,2347,9.1369e+06,915,20444,1263107
an accepting run exists (use option '-e' to print it)
Formula 8 is FALSE accepting run found.
FORMULA ProductionCell-PT-none-LTLFireability-08 FALSE TECHNIQUES DECISION_DIAGRAMS TOPOLOGICAL USE_NUPN
Checking formula 9 : !((G(X(G(("((u9.p29>=1)&&(i24.u30.p160>=1))")U("((u5.p11>=1)&&(i24.u40.p146>=1))"))))))
Formula 9 simplified : !GXG("((u9.p29>=1)&&(i24.u30.p160>=1))" U "((u5.p11>=1)&&(i24.u40.p146>=1))")
4 unique states visited
4 strongly connected components in search stack
4 transitions explored
4 items max in DFS search stack
1 ticks for the emptiness check
Model ,|S| ,Time ,Mem(kb) ,fin. SDD ,fin. DDD ,peak SDD ,peak DDD ,SDD Hom ,SDD cache peak ,DDD Hom ,DDD cachepeak ,SHom cache
STATS,0,188.427,967480,1,0,1.0178e+06,4894,2390,9.1369e+06,915,20444,1263169
an accepting run exists (use option '-e' to print it)
Formula 9 is FALSE accepting run found.
FORMULA ProductionCell-PT-none-LTLFireability-09 FALSE TECHNIQUES DECISION_DIAGRAMS TOPOLOGICAL USE_NUPN
Checking formula 10 : !((G(X("((u18.p69>=1)&&(u26.p138>=1))"))))
Formula 10 simplified : !GX"((u18.p69>=1)&&(u26.p138>=1))"
4 unique states visited
4 strongly connected components in search stack
4 transitions explored
4 items max in DFS search stack
0 ticks for the emptiness check
Model ,|S| ,Time ,Mem(kb) ,fin. SDD ,fin. DDD ,peak SDD ,peak DDD ,SDD Hom ,SDD cache peak ,DDD Hom ,DDD cachepeak ,SHom cache
STATS,0,188.431,967480,1,0,1.0178e+06,4894,2412,9.1369e+06,915,20444,1263183
an accepting run exists (use option '-e' to print it)
Formula 10 is FALSE accepting run found.
FORMULA ProductionCell-PT-none-LTLFireability-10 FALSE TECHNIQUES DECISION_DIAGRAMS TOPOLOGICAL USE_NUPN
Checking formula 11 : !(("((u5.p11>=1)&&(i24.u40.p146>=1))"))
Formula 11 simplified : !"((u5.p11>=1)&&(i24.u40.p146>=1))"
3 unique states visited
3 strongly connected components in search stack
3 transitions explored
3 items max in DFS search stack
0 ticks for the emptiness check
Model ,|S| ,Time ,Mem(kb) ,fin. SDD ,fin. DDD ,peak SDD ,peak DDD ,SDD Hom ,SDD cache peak ,DDD Hom ,DDD cachepeak ,SHom cache
STATS,0,188.432,967480,1,0,1.0178e+06,4894,2412,9.1369e+06,915,20444,1263193
an accepting run exists (use option '-e' to print it)
Formula 11 is FALSE accepting run found.
FORMULA ProductionCell-PT-none-LTLFireability-11 FALSE TECHNIQUES DECISION_DIAGRAMS TOPOLOGICAL USE_NUPN
Checking formula 12 : !(((X(G(G("(u24.p121>=1)"))))U((X("(u6.p17>=1)"))U(X("((u21.p111>=1)&&(u22.p114>=1))")))))
Formula 12 simplified : !(XG"(u24.p121>=1)" U (X"(u6.p17>=1)" U X"((u21.p111>=1)&&(u22.p114>=1))"))
4 unique states visited
4 strongly connected components in search stack
4 transitions explored
4 items max in DFS search stack
0 ticks for the emptiness check
Model ,|S| ,Time ,Mem(kb) ,fin. SDD ,fin. DDD ,peak SDD ,peak DDD ,SDD Hom ,SDD cache peak ,DDD Hom ,DDD cachepeak ,SHom cache
STATS,0,188.436,967480,1,0,1.0178e+06,4894,2450,9.1369e+06,917,20444,1263265
an accepting run exists (use option '-e' to print it)
Formula 12 is FALSE accepting run found.
FORMULA ProductionCell-PT-none-LTLFireability-12 FALSE TECHNIQUES DECISION_DIAGRAMS TOPOLOGICAL USE_NUPN
Checking formula 13 : !((F(G((F("((u6.p12>=1)&&(u7.p20>=1))"))U(G("((u15.p55>=1)&&(u16.p57>=1))"))))))
Formula 13 simplified : !FG(F"((u6.p12>=1)&&(u7.p20>=1))" U G"((u15.p55>=1)&&(u16.p57>=1))")
2 unique states visited
2 strongly connected components in search stack
2 transitions explored
2 items max in DFS search stack
40 ticks for the emptiness check
Model ,|S| ,Time ,Mem(kb) ,fin. SDD ,fin. DDD ,peak SDD ,peak DDD ,SDD Hom ,SDD cache peak ,DDD Hom ,DDD cachepeak ,SHom cache
STATS,0,188.838,977508,1,0,1.04732e+06,5064,2504,9.18846e+06,917,22148,1270784
an accepting run exists (use option '-e' to print it)
Formula 13 is FALSE accepting run found.
FORMULA ProductionCell-PT-none-LTLFireability-13 FALSE TECHNIQUES DECISION_DIAGRAMS TOPOLOGICAL USE_NUPN
Checking formula 14 : !((G(("((u9.p28>=1)&&(u10.p31>=1))")U(("((u17.p66>=1)&&(u18.p94>=1))")U("(((u5.p10>=1)&&(u6.p13>=1))&&(u16.p63>=1))")))))
Formula 14 simplified : !G("((u9.p28>=1)&&(u10.p31>=1))" U ("((u17.p66>=1)&&(u18.p94>=1))" U "(((u5.p10>=1)&&(u6.p13>=1))&&(u16.p63>=1))"))
3 unique states visited
3 strongly connected components in search stack
3 transitions explored
3 items max in DFS search stack
1 ticks for the emptiness check
Model ,|S| ,Time ,Mem(kb) ,fin. SDD ,fin. DDD ,peak SDD ,peak DDD ,SDD Hom ,SDD cache peak ,DDD Hom ,DDD cachepeak ,SHom cache
STATS,0,188.86,978036,1,0,1.04732e+06,5064,2570,9.18846e+06,917,22148,1270887
an accepting run exists (use option '-e' to print it)
Formula 14 is FALSE accepting run found.
FORMULA ProductionCell-PT-none-LTLFireability-14 FALSE TECHNIQUES DECISION_DIAGRAMS TOPOLOGICAL USE_NUPN
Checking formula 15 : !((F(G((G("((u17.p66>=1)&&(u18.p88>=1))"))U(X("(u14.p52>=1)"))))))
Formula 15 simplified : !FG(G"((u17.p66>=1)&&(u18.p88>=1))" U X"(u14.p52>=1)")
3 unique states visited
2 strongly connected components in search stack
4 transitions explored
3 items max in DFS search stack
4178 ticks for the emptiness check
Model ,|S| ,Time ,Mem(kb) ,fin. SDD ,fin. DDD ,peak SDD ,peak DDD ,SDD Hom ,SDD cache peak ,DDD Hom ,DDD cachepeak ,SHom cache
STATS,0,230.651,1153860,1,0,1.23188e+06,5264,2646,1.08256e+07,918,23813,1461756
an accepting run exists (use option '-e' to print it)
Formula 15 is FALSE accepting run found.
FORMULA ProductionCell-PT-none-LTLFireability-15 FALSE TECHNIQUES DECISION_DIAGRAMS TOPOLOGICAL USE_NUPN
WARNING : LTSmin timed out (>225 s) on command CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=1, --when, --ltl, (X(<>(<>((LTLAP3==true)))))U([]([]([]((LTLAP4==true))))), --buchi-type=spotba], workingDir=/home/mcc/execution]
ITS tools runner thread asked to quit. Dying gracefully.
BK_STOP 1528311891408
--------------------
content from stderr:
+ export BINDIR=/home/mcc/BenchKit/
+ BINDIR=/home/mcc/BenchKit/
++ pwd
+ export MODEL=/home/mcc/execution
+ MODEL=/home/mcc/execution
+ /home/mcc/BenchKit//runeclipse.sh /home/mcc/execution LTLFireability -its -ltsminpath /home/mcc/BenchKit//lts_install_dir/ -louvain -smt
+ ulimit -s 65536
+ [[ -z '' ]]
+ export LTSMIN_MEM_SIZE=8589934592
+ LTSMIN_MEM_SIZE=8589934592
+ /home/mcc/BenchKit//itstools/its-tools -consoleLog -data /home/mcc/execution/workspace -pnfolder /home/mcc/execution -examination LTLFireability -z3path /home/mcc/BenchKit//z3/bin/z3 -yices2path /home/mcc/BenchKit//yices/bin/yices -its -ltsminpath /home/mcc/BenchKit//lts_install_dir/ -louvain -smt -vmargs -Dosgi.locking=none -Declipse.stateSaveDelayInterval=-1 -Dosgi.configuration.area=/tmp/.eclipse -Xss8m -Xms40m -Xmx8192m -Dfile.encoding=UTF-8 -Dosgi.requiredJavaVersion=1.6
Jun 06, 2018 7:00:36 PM fr.lip6.move.gal.application.Application start
INFO: Running its-tools with arguments : [-pnfolder, /home/mcc/execution, -examination, LTLFireability, -z3path, /home/mcc/BenchKit//z3/bin/z3, -yices2path, /home/mcc/BenchKit//yices/bin/yices, -its, -ltsminpath, /home/mcc/BenchKit//lts_install_dir/, -louvain, -smt]
Jun 06, 2018 7:00:36 PM fr.lip6.move.gal.application.MccTranslator transformPNML
INFO: Parsing pnml file : /home/mcc/execution/model.pnml
Jun 06, 2018 7:00:36 PM fr.lip6.move.gal.nupn.PTNetReader loadFromXML
INFO: Load time of PNML (sax parser for PT used): 104 ms
Jun 06, 2018 7:00:36 PM fr.lip6.move.gal.pnml.togal.PTGALTransformer handlePage
INFO: Transformed 176 places.
Jun 06, 2018 7:00:36 PM fr.lip6.move.gal.pnml.togal.PTGALTransformer handlePage
INFO: Transformed 134 transitions.
Jun 06, 2018 7:00:36 PM fr.lip6.move.gal.pnml.togal.PnmlToGalTransformer transform
INFO: Found NUPN structural information;
Jun 06, 2018 7:00:36 PM fr.lip6.move.serialization.SerializationUtil systemToFile
INFO: Time to serialize gal into /home/mcc/execution/model.pnml.img.gal : 24 ms
Jun 06, 2018 7:00:36 PM fr.lip6.move.gal.application.MccTranslator applyOrder
INFO: Applying decomposition
Jun 06, 2018 7:00:37 PM fr.lip6.move.gal.instantiate.GALRewriter flatten
INFO: Flatten gal took : 125 ms
Jun 06, 2018 7:00:37 PM fr.lip6.move.gal.instantiate.GALRewriter flatten
INFO: Flatten gal took : 77 ms
Jun 06, 2018 7:00:37 PM fr.lip6.move.gal.instantiate.CompositeBuilder decomposeWithOrder
INFO: Decomposing Gal with order
Jun 06, 2018 7:00:37 PM fr.lip6.move.gal.instantiate.GALRewriter flatten
INFO: Flatten gal took : 48 ms
Jun 06, 2018 7:00:37 PM fr.lip6.move.gal.instantiate.CompositeBuilder rewriteArraysToAllowPartition
INFO: Rewriting arrays to variables to allow decomposition.
Jun 06, 2018 7:00:37 PM fr.lip6.move.gal.instantiate.Instantiator fuseIsomorphicEffects
INFO: Removed a total of 60 redundant transitions.
Jun 06, 2018 7:00:37 PM fr.lip6.move.serialization.SerializationUtil systemToFile
INFO: Time to serialize gal into /home/mcc/execution/LTLFireability.pnml.gal : 24 ms
Jun 06, 2018 7:00:37 PM fr.lip6.move.serialization.SerializationUtil serializePropertiesForITSLTLTools
INFO: Time to serialize properties into /home/mcc/execution/LTLFireability.ltl : 3 ms
Jun 06, 2018 7:00:38 PM fr.lip6.move.gal.semantics.DeterministicNextBuilder getDeterministicNext
INFO: Input system was already deterministic with 134 transitions.
Jun 06, 2018 7:00:38 PM fr.lip6.move.gal.gal2smt.bmc.KInductionSolver computeAndDeclareInvariants
INFO: Computed 50 place invariants in 104 ms
Jun 06, 2018 7:00:39 PM fr.lip6.move.gal.gal2smt.bmc.KInductionSolver init
INFO: Proved 176 variables to be positive in 896 ms
Jun 06, 2018 7:00:39 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver computeAblingMatrix
INFO: Computing symmetric may disable matrix : 134 transitions.
Jun 06, 2018 7:00:39 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of disable matrix completed :0/134 took 1 ms. Total solver calls (SAT/UNSAT): 0(0/0)
Jun 06, 2018 7:00:39 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of Complete disable matrix. took 18 ms. Total solver calls (SAT/UNSAT): 0(0/0)
Jun 06, 2018 7:00:39 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver computeAblingMatrix
INFO: Computing symmetric may enable matrix : 134 transitions.
Jun 06, 2018 7:00:39 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of Complete enable matrix. took 8 ms. Total solver calls (SAT/UNSAT): 0(0/0)
Jun 06, 2018 7:00:43 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver computeCoEnablingMatrix
INFO: Computing symmetric co enabling matrix : 134 transitions.
Jun 06, 2018 7:00:43 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(0/134) took 50 ms. Total solver calls (SAT/UNSAT): 6(0/6)
Jun 06, 2018 7:00:46 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(15/134) took 3051 ms. Total solver calls (SAT/UNSAT): 555(268/287)
Jun 06, 2018 7:00:49 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(40/134) took 6146 ms. Total solver calls (SAT/UNSAT): 1195(783/412)
Jun 06, 2018 7:00:53 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(73/134) took 9345 ms. Total solver calls (SAT/UNSAT): 1605(994/611)
Jun 06, 2018 7:00:56 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(102/134) took 12347 ms. Total solver calls (SAT/UNSAT): 1888(1094/794)
Jun 06, 2018 7:00:58 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of Finished co-enabling matrix. took 14360 ms. Total solver calls (SAT/UNSAT): 1976(1160/816)
Jun 06, 2018 7:00:58 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver computeDoNotAccord
INFO: Computing Do-Not-Accords matrix : 134 transitions.
Jun 06, 2018 7:00:58 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of Completed DNA matrix. took 319 ms. Total solver calls (SAT/UNSAT): 89(0/89)
Jun 06, 2018 7:00:58 PM fr.lip6.move.gal.gal2pins.Gal2PinsTransformerNext transform
INFO: Built C files in 20996ms conformant to PINS in folder :/home/mcc/execution
Sequence of Actions to be Executed by the VM
This is useful if one wants to reexecute the tool in the VM from the submitted image disk.
set -x
# this is for BenchKit: configuration of major elements for the test
export BK_INPUT="ProductionCell-PT-none"
export BK_EXAMINATION="LTLFireability"
export BK_TOOL="itstoolsl"
export BK_RESULT_DIR="/tmp/BK_RESULTS/OUTPUTS"
export BK_TIME_CONFINEMENT="3600"
export BK_MEMORY_CONFINEMENT="16384"
# this is specific to your benchmark or test
export BIN_DIR="$HOME/BenchKit/bin"
# remove the execution directoty if it exists (to avoid increse of .vmdk images)
if [ -d execution ] ; then
rm -rf execution
fi
tar xzf /home/mcc/BenchKit/INPUTS/ProductionCell-PT-none.tgz
mv ProductionCell-PT-none execution
cd execution
pwd
ls -lh
# this is for BenchKit: explicit launching of the test
echo "====================================================================="
echo " Generated by BenchKit 2-3637"
echo " Executing tool itstoolsl"
echo " Input is ProductionCell-PT-none, examination is LTLFireability"
echo " Time confinement is $BK_TIME_CONFINEMENT seconds"
echo " Memory confinement is 16384 MBytes"
echo " Number of cores is 4"
echo " Run identifier is r189-qhx2-152732140800040"
echo "====================================================================="
echo
echo "--------------------"
echo "content from stdout:"
echo
echo "=== Data for post analysis generated by BenchKit (invocation template)"
echo
if [ "LTLFireability" = "UpperBounds" ] ; then
echo "The expected result is a vector of positive values"
echo NUM_VECTOR
elif [ "LTLFireability" != "StateSpace" ] ; then
echo "The expected result is a vector of booleans"
echo BOOL_VECTOR
else
echo "no data necessary for post analysis"
fi
echo
if [ -f "LTLFireability.txt" ] ; then
echo "here is the order used to build the result vector(from text file)"
for x in $(grep Property LTLFireability.txt | cut -d ' ' -f 2 | sort -u) ; do
echo "FORMULA_NAME $x"
done
elif [ -f "LTLFireability.xml" ] ; then # for cunf (txt files deleted;-)
echo echo "here is the order used to build the result vector(from xml file)"
for x in $(grep '
echo "FORMULA_NAME $x"
done
fi
echo
echo "=== Now, execution of the tool begins"
echo
echo -n "BK_START "
date -u +%s%3N
echo
timeout -s 9 $BK_TIME_CONFINEMENT bash -c "/home/mcc/BenchKit/BenchKit_head.sh 2> STDERR ; echo ; echo -n \"BK_STOP \" ; date -u +%s%3N"
if [ $? -eq 137 ] ; then
echo
echo "BK_TIME_CONFINEMENT_REACHED"
fi
echo
echo "--------------------"
echo "content from stderr:"
echo
cat STDERR ;