fond
Model Checking Contest 2018
8th edition, Bratislava, Slovakia, June 26, 2018
Execution of r188-qhx2-152732140300152
Last Updated
June 26, 2018

About the Execution of ITS-Tools for ResAllocation-PT-R015C002

Execution Summary
Max Memory
Used (MB)
Time wait (ms) CPU Usage (ms) I/O Wait (ms) Computed Result Execution
Status
15756.730 12224.00 26129.00 516.40 FFFFFFFFFFFFFFFF normal

Execution Chart

We display below the execution chart for this examination (boot time has been removed).

Trace from the execution

Waiting for the VM to be ready (probing ssh)
........................................................................................
/home/mcc/execution
total 220K
-rw-r--r-- 1 mcc users 3.5K May 15 18:54 CTLCardinality.txt
-rw-r--r-- 1 mcc users 19K May 15 18:54 CTLCardinality.xml
-rw-r--r-- 1 mcc users 2.5K May 15 18:54 CTLFireability.txt
-rw-r--r-- 1 mcc users 15K May 15 18:54 CTLFireability.xml
-rw-r--r-- 1 mcc users 4.0K May 15 18:50 GenericPropertiesDefinition.xml
-rw-r--r-- 1 mcc users 6.3K May 15 18:50 GenericPropertiesVerdict.xml
-rw-r--r-- 1 mcc users 2.5K May 26 09:27 LTLCardinality.txt
-rw-r--r-- 1 mcc users 11K May 26 09:27 LTLCardinality.xml
-rw-r--r-- 1 mcc users 2.0K May 26 09:27 LTLFireability.txt
-rw-r--r-- 1 mcc users 8.0K May 26 09:27 LTLFireability.xml
-rw-r--r-- 1 mcc users 3.4K May 15 18:54 ReachabilityCardinality.txt
-rw-r--r-- 1 mcc users 16K May 15 18:54 ReachabilityCardinality.xml
-rw-r--r-- 1 mcc users 116 May 15 18:54 ReachabilityDeadlock.txt
-rw-r--r-- 1 mcc users 354 May 15 18:54 ReachabilityDeadlock.xml
-rw-r--r-- 1 mcc users 3.1K May 15 18:54 ReachabilityFireability.txt
-rw-r--r-- 1 mcc users 19K May 15 18:54 ReachabilityFireability.xml
-rw-r--r-- 1 mcc users 1.8K May 15 18:54 UpperBounds.txt
-rw-r--r-- 1 mcc users 3.8K May 15 18:54 UpperBounds.xml
-rw-r--r-- 1 mcc users 6 May 15 18:50 equiv_col
-rw-r--r-- 1 mcc users 9 May 15 18:50 instance
-rw-r--r-- 1 mcc users 6 May 15 18:50 iscolored
-rw-r--r-- 1 mcc users 61K May 15 18:50 model.pnml
=====================================================================
Generated by BenchKit 2-3637
Executing tool itstools
Input is ResAllocation-PT-R015C002, examination is LTLFireability
Time confinement is 3600 seconds
Memory confinement is 16384 MBytes
Number of cores is 4
Run identifier is r188-qhx2-152732140300152
=====================================================================


--------------------
content from stdout:

=== Data for post analysis generated by BenchKit (invocation template)

The expected result is a vector of booleans
BOOL_VECTOR

here is the order used to build the result vector(from text file)
FORMULA_NAME ResAllocation-PT-R015C002-LTLFireability-00
FORMULA_NAME ResAllocation-PT-R015C002-LTLFireability-01
FORMULA_NAME ResAllocation-PT-R015C002-LTLFireability-02
FORMULA_NAME ResAllocation-PT-R015C002-LTLFireability-03
FORMULA_NAME ResAllocation-PT-R015C002-LTLFireability-04
FORMULA_NAME ResAllocation-PT-R015C002-LTLFireability-05
FORMULA_NAME ResAllocation-PT-R015C002-LTLFireability-06
FORMULA_NAME ResAllocation-PT-R015C002-LTLFireability-07
FORMULA_NAME ResAllocation-PT-R015C002-LTLFireability-08
FORMULA_NAME ResAllocation-PT-R015C002-LTLFireability-09
FORMULA_NAME ResAllocation-PT-R015C002-LTLFireability-10
FORMULA_NAME ResAllocation-PT-R015C002-LTLFireability-11
FORMULA_NAME ResAllocation-PT-R015C002-LTLFireability-12
FORMULA_NAME ResAllocation-PT-R015C002-LTLFireability-13
FORMULA_NAME ResAllocation-PT-R015C002-LTLFireability-14
FORMULA_NAME ResAllocation-PT-R015C002-LTLFireability-15

=== Now, execution of the tool begins

BK_START 1528295226527

Using solver Z3 to compute partial order matrices.
Built C files in :
/home/mcc/execution
Invoking ITS tools like this :CommandLine [args=[/home/mcc/BenchKit/itstools/plugins/fr.lip6.move.gal.itstools.binaries_1.0.0.201805151631/bin/its-ltl-linux64, --gc-threshold, 2000000, -i, /home/mcc/execution/LTLFireability.pnml.gal, -t, CGAL, -LTL, /home/mcc/execution/LTLFireability.ltl, -c, -stutter-deadlock], workingDir=/home/mcc/execution]

its-ltl command run as :

/home/mcc/BenchKit/itstools/plugins/fr.lip6.move.gal.itstools.binaries_1.0.0.201805151631/bin/its-ltl-linux64 --gc-threshold 2000000 -i /home/mcc/execution/LTLFireability.pnml.gal -t CGAL -LTL /home/mcc/execution/LTLFireability.ltl -c -stutter-deadlock
Read 16 LTL properties
Checking formula 0 : !((X("(r_0_0>=1)")))
Formula 0 simplified : !X"(r_0_0>=1)"
Reverse transition relation is NOT exact ! Due to transitions t_0_15, t_1_0, Intersection with reachable at each step enabled. (destroyed/reverse/intersect/total) :0/30/2/32
Computing Next relation with stutter on 14 deadlock states
4 unique states visited
4 strongly connected components in search stack
4 transitions explored
4 items max in DFS search stack
11 ticks for the emptiness check
Model ,|S| ,Time ,Mem(kb) ,fin. SDD ,fin. DDD ,peak SDD ,peak DDD ,SDD Hom ,SDD cache peak ,DDD Hom ,DDD cachepeak ,SHom cache
STATS,0,0.175275,18632,1,0,81,13855,90,40,1832,11733,89
an accepting run exists (use option '-e' to print it)
Formula 0 is FALSE accepting run found.
FORMULA ResAllocation-PT-R015C002-LTLFireability-00 FALSE TECHNIQUES DECISION_DIAGRAMS TOPOLOGICAL
Checking formula 1 : !(("((p_0_8>=1)&&(r_0_9>=1))"))
Formula 1 simplified : !"((p_0_8>=1)&&(r_0_9>=1))"
Computing Next relation with stutter on 14 deadlock states
3 unique states visited
3 strongly connected components in search stack
3 transitions explored
3 items max in DFS search stack
0 ticks for the emptiness check
Model ,|S| ,Time ,Mem(kb) ,fin. SDD ,fin. DDD ,peak SDD ,peak DDD ,SDD Hom ,SDD cache peak ,DDD Hom ,DDD cachepeak ,SHom cache
STATS,0,0.180595,18940,1,0,81,14275,93,40,1835,12723,93
an accepting run exists (use option '-e' to print it)
Formula 1 is FALSE accepting run found.
FORMULA ResAllocation-PT-R015C002-LTLFireability-01 FALSE TECHNIQUES DECISION_DIAGRAMS TOPOLOGICAL
Checking formula 2 : !(("(((r_1_6>=1)&&(p_1_7>=1))&&(r_0_6>=1))"))
Formula 2 simplified : !"(((r_1_6>=1)&&(p_1_7>=1))&&(r_0_6>=1))"
Computing Next relation with stutter on 14 deadlock states
3 unique states visited
3 strongly connected components in search stack
3 transitions explored
3 items max in DFS search stack
0 ticks for the emptiness check
Model ,|S| ,Time ,Mem(kb) ,fin. SDD ,fin. DDD ,peak SDD ,peak DDD ,SDD Hom ,SDD cache peak ,DDD Hom ,DDD cachepeak ,SHom cache
STATS,0,0.181662,19204,1,0,81,14275,96,40,1840,12724,95
an accepting run exists (use option '-e' to print it)
Formula 2 is FALSE accepting run found.
FORMULA ResAllocation-PT-R015C002-LTLFireability-02 FALSE TECHNIQUES DECISION_DIAGRAMS TOPOLOGICAL
Checking formula 3 : !(((F(("((p_0_5>=1)&&(r_0_6>=1))")U("((p_0_4>=1)&&(r_0_5>=1))")))U(G(F(X("(((r_1_10>=1)&&(p_1_11>=1))&&(r_0_10>=1))"))))))
Formula 3 simplified : !(F("((p_0_5>=1)&&(r_0_6>=1))" U "((p_0_4>=1)&&(r_0_5>=1))") U GFX"(((r_1_10>=1)&&(p_1_11>=1))&&(r_0_10>=1))")
Computing Next relation with stutter on 14 deadlock states
Presburger conditions satisfied. Using coverability to approximate state space in K-Induction.
// Phase 1: matrix 32 rows 60 cols
invariant :p_0_8 + r_0_8 + -1'r_1_8 = 0
invariant :p_1_7 + r_1_7 = 1
invariant :p_0_1 + r_0_1 + -1'r_1_1 = 0
invariant :p_1_3 + r_1_3 = 1
invariant :p_0_13 + r_0_13 + -1'r_1_13 = 0
invariant :p_1_6 + r_1_6 = 1
invariant :p_0_7 + r_0_7 + -1'r_1_7 = 0
invariant :p_1_0 + r_1_0 = 1
invariant :p_1_14 + r_1_14 = 1
invariant :p_1_13 + r_1_13 = 1
invariant :p_1_12 + r_1_12 = 1
invariant :p_1_11 + r_1_11 = 1
invariant :p_0_5 + r_0_5 + -1'r_1_5 = 0
invariant :p_1_2 + r_1_2 = 1
invariant :p_0_12 + r_0_12 + -1'r_1_12 = 0
invariant :p_0_4 + r_0_4 + -1'r_1_4 = 0
invariant :p_1_5 + r_1_5 = 1
invariant :p_1_10 + r_1_10 = 1
invariant :p_0_11 + r_0_11 + -1'r_1_11 = 0
3 unique states visited
invariant :p_1_9 + r_1_9 = 1
invariant :p_0_14 + r_0_14 + -1'r_1_14 = 0
invariant :p_0_2 + r_0_2 + -1'r_1_2 = 0
invariant :p_0_6 + r_0_6 + -1'r_1_6 = 0
invariant :p_0_10 + r_0_10 + -1'r_1_10 = 0
invariant :p_1_4 + r_1_4 = 1
invariant :p_0_9 + r_0_9 + -1'r_1_9 = 0
invariant :p_1_1 + r_1_1 = 1
invariant :p_1_8 + r_1_8 = 1
invariant :p_0_3 + r_0_3 + -1'r_1_3 = 0
invariant :p_0_0 + r_0_0 + -1'r_1_0 = 0
3 strongly connected components in search stack
4 transitions explored
3 items max in DFS search stack
32 ticks for the emptiness check
Model ,|S| ,Time ,Mem(kb) ,fin. SDD ,fin. DDD ,peak SDD ,peak DDD ,SDD Hom ,SDD cache peak ,DDD Hom ,DDD cachepeak ,SHom cache
STATS,0,0.513894,26220,1,0,431,51256,105,283,1845,58168,708
an accepting run exists (use option '-e' to print it)
Formula 3 is FALSE accepting run found.
FORMULA ResAllocation-PT-R015C002-LTLFireability-03 FALSE TECHNIQUES DECISION_DIAGRAMS TOPOLOGICAL
Checking formula 4 : !((F((G(X("((p_0_8>=1)&&(r_0_9>=1))")))U(G("(((r_1_6>=1)&&(p_1_7>=1))&&(r_0_6>=1))")))))
Formula 4 simplified : !F(GX"((p_0_8>=1)&&(r_0_9>=1))" U G"(((r_1_6>=1)&&(p_1_7>=1))&&(r_0_6>=1))")
Computing Next relation with stutter on 14 deadlock states
2 unique states visited
2 strongly connected components in search stack
2 transitions explored
2 items max in DFS search stack
103 ticks for the emptiness check
Model ,|S| ,Time ,Mem(kb) ,fin. SDD ,fin. DDD ,peak SDD ,peak DDD ,SDD Hom ,SDD cache peak ,DDD Hom ,DDD cachepeak ,SHom cache
STATS,0,1.55595,44276,1,0,1107,155832,115,813,1846,219437,1898
an accepting run exists (use option '-e' to print it)
Formula 4 is FALSE accepting run found.
FORMULA ResAllocation-PT-R015C002-LTLFireability-04 FALSE TECHNIQUES DECISION_DIAGRAMS TOPOLOGICAL
Checking formula 5 : !((F((F(G("((p_0_9>=1)&&(r_0_10>=1))")))U(G(F("((r_1_14>=1)&&(r_0_14>=1))"))))))
Formula 5 simplified : !F(FG"((p_0_9>=1)&&(r_0_10>=1))" U GF"((r_1_14>=1)&&(r_0_14>=1))")
Computing Next relation with stutter on 14 deadlock states
3 unique states visited
3 strongly connected components in search stack
4 transitions explored
3 items max in DFS search stack
23 ticks for the emptiness check
Model ,|S| ,Time ,Mem(kb) ,fin. SDD ,fin. DDD ,peak SDD ,peak DDD ,SDD Hom ,SDD cache peak ,DDD Hom ,DDD cachepeak ,SHom cache
STATS,0,1.79074,48224,1,0,1722,178830,124,1234,1849,248770,2959
an accepting run exists (use option '-e' to print it)
Formula 5 is FALSE accepting run found.
FORMULA ResAllocation-PT-R015C002-LTLFireability-05 FALSE TECHNIQUES DECISION_DIAGRAMS TOPOLOGICAL
Checking formula 6 : !((G((F(X("((p_0_11>=1)&&(r_0_12>=1))")))U(("(r_0_0>=1)")U("((p_0_9>=1)&&(r_0_10>=1))")))))
Formula 6 simplified : !G(FX"((p_0_11>=1)&&(r_0_12>=1))" U ("(r_0_0>=1)" U "((p_0_9>=1)&&(r_0_10>=1))"))
Computing Next relation with stutter on 14 deadlock states
76 unique states visited
76 strongly connected components in search stack
77 transitions explored
76 items max in DFS search stack
50 ticks for the emptiness check
Model ,|S| ,Time ,Mem(kb) ,fin. SDD ,fin. DDD ,peak SDD ,peak DDD ,SDD Hom ,SDD cache peak ,DDD Hom ,DDD cachepeak ,SHom cache
STATS,0,2.29719,56260,1,0,2060,224270,132,1609,1853,315382,3790
an accepting run exists (use option '-e' to print it)
Formula 6 is FALSE accepting run found.
FORMULA ResAllocation-PT-R015C002-LTLFireability-06 FALSE TECHNIQUES DECISION_DIAGRAMS TOPOLOGICAL
Checking formula 7 : !(("((p_0_4>=1)&&(r_0_5>=1))"))
Formula 7 simplified : !"((p_0_4>=1)&&(r_0_5>=1))"
Computing Next relation with stutter on 14 deadlock states
3 unique states visited
3 strongly connected components in search stack
3 transitions explored
3 items max in DFS search stack
0 ticks for the emptiness check
Model ,|S| ,Time ,Mem(kb) ,fin. SDD ,fin. DDD ,peak SDD ,peak DDD ,SDD Hom ,SDD cache peak ,DDD Hom ,DDD cachepeak ,SHom cache
STATS,0,2.29859,56524,1,0,2060,224270,135,1609,1856,315382,3792
an accepting run exists (use option '-e' to print it)
Formula 7 is FALSE accepting run found.
FORMULA ResAllocation-PT-R015C002-LTLFireability-07 FALSE TECHNIQUES DECISION_DIAGRAMS TOPOLOGICAL
Checking formula 8 : !((F(X("((p_0_6>=1)&&(r_0_7>=1))"))))
Formula 8 simplified : !FX"((p_0_6>=1)&&(r_0_7>=1))"
Computing Next relation with stutter on 14 deadlock states
3 unique states visited
3 strongly connected components in search stack
3 transitions explored
3 items max in DFS search stack
27 ticks for the emptiness check
Model ,|S| ,Time ,Mem(kb) ,fin. SDD ,fin. DDD ,peak SDD ,peak DDD ,SDD Hom ,SDD cache peak ,DDD Hom ,DDD cachepeak ,SHom cache
STATS,0,2.57214,61804,1,0,2308,254908,144,1904,1859,362847,4397
an accepting run exists (use option '-e' to print it)
Formula 8 is FALSE accepting run found.
FORMULA ResAllocation-PT-R015C002-LTLFireability-08 FALSE TECHNIQUES DECISION_DIAGRAMS TOPOLOGICAL
Checking formula 9 : !(("(((r_1_12>=1)&&(p_1_13>=1))&&(r_0_12>=1))"))
Formula 9 simplified : !"(((r_1_12>=1)&&(p_1_13>=1))&&(r_0_12>=1))"
Computing Next relation with stutter on 14 deadlock states
3 unique states visited
3 strongly connected components in search stack
3 transitions explored
3 items max in DFS search stack
0 ticks for the emptiness check
Model ,|S| ,Time ,Mem(kb) ,fin. SDD ,fin. DDD ,peak SDD ,peak DDD ,SDD Hom ,SDD cache peak ,DDD Hom ,DDD cachepeak ,SHom cache
STATS,0,2.57367,61804,1,0,2308,254908,147,1904,1864,362848,4399
an accepting run exists (use option '-e' to print it)
Formula 9 is FALSE accepting run found.
FORMULA ResAllocation-PT-R015C002-LTLFireability-09 FALSE TECHNIQUES DECISION_DIAGRAMS TOPOLOGICAL
Checking formula 10 : !(("((p_0_12>=1)&&(r_0_13>=1))"))
Formula 10 simplified : !"((p_0_12>=1)&&(r_0_13>=1))"
Computing Next relation with stutter on 14 deadlock states
3 unique states visited
3 strongly connected components in search stack
3 transitions explored
3 items max in DFS search stack
0 ticks for the emptiness check
Model ,|S| ,Time ,Mem(kb) ,fin. SDD ,fin. DDD ,peak SDD ,peak DDD ,SDD Hom ,SDD cache peak ,DDD Hom ,DDD cachepeak ,SHom cache
STATS,0,2.5747,62068,1,0,2308,254908,150,1904,1867,362848,4401
an accepting run exists (use option '-e' to print it)
Formula 10 is FALSE accepting run found.
FORMULA ResAllocation-PT-R015C002-LTLFireability-10 FALSE TECHNIQUES DECISION_DIAGRAMS TOPOLOGICAL
Checking formula 11 : !((("((p_0_8>=1)&&(r_0_9>=1))")U(("((p_0_7>=1)&&(r_0_8>=1))")U("((p_0_13>=1)&&(r_0_14>=1))"))))
Formula 11 simplified : !("((p_0_8>=1)&&(r_0_9>=1))" U ("((p_0_7>=1)&&(r_0_8>=1))" U "((p_0_13>=1)&&(r_0_14>=1))"))
Computing Next relation with stutter on 14 deadlock states
3 unique states visited
3 strongly connected components in search stack
3 transitions explored
3 items max in DFS search stack
0 ticks for the emptiness check
Model ,|S| ,Time ,Mem(kb) ,fin. SDD ,fin. DDD ,peak SDD ,peak DDD ,SDD Hom ,SDD cache peak ,DDD Hom ,DDD cachepeak ,SHom cache
STATS,0,2.57721,62068,1,0,2308,254908,167,1904,1884,362848,4407
an accepting run exists (use option '-e' to print it)
Formula 11 is FALSE accepting run found.
FORMULA ResAllocation-PT-R015C002-LTLFireability-11 FALSE TECHNIQUES DECISION_DIAGRAMS TOPOLOGICAL
Checking formula 12 : !((G(X(G(X("((p_0_11>=1)&&(r_0_12>=1))"))))))
Formula 12 simplified : !GXGX"((p_0_11>=1)&&(r_0_12>=1))"
Computing Next relation with stutter on 14 deadlock states
5 unique states visited
5 strongly connected components in search stack
5 transitions explored
5 items max in DFS search stack
1 ticks for the emptiness check
Model ,|S| ,Time ,Mem(kb) ,fin. SDD ,fin. DDD ,peak SDD ,peak DDD ,SDD Hom ,SDD cache peak ,DDD Hom ,DDD cachepeak ,SHom cache
STATS,0,2.5823,62248,1,0,2309,255071,173,1905,1886,363112,4417
an accepting run exists (use option '-e' to print it)
Formula 12 is FALSE accepting run found.
FORMULA ResAllocation-PT-R015C002-LTLFireability-12 FALSE TECHNIQUES DECISION_DIAGRAMS TOPOLOGICAL
Checking formula 13 : !(("((p_0_10>=1)&&(r_0_11>=1))"))
Formula 13 simplified : !"((p_0_10>=1)&&(r_0_11>=1))"
Computing Next relation with stutter on 14 deadlock states
3 unique states visited
3 strongly connected components in search stack
3 transitions explored
3 items max in DFS search stack
0 ticks for the emptiness check
Model ,|S| ,Time ,Mem(kb) ,fin. SDD ,fin. DDD ,peak SDD ,peak DDD ,SDD Hom ,SDD cache peak ,DDD Hom ,DDD cachepeak ,SHom cache
STATS,0,2.58292,62248,1,0,2309,255071,176,1905,1889,363112,4419
an accepting run exists (use option '-e' to print it)
Formula 13 is FALSE accepting run found.
FORMULA ResAllocation-PT-R015C002-LTLFireability-13 FALSE TECHNIQUES DECISION_DIAGRAMS TOPOLOGICAL
Checking formula 14 : !(((G(F("((p_0_12>=1)&&(r_0_13>=1))")))U("((p_0_5>=1)&&(r_0_6>=1))")))
Formula 14 simplified : !(GF"((p_0_12>=1)&&(r_0_13>=1))" U "((p_0_5>=1)&&(r_0_6>=1))")
Computing Next relation with stutter on 14 deadlock states
2 unique states visited
2 strongly connected components in search stack
2 transitions explored
2 items max in DFS search stack
35 ticks for the emptiness check
Model ,|S| ,Time ,Mem(kb) ,fin. SDD ,fin. DDD ,peak SDD ,peak DDD ,SDD Hom ,SDD cache peak ,DDD Hom ,DDD cachepeak ,SHom cache
STATS,0,2.92516,67340,1,0,2550,283624,184,2188,1893,408966,5012
an accepting run exists (use option '-e' to print it)
Formula 14 is FALSE accepting run found.
FORMULA ResAllocation-PT-R015C002-LTLFireability-14 FALSE TECHNIQUES DECISION_DIAGRAMS TOPOLOGICAL
Checking formula 15 : !(("(((r_1_12>=1)&&(p_1_13>=1))&&(r_0_12>=1))"))
Formula 15 simplified : !"(((r_1_12>=1)&&(p_1_13>=1))&&(r_0_12>=1))"
Computing Next relation with stutter on 14 deadlock states
3 unique states visited
3 strongly connected components in search stack
3 transitions explored
3 items max in DFS search stack
0 ticks for the emptiness check
Model ,|S| ,Time ,Mem(kb) ,fin. SDD ,fin. DDD ,peak SDD ,peak DDD ,SDD Hom ,SDD cache peak ,DDD Hom ,DDD cachepeak ,SHom cache
STATS,0,2.92801,67340,1,0,2550,283624,184,2188,1893,408966,5012
an accepting run exists (use option '-e' to print it)
Formula 15 is FALSE accepting run found.
FORMULA ResAllocation-PT-R015C002-LTLFireability-15 FALSE TECHNIQUES DECISION_DIAGRAMS TOPOLOGICAL
ITS tools runner thread asked to quit. Dying gracefully.
Running compilation step : CommandLine [args=[gcc, -c, -I/home/mcc/BenchKit//lts_install_dir//include, -I., -std=c99, -fPIC, -O3, model.c], workingDir=/home/mcc/execution]
WARNING : LTS min runner thread was asked to interrupt. Dying gracefully.

BK_STOP 1528295238751

--------------------
content from stderr:

+ export BINDIR=/home/mcc/BenchKit/
+ BINDIR=/home/mcc/BenchKit/
++ pwd
+ export MODEL=/home/mcc/execution
+ MODEL=/home/mcc/execution
+ /home/mcc/BenchKit//runeclipse.sh /home/mcc/execution LTLFireability -its -ltsminpath /home/mcc/BenchKit//lts_install_dir/ -smt
+ ulimit -s 65536
+ [[ -z '' ]]
+ export LTSMIN_MEM_SIZE=8589934592
+ LTSMIN_MEM_SIZE=8589934592
+ /home/mcc/BenchKit//itstools/its-tools -consoleLog -data /home/mcc/execution/workspace -pnfolder /home/mcc/execution -examination LTLFireability -z3path /home/mcc/BenchKit//z3/bin/z3 -yices2path /home/mcc/BenchKit//yices/bin/yices -its -ltsminpath /home/mcc/BenchKit//lts_install_dir/ -smt -vmargs -Dosgi.locking=none -Declipse.stateSaveDelayInterval=-1 -Dosgi.configuration.area=/tmp/.eclipse -Xss8m -Xms40m -Xmx8192m -Dfile.encoding=UTF-8 -Dosgi.requiredJavaVersion=1.6
Jun 06, 2018 2:27:12 PM fr.lip6.move.gal.application.Application start
INFO: Running its-tools with arguments : [-pnfolder, /home/mcc/execution, -examination, LTLFireability, -z3path, /home/mcc/BenchKit//z3/bin/z3, -yices2path, /home/mcc/BenchKit//yices/bin/yices, -its, -ltsminpath, /home/mcc/BenchKit//lts_install_dir/, -smt]
Jun 06, 2018 2:27:12 PM fr.lip6.move.gal.application.MccTranslator transformPNML
INFO: Parsing pnml file : /home/mcc/execution/model.pnml
Jun 06, 2018 2:27:12 PM fr.lip6.move.gal.nupn.PTNetReader loadFromXML
INFO: Load time of PNML (sax parser for PT used): 69 ms
Jun 06, 2018 2:27:12 PM fr.lip6.move.gal.pnml.togal.PTGALTransformer handlePage
INFO: Transformed 60 places.
Jun 06, 2018 2:27:12 PM fr.lip6.move.gal.pnml.togal.PTGALTransformer handlePage
INFO: Transformed 32 transitions.
Jun 06, 2018 2:27:12 PM fr.lip6.move.serialization.SerializationUtil systemToFile
INFO: Time to serialize gal into /home/mcc/execution/model.pnml.img.gal : 16 ms
Jun 06, 2018 2:27:13 PM fr.lip6.move.gal.instantiate.GALRewriter flatten
INFO: Flatten gal took : 61 ms
Jun 06, 2018 2:27:13 PM fr.lip6.move.serialization.SerializationUtil systemToFile
INFO: Time to serialize gal into /home/mcc/execution/LTLFireability.pnml.gal : 4 ms
Jun 06, 2018 2:27:13 PM fr.lip6.move.serialization.SerializationUtil serializePropertiesForITSLTLTools
INFO: Time to serialize properties into /home/mcc/execution/LTLFireability.ltl : 2 ms
Jun 06, 2018 2:27:13 PM fr.lip6.move.gal.semantics.DeterministicNextBuilder getDeterministicNext
INFO: Input system was already deterministic with 32 transitions.
Jun 06, 2018 2:27:14 PM fr.lip6.move.gal.gal2smt.bmc.KInductionSolver computeAndDeclareInvariants
INFO: Computed 30 place invariants in 25 ms
Jun 06, 2018 2:27:14 PM fr.lip6.move.gal.gal2smt.bmc.KInductionSolver init
INFO: Proved 60 variables to be positive in 229 ms
Jun 06, 2018 2:27:14 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver computeAblingMatrix
INFO: Computing symmetric may disable matrix : 32 transitions.
Jun 06, 2018 2:27:14 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of disable matrix completed :0/32 took 0 ms. Total solver calls (SAT/UNSAT): 0(0/0)
Jun 06, 2018 2:27:14 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of Complete disable matrix. took 2 ms. Total solver calls (SAT/UNSAT): 0(0/0)
Jun 06, 2018 2:27:14 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver computeAblingMatrix
INFO: Computing symmetric may enable matrix : 32 transitions.
Jun 06, 2018 2:27:14 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of Complete enable matrix. took 1 ms. Total solver calls (SAT/UNSAT): 0(0/0)
Jun 06, 2018 2:27:16 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver computeCoEnablingMatrix
INFO: Computing symmetric co enabling matrix : 32 transitions.
Jun 06, 2018 2:27:17 PM org.smtlib.impl.Script execute
WARNING: Script execution failed on command (declare-fun s0 () (Array Int Int)) with error
Jun 06, 2018 2:27:17 PM org.smtlib.impl.Script execute
WARNING: Script execution failed on command (assert (= (+ (select s0 35) 0) (+ (select s0 4) (select s0 5)))) with error (error "Failed to assert expression: java.io.IOException: Stream closed (= (+ (select s0 35) 0) (+ (select s0 4) (select s0 5)))")
[(declare-fun s0 () (Array Int Int)), (assert (= (+ (select s0 35) 0) (+ (select s0 4) (select s0 5)))), (assert (= (+ (select s0 37) 0) (+ (select s0 6) (select s0 7)))), (assert (and (>= (select s0 4) 1) (>= (select s0 7) 1))), (assert (>= (select s0 4) 0)), (assert (>= (select s0 5) 0)), (assert (>= (select s0 6) 0)), (assert (>= (select s0 7) 0)), (assert (>= (select s0 35) 0)), (assert (>= (select s0 37) 0))]
Skipping mayMatrices nes/nds SMT solver raised an exception or timeout when executing script :
org.smtlib.impl.Script@5ca7cf6d
java.lang.RuntimeException: SMT solver raised an exception or timeout when executing script :
org.smtlib.impl.Script@5ca7cf6d
at fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver.computeCoEnablingMatrix(NecessaryEnablingsolver.java:448)
at fr.lip6.move.gal.gal2pins.Gal2PinsTransformerNext.printLabels(Gal2PinsTransformerNext.java:530)
at fr.lip6.move.gal.gal2pins.Gal2PinsTransformerNext.printDependencyMatrix(Gal2PinsTransformerNext.java:209)
at fr.lip6.move.gal.gal2pins.Gal2PinsTransformerNext.buildBodyFile(Gal2PinsTransformerNext.java:85)
at fr.lip6.move.gal.gal2pins.Gal2PinsTransformerNext.transform(Gal2PinsTransformerNext.java:830)
at fr.lip6.move.gal.application.LTSminRunner$1.run(LTSminRunner.java:71)
at java.lang.Thread.run(Thread.java:748)
Jun 06, 2018 2:27:17 PM fr.lip6.move.gal.gal2pins.Gal2PinsTransformerNext transform
INFO: Built C files in 3792ms conformant to PINS in folder :/home/mcc/execution

Sequence of Actions to be Executed by the VM

This is useful if one wants to reexecute the tool in the VM from the submitted image disk.

set -x
# this is for BenchKit: configuration of major elements for the test
export BK_INPUT="ResAllocation-PT-R015C002"
export BK_EXAMINATION="LTLFireability"
export BK_TOOL="itstools"
export BK_RESULT_DIR="/tmp/BK_RESULTS/OUTPUTS"
export BK_TIME_CONFINEMENT="3600"
export BK_MEMORY_CONFINEMENT="16384"

# this is specific to your benchmark or test

export BIN_DIR="$HOME/BenchKit/bin"

# remove the execution directoty if it exists (to avoid increse of .vmdk images)
if [ -d execution ] ; then
rm -rf execution
fi

tar xzf /home/mcc/BenchKit/INPUTS/ResAllocation-PT-R015C002.tgz
mv ResAllocation-PT-R015C002 execution
cd execution
pwd
ls -lh

# this is for BenchKit: explicit launching of the test
echo "====================================================================="
echo " Generated by BenchKit 2-3637"
echo " Executing tool itstools"
echo " Input is ResAllocation-PT-R015C002, examination is LTLFireability"
echo " Time confinement is $BK_TIME_CONFINEMENT seconds"
echo " Memory confinement is 16384 MBytes"
echo " Number of cores is 4"
echo " Run identifier is r188-qhx2-152732140300152"
echo "====================================================================="
echo
echo "--------------------"
echo "content from stdout:"
echo
echo "=== Data for post analysis generated by BenchKit (invocation template)"
echo
if [ "LTLFireability" = "UpperBounds" ] ; then
echo "The expected result is a vector of positive values"
echo NUM_VECTOR
elif [ "LTLFireability" != "StateSpace" ] ; then
echo "The expected result is a vector of booleans"
echo BOOL_VECTOR
else
echo "no data necessary for post analysis"
fi
echo
if [ -f "LTLFireability.txt" ] ; then
echo "here is the order used to build the result vector(from text file)"
for x in $(grep Property LTLFireability.txt | cut -d ' ' -f 2 | sort -u) ; do
echo "FORMULA_NAME $x"
done
elif [ -f "LTLFireability.xml" ] ; then # for cunf (txt files deleted;-)
echo echo "here is the order used to build the result vector(from xml file)"
for x in $(grep '' LTLFireability.xml | cut -d '>' -f 2 | cut -d '<' -f 1 | sort -u) ; do
echo "FORMULA_NAME $x"
done
fi
echo
echo "=== Now, execution of the tool begins"
echo
echo -n "BK_START "
date -u +%s%3N
echo
timeout -s 9 $BK_TIME_CONFINEMENT bash -c "/home/mcc/BenchKit/BenchKit_head.sh 2> STDERR ; echo ; echo -n \"BK_STOP \" ; date -u +%s%3N"
if [ $? -eq 137 ] ; then
echo
echo "BK_TIME_CONFINEMENT_REACHED"
fi
echo
echo "--------------------"
echo "content from stderr:"
echo
cat STDERR ;