About the Execution of ITS-Tools for ResAllocation-PT-R003C015
Execution Summary | |||||
Max Memory Used (MB) |
Time wait (ms) | CPU Usage (ms) | I/O Wait (ms) | Computed Result | Execution Status |
15758.140 | 25125.00 | 71786.00 | 8147.90 | FFFFFFFFTFFFFFFF | normal |
Execution Chart
We display below the execution chart for this examination (boot time has been removed).
Trace from the execution
Waiting for the VM to be ready (probing ssh)
........................................................................................
/home/mcc/execution
total 268K
-rw-r--r-- 1 mcc users 3.4K May 15 18:54 CTLCardinality.txt
-rw-r--r-- 1 mcc users 18K May 15 18:54 CTLCardinality.xml
-rw-r--r-- 1 mcc users 2.5K May 15 18:54 CTLFireability.txt
-rw-r--r-- 1 mcc users 15K May 15 18:54 CTLFireability.xml
-rw-r--r-- 1 mcc users 4.0K May 15 18:50 GenericPropertiesDefinition.xml
-rw-r--r-- 1 mcc users 6.3K May 15 18:50 GenericPropertiesVerdict.xml
-rw-r--r-- 1 mcc users 2.5K May 26 09:27 LTLCardinality.txt
-rw-r--r-- 1 mcc users 11K May 26 09:27 LTLCardinality.xml
-rw-r--r-- 1 mcc users 2.1K May 26 09:27 LTLFireability.txt
-rw-r--r-- 1 mcc users 11K May 26 09:27 LTLFireability.xml
-rw-r--r-- 1 mcc users 3.8K May 15 18:54 ReachabilityCardinality.txt
-rw-r--r-- 1 mcc users 19K May 15 18:54 ReachabilityCardinality.xml
-rw-r--r-- 1 mcc users 116 May 15 18:54 ReachabilityDeadlock.txt
-rw-r--r-- 1 mcc users 354 May 15 18:54 ReachabilityDeadlock.xml
-rw-r--r-- 1 mcc users 3.1K May 15 18:54 ReachabilityFireability.txt
-rw-r--r-- 1 mcc users 20K May 15 18:54 ReachabilityFireability.xml
-rw-r--r-- 1 mcc users 1.8K May 15 18:54 UpperBounds.txt
-rw-r--r-- 1 mcc users 3.8K May 15 18:54 UpperBounds.xml
-rw-r--r-- 1 mcc users 6 May 15 18:50 equiv_col
-rw-r--r-- 1 mcc users 9 May 15 18:50 instance
-rw-r--r-- 1 mcc users 6 May 15 18:50 iscolored
-rw-r--r-- 1 mcc users 103K May 15 18:50 model.pnml
=====================================================================
Generated by BenchKit 2-3637
Executing tool itstools
Input is ResAllocation-PT-R003C015, examination is LTLFireability
Time confinement is 3600 seconds
Memory confinement is 16384 MBytes
Number of cores is 4
Run identifier is r188-qhx2-152732140300140
=====================================================================
--------------------
content from stdout:
=== Data for post analysis generated by BenchKit (invocation template)
The expected result is a vector of booleans
BOOL_VECTOR
here is the order used to build the result vector(from text file)
FORMULA_NAME ResAllocation-PT-R003C015-LTLFireability-00
FORMULA_NAME ResAllocation-PT-R003C015-LTLFireability-01
FORMULA_NAME ResAllocation-PT-R003C015-LTLFireability-02
FORMULA_NAME ResAllocation-PT-R003C015-LTLFireability-03
FORMULA_NAME ResAllocation-PT-R003C015-LTLFireability-04
FORMULA_NAME ResAllocation-PT-R003C015-LTLFireability-05
FORMULA_NAME ResAllocation-PT-R003C015-LTLFireability-06
FORMULA_NAME ResAllocation-PT-R003C015-LTLFireability-07
FORMULA_NAME ResAllocation-PT-R003C015-LTLFireability-08
FORMULA_NAME ResAllocation-PT-R003C015-LTLFireability-09
FORMULA_NAME ResAllocation-PT-R003C015-LTLFireability-10
FORMULA_NAME ResAllocation-PT-R003C015-LTLFireability-11
FORMULA_NAME ResAllocation-PT-R003C015-LTLFireability-12
FORMULA_NAME ResAllocation-PT-R003C015-LTLFireability-13
FORMULA_NAME ResAllocation-PT-R003C015-LTLFireability-14
FORMULA_NAME ResAllocation-PT-R003C015-LTLFireability-15
=== Now, execution of the tool begins
BK_START 1528294520147
Using solver Z3 to compute partial order matrices.
Built C files in :
/home/mcc/execution
Invoking ITS tools like this :CommandLine [args=[/home/mcc/BenchKit/itstools/plugins/fr.lip6.move.gal.itstools.binaries_1.0.0.201805151631/bin/its-ltl-linux64, --gc-threshold, 2000000, -i, /home/mcc/execution/LTLFireability.pnml.gal, -t, CGAL, -LTL, /home/mcc/execution/LTLFireability.ltl, -c, -stutter-deadlock], workingDir=/home/mcc/execution]
its-ltl command run as :
/home/mcc/BenchKit/itstools/plugins/fr.lip6.move.gal.itstools.binaries_1.0.0.201805151631/bin/its-ltl-linux64 --gc-threshold 2000000 -i /home/mcc/execution/LTLFireability.pnml.gal -t CGAL -LTL /home/mcc/execution/LTLFireability.ltl -c -stutter-deadlock
Read 16 LTL properties
Checking formula 0 : !(((X("(r_0_0>=1)"))U((X("(((p_8_1>=1)&&(r_8_2>=1))&&(r_7_2>=1))"))U(X("((r_7_2>=1)&&(r_6_2>=1))")))))
Formula 0 simplified : !(X"(r_0_0>=1)" U (X"(((p_8_1>=1)&&(r_8_2>=1))&&(r_7_2>=1))" U X"((r_7_2>=1)&&(r_6_2>=1))"))
Presburger conditions satisfied. Using coverability to approximate state space in K-Induction.
// Phase 1: matrix 60 rows 90 cols
invariant :p_6_1 + r_6_1 + -1'r_7_1 + r_8_1 + -1'r_9_1 + r_10_1 + -1'r_11_1 + r_12_1 + -1'r_13_1 + r_14_1 = 1
invariant :p_12_2 + r_12_2 + -1'r_13_2 + r_14_2 = 1
invariant :p_0_2 + r_0_2 + -1'r_1_2 + r_2_2 + -1'r_3_2 + r_4_2 + -1'r_5_2 + r_6_2 + -1'r_7_2 + r_8_2 + -1'r_9_2 + r_10_2 + -1'r_11_2 + r_12_2 + -1'r_13_2 + r_14_2 = 1
invariant :p_5_0 + r_5_0 + -1'r_6_0 + r_7_0 + -1'r_8_0 + r_9_0 + -1'r_10_0 + r_11_0 + -1'r_12_0 + r_13_0 + -1'r_14_0 = 0
invariant :p_14_0 + r_14_0 = 1
invariant :p_13_2 + r_13_2 + -1'r_14_2 = 0
invariant :p_4_2 + r_4_2 + -1'r_5_2 + r_6_2 + -1'r_7_2 + r_8_2 + -1'r_9_2 + r_10_2 + -1'r_11_2 + r_12_2 + -1'r_13_2 + r_14_2 = 1
invariant :p_7_0 + r_7_0 + -1'r_8_0 + r_9_0 + -1'r_10_0 + r_11_0 + -1'r_12_0 + r_13_0 + -1'r_14_0 = 0
invariant :p_13_1 + r_13_1 + -1'r_14_1 = 0
invariant :p_2_1 + r_2_1 + -1'r_3_1 + r_4_1 + -1'r_5_1 + r_6_1 + -1'r_7_1 + r_8_1 + -1'r_9_1 + r_10_1 + -1'r_11_1 + r_12_1 + -1'r_13_1 + r_14_1 = 1
invariant :p_3_1 + r_3_1 + -1'r_4_1 + r_5_1 + -1'r_6_1 + r_7_1 + -1'r_8_1 + r_9_1 + -1'r_10_1 + r_11_1 + -1'r_12_1 + r_13_1 + -1'r_14_1 = 0
invariant :p_1_0 + r_1_0 + -1'r_2_0 + r_3_0 + -1'r_4_0 + r_5_0 + -1'r_6_0 + r_7_0 + -1'r_8_0 + r_9_0 + -1'r_10_0 + r_11_0 + -1'r_12_0 + r_13_0 + -1'r_14_0 = 0
invariant :p_6_2 + r_6_2 + -1'r_7_2 + r_8_2 + -1'r_9_2 + r_10_2 + -1'r_11_2 + r_12_2 + -1'r_13_2 + r_14_2 = 1
invariant :p_10_0 + r_10_0 + -1'r_11_0 + r_12_0 + -1'r_13_0 + r_14_0 = 1
invariant :p_7_1 + r_7_1 + -1'r_8_1 + r_9_1 + -1'r_10_1 + r_11_1 + -1'r_12_1 + r_13_1 + -1'r_14_1 = 0
invariant :p_11_0 + r_11_0 + -1'r_12_0 + r_13_0 + -1'r_14_0 = 0
invariant :p_10_1 + r_10_1 + -1'r_11_1 + r_12_1 + -1'r_13_1 + r_14_1 = 1
invariant :p_3_2 + r_3_2 + -1'r_4_2 + r_5_2 + -1'r_6_2 + r_7_2 + -1'r_8_2 + r_9_2 + -1'r_10_2 + r_11_2 + -1'r_12_2 + r_13_2 + -1'r_14_2 = 0
invariant :p_12_0 + r_12_0 + -1'r_13_0 + r_14_0 = 1
invariant :p_2_0 + r_2_0 + -1'r_3_0 + r_4_0 + -1'r_5_0 + r_6_0 + -1'r_7_0 + r_8_0 + -1'r_9_0 + r_10_0 + -1'r_11_0 + r_12_0 + -1'r_13_0 + r_14_0 = 1
invariant :p_9_0 + r_9_0 + -1'r_10_0 + r_11_0 + -1'r_12_0 + r_13_0 + -1'r_14_0 = 0
invariant :p_1_1 + r_1_1 + -1'r_2_1 + r_3_1 + -1'r_4_1 + r_5_1 + -1'r_6_1 + r_7_1 + -1'r_8_1 + r_9_1 + -1'r_10_1 + r_11_1 + -1'r_12_1 + r_13_1 + -1'r_14_1 = 0
invariant :p_3_0 + r_3_0 + -1'r_4_0 + r_5_0 + -1'r_6_0 + r_7_0 + -1'r_8_0 + r_9_0 + -1'r_10_0 + r_11_0 + -1'r_12_0 + r_13_0 + -1'r_14_0 = 0
invariant :p_9_2 + r_9_2 + -1'r_10_2 + r_11_2 + -1'r_12_2 + r_13_2 + -1'r_14_2 = 0
invariant :p_10_2 + r_10_2 + -1'r_11_2 + r_12_2 + -1'r_13_2 + r_14_2 = 1
invariant :p_4_1 + r_4_1 + -1'r_5_1 + r_6_1 + -1'r_7_1 + r_8_1 + -1'r_9_1 + r_10_1 + -1'r_11_1 + r_12_1 + -1'r_13_1 + r_14_1 = 1
invariant :p_14_1 + r_14_1 = 1
invariant :p_14_2 + r_14_2 = 1
invariant :p_2_2 + r_2_2 + -1'r_3_2 + r_4_2 + -1'r_5_2 + r_6_2 + -1'r_7_2 + r_8_2 + -1'r_9_2 + r_10_2 + -1'r_11_2 + r_12_2 + -1'r_13_2 + r_14_2 = 1
invariant :p_1_2 + r_1_2 + -1'r_2_2 + r_3_2 + -1'r_4_2 + r_5_2 + -1'r_6_2 + r_7_2 + -1'r_8_2 + r_9_2 + -1'r_10_2 + r_11_2 + -1'r_12_2 + r_13_2 + -1'r_14_2 = 0
invariant :p_11_1 + r_11_1 + -1'r_12_1 + r_13_1 + -1'r_14_1 = 0
invariant :p_13_0 + r_13_0 + -1'r_14_0 = 0
invariant :p_7_2 + r_7_2 + -1'r_8_2 + r_9_2 + -1'r_10_2 + r_11_2 + -1'r_12_2 + r_13_2 + -1'r_14_2 = 0
invariant :p_6_0 + r_6_0 + -1'r_7_0 + r_8_0 + -1'r_9_0 + r_10_0 + -1'r_11_0 + r_12_0 + -1'r_13_0 + r_14_0 = 1
invariant :p_8_1 + r_8_1 + -1'r_9_1 + r_10_1 + -1'r_11_1 + r_12_1 + -1'r_13_1 + r_14_1 = 1
invariant :p_5_1 + r_5_1 + -1'r_6_1 + r_7_1 + -1'r_8_1 + r_9_1 + -1'r_10_1 + r_11_1 + -1'r_12_1 + r_13_1 + -1'r_14_1 = 0
invariant :p_8_0 + r_8_0 + -1'r_9_0 + r_10_0 + -1'r_11_0 + r_12_0 + -1'r_13_0 + r_14_0 = 1
invariant :p_5_2 + r_5_2 + -1'r_6_2 + r_7_2 + -1'r_8_2 + r_9_2 + -1'r_10_2 + r_11_2 + -1'r_12_2 + r_13_2 + -1'r_14_2 = 0
invariant :p_0_0 + r_0_0 + -1'r_1_0 + r_2_0 + -1'r_3_0 + r_4_0 + -1'r_5_0 + r_6_0 + -1'r_7_0 + r_8_0 + -1'r_9_0 + r_10_0 + -1'r_11_0 + r_12_0 + -1'r_13_0 + r_14_0 = 1
invariant :p_0_1 + r_0_1 + -1'r_1_1 + r_2_1 + -1'r_3_1 + r_4_1 + -1'r_5_1 + r_6_1 + -1'r_7_1 + r_8_1 + -1'r_9_1 + r_10_1 + -1'r_11_1 + r_12_1 + -1'r_13_1 + r_14_1 = 1
invariant :p_9_1 + r_9_1 + -1'r_10_1 + r_11_1 + -1'r_12_1 + r_13_1 + -1'r_14_1 = 0
invariant :p_12_1 + r_12_1 + -1'r_13_1 + r_14_1 = 1
invariant :p_11_2 + r_11_2 + -1'r_12_2 + r_13_2 + -1'r_14_2 = 0
invariant :p_4_0 + r_4_0 + -1'r_5_0 + r_6_0 + -1'r_7_0 + r_8_0 + -1'r_9_0 + r_10_0 + -1'r_11_0 + r_12_0 + -1'r_13_0 + r_14_0 = 1
invariant :p_8_2 + r_8_2 + -1'r_9_2 + r_10_2 + -1'r_11_2 + r_12_2 + -1'r_13_2 + r_14_2 = 1
Reverse transition relation is NOT exact ! Due to transitions t_0_3, t_1_0, t_2_3, t_3_0, t_4_3, t_5_0, t_6_3, t_7_0, t_8_3, t_9_0, t_10_3, t_11_0, t_12_3, t_13_0, t_14_3, Intersection with reachable at each step enabled. (destroyed/reverse/intersect/total) :0/45/15/60
Computing Next relation with stutter on 65 deadlock states
Running compilation step : CommandLine [args=[gcc, -c, -I/home/mcc/BenchKit//lts_install_dir//include, -I., -std=c99, -fPIC, -O3, model.c], workingDir=/home/mcc/execution]
3 unique states visited
3 strongly connected components in search stack
3 transitions explored
3 items max in DFS search stack
1502 ticks for the emptiness check
Model ,|S| ,Time ,Mem(kb) ,fin. SDD ,fin. DDD ,peak SDD ,peak DDD ,SDD Hom ,SDD cache peak ,DDD Hom ,DDD cachepeak ,SHom cache
STATS,0,15.0993,234128,1,0,228,1.03336e+06,162,142,2966,1.60458e+06,335
an accepting run exists (use option '-e' to print it)
Formula 0 is FALSE accepting run found.
FORMULA ResAllocation-PT-R003C015-LTLFireability-00 FALSE TECHNIQUES DECISION_DIAGRAMS TOPOLOGICAL
Checking formula 1 : !((("(p_6_2>=1)")U(F(X(F("(((r_13_0>=1)&&(p_13_1>=1))&&(r_12_0>=1))"))))))
Formula 1 simplified : !("(p_6_2>=1)" U FXF"(((r_13_0>=1)&&(p_13_1>=1))&&(r_12_0>=1))")
Computing Next relation with stutter on 65 deadlock states
Compilation finished in 2815 ms.
Running link step : CommandLine [args=[gcc, -shared, -o, gal.so, model.o], workingDir=/home/mcc/execution]
Link finished in 87 ms.
Running LTSmin : CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=1, --when, --ltl, ((LTLAP3==true))U(<>(X(<>((LTLAP4==true))))), --buchi-type=spotba], workingDir=/home/mcc/execution]
LTSmin run took 117 ms.
FORMULA ResAllocation-PT-R003C015-LTLFireability-01 FALSE TECHNIQUES PARTIAL_ORDER EXPLICIT LTSMIN SAT_SMT
Running LTSmin : CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=1, -p, --pins-guards, --when, --ltl, []((LTLAP5==true)), --buchi-type=spotba], workingDir=/home/mcc/execution]
LTSmin run took 144 ms.
FORMULA ResAllocation-PT-R003C015-LTLFireability-02 FALSE TECHNIQUES PARTIAL_ORDER EXPLICIT LTSMIN SAT_SMT
Running LTSmin : CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=1, -p, --pins-guards, --when, --ltl, <>([]([]((LTLAP6==true)))), --buchi-type=spotba], workingDir=/home/mcc/execution]
LTSmin run took 80 ms.
FORMULA ResAllocation-PT-R003C015-LTLFireability-03 FALSE TECHNIQUES PARTIAL_ORDER EXPLICIT LTSMIN SAT_SMT
Running LTSmin : CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=1, -p, --pins-guards, --when, --ltl, [](<>(<>(((LTLAP7==true))U((LTLAP8==true))))), --buchi-type=spotba], workingDir=/home/mcc/execution]
LTSmin run took 91 ms.
FORMULA ResAllocation-PT-R003C015-LTLFireability-04 FALSE TECHNIQUES PARTIAL_ORDER EXPLICIT LTSMIN SAT_SMT
Running LTSmin : CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=1, --when, --ltl, (<>(((LTLAP9==true))U((LTLAP1==true))))U(X(X((LTLAP10==true)))), --buchi-type=spotba], workingDir=/home/mcc/execution]
LTSmin run took 86 ms.
FORMULA ResAllocation-PT-R003C015-LTLFireability-05 FALSE TECHNIQUES PARTIAL_ORDER EXPLICIT LTSMIN SAT_SMT
Running LTSmin : CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=1, -p, --pins-guards, --when, --ltl, (LTLAP11==true), --buchi-type=spotba], workingDir=/home/mcc/execution]
LTSmin run took 79 ms.
FORMULA ResAllocation-PT-R003C015-LTLFireability-06 FALSE TECHNIQUES PARTIAL_ORDER EXPLICIT LTSMIN SAT_SMT
Running LTSmin : CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=1, --when, --ltl, X(((LTLAP12==true))U((LTLAP13==true))), --buchi-type=spotba], workingDir=/home/mcc/execution]
LTSmin run took 82 ms.
FORMULA ResAllocation-PT-R003C015-LTLFireability-07 FALSE TECHNIQUES PARTIAL_ORDER EXPLICIT LTSMIN SAT_SMT
Running LTSmin : CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=1, --when, --ltl, ((X((LTLAP7==true)))U(X((LTLAP14==true))))U(([]((LTLAP15==true)))U(<>((LTLAP6==true)))), --buchi-type=spotba], workingDir=/home/mcc/execution]
LTSmin run took 50 ms.
FORMULA ResAllocation-PT-R003C015-LTLFireability-08 TRUE TECHNIQUES PARTIAL_ORDER EXPLICIT LTSMIN SAT_SMT
Running LTSmin : CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=1, -p, --pins-guards, --when, --ltl, []((((LTLAP3==true))U((LTLAP11==true)))U([]([]((LTLAP16==true))))), --buchi-type=spotba], workingDir=/home/mcc/execution]
LTSmin run took 88 ms.
FORMULA ResAllocation-PT-R003C015-LTLFireability-09 FALSE TECHNIQUES PARTIAL_ORDER EXPLICIT LTSMIN SAT_SMT
Running LTSmin : CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=1, --when, --ltl, X((LTLAP10==true)), --buchi-type=spotba], workingDir=/home/mcc/execution]
LTSmin run took 87 ms.
FORMULA ResAllocation-PT-R003C015-LTLFireability-10 FALSE TECHNIQUES PARTIAL_ORDER EXPLICIT LTSMIN SAT_SMT
Running LTSmin : CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=1, -p, --pins-guards, --when, --ltl, [](<>([]([]((LTLAP17==true))))), --buchi-type=spotba], workingDir=/home/mcc/execution]
LTSmin run took 84 ms.
FORMULA ResAllocation-PT-R003C015-LTLFireability-11 FALSE TECHNIQUES PARTIAL_ORDER EXPLICIT LTSMIN SAT_SMT
Running LTSmin : CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=1, -p, --pins-guards, --when, --ltl, [](([]((LTLAP11==true)))U((LTLAP18==true))), --buchi-type=spotba], workingDir=/home/mcc/execution]
LTSmin run took 85 ms.
FORMULA ResAllocation-PT-R003C015-LTLFireability-12 FALSE TECHNIQUES PARTIAL_ORDER EXPLICIT LTSMIN SAT_SMT
Running LTSmin : CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=1, --when, --ltl, (X(X(<>((LTLAP19==true)))))U([](((LTLAP11==true))U((LTLAP3==true)))), --buchi-type=spotba], workingDir=/home/mcc/execution]
LTSmin run took 84 ms.
FORMULA ResAllocation-PT-R003C015-LTLFireability-13 FALSE TECHNIQUES PARTIAL_ORDER EXPLICIT LTSMIN SAT_SMT
Running LTSmin : CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=1, -p, --pins-guards, --when, --ltl, (LTLAP12==true), --buchi-type=spotba], workingDir=/home/mcc/execution]
LTSmin run took 79 ms.
FORMULA ResAllocation-PT-R003C015-LTLFireability-14 FALSE TECHNIQUES PARTIAL_ORDER EXPLICIT LTSMIN SAT_SMT
Running LTSmin : CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=1, -p, --pins-guards, --when, --ltl, (([]((LTLAP20==true)))U((LTLAP21==true)))U((<>((LTLAP22==true)))U(<>((LTLAP23==true)))), --buchi-type=spotba], workingDir=/home/mcc/execution]
LTSmin run took 93 ms.
FORMULA ResAllocation-PT-R003C015-LTLFireability-15 FALSE TECHNIQUES PARTIAL_ORDER EXPLICIT LTSMIN SAT_SMT
ITS tools runner thread asked to quit. Dying gracefully.
BK_STOP 1528294545272
--------------------
content from stderr:
+ export BINDIR=/home/mcc/BenchKit/
+ BINDIR=/home/mcc/BenchKit/
++ pwd
+ export MODEL=/home/mcc/execution
+ MODEL=/home/mcc/execution
+ /home/mcc/BenchKit//runeclipse.sh /home/mcc/execution LTLFireability -its -ltsminpath /home/mcc/BenchKit//lts_install_dir/ -smt
+ ulimit -s 65536
+ [[ -z '' ]]
+ export LTSMIN_MEM_SIZE=8589934592
+ LTSMIN_MEM_SIZE=8589934592
+ /home/mcc/BenchKit//itstools/its-tools -consoleLog -data /home/mcc/execution/workspace -pnfolder /home/mcc/execution -examination LTLFireability -z3path /home/mcc/BenchKit//z3/bin/z3 -yices2path /home/mcc/BenchKit//yices/bin/yices -its -ltsminpath /home/mcc/BenchKit//lts_install_dir/ -smt -vmargs -Dosgi.locking=none -Declipse.stateSaveDelayInterval=-1 -Dosgi.configuration.area=/tmp/.eclipse -Xss8m -Xms40m -Xmx8192m -Dfile.encoding=UTF-8 -Dosgi.requiredJavaVersion=1.6
Jun 06, 2018 2:15:25 PM fr.lip6.move.gal.application.Application start
INFO: Running its-tools with arguments : [-pnfolder, /home/mcc/execution, -examination, LTLFireability, -z3path, /home/mcc/BenchKit//z3/bin/z3, -yices2path, /home/mcc/BenchKit//yices/bin/yices, -its, -ltsminpath, /home/mcc/BenchKit//lts_install_dir/, -smt]
Jun 06, 2018 2:15:25 PM fr.lip6.move.gal.application.MccTranslator transformPNML
INFO: Parsing pnml file : /home/mcc/execution/model.pnml
Jun 06, 2018 2:15:25 PM fr.lip6.move.gal.nupn.PTNetReader loadFromXML
INFO: Load time of PNML (sax parser for PT used): 99 ms
Jun 06, 2018 2:15:25 PM fr.lip6.move.gal.pnml.togal.PTGALTransformer handlePage
INFO: Transformed 90 places.
Jun 06, 2018 2:15:25 PM fr.lip6.move.gal.pnml.togal.PTGALTransformer handlePage
INFO: Transformed 60 transitions.
Jun 06, 2018 2:15:25 PM fr.lip6.move.serialization.SerializationUtil systemToFile
INFO: Time to serialize gal into /home/mcc/execution/model.pnml.img.gal : 17 ms
Jun 06, 2018 2:15:26 PM fr.lip6.move.gal.instantiate.GALRewriter flatten
INFO: Flatten gal took : 74 ms
Jun 06, 2018 2:15:26 PM fr.lip6.move.serialization.SerializationUtil systemToFile
INFO: Time to serialize gal into /home/mcc/execution/LTLFireability.pnml.gal : 5 ms
Jun 06, 2018 2:15:26 PM fr.lip6.move.serialization.SerializationUtil serializePropertiesForITSLTLTools
INFO: Time to serialize properties into /home/mcc/execution/LTLFireability.ltl : 2 ms
Jun 06, 2018 2:15:26 PM fr.lip6.move.gal.semantics.DeterministicNextBuilder getDeterministicNext
INFO: Input system was already deterministic with 60 transitions.
Jun 06, 2018 2:15:26 PM fr.lip6.move.gal.gal2smt.bmc.KInductionSolver computeAndDeclareInvariants
INFO: Computed 45 place invariants in 60 ms
Jun 06, 2018 2:15:27 PM fr.lip6.move.gal.gal2smt.bmc.KInductionSolver init
INFO: Proved 90 variables to be positive in 628 ms
Jun 06, 2018 2:15:27 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver computeAblingMatrix
INFO: Computing symmetric may disable matrix : 60 transitions.
Jun 06, 2018 2:15:27 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of disable matrix completed :0/60 took 0 ms. Total solver calls (SAT/UNSAT): 0(0/0)
Jun 06, 2018 2:15:27 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of Complete disable matrix. took 4 ms. Total solver calls (SAT/UNSAT): 0(0/0)
Jun 06, 2018 2:15:27 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver computeAblingMatrix
INFO: Computing symmetric may enable matrix : 60 transitions.
Jun 06, 2018 2:15:27 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of Complete enable matrix. took 2 ms. Total solver calls (SAT/UNSAT): 0(0/0)
Jun 06, 2018 2:15:31 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver computeCoEnablingMatrix
INFO: Computing symmetric co enabling matrix : 60 transitions.
Jun 06, 2018 2:15:32 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(0/60) took 316 ms. Total solver calls (SAT/UNSAT): 15(15/0)
Jun 06, 2018 2:15:35 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(21/60) took 3327 ms. Total solver calls (SAT/UNSAT): 404(398/6)
Jun 06, 2018 2:15:38 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(45/60) took 6333 ms. Total solver calls (SAT/UNSAT): 638(623/15)
Jun 06, 2018 2:15:39 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of Finished co-enabling matrix. took 7603 ms. Total solver calls (SAT/UNSAT): 675(654/21)
Jun 06, 2018 2:15:39 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver computeDoNotAccord
INFO: Computing Do-Not-Accords matrix : 60 transitions.
Jun 06, 2018 2:15:39 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of Completed DNA matrix. took 242 ms. Total solver calls (SAT/UNSAT): 122(0/122)
Jun 06, 2018 2:15:39 PM fr.lip6.move.gal.gal2pins.Gal2PinsTransformerNext transform
INFO: Built C files in 13341ms conformant to PINS in folder :/home/mcc/execution
Sequence of Actions to be Executed by the VM
This is useful if one wants to reexecute the tool in the VM from the submitted image disk.
set -x
# this is for BenchKit: configuration of major elements for the test
export BK_INPUT="ResAllocation-PT-R003C015"
export BK_EXAMINATION="LTLFireability"
export BK_TOOL="itstools"
export BK_RESULT_DIR="/tmp/BK_RESULTS/OUTPUTS"
export BK_TIME_CONFINEMENT="3600"
export BK_MEMORY_CONFINEMENT="16384"
# this is specific to your benchmark or test
export BIN_DIR="$HOME/BenchKit/bin"
# remove the execution directoty if it exists (to avoid increse of .vmdk images)
if [ -d execution ] ; then
rm -rf execution
fi
tar xzf /home/mcc/BenchKit/INPUTS/ResAllocation-PT-R003C015.tgz
mv ResAllocation-PT-R003C015 execution
cd execution
pwd
ls -lh
# this is for BenchKit: explicit launching of the test
echo "====================================================================="
echo " Generated by BenchKit 2-3637"
echo " Executing tool itstools"
echo " Input is ResAllocation-PT-R003C015, examination is LTLFireability"
echo " Time confinement is $BK_TIME_CONFINEMENT seconds"
echo " Memory confinement is 16384 MBytes"
echo " Number of cores is 4"
echo " Run identifier is r188-qhx2-152732140300140"
echo "====================================================================="
echo
echo "--------------------"
echo "content from stdout:"
echo
echo "=== Data for post analysis generated by BenchKit (invocation template)"
echo
if [ "LTLFireability" = "UpperBounds" ] ; then
echo "The expected result is a vector of positive values"
echo NUM_VECTOR
elif [ "LTLFireability" != "StateSpace" ] ; then
echo "The expected result is a vector of booleans"
echo BOOL_VECTOR
else
echo "no data necessary for post analysis"
fi
echo
if [ -f "LTLFireability.txt" ] ; then
echo "here is the order used to build the result vector(from text file)"
for x in $(grep Property LTLFireability.txt | cut -d ' ' -f 2 | sort -u) ; do
echo "FORMULA_NAME $x"
done
elif [ -f "LTLFireability.xml" ] ; then # for cunf (txt files deleted;-)
echo echo "here is the order used to build the result vector(from xml file)"
for x in $(grep '
echo "FORMULA_NAME $x"
done
fi
echo
echo "=== Now, execution of the tool begins"
echo
echo -n "BK_START "
date -u +%s%3N
echo
timeout -s 9 $BK_TIME_CONFINEMENT bash -c "/home/mcc/BenchKit/BenchKit_head.sh 2> STDERR ; echo ; echo -n \"BK_STOP \" ; date -u +%s%3N"
if [ $? -eq 137 ] ; then
echo
echo "BK_TIME_CONFINEMENT_REACHED"
fi
echo
echo "--------------------"
echo "content from stderr:"
echo
cat STDERR ;