fond
Model Checking Contest 2018
8th edition, Bratislava, Slovakia, June 26, 2018
Execution of r177-smll-152708747900426
Last Updated
June 26, 2018

About the Execution of ITS-Tools.L for Vasy2003-PT-none

Execution Summary
Max Memory
Used (MB)
Time wait (ms) CPU Usage (ms) I/O Wait (ms) Computed Result Execution
Status
15753.180 5594.00 10534.00 426.00 F normal

Execution Chart

We display below the execution chart for this examination (boot time has been removed).

Trace from the execution

Waiting for the VM to be ready (probing ssh)
.....................
/home/mcc/execution
total 364K
-rw-r--r-- 1 mcc users 3.0K May 15 18:54 CTLCardinality.txt
-rw-r--r-- 1 mcc users 16K May 15 18:54 CTLCardinality.xml
-rw-r--r-- 1 mcc users 2.6K May 15 18:54 CTLFireability.txt
-rw-r--r-- 1 mcc users 19K May 15 18:54 CTLFireability.xml
-rw-r--r-- 1 mcc users 4.0K May 15 18:50 GenericPropertiesDefinition.xml
-rw-r--r-- 1 mcc users 6.0K May 15 18:50 GenericPropertiesVerdict.xml
-rw-r--r-- 1 mcc users 2.3K May 26 09:27 LTLCardinality.txt
-rw-r--r-- 1 mcc users 11K May 26 09:27 LTLCardinality.xml
-rw-r--r-- 1 mcc users 1.8K May 26 09:27 LTLFireability.txt
-rw-r--r-- 1 mcc users 8.4K May 26 09:27 LTLFireability.xml
-rw-r--r-- 1 mcc users 3.2K May 15 18:54 ReachabilityCardinality.txt
-rw-r--r-- 1 mcc users 16K May 15 18:54 ReachabilityCardinality.xml
-rw-r--r-- 1 mcc users 107 May 15 18:54 ReachabilityDeadlock.txt
-rw-r--r-- 1 mcc users 345 May 15 18:54 ReachabilityDeadlock.xml
-rw-r--r-- 1 mcc users 2.6K May 15 18:54 ReachabilityFireability.txt
-rw-r--r-- 1 mcc users 16K May 15 18:54 ReachabilityFireability.xml
-rw-r--r-- 1 mcc users 1.6K May 15 18:54 UpperBounds.txt
-rw-r--r-- 1 mcc users 3.6K May 15 18:54 UpperBounds.xml
-rw-r--r-- 1 mcc users 6 May 15 18:50 equiv_col
-rw-r--r-- 1 mcc users 5 May 15 18:50 instance
-rw-r--r-- 1 mcc users 6 May 15 18:50 iscolored
-rw-r--r-- 1 mcc users 207K May 15 18:50 model.pnml
=====================================================================
Generated by BenchKit 2-3637
Executing tool itstoolsl
Input is Vasy2003-PT-none, examination is ReachabilityDeadlock
Time confinement is 3600 seconds
Memory confinement is 16384 MBytes
Number of cores is 4
Run identifier is r177-smll-152708747900426
=====================================================================


--------------------
content from stdout:

=== Data for post analysis generated by BenchKit (invocation template)

The expected result is a vector of booleans
BOOL_VECTOR

here is the order used to build the result vector(from text file)
FORMULA_NAME Vasy2003-PT-none-ReachabilityDeadlock-0

=== Now, execution of the tool begins

BK_START 1527624544060

Flatten gal took : 290 ms
Constant places removed 1 places and 1 transitions.
Reduce isomorphic transitions removed 24 transitions.
Performed 92 Post agglomeration using F-continuation condition.
Iterating post reduction 0 with 117 rules applied. Total rules applied 117 place count 484 transition count 659
Constant places removed 98 places and 0 transitions.
Reduce isomorphic transitions removed 19 transitions.
Iterating post reduction 1 with 117 rules applied. Total rules applied 234 place count 386 transition count 640
Performed 14 Pre agglomeration using Quasi-Persistent + HF-interchangeable + Divergent Free condition.
Pre-agglomeration after 2 with 14 Pre rules applied. Total rules applied 234 place count 386 transition count 626
Constant places removed 21 places and 0 transitions.
Iterating post reduction 2 with 21 rules applied. Total rules applied 255 place count 365 transition count 626
Symmetric choice reduction at 3 with 113 rule applications. Total rules 368 place count 365 transition count 626
Constant places removed 113 places and 113 transitions.
Reduce isomorphic transitions removed 68 transitions.
Iterating post reduction 3 with 181 rules applied. Total rules applied 549 place count 252 transition count 445
Constant places removed 1 places and 0 transitions.
Iterating post reduction 4 with 1 rules applied. Total rules applied 550 place count 251 transition count 445
Performed 1 Pre agglomeration using Quasi-Persistent + HF-interchangeable + Divergent Free condition.
Pre-agglomeration after 5 with 1 Pre rules applied. Total rules applied 550 place count 251 transition count 444
Constant places removed 2 places and 0 transitions.
Iterating post reduction 5 with 2 rules applied. Total rules applied 552 place count 249 transition count 444
Performed 1 Pre agglomeration using Quasi-Persistent + HF-interchangeable + Divergent Free condition.
Pre-agglomeration after 6 with 1 Pre rules applied. Total rules applied 552 place count 249 transition count 443
Constant places removed 2 places and 0 transitions.
Iterating post reduction 6 with 2 rules applied. Total rules applied 554 place count 247 transition count 443
Symmetric choice reduction at 7 with 69 rule applications. Total rules 623 place count 247 transition count 443
Constant places removed 69 places and 116 transitions.
Reduce isomorphic transitions removed 54 transitions.
Performed 1 Post agglomeration using F-continuation condition.
Iterating post reduction 7 with 124 rules applied. Total rules applied 747 place count 178 transition count 272
Constant places removed 2 places and 0 transitions.
Iterating post reduction 8 with 2 rules applied. Total rules applied 749 place count 176 transition count 272
Symmetric choice reduction at 9 with 23 rule applications. Total rules 772 place count 176 transition count 272
Constant places removed 23 places and 36 transitions.
Reduce isomorphic transitions removed 15 transitions.
Iterating post reduction 9 with 38 rules applied. Total rules applied 810 place count 153 transition count 221
Symmetric choice reduction at 10 with 4 rule applications. Total rules 814 place count 153 transition count 221
Constant places removed 4 places and 20 transitions.
Reduce isomorphic transitions removed 3 transitions.
Iterating post reduction 10 with 7 rules applied. Total rules applied 821 place count 149 transition count 198
Symmetric choice reduction at 11 with 2 rule applications. Total rules 823 place count 149 transition count 198
Constant places removed 2 places and 3 transitions.
Reduce isomorphic transitions removed 2 transitions.
Iterating post reduction 11 with 4 rules applied. Total rules applied 827 place count 147 transition count 193
Symmetric choice reduction at 12 with 1 rule applications. Total rules 828 place count 147 transition count 193
Constant places removed 1 places and 2 transitions.
Iterating post reduction 12 with 1 rules applied. Total rules applied 829 place count 146 transition count 191
Symmetric choice reduction at 13 with 1 rule applications. Total rules 830 place count 146 transition count 191
Constant places removed 1 places and 3 transitions.
Iterating post reduction 13 with 1 rules applied. Total rules applied 831 place count 145 transition count 188
Symmetric choice reduction at 14 with 1 rule applications. Total rules 832 place count 145 transition count 188
Constant places removed 1 places and 3 transitions.
Performed 3 Post agglomeration using F-continuation condition.
Iterating post reduction 14 with 4 rules applied. Total rules applied 836 place count 144 transition count 182
Constant places removed 3 places and 0 transitions.
Iterating post reduction 15 with 3 rules applied. Total rules applied 839 place count 141 transition count 182
Symmetric choice reduction at 16 with 1 rule applications. Total rules 840 place count 141 transition count 182
Constant places removed 1 places and 2 transitions.
Iterating post reduction 16 with 1 rules applied. Total rules applied 841 place count 140 transition count 180
Performed 10 Post agglomeration using F-continuation condition.
Constant places removed 11 places and 0 transitions.
Iterating post reduction 17 with 11 rules applied. Total rules applied 852 place count 129 transition count 170
Symmetric choice reduction at 18 with 2 rule applications. Total rules 854 place count 129 transition count 170
Constant places removed 2 places and 2 transitions.
Reduce isomorphic transitions removed 6 transitions.
Iterating post reduction 18 with 8 rules applied. Total rules applied 862 place count 127 transition count 162
Performed 1 Post agglomeration using F-continuation condition.
Constant places removed 1 places and 0 transitions.
Iterating post reduction 19 with 1 rules applied. Total rules applied 863 place count 126 transition count 161
Applied a total of 863 rules in 222 ms. Remains 126 /485 variables (removed 359) and now considering 161/776 (removed 615) transitions.
Normalized transition count is 132
// Phase 1: matrix 132 rows 126 cols
FORMULA Vasy2003-PT-none-ReachabilityDeadlock-0 FALSE TECHNIQUES TOPOLOGICAL SAT_SMT STRUCTURAL_REDUCTION

BK_STOP 1527624549654

--------------------
content from stderr:

+ export BINDIR=/home/mcc/BenchKit/
+ BINDIR=/home/mcc/BenchKit/
++ pwd
+ export MODEL=/home/mcc/execution
+ MODEL=/home/mcc/execution
+ /home/mcc/BenchKit//runeclipse.sh /home/mcc/execution ReachabilityDeadlock -its -ltsminpath /home/mcc/BenchKit//lts_install_dir/ -louvain -smt
+ ulimit -s 65536
+ [[ -z '' ]]
+ export LTSMIN_MEM_SIZE=8589934592
+ LTSMIN_MEM_SIZE=8589934592
+ /home/mcc/BenchKit//itstools/its-tools -consoleLog -data /home/mcc/execution/workspace -pnfolder /home/mcc/execution -examination ReachabilityDeadlock -z3path /home/mcc/BenchKit//z3/bin/z3 -yices2path /home/mcc/BenchKit//yices/bin/yices -its -ltsminpath /home/mcc/BenchKit//lts_install_dir/ -louvain -smt -vmargs -Dosgi.locking=none -Declipse.stateSaveDelayInterval=-1 -Dosgi.configuration.area=/tmp/.eclipse -Xss8m -Xms40m -Xmx8192m -Dfile.encoding=UTF-8 -Dosgi.requiredJavaVersion=1.6
May 29, 2018 8:09:06 PM fr.lip6.move.gal.application.Application start
INFO: Running its-tools with arguments : [-pnfolder, /home/mcc/execution, -examination, ReachabilityDeadlock, -z3path, /home/mcc/BenchKit//z3/bin/z3, -yices2path, /home/mcc/BenchKit//yices/bin/yices, -its, -ltsminpath, /home/mcc/BenchKit//lts_install_dir/, -louvain, -smt]
May 29, 2018 8:09:06 PM fr.lip6.move.gal.application.MccTranslator transformPNML
INFO: Parsing pnml file : /home/mcc/execution/model.pnml
May 29, 2018 8:09:07 PM fr.lip6.move.gal.nupn.PTNetReader loadFromXML
INFO: Load time of PNML (sax parser for PT used): 186 ms
May 29, 2018 8:09:07 PM fr.lip6.move.gal.pnml.togal.PTGALTransformer handlePage
INFO: Transformed 485 places.
May 29, 2018 8:09:07 PM fr.lip6.move.gal.pnml.togal.PTGALTransformer handlePage
INFO: Transformed 776 transitions.
May 29, 2018 8:09:07 PM fr.lip6.move.gal.pnml.togal.PnmlToGalTransformer transform
INFO: Found NUPN structural information;
May 29, 2018 8:09:07 PM fr.lip6.move.serialization.SerializationUtil systemToFile
INFO: Time to serialize gal into /home/mcc/execution/model.pnml.img.gal : 35 ms
May 29, 2018 8:09:07 PM fr.lip6.move.gal.instantiate.GALRewriter flatten
INFO: Flatten gal took : 282 ms
May 29, 2018 8:09:07 PM fr.lip6.move.serialization.SerializationUtil systemToFile
INFO: Time to serialize gal into /home/mcc/execution/model.pnml.simple.gal : 11 ms
May 29, 2018 8:09:07 PM fr.lip6.move.gal.semantics.DeterministicNextBuilder getDeterministicNext
INFO: Input system was already deterministic with 776 transitions.

Sequence of Actions to be Executed by the VM

This is useful if one wants to reexecute the tool in the VM from the submitted image disk.

set -x
# this is for BenchKit: configuration of major elements for the test
export BK_INPUT="Vasy2003-PT-none"
export BK_EXAMINATION="ReachabilityDeadlock"
export BK_TOOL="itstoolsl"
export BK_RESULT_DIR="/tmp/BK_RESULTS/OUTPUTS"
export BK_TIME_CONFINEMENT="3600"
export BK_MEMORY_CONFINEMENT="16384"

# this is specific to your benchmark or test

export BIN_DIR="$HOME/BenchKit/bin"

# remove the execution directoty if it exists (to avoid increse of .vmdk images)
if [ -d execution ] ; then
rm -rf execution
fi

tar xzf /home/mcc/BenchKit/INPUTS/Vasy2003-PT-none.tgz
mv Vasy2003-PT-none execution
cd execution
pwd
ls -lh

# this is for BenchKit: explicit launching of the test
echo "====================================================================="
echo " Generated by BenchKit 2-3637"
echo " Executing tool itstoolsl"
echo " Input is Vasy2003-PT-none, examination is ReachabilityDeadlock"
echo " Time confinement is $BK_TIME_CONFINEMENT seconds"
echo " Memory confinement is 16384 MBytes"
echo " Number of cores is 4"
echo " Run identifier is r177-smll-152708747900426"
echo "====================================================================="
echo
echo "--------------------"
echo "content from stdout:"
echo
echo "=== Data for post analysis generated by BenchKit (invocation template)"
echo
if [ "ReachabilityDeadlock" = "UpperBounds" ] ; then
echo "The expected result is a vector of positive values"
echo NUM_VECTOR
elif [ "ReachabilityDeadlock" != "StateSpace" ] ; then
echo "The expected result is a vector of booleans"
echo BOOL_VECTOR
else
echo "no data necessary for post analysis"
fi
echo
if [ -f "ReachabilityDeadlock.txt" ] ; then
echo "here is the order used to build the result vector(from text file)"
for x in $(grep Property ReachabilityDeadlock.txt | cut -d ' ' -f 2 | sort -u) ; do
echo "FORMULA_NAME $x"
done
elif [ -f "ReachabilityDeadlock.xml" ] ; then # for cunf (txt files deleted;-)
echo echo "here is the order used to build the result vector(from xml file)"
for x in $(grep '' ReachabilityDeadlock.xml | cut -d '>' -f 2 | cut -d '<' -f 1 | sort -u) ; do
echo "FORMULA_NAME $x"
done
fi
echo
echo "=== Now, execution of the tool begins"
echo
echo -n "BK_START "
date -u +%s%3N
echo
timeout -s 9 $BK_TIME_CONFINEMENT bash -c "/home/mcc/BenchKit/BenchKit_head.sh 2> STDERR ; echo ; echo -n \"BK_STOP \" ; date -u +%s%3N"
if [ $? -eq 137 ] ; then
echo
echo "BK_TIME_CONFINEMENT_REACHED"
fi
echo
echo "--------------------"
echo "content from stderr:"
echo
cat STDERR ;