Execution Chart

We display below the execution chart for this examination (boot time has been removed).

Trace from the execution

Waiting for the VM to be ready (probing ssh)
...................
/home/mcc/execution
total 184K
-rw-r--r-- 1 mcc users 4.0K May 15 18:54 CTLCardinality.txt
-rw-r--r-- 1 mcc users 23K May 15 18:54 CTLCardinality.xml
-rw-r--r-- 1 mcc users 2.1K May 15 18:54 CTLFireability.txt
-rw-r--r-- 1 mcc users 12K May 15 18:54 CTLFireability.xml
-rw-r--r-- 1 mcc users 4.0K May 15 18:50 GenericPropertiesDefinition.xml
-rw-r--r-- 1 mcc users 6.0K May 15 18:50 GenericPropertiesVerdict.xml
-rw-r--r-- 1 mcc users 2.6K May 15 18:54 LTLCardinality.txt
-rw-r--r-- 1 mcc users 12K May 15 18:54 LTLCardinality.xml
-rw-r--r-- 1 mcc users 1.7K May 15 18:54 LTLFireability.txt
-rw-r--r-- 1 mcc users 7.4K May 15 18:54 LTLFireability.xml
-rw-r--r-- 1 mcc users 3.7K May 15 18:54 ReachabilityCardinality.txt
-rw-r--r-- 1 mcc users 19K May 15 18:54 ReachabilityCardinality.xml
-rw-r--r-- 1 mcc users 106 May 15 18:54 ReachabilityDeadlock.txt
-rw-r--r-- 1 mcc users 344 May 15 18:54 ReachabilityDeadlock.xml
-rw-r--r-- 1 mcc users 2.8K May 15 18:54 ReachabilityFireability.txt
-rw-r--r-- 1 mcc users 17K May 15 18:54 ReachabilityFireability.xml
-rw-r--r-- 1 mcc users 1.6K May 15 18:54 UpperBounds.txt
-rw-r--r-- 1 mcc users 3.7K May 15 18:54 UpperBounds.xml
-rw-r--r-- 1 mcc users 6 May 15 18:50 equiv_col
-rw-r--r-- 1 mcc users 3 May 15 18:50 instance
-rw-r--r-- 1 mcc users 6 May 15 18:50 iscolored
-rwxr-xr-x 1 mcc users 24K May 15 18:50 model.pnml
=====================================================================
Generated by BenchKit 2-3637
Executing tool itstools
Input is TCPcondis-PT-10, examination is CTLFireability
Time confinement is 3600 seconds
Memory confinement is 16384 MBytes
Number of cores is 4
Run identifier is r176-smll-152708747000186
=====================================================================

--------------------
content from stdout:

=== Data for post analysis generated by BenchKit (invocation template)

The expected result is a vector of booleans
BOOL_VECTOR

here is the order used to build the result vector(from text file)
FORMULA_NAME TCPcondis-PT-10-CTLFireability-00
FORMULA_NAME TCPcondis-PT-10-CTLFireability-01
FORMULA_NAME TCPcondis-PT-10-CTLFireability-02
FORMULA_NAME TCPcondis-PT-10-CTLFireability-03
FORMULA_NAME TCPcondis-PT-10-CTLFireability-04
FORMULA_NAME TCPcondis-PT-10-CTLFireability-05
FORMULA_NAME TCPcondis-PT-10-CTLFireability-06
FORMULA_NAME TCPcondis-PT-10-CTLFireability-07
FORMULA_NAME TCPcondis-PT-10-CTLFireability-08
FORMULA_NAME TCPcondis-PT-10-CTLFireability-09
FORMULA_NAME TCPcondis-PT-10-CTLFireability-10
FORMULA_NAME TCPcondis-PT-10-CTLFireability-11
FORMULA_NAME TCPcondis-PT-10-CTLFireability-12
FORMULA_NAME TCPcondis-PT-10-CTLFireability-13
FORMULA_NAME TCPcondis-PT-10-CTLFireability-14
FORMULA_NAME TCPcondis-PT-10-CTLFireability-15

=== Now, execution of the tool begins

BK_START 1527244642407

Invoking ITS tools like this :CommandLine [args=[/home/mcc/BenchKit/itstools/plugins/fr.lip6.move.gal.itstools.binaries_1.0.0.201805151631/bin/its-ctl-linux64, --gc-threshold, 2000000, --quiet, -i, /home/mcc/execution/CTLFireability.pnml.gal, -t, CGAL, -ctl, /home/mcc/execution/CTLFireability.ctl], workingDir=/home/mcc/execution]

its-ctl command run as :

/home/mcc/BenchKit/itstools/plugins/fr.lip6.move.gal.itstools.binaries_1.0.0.201805151631/bin/its-ctl-linux64 --gc-threshold 2000000 --quiet -i /home/mcc/execution/CTLFireability.pnml.gal -t CGAL -ctl /home/mcc/execution/CTLFireability.ctl
No direction supplied, using forward translation only.
Parsed 16 CTL formulae.
Model ,|S| ,Time ,Mem(kb) ,fin. SDD ,fin. DDD ,peak SDD ,peak DDD ,SDD Hom ,SDD cache peak ,DDD Hom ,DDD cachepeak ,SHom cache
reachable,1.3762e+10,18.1825,370824,2,92306,5,2.30729e+06,6,0,155,2.23176e+06,0


Converting to forward existential form...Done !
original formula: EG(E((((xSYNSENT>=1)&&(SYN>=1))&&((LISTEN>=1)&&(xSYN>=1))) U (CLOSED>=1)))
=> equivalent forward existential formula: [FwdG(Init,E((((xSYNSENT>=1)&&(SYN>=1))&&((LISTEN>=1)&&(xSYN>=1))) U (CLOSED>=1)))] != FALSE
Reverse transition relation is NOT exact ! Due to transitions raf2, xraf2, Intersection with reachable at each step enabled. (destroyed/reverse/intersect/total) :0/30/2/32
(forward)formula 0,1,419.194,2784620,1,0,213,1.54522e+07,13,153,712,2.1383e+07,36
FORMULA TCPcondis-PT-10-CTLFireability-00 TRUE TECHNIQUES DECISION_DIAGRAMS TOPOLOGICAL
Formula is TRUE !

***************************************

original formula: EG(!((((SYNACK>=1)&&(xSYNSENT>=1))&&(SYN>=1))))
=> equivalent forward existential formula: [FwdG(Init,!((((SYNACK>=1)&&(xSYNSENT>=1))&&(SYN>=1))))] != FALSE
Hit Full ! (commute/partial/dont) 21/0/11
(forward)formula 1,1,431.377,2784620,1,0,213,1.54522e+07,21,153,776,2.1383e+07,40
FORMULA TCPcondis-PT-10-CTLFireability-01 TRUE TECHNIQUES DECISION_DIAGRAMS TOPOLOGICAL
Formula is TRUE !

***************************************

original formula: (AF(((xESTAB>=1)&&((xESTAB>=1)&&(FIN>=1)))) + EG(((CLOSED>=1)&&((((LASTACK>=1)&&(xFINACK>=1))||(xCLOSED>=1))||(!((FINWAIT1>=1)&&(xFINACK>=1)))))))
=> equivalent forward existential formula: [FwdG((Init * !(EG(((CLOSED>=1)&&((((LASTACK>=1)&&(xFINACK>=1))||(xCLOSED>=1))||(!((FINWAIT1>=1)&&(xFINACK>=1)))))))),!(((xESTAB>=1)&&((xESTAB>=1)&&(FIN>=1)))))] = FALSE
(forward)formula 2,1,445.304,2784620,1,0,213,1.54522e+07,33,153,880,2.1383e+07,49
FORMULA TCPcondis-PT-10-CTLFireability-02 TRUE TECHNIQUES DECISION_DIAGRAMS TOPOLOGICAL
Formula is TRUE !

***************************************

original formula: AF(((FINWAIT2>=1)&&(xFIN>=1)))
=> equivalent forward existential formula: [FwdG(Init,!(((FINWAIT2>=1)&&(xFIN>=1))))] = FALSE
Hit Full ! (commute/partial/dont) 26/0/6
(forward)formula 3,0,465.435,2784620,1,0,213,1.54522e+07,41,153,931,2.1383e+07,53
FORMULA TCPcondis-PT-10-CTLFireability-03 FALSE TECHNIQUES DECISION_DIAGRAMS TOPOLOGICAL
Formula is FALSE !

***************************************

original formula: AF(EG((((LISTEN>=1)&&((CLOSING>=1)&&(xFINACK>=1)))&&(((xSYNSENT>=1)&&(SYN>=1))&&(((SYNACK>=1)&&(xSYNSENT>=1))&&(SYN>=1))))))
=> equivalent forward existential formula: [FwdG(Init,!(EG((((LISTEN>=1)&&((CLOSING>=1)&&(xFINACK>=1)))&&(((xSYNSENT>=1)&&(SYN>=1))&&(((SYNACK>=1)&&(xSYNSENT>=1))&&(SYN>=1)))))))] = FALSE
(forward)formula 4,0,891.058,3695804,1,0,213,2.15689e+07,13,153,728,2.79587e+07,100
FORMULA TCPcondis-PT-10-CTLFireability-04 FALSE TECHNIQUES DECISION_DIAGRAMS TOPOLOGICAL
Formula is FALSE !

***************************************

original formula: AX(EG(AF((CLOSED>=1))))
=> equivalent forward existential formula: [(EY(Init) * !(EG(!(EG(!((CLOSED>=1)))))))] = FALSE
(forward)formula 5,1,1197.71,4439756,1,0,733,2.53164e+07,9,357,338,2.93728e+07,1
FORMULA TCPcondis-PT-10-CTLFireability-05 TRUE TECHNIQUES DECISION_DIAGRAMS TOPOLOGICAL
Formula is TRUE !

***************************************

original formula: EG(AF(EF(((xFINWAIT2>=1)&&(FIN>=1)))))
=> equivalent forward existential formula: [FwdG(Init,!(EG(!(E(TRUE U ((xFINWAIT2>=1)&&(FIN>=1)))))))] != FALSE
(forward)formula 6,1,1223.91,4439756,1,0,733,2.53164e+07,26,357,880,2.93728e+07,15
FORMULA TCPcondis-PT-10-CTLFireability-06 TRUE TECHNIQUES DECISION_DIAGRAMS TOPOLOGICAL
Formula is TRUE !

***************************************

original formula: AF(AG(AX(((xLISTEN>=1)&&(SYN>=1)))))
=> equivalent forward existential formula: [FwdG(Init,!(!(E(TRUE U !(!(EX(!(((xLISTEN>=1)&&(SYN>=1))))))))))] = FALSE
(forward)formula 7,0,1227.9,4439756,1,0,733,2.53164e+07,28,357,900,2.93728e+07,22
FORMULA TCPcondis-PT-10-CTLFireability-07 FALSE TECHNIQUES DECISION_DIAGRAMS TOPOLOGICAL
Formula is FALSE !

***************************************

original formula: EF((EG(((xESTAB>=1)&&((CLOSING>=1)&&(xFINACK>=1)))) * !(((LISTEN>=1)&&(xSYN>=1)))))
=> equivalent forward existential formula: [FwdG((FwdU(Init,TRUE) * !(((LISTEN>=1)&&(xSYN>=1)))),((xESTAB>=1)&&((CLOSING>=1)&&(xFINACK>=1))))] != FALSE
Hit Full ! (commute/partial/dont) 22/18/10
(forward)formula 8,1,1233.65,4439756,1,0,733,2.53164e+07,37,357,967,2.93728e+07,27
FORMULA TCPcondis-PT-10-CTLFireability-08 TRUE TECHNIQUES DECISION_DIAGRAMS TOPOLOGICAL
Formula is TRUE !

***************************************

original formula: AF(((FINWAIT2>=1)&&(xFIN>=1)))
=> equivalent forward existential formula: [FwdG(Init,!(((FINWAIT2>=1)&&(xFIN>=1))))] = FALSE
Hit Full ! (commute/partial/dont) 26/0/6
(forward)formula 9,0,1253,4439756,1,0,733,2.53164e+07,45,357,1018,2.93728e+07,31
FORMULA TCPcondis-PT-10-CTLFireability-09 FALSE TECHNIQUES DECISION_DIAGRAMS TOPOLOGICAL
Formula is FALSE !

***************************************

original formula: EG(!(AX(((((SYNACK>=1)&&(xSYNSENT>=1))&&(SYN>=1))||((xFINWAIT2>=1)&&(FIN>=1))))))
=> equivalent forward existential formula: [FwdG(Init,!(!(EX(!(((((SYNACK>=1)&&(xSYNSENT>=1))&&(SYN>=1))||((xFINWAIT2>=1)&&(FIN>=1))))))))] != FALSE
(forward)formula 10,1,1647.55,5009268,1,0,733,2.79654e+07,13,357,728,3.6289e+07,108
FORMULA TCPcondis-PT-10-CTLFireability-10 TRUE TECHNIQUES DECISION_DIAGRAMS TOPOLOGICAL
Formula is TRUE !

***************************************

original formula: ((EF(AG(((SYNACK>=1)&&(xSYNRCVD>=1)))) * EG(EF((TIMEWAIT>=1)))) + ((xSYNACK>=1)&&(SYNRCVD>=1)))
=> equivalent forward existential formula: ([FwdG((Init * E(TRUE U !(E(TRUE U !(((SYNACK>=1)&&(xSYNRCVD>=1))))))),E(TRUE U (TIMEWAIT>=1)))] != FALSE + [(Init * ((xSYNACK>=1)&&(SYNRCVD>=1)))] != FALSE)
(forward)formula 11,0,1677.19,5009268,1,0,733,2.79654e+07,25,357,851,3.6289e+07,123
FORMULA TCPcondis-PT-10-CTLFireability-11 FALSE TECHNIQUES DECISION_DIAGRAMS TOPOLOGICAL
Formula is FALSE !

***************************************

original formula: E(!(AF(((xSYNSENT>=1)&&(SYN>=1)))) U ((((xCLOSED>=1)&&(xCLOSEWAIT>=1))||(!(LISTEN>=1))) * AG(((xCLOSING>=1)&&(FINACK>=1)))))
=> equivalent forward existential formula: [((FwdU(Init,!(!(EG(!(((xSYNSENT>=1)&&(SYN>=1))))))) * (((xCLOSED>=1)&&(xCLOSEWAIT>=1))||(!(LISTEN>=1)))) * !(E(TRUE U !(((xCLOSING>=1)&&(FINACK>=1))))))] != FALSE
(forward)formula 12,0,1682.33,5012168,1,0,733,2.83496e+07,27,357,855,3.6289e+07,126
FORMULA TCPcondis-PT-10-CTLFireability-12 FALSE TECHNIQUES DECISION_DIAGRAMS TOPOLOGICAL
Formula is FALSE !

***************************************

original formula: EX(E(!((((SYNACK>=1)&&(xSYNSENT>=1))&&(SYN>=1))) U !((CLOSED>=1))))
=> equivalent forward existential formula: [(FwdU(EY(Init),!((((SYNACK>=1)&&(xSYNSENT>=1))&&(SYN>=1)))) * !((CLOSED>=1)))] != FALSE
Hit Full ! (commute/partial/dont) 21/0/11
(forward)formula 13,1,1700.91,5311016,1,0,733,3.0389e+07,37,357,903,3.863e+07,131
FORMULA TCPcondis-PT-10-CTLFireability-13 TRUE TECHNIQUES DECISION_DIAGRAMS TOPOLOGICAL
Formula is TRUE !

***************************************

original formula: !(EF(AX((((xCLOSING>=1)&&(FINACK>=1))||((xFINWAIT2>=1)&&(FIN>=1))))))
=> equivalent forward existential formula: [(FwdU(Init,TRUE) * !(EX(!((((xCLOSING>=1)&&(FINACK>=1))||((xFINWAIT2>=1)&&(FIN>=1)))))))] = FALSE
(forward)formula 14,0,1710.43,5500568,1,0,733,3.15072e+07,39,357,925,4.00508e+07,136
FORMULA TCPcondis-PT-10-CTLFireability-14 FALSE TECHNIQUES DECISION_DIAGRAMS TOPOLOGICAL
Formula is FALSE !

***************************************

original formula: EF((((xLISTEN>=1)&&((xFINWAIT1>=1)&&(FIN>=1)))&&(((SYNACK>=1)&&(xSYNRCVD>=1))||((xESTAB>=1)&&(FIN>=1)))))
=> equivalent forward existential formula: [(FwdU(Init,TRUE) * (((xLISTEN>=1)&&((xFINWAIT1>=1)&&(FIN>=1)))&&(((SYNACK>=1)&&(xSYNRCVD>=1))||((xESTAB>=1)&&(FIN>=1)))))] != FALSE
(forward)formula 15,1,1710.96,5512184,1,0,733,3.15408e+07,40,357,930,4.00924e+07,137
FORMULA TCPcondis-PT-10-CTLFireability-15 TRUE TECHNIQUES DECISION_DIAGRAMS TOPOLOGICAL
Formula is TRUE !

***************************************


BK_STOP 1527246360052

--------------------
content from stderr:

+ export BINDIR=/home/mcc/BenchKit/
+ BINDIR=/home/mcc/BenchKit/
++ pwd
+ export MODEL=/home/mcc/execution
+ MODEL=/home/mcc/execution
+ /home/mcc/BenchKit//runeclipse.sh /home/mcc/execution CTLFireability -its -ltsminpath /home/mcc/BenchKit//lts_install_dir/ -smt
+ ulimit -s 65536
+ [[ -z '' ]]
+ export LTSMIN_MEM_SIZE=8589934592
+ LTSMIN_MEM_SIZE=8589934592
+ /home/mcc/BenchKit//itstools/its-tools -consoleLog -data /home/mcc/execution/workspace -pnfolder /home/mcc/execution -examination CTLFireability -z3path /home/mcc/BenchKit//z3/bin/z3 -yices2path /home/mcc/BenchKit//yices/bin/yices -its -ltsminpath /home/mcc/BenchKit//lts_install_dir/ -smt -vmargs -Dosgi.locking=none -Declipse.stateSaveDelayInterval=-1 -Dosgi.configuration.area=/tmp/.eclipse -Xss8m -Xms40m -Xmx8192m -Dfile.encoding=UTF-8 -Dosgi.requiredJavaVersion=1.6
May 25, 2018 10:37:25 AM fr.lip6.move.gal.application.Application start
INFO: Running its-tools with arguments : [-pnfolder, /home/mcc/execution, -examination, CTLFireability, -z3path, /home/mcc/BenchKit//z3/bin/z3, -yices2path, /home/mcc/BenchKit//yices/bin/yices, -its, -ltsminpath, /home/mcc/BenchKit//lts_install_dir/, -smt]
May 25, 2018 10:37:25 AM fr.lip6.move.gal.application.MccTranslator transformPNML
INFO: Parsing pnml file : /home/mcc/execution/model.pnml
May 25, 2018 10:37:25 AM fr.lip6.move.gal.nupn.PTNetHandler startElement
WARNING: Skipping unknown tool specific annotation : Tina
May 25, 2018 10:37:25 AM fr.lip6.move.gal.nupn.PTNetHandler startElement
WARNING: Unknown XML tag in source file: size
May 25, 2018 10:37:25 AM fr.lip6.move.gal.nupn.PTNetHandler startElement
WARNING: Unknown XML tag in source file: color
May 25, 2018 10:37:25 AM fr.lip6.move.gal.nupn.PTNetReader loadFromXML
INFO: Load time of PNML (sax parser for PT used): 70 ms
May 25, 2018 10:37:25 AM fr.lip6.move.gal.pnml.togal.PTGALTransformer handlePage
INFO: Transformed 30 places.
May 25, 2018 10:37:25 AM fr.lip6.move.gal.pnml.togal.PTGALTransformer handlePage
INFO: Transformed 32 transitions.
May 25, 2018 10:37:25 AM fr.lip6.move.serialization.SerializationUtil systemToFile
INFO: Time to serialize gal into /home/mcc/execution/model.pnml.img.gal : 14 ms
May 25, 2018 10:37:26 AM fr.lip6.move.gal.instantiate.GALRewriter flatten
INFO: Flatten gal took : 61 ms
May 25, 2018 10:37:26 AM fr.lip6.move.serialization.SerializationUtil systemToFile
INFO: Time to serialize gal into /home/mcc/execution/CTLFireability.pnml.gal : 3 ms
May 25, 2018 10:37:26 AM fr.lip6.move.serialization.SerializationUtil serializePropertiesForITSCTLTools
INFO: Time to serialize properties into /home/mcc/execution/CTLFireability.ctl : 3 ms

Sequence of Actions to be Executed by the VM

This is useful if one wants to reexecute the tool in the VM from the submitted image disk.

set -x
# this is for BenchKit: configuration of major elements for the test
export BK_INPUT="TCPcondis-PT-10"
export BK_EXAMINATION="CTLFireability"
export BK_TOOL="itstools"
export BK_RESULT_DIR="/tmp/BK_RESULTS/OUTPUTS"
export BK_TIME_CONFINEMENT="3600"
export BK_MEMORY_CONFINEMENT="16384"

# this is specific to your benchmark or test

export BIN_DIR="$HOME/BenchKit/bin"

# remove the execution directoty if it exists (to avoid increse of .vmdk images)
if [ -d execution ] ; then
rm -rf execution
fi

tar xzf /home/mcc/BenchKit/INPUTS/TCPcondis-PT-10.tgz
mv TCPcondis-PT-10 execution
cd execution
pwd
ls -lh

# this is for BenchKit: explicit launching of the test
echo "====================================================================="
echo " Generated by BenchKit 2-3637"
echo " Executing tool itstools"
echo " Input is TCPcondis-PT-10, examination is CTLFireability"
echo " Time confinement is $BK_TIME_CONFINEMENT seconds"
echo " Memory confinement is 16384 MBytes"
echo " Number of cores is 4"
echo " Run identifier is r176-smll-152708747000186"
echo "====================================================================="
echo
echo "--------------------"
echo "content from stdout:"
echo
echo "=== Data for post analysis generated by BenchKit (invocation template)"
echo
if [ "CTLFireability" = "UpperBounds" ] ; then
echo "The expected result is a vector of positive values"
echo NUM_VECTOR
elif [ "CTLFireability" != "StateSpace" ] ; then
echo "The expected result is a vector of booleans"
echo BOOL_VECTOR
else
echo "no data necessary for post analysis"
fi
echo
if [ -f "CTLFireability.txt" ] ; then
echo "here is the order used to build the result vector(from text file)"
for x in $(grep Property CTLFireability.txt | cut -d ' ' -f 2 | sort -u) ; do
echo "FORMULA_NAME $x"
done
elif [ -f "CTLFireability.xml" ] ; then # for cunf (txt files deleted;-)
echo echo "here is the order used to build the result vector(from xml file)"
for x in $(grep '' CTLFireability.xml | cut -d '>' -f 2 | cut -d '<' -f 1 | sort -u) ; do
echo "FORMULA_NAME $x"
done
fi
echo
echo "=== Now, execution of the tool begins"
echo
echo -n "BK_START "
date -u +%s%3N
echo
timeout -s 9 $BK_TIME_CONFINEMENT bash -c "/home/mcc/BenchKit/BenchKit_head.sh 2> STDERR ; echo ; echo -n \"BK_STOP \" ; date -u +%s%3N"
if [ $? -eq 137 ] ; then
echo
echo "BK_TIME_CONFINEMENT_REACHED"
fi
echo
echo "--------------------"
echo "content from stderr:"
echo
cat STDERR ;