Execution Chart

We display below the execution chart for this examination (boot time has been removed).

Trace from the execution

Waiting for the VM to be ready (probing ssh)
.................
/home/mcc/execution
total 212K
-rw-r--r-- 1 mcc users 4.3K May 15 18:54 CTLCardinality.txt
-rw-r--r-- 1 mcc users 20K May 15 18:54 CTLCardinality.xml
-rw-r--r-- 1 mcc users 3.9K May 15 18:54 CTLFireability.txt
-rw-r--r-- 1 mcc users 20K May 15 18:54 CTLFireability.xml
-rw-r--r-- 1 mcc users 4.0K May 15 18:50 GenericPropertiesDefinition.xml
-rw-r--r-- 1 mcc users 6.4K May 15 18:50 GenericPropertiesVerdict.xml
-rw-r--r-- 1 mcc users 2.8K May 15 18:54 LTLCardinality.txt
-rw-r--r-- 1 mcc users 12K May 15 18:54 LTLCardinality.xml
-rw-r--r-- 1 mcc users 2.1K May 15 18:54 LTLFireability.txt
-rw-r--r-- 1 mcc users 7.0K May 15 18:54 LTLFireability.xml
-rw-r--r-- 1 mcc users 4.5K May 15 18:54 ReachabilityCardinality.txt
-rw-r--r-- 1 mcc users 19K May 15 18:54 ReachabilityCardinality.xml
-rw-r--r-- 1 mcc users 110 May 15 18:54 ReachabilityDeadlock.txt
-rw-r--r-- 1 mcc users 348 May 15 18:54 ReachabilityDeadlock.xml
-rw-r--r-- 1 mcc users 3.7K May 15 18:54 ReachabilityFireability.txt
-rw-r--r-- 1 mcc users 17K May 15 18:54 ReachabilityFireability.xml
-rw-r--r-- 1 mcc users 1.8K May 15 18:54 UpperBounds.txt
-rw-r--r-- 1 mcc users 3.9K May 15 18:54 UpperBounds.xml
-rw-r--r-- 1 mcc users 6 May 15 18:50 equiv_col
-rw-r--r-- 1 mcc users 3 May 15 18:50 instance
-rw-r--r-- 1 mcc users 6 May 15 18:50 iscolored
-rw-r--r-- 1 mcc users 37K May 15 18:50 model.pnml
=====================================================================
Generated by BenchKit 2-3637
Executing tool gspn
Input is SimpleLoadBal-PT-02, examination is CTLFireability
Time confinement is 3600 seconds
Memory confinement is 16384 MBytes
Number of cores is 1
Run identifier is r169-smll-152708736800144
=====================================================================

--------------------
content from stdout:

=== Data for post analysis generated by BenchKit (invocation template)

The expected result is a vector of booleans
BOOL_VECTOR

here is the order used to build the result vector(from text file)
FORMULA_NAME SimpleLoadBal-PT-02-CTLFireability-00
FORMULA_NAME SimpleLoadBal-PT-02-CTLFireability-01
FORMULA_NAME SimpleLoadBal-PT-02-CTLFireability-02
FORMULA_NAME SimpleLoadBal-PT-02-CTLFireability-03
FORMULA_NAME SimpleLoadBal-PT-02-CTLFireability-04
FORMULA_NAME SimpleLoadBal-PT-02-CTLFireability-05
FORMULA_NAME SimpleLoadBal-PT-02-CTLFireability-06
FORMULA_NAME SimpleLoadBal-PT-02-CTLFireability-07
FORMULA_NAME SimpleLoadBal-PT-02-CTLFireability-08
FORMULA_NAME SimpleLoadBal-PT-02-CTLFireability-09
FORMULA_NAME SimpleLoadBal-PT-02-CTLFireability-10
FORMULA_NAME SimpleLoadBal-PT-02-CTLFireability-11
FORMULA_NAME SimpleLoadBal-PT-02-CTLFireability-12
FORMULA_NAME SimpleLoadBal-PT-02-CTLFireability-13
FORMULA_NAME SimpleLoadBal-PT-02-CTLFireability-14
FORMULA_NAME SimpleLoadBal-PT-02-CTLFireability-15

=== Now, execution of the tool begins

BK_START 1527347217788

----------------------------------------------------------------------
GreatSPN-meddly tool, MCC 2018
----------------------------------------------------------------------

Running SimpleLoadBal (PT), instance 02

LOADING PETRI NET FILE /home/mcc/execution/model.pnml (PNML) ...
PNML VERSION 2009, P/T NET.
COLOR CLASSES: 0
CONSTANTS: 0
PLACES: 32
TRANSITIONS: 45
COLOR VARS: 0
MEASURES: 0
LOADING TIME: [User 0.004s, Sys 0.000s]


SAVING FILE /home/mcc/execution/model (.net / .def) ...
EXPORT TIME: [User 0.000s, Sys 0.000s]


----------------------------------------------------------------------
GreatSPN/Meddly.
Copyright (C) 1987-2018, University of Torino, Italy.

Based on MEDDLY version 0.15.0
Copyright (C) 2009, Iowa State University Research Foundation, Inc.
website: http://meddly.sourceforge.net

Process ID: 468
MODEL NAME: /home/mcc/execution/model
32 places, 45 transitions.

Setting MEDDLY cache to 67108864 entries.
Split: SplitSubtract
FORMULA SimpleLoadBal-PT-02-CTLFireability-00 FALSE TECHNIQUES DECISION_DIAGRAMS SEQUENTIAL_PROCESSING UNFOLDING_TO_PT USE_NUPN TOPOLOGICAL
FORMULA SimpleLoadBal-PT-02-CTLFireability-01 FALSE TECHNIQUES DECISION_DIAGRAMS SEQUENTIAL_PROCESSING UNFOLDING_TO_PT USE_NUPN TOPOLOGICAL
FORMULA SimpleLoadBal-PT-02-CTLFireability-02 FALSE TECHNIQUES DECISION_DIAGRAMS SEQUENTIAL_PROCESSING UNFOLDING_TO_PT USE_NUPN TOPOLOGICAL
FORMULA SimpleLoadBal-PT-02-CTLFireability-03 TRUE TECHNIQUES DECISION_DIAGRAMS SEQUENTIAL_PROCESSING UNFOLDING_TO_PT USE_NUPN TOPOLOGICAL
FORMULA SimpleLoadBal-PT-02-CTLFireability-04 TRUE TECHNIQUES DECISION_DIAGRAMS SEQUENTIAL_PROCESSING UNFOLDING_TO_PT USE_NUPN TOPOLOGICAL
FORMULA SimpleLoadBal-PT-02-CTLFireability-05 FALSE TECHNIQUES DECISION_DIAGRAMS SEQUENTIAL_PROCESSING UNFOLDING_TO_PT USE_NUPN TOPOLOGICAL
FORMULA SimpleLoadBal-PT-02-CTLFireability-06 FALSE TECHNIQUES DECISION_DIAGRAMS SEQUENTIAL_PROCESSING UNFOLDING_TO_PT USE_NUPN TOPOLOGICAL
FORMULA SimpleLoadBal-PT-02-CTLFireability-07 FALSE TECHNIQUES DECISION_DIAGRAMS SEQUENTIAL_PROCESSING UNFOLDING_TO_PT USE_NUPN TOPOLOGICAL
FORMULA SimpleLoadBal-PT-02-CTLFireability-08 FALSE TECHNIQUES DECISION_DIAGRAMS SEQUENTIAL_PROCESSING UNFOLDING_TO_PT USE_NUPN TOPOLOGICAL
FORMULA SimpleLoadBal-PT-02-CTLFireability-09 FALSE TECHNIQUES DECISION_DIAGRAMS SEQUENTIAL_PROCESSING UNFOLDING_TO_PT USE_NUPN TOPOLOGICAL
FORMULA SimpleLoadBal-PT-02-CTLFireability-10 TRUE TECHNIQUES DECISION_DIAGRAMS SEQUENTIAL_PROCESSING UNFOLDING_TO_PT USE_NUPN TOPOLOGICAL
FORMULA SimpleLoadBal-PT-02-CTLFireability-11 FALSE TECHNIQUES DECISION_DIAGRAMS SEQUENTIAL_PROCESSING UNFOLDING_TO_PT USE_NUPN TOPOLOGICAL
FORMULA SimpleLoadBal-PT-02-CTLFireability-12 FALSE TECHNIQUES DECISION_DIAGRAMS SEQUENTIAL_PROCESSING UNFOLDING_TO_PT USE_NUPN TOPOLOGICAL
FORMULA SimpleLoadBal-PT-02-CTLFireability-13 TRUE TECHNIQUES DECISION_DIAGRAMS SEQUENTIAL_PROCESSING UNFOLDING_TO_PT USE_NUPN TOPOLOGICAL
FORMULA SimpleLoadBal-PT-02-CTLFireability-14 FALSE TECHNIQUES DECISION_DIAGRAMS SEQUENTIAL_PROCESSING UNFOLDING_TO_PT USE_NUPN TOPOLOGICAL
FORMULA SimpleLoadBal-PT-02-CTLFireability-15 FALSE TECHNIQUES DECISION_DIAGRAMS SEQUENTIAL_PROCESSING UNFOLDING_TO_PT USE_NUPN TOPOLOGICAL
Ok.
----------------------------------------------------------------------

BK_STOP 1527347219483

--------------------
content from stderr:

Sequence of Actions to be Executed by the VM

This is useful if one wants to reexecute the tool in the VM from the submitted image disk.

set -x
# this is for BenchKit: configuration of major elements for the test
export BK_INPUT="SimpleLoadBal-PT-02"
export BK_EXAMINATION="CTLFireability"
export BK_TOOL="gspn"
export BK_RESULT_DIR="/tmp/BK_RESULTS/OUTPUTS"
export BK_TIME_CONFINEMENT="3600"
export BK_MEMORY_CONFINEMENT="16384"

# this is specific to your benchmark or test

export BIN_DIR="$HOME/BenchKit/bin"

# remove the execution directoty if it exists (to avoid increse of .vmdk images)
if [ -d execution ] ; then
rm -rf execution
fi

tar xzf /home/mcc/BenchKit/INPUTS/SimpleLoadBal-PT-02.tgz
mv SimpleLoadBal-PT-02 execution
cd execution
pwd
ls -lh

# this is for BenchKit: explicit launching of the test
echo "====================================================================="
echo " Generated by BenchKit 2-3637"
echo " Executing tool gspn"
echo " Input is SimpleLoadBal-PT-02, examination is CTLFireability"
echo " Time confinement is $BK_TIME_CONFINEMENT seconds"
echo " Memory confinement is 16384 MBytes"
echo " Number of cores is 1"
echo " Run identifier is r169-smll-152708736800144"
echo "====================================================================="
echo
echo "--------------------"
echo "content from stdout:"
echo
echo "=== Data for post analysis generated by BenchKit (invocation template)"
echo
if [ "CTLFireability" = "UpperBounds" ] ; then
echo "The expected result is a vector of positive values"
echo NUM_VECTOR
elif [ "CTLFireability" != "StateSpace" ] ; then
echo "The expected result is a vector of booleans"
echo BOOL_VECTOR
else
echo "no data necessary for post analysis"
fi
echo
if [ -f "CTLFireability.txt" ] ; then
echo "here is the order used to build the result vector(from text file)"
for x in $(grep Property CTLFireability.txt | cut -d ' ' -f 2 | sort -u) ; do
echo "FORMULA_NAME $x"
done
elif [ -f "CTLFireability.xml" ] ; then # for cunf (txt files deleted;-)
echo echo "here is the order used to build the result vector(from xml file)"
for x in $(grep '' CTLFireability.xml | cut -d '>' -f 2 | cut -d '<' -f 1 | sort -u) ; do
echo "FORMULA_NAME $x"
done
fi
echo
echo "=== Now, execution of the tool begins"
echo
echo -n "BK_START "
date -u +%s%3N
echo
timeout -s 9 $BK_TIME_CONFINEMENT bash -c "/home/mcc/BenchKit/BenchKit_head.sh 2> STDERR ; echo ; echo -n \"BK_STOP \" ; date -u +%s%3N"
if [ $? -eq 137 ] ; then
echo
echo "BK_TIME_CONFINEMENT_REACHED"
fi
echo
echo "--------------------"
echo "content from stderr:"
echo
cat STDERR ;