Execution Chart

We display below the execution chart for this examination (boot time has been removed).

Trace from the execution

Waiting for the VM to be ready (probing ssh)
...................
/home/mcc/execution
total 216K
-rw-r--r-- 1 mcc users 4.0K May 15 18:54 CTLCardinality.txt
-rw-r--r-- 1 mcc users 22K May 15 18:54 CTLCardinality.xml
-rw-r--r-- 1 mcc users 2.7K May 15 18:54 CTLFireability.txt
-rw-r--r-- 1 mcc users 19K May 15 18:54 CTLFireability.xml
-rw-r--r-- 1 mcc users 4.0K May 15 18:50 GenericPropertiesDefinition.xml
-rw-r--r-- 1 mcc users 6.0K May 15 18:50 GenericPropertiesVerdict.xml
-rw-r--r-- 1 mcc users 2.3K May 15 18:54 LTLCardinality.txt
-rw-r--r-- 1 mcc users 11K May 15 18:54 LTLCardinality.xml
-rw-r--r-- 1 mcc users 1.9K May 15 18:54 LTLFireability.txt
-rw-r--r-- 1 mcc users 9.6K May 15 18:54 LTLFireability.xml
-rw-r--r-- 1 mcc users 3.8K May 15 18:54 ReachabilityCardinality.txt
-rw-r--r-- 1 mcc users 20K May 15 18:54 ReachabilityCardinality.xml
-rw-r--r-- 1 mcc users 105 May 15 18:54 ReachabilityDeadlock.txt
-rw-r--r-- 1 mcc users 343 May 15 18:54 ReachabilityDeadlock.xml
-rw-r--r-- 1 mcc users 3.2K May 15 18:54 ReachabilityFireability.txt
-rw-r--r-- 1 mcc users 20K May 15 18:54 ReachabilityFireability.xml
-rw-r--r-- 1 mcc users 1.6K May 15 18:54 UpperBounds.txt
-rw-r--r-- 1 mcc users 3.6K May 15 18:54 UpperBounds.xml
-rw-r--r-- 1 mcc users 5 May 15 18:50 equiv_pt
-rw-r--r-- 1 mcc users 3 May 15 18:50 instance
-rw-r--r-- 1 mcc users 5 May 15 18:50 iscolored
-rw-r--r-- 1 mcc users 42K May 15 18:50 model.pnml
=====================================================================
Generated by BenchKit 2-3637
Executing tool itstoolsl
Input is SafeBus-COL-06, examination is ReachabilityDeadlock
Time confinement is 3600 seconds
Memory confinement is 16384 MBytes
Number of cores is 4
Run identifier is r153-smll-152685551100188
=====================================================================

--------------------
content from stdout:

=== Data for post analysis generated by BenchKit (invocation template)

The expected result is a vector of booleans
BOOL_VECTOR

here is the order used to build the result vector(from text file)
FORMULA_NAME SafeBus-COL-06-ReachabilityDeadlock-0

=== Now, execution of the tool begins

BK_START 1527399070312

05:31:13.248 [main] ERROR PNML validation - The rng grammar file can't be accessed : www.pnml.org
05:31:13.251 [main] ERROR import - Grammar file errors have been raised, the validation can't be done, process will continue without Grammar validation
Flatten gal took : 232 ms
Constant places removed 6 places and 12 transitions.
Iterating post reduction 0 with 6 rules applied. Total rules applied 6 place count 138 transition count 451
Applied a total of 6 rules in 27 ms. Remains 138 /144 variables (removed 6) and now considering 451/463 (removed 12) transitions.
Normalized transition count is 242
// Phase 1: matrix 242 rows 138 cols
Using solver Z3 to compute partial order matrices.
Built C files in :
/home/mcc/execution
Presburger conditions satisfied. Using coverability to approximate state space in K-Induction.
Normalized transition count is 242
// Phase 1: matrix 242 rows 138 cols
invariant :AMC_30 + AMC_31 + AMC_32 + AMC_33 + AMC_34 + AMC_35 + wait_ack_30 + wait_ack_31 + wait_ack_32 + wait_ack_33 + wait_ack_34 + listen_5 + RMC_5 + PMC_5 + wait_msg_5 + loop_em_5 = 1
invariant :cable_free_0 + wait_ack_1 + wait_ack_2 + wait_ack_3 + wait_ack_4 + wait_ack_5 + wait_ack_6 + wait_ack_8 + wait_ack_9 + wait_ack_10 + wait_ack_11 + wait_ack_12 + wait_ack_13 + wait_ack_15 + wait_ack_16 + wait_ack_17 + wait_ack_18 + wait_ack_19 + wait_ack_20 + wait_ack_22 + wait_ack_23 + wait_ack_24 + wait_ack_25 + wait_ack_26 + wait_ack_27 + wait_ack_29 + wait_ack_30 + wait_ack_31 + wait_ack_32 + wait_ack_33 + wait_ack_34 + PMC_0 + PMC_1 + PMC_2 + PMC_3 + PMC_4 + PMC_5 + -1'FMCb_0 = 0
invariant :AMC_12 + AMC_13 + AMC_14 + AMC_15 + AMC_16 + AMC_17 + wait_ack_12 + wait_ack_13 + wait_ack_15 + wait_ack_16 + wait_ack_17 + listen_2 + RMC_2 + PMC_2 + wait_msg_2 + loop_em_2 = 1
invariant :cable_used_5 + -1'FMC_5 + -1'wait_ack_30 + -1'wait_ack_31 + -1'wait_ack_32 + -1'wait_ack_33 + -1'wait_ack_34 + -1'PMC_5 = 0
invariant :FMC_0 + FMC_1 + FMC_2 + FMC_3 + FMC_4 + FMC_5 + FMCb_0 = 1
invariant :Cpt2_0 + Cpt1_1 + Cpt1_2 + Cpt1_3 + Cpt1_4 + Cpt1_5 + -1'AMC_0 + AMC_5 + -1'AMC_6 + AMC_11 + -1'AMC_12 + AMC_17 + -1'AMC_18 + AMC_23 + -1'AMC_24 + AMC_29 + -1'AMC_30 + AMC_35 = 1
invariant :R_tout_0 + S_tout_0 = 1
invariant :cable_used_1 + -1'FMC_1 + -1'wait_ack_6 + -1'wait_ack_8 + -1'wait_ack_9 + -1'wait_ack_10 + -1'wait_ack_11 + -1'PMC_1 = 0
invariant :-1'AMC_6 + -1'AMC_7 + -1'AMC_8 + -1'AMC_9 + -1'AMC_10 + -1'AMC_11 + wait_cable_1 + -1'RMC_1 + -1'PMC_1 = 0
invariant :AMC_0 + AMC_1 + AMC_2 + AMC_3 + AMC_4 + AMC_5 + wait_ack_1 + wait_ack_2 + wait_ack_3 + wait_ack_4 + wait_ack_5 + listen_0 + RMC_0 + PMC_0 + wait_msg_0 + loop_em_0 = 1
invariant :AMC_24 + AMC_25 + AMC_26 + AMC_27 + AMC_28 + AMC_29 + wait_ack_24 + wait_ack_25 + wait_ack_26 + wait_ack_27 + wait_ack_29 + listen_4 + RMC_4 + PMC_4 + wait_msg_4 + loop_em_4 = 1
invariant :cable_used_3 + -1'FMC_3 + -1'wait_ack_18 + -1'wait_ack_19 + -1'wait_ack_20 + -1'wait_ack_22 + -1'wait_ack_23 + -1'PMC_3 = 0
invariant :AMC_18 + AMC_19 + AMC_20 + AMC_21 + AMC_22 + AMC_23 + wait_ack_18 + wait_ack_19 + wait_ack_20 + wait_ack_22 + wait_ack_23 + listen_3 + RMC_3 + PMC_3 + wait_msg_3 + loop_em_3 = 1
invariant :cable_used_2 + -1'FMC_2 + -1'wait_ack_12 + -1'wait_ack_13 + -1'wait_ack_15 + -1'wait_ack_16 + -1'wait_ack_17 + -1'PMC_2 = 0
invariant :wait_ack_30 + wait_ack_31 + wait_ack_32 + wait_ack_33 + wait_ack_34 + wait_cable_5 + listen_5 + wait_msg_5 + loop_em_5 = 1
invariant :Cpt2_4 + -1'Cpt1_4 + AMC_3 + -1'AMC_4 + AMC_9 + -1'AMC_10 + AMC_15 + -1'AMC_16 + AMC_21 + -1'AMC_22 + AMC_27 + -1'AMC_28 + AMC_33 + -1'AMC_34 = 0
invariant :Cpt2_1 + -1'Cpt1_1 + AMC_0 + -1'AMC_1 + AMC_6 + -1'AMC_7 + AMC_12 + -1'AMC_13 + AMC_18 + -1'AMC_19 + AMC_24 + -1'AMC_25 + AMC_30 + -1'AMC_31 = 0
invariant :-1'wait_ack_1 + -1'wait_ack_2 + -1'wait_ack_3 + -1'wait_ack_4 + -1'wait_ack_5 + -1'wait_ack_6 + -1'wait_ack_8 + -1'wait_ack_9 + -1'wait_ack_10 + -1'wait_ack_11 + -1'wait_ack_12 + -1'wait_ack_13 + -1'wait_ack_15 + -1'wait_ack_16 + -1'wait_ack_17 + -1'wait_ack_18 + -1'wait_ack_19 + -1'wait_ack_20 + -1'wait_ack_22 + -1'wait_ack_23 + -1'wait_ack_24 + -1'wait_ack_25 + -1'wait_ack_26 + -1'wait_ack_27 + -1'wait_ack_29 + -1'wait_ack_30 + -1'wait_ack_31 + -1'wait_ack_32 + -1'wait_ack_33 + -1'wait_ack_34 + ACK_0 + MSG_0 + MSG_1 + MSG_2 + MSG_3 + MSG_4 + MSG_5 + T_out_0 = 0
invariant :Cpt2_5 + -1'Cpt1_5 + AMC_4 + -1'AMC_5 + AMC_10 + -1'AMC_11 + AMC_16 + -1'AMC_17 + AMC_22 + -1'AMC_23 + AMC_28 + -1'AMC_29 + AMC_34 + -1'AMC_35 = 0
invariant :cable_used_0 + FMC_1 + FMC_2 + FMC_3 + FMC_4 + FMC_5 + -1'wait_ack_1 + -1'wait_ack_2 + -1'wait_ack_3 + -1'wait_ack_4 + -1'wait_ack_5 + -1'PMC_0 + FMCb_0 = 1
invariant :-1'AMC_12 + -1'AMC_13 + -1'AMC_14 + -1'AMC_15 + -1'AMC_16 + -1'AMC_17 + wait_cable_2 + -1'RMC_2 + -1'PMC_2 = 0
invariant :-1'AMC_18 + -1'AMC_19 + -1'AMC_20 + -1'AMC_21 + -1'AMC_22 + -1'AMC_23 + wait_cable_3 + -1'RMC_3 + -1'PMC_3 = 0
invariant :cable_used_4 + -1'FMC_4 + -1'wait_ack_24 + -1'wait_ack_25 + -1'wait_ack_26 + -1'wait_ack_27 + -1'wait_ack_29 + -1'PMC_4 = 0
invariant :Cpt1_0 + Cpt1_1 + Cpt1_2 + Cpt1_3 + Cpt1_4 + Cpt1_5 = 1
invariant :AMC_6 + AMC_7 + AMC_8 + AMC_9 + AMC_10 + AMC_11 + wait_ack_6 + wait_ack_8 + wait_ack_9 + wait_ack_10 + wait_ack_11 + listen_1 + RMC_1 + PMC_1 + wait_msg_1 + loop_em_1 = 1
invariant :Cpt2_2 + -1'Cpt1_2 + AMC_1 + -1'AMC_2 + AMC_7 + -1'AMC_8 + AMC_13 + -1'AMC_14 + AMC_19 + -1'AMC_20 + AMC_25 + -1'AMC_26 + AMC_31 + -1'AMC_32 = 0
invariant :wait_ack_1 + wait_ack_2 + wait_ack_3 + wait_ack_4 + wait_ack_5 + wait_cable_0 + listen_0 + wait_msg_0 + loop_em_0 = 1
invariant :wait_ack_24 + wait_ack_25 + wait_ack_26 + wait_ack_27 + wait_ack_29 + wait_cable_4 + listen_4 + wait_msg_4 + loop_em_4 = 1
invariant :Cpt2_3 + -1'Cpt1_3 + AMC_2 + -1'AMC_3 + AMC_8 + -1'AMC_9 + AMC_14 + -1'AMC_15 + AMC_20 + -1'AMC_21 + AMC_26 + -1'AMC_27 + AMC_32 + -1'AMC_33 = 0
Invoking ITS tools like this :CommandLine [args=[/home/mcc/BenchKit/itstools/plugins/fr.lip6.move.gal.itstools.binaries_1.0.0.201805241334/bin/its-ctl-linux64, --gc-threshold, 2000000, --quiet, -i, /home/mcc/execution/ReachabilityDeadlock.pnml.gal, -t, CGAL, -ctl, DEADLOCK], workingDir=/home/mcc/execution]

its-ctl command run as :

/home/mcc/BenchKit/itstools/plugins/fr.lip6.move.gal.itstools.binaries_1.0.0.201805241334/bin/its-ctl-linux64 --gc-threshold 2000000 --quiet -i /home/mcc/execution/ReachabilityDeadlock.pnml.gal -t CGAL -ctl DEADLOCK
No direction supplied, using forward translation only.
built 337 ordering constraints for composite.
Model ,|S| ,Time ,Mem(kb) ,fin. SDD ,fin. DDD ,peak SDD ,peak DDD ,SDD Hom ,SDD cache peak ,DDD Hom ,DDD cachepeak ,SHom cache
reachable,6.81676e+06,67.5831,1549584,64456,205,3.00195e+06,2319,863,2.30698e+06,78,29013,0


Model ,|S| ,Time ,Mem(kb) ,fin. SDD ,fin. DDD ,peak SDD ,peak DDD ,SDD Hom ,SDD cache peak ,DDD Hom ,DDD cachepeak ,SHom cache
dead,0,73.9353,1535436,1,0,3.00195e+06,18566,5637,2.30698e+06,295,111882,4200103

System contains 0 deadlocks (shown below if less than --print-limit option) !
FORMULA SafeBus-COL-06-ReachabilityDeadlock-0 FALSE TECHNIQUES DECISION_DIAGRAMS TOPOLOGICAL USE_NUPN
[ 0 ]
Running compilation step : CommandLine [args=[gcc, -c, -I/home/mcc/BenchKit//lts_install_dir//include, -I., -std=c99, -fPIC, -O3, model.c], workingDir=/home/mcc/execution]
WARNING : LTS min runner thread was asked to interrupt. Dying gracefully.

BK_STOP 1527399151060

--------------------
content from stderr:

+ export BINDIR=/home/mcc/BenchKit/
+ BINDIR=/home/mcc/BenchKit/
++ pwd
+ export MODEL=/home/mcc/execution
+ MODEL=/home/mcc/execution
+ /home/mcc/BenchKit//runeclipse.sh /home/mcc/execution ReachabilityDeadlock -its -ltsminpath /home/mcc/BenchKit//lts_install_dir/ -louvain -smt
+ ulimit -s 65536
+ [[ -z '' ]]
+ export LTSMIN_MEM_SIZE=8589934592
+ LTSMIN_MEM_SIZE=8589934592
+ /home/mcc/BenchKit//itstools/its-tools -consoleLog -data /home/mcc/execution/workspace -pnfolder /home/mcc/execution -examination ReachabilityDeadlock -z3path /home/mcc/BenchKit//z3/bin/z3 -yices2path /home/mcc/BenchKit//yices/bin/yices -its -ltsminpath /home/mcc/BenchKit//lts_install_dir/ -louvain -smt -vmargs -Dosgi.locking=none -Declipse.stateSaveDelayInterval=-1 -Dosgi.configuration.area=/tmp/.eclipse -Xss8m -Xms40m -Xmx8192m -Dfile.encoding=UTF-8 -Dosgi.requiredJavaVersion=1.6
May 27, 2018 5:31:12 AM fr.lip6.move.gal.application.Application start
INFO: Running its-tools with arguments : [-pnfolder, /home/mcc/execution, -examination, ReachabilityDeadlock, -z3path, /home/mcc/BenchKit//z3/bin/z3, -yices2path, /home/mcc/BenchKit//yices/bin/yices, -its, -ltsminpath, /home/mcc/BenchKit//lts_install_dir/, -louvain, -smt]
May 27, 2018 5:31:12 AM fr.lip6.move.gal.application.MccTranslator transformPNML
INFO: Parsing pnml file : /home/mcc/execution/model.pnml
May 27, 2018 5:31:12 AM fr.lip6.move.gal.pnml.togal.PnmlToGalTransformer transform
INFO: Detected file is not PT type :http://www.pnml.org/version-2009/grammar/symmetricnet
May 27, 2018 5:31:13 AM fr.lip6.move.gal.pnml.togal.PnmlToGalTransformer transform
INFO: Load time of PNML (colored model parsed with PNMLFW) : 959 ms
May 27, 2018 5:31:13 AM fr.lip6.move.gal.pnml.togal.HLGALTransformer handlePage
INFO: Transformed 20 places.
May 27, 2018 5:31:13 AM fr.lip6.move.gal.pnml.togal.HLGALTransformer handlePage
INFO: Computed order using colors.
May 27, 2018 5:31:13 AM fr.lip6.move.gal.pnml.togal.HLGALTransformer handlePage
INFO: sort/places :Dom->AMC,wait_ack,
Dot->cable_free,ACK,T_out,R_tout,S_tout,FMCb,
It->Cpt2,Cpt1,msgl,cable_used,FMC,wait_cable,listen,RMC,PMC,MSG,wait_msg,loop_em,

May 27, 2018 5:31:13 AM fr.lip6.move.gal.pnml.togal.HLGALTransformer handlePage
INFO: Transformed 14 transitions.
May 27, 2018 5:31:13 AM fr.lip6.move.gal.pnml.togal.PnmlToGalTransformer transform
INFO: Computed order based on color domains.
May 27, 2018 5:31:13 AM fr.lip6.move.serialization.SerializationUtil systemToFile
INFO: Time to serialize gal into /home/mcc/execution/model.pnml.img.gal : 7 ms
May 27, 2018 5:31:13 AM fr.lip6.move.gal.instantiate.Instantiator fuseEqualParameters
INFO: Fused parameters : $x and $y of transition C_refuse
May 27, 2018 5:31:13 AM fr.lip6.move.gal.instantiate.Instantiator fuseEqualParameters
INFO: Fused parameters : $i and $j of transition C_free
May 27, 2018 5:31:13 AM fr.lip6.move.gal.instantiate.Instantiator fuseEqualParameters
INFO: Fused parameters : $x and $y of transition C_provide
May 27, 2018 5:31:13 AM fr.lip6.move.gal.instantiate.Instantiator fuseEqualParameters
INFO: Fused parameters : $r and $i of transition I_rec1
May 27, 2018 5:31:13 AM fr.lip6.move.gal.instantiate.Instantiator fuseEqualParameters
INFO: Fused parameters : $i and $j of transition I_emit
May 27, 2018 5:31:13 AM fr.lip6.move.gal.instantiate.Instantiator fuseEqualParameters
INFO: Fused parameters : $i and $j of transition I_refused
May 27, 2018 5:31:13 AM fr.lip6.move.gal.instantiate.Instantiator fuseEqualParameters
INFO: Fused parameters : $r and $i of transition I_rec2
May 27, 2018 5:31:13 AM fr.lip6.move.gal.instantiate.DomainAnalyzer computeVariableDomains
INFO: Found a total of 1 fixed domain variables (out of 150 variables) in GAL type Document
May 27, 2018 5:31:13 AM fr.lip6.move.gal.instantiate.Simplifier printConstantVars
INFO: Found a total of 6 constant array cells/variables (out of 150 variables) in type Document
May 27, 2018 5:31:13 AM fr.lip6.move.gal.instantiate.Simplifier printConstantVars
INFO: msgl[0-5],
May 27, 2018 5:31:13 AM fr.lip6.move.gal.instantiate.Instantiator instantiateParameters
INFO: On-the-fly reduction of False transitions avoided exploring 6.0 instantiations of transitions. Total transitions/syncs built is 340
May 27, 2018 5:31:13 AM fr.lip6.move.gal.instantiate.DomainAnalyzer computeVariableDomains
INFO: Found a total of 1 fixed domain variables (out of 150 variables) in GAL type Document
May 27, 2018 5:31:13 AM fr.lip6.move.gal.instantiate.Simplifier printConstantVars
INFO: Found a total of 6 constant array cells/variables (out of 150 variables) in type Document
May 27, 2018 5:31:13 AM fr.lip6.move.gal.instantiate.Simplifier printConstantVars
INFO: msgl[0-5],
May 27, 2018 5:31:13 AM fr.lip6.move.gal.instantiate.Simplifier simplifyConstantVariables
INFO: Removed constant array :msgl[]
May 27, 2018 5:31:14 AM fr.lip6.move.gal.instantiate.GALRewriter flatten
INFO: Flatten gal took : 134 ms
May 27, 2018 5:31:14 AM fr.lip6.move.serialization.SerializationUtil systemToFile
INFO: Time to serialize gal into /home/mcc/execution/model.pnml.simple.gal : 9 ms
May 27, 2018 5:31:14 AM fr.lip6.move.gal.semantics.DeterministicNextBuilder getDeterministicNext
INFO: Input system was not deterministic with 34 transitions. Expanding to a total of 586 deterministic transitions.
May 27, 2018 5:31:14 AM fr.lip6.move.gal.semantics.DeterministicNextBuilder getDeterministicNext
INFO: Determinization took 6 ms.
May 27, 2018 5:31:14 AM fr.lip6.move.gal.application.MccTranslator applyOrder
INFO: Applying decomposition
May 27, 2018 5:31:14 AM fr.lip6.move.gal.semantics.DeterministicNextBuilder getDeterministicNext
INFO: Input system was already deterministic with 451 transitions.
May 27, 2018 5:31:14 AM fr.lip6.move.gal.instantiate.GALRewriter flatten
INFO: Flatten gal took : 177 ms
May 27, 2018 5:31:15 AM fr.lip6.move.gal.instantiate.GALRewriter flatten
INFO: Flatten gal took : 154 ms
May 27, 2018 5:31:15 AM fr.lip6.move.gal.instantiate.CompositeBuilder decomposeWithOrder
INFO: Decomposing Gal with order
May 27, 2018 5:31:15 AM fr.lip6.move.gal.instantiate.GALRewriter flatten
INFO: Flatten gal took : 100 ms
May 27, 2018 5:31:15 AM fr.lip6.move.gal.instantiate.CompositeBuilder rewriteArraysToAllowPartition
INFO: Rewriting arrays to variables to allow decomposition.
May 27, 2018 5:31:15 AM fr.lip6.move.gal.gal2smt.bmc.KInductionSolver computeAndDeclareInvariants
INFO: Computed 29 place invariants in 37 ms
May 27, 2018 5:31:15 AM fr.lip6.move.gal.instantiate.Instantiator fuseIsomorphicEffects
INFO: Removed a total of 1629 redundant transitions.
May 27, 2018 5:31:15 AM fr.lip6.move.serialization.SerializationUtil systemToFile
INFO: Time to serialize gal into /home/mcc/execution/ReachabilityDeadlock.pnml.gal : 15 ms
May 27, 2018 5:31:15 AM fr.lip6.move.gal.gal2smt.bmc.KInductionSolver init
INFO: Proved 138 variables to be positive in 528 ms
May 27, 2018 5:31:15 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver computeAblingMatrix
INFO: Computing symmetric may disable matrix : 451 transitions.
May 27, 2018 5:31:15 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of disable matrix completed :0/451 took 0 ms. Total solver calls (SAT/UNSAT): 0(0/0)
May 27, 2018 5:31:15 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of Complete disable matrix. took 74 ms. Total solver calls (SAT/UNSAT): 0(0/0)
May 27, 2018 5:31:15 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver computeAblingMatrix
INFO: Computing symmetric may enable matrix : 451 transitions.
May 27, 2018 5:31:15 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of Complete enable matrix. took 50 ms. Total solver calls (SAT/UNSAT): 0(0/0)
May 27, 2018 5:31:15 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver computeCoEnablingMatrix
INFO: Computing symmetric co enabling matrix : 451 transitions.
May 27, 2018 5:31:19 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(2/451) took 3468 ms. Total solver calls (SAT/UNSAT): 831(685/146)
May 27, 2018 5:31:27 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(6/451) took 11624 ms. Total solver calls (SAT/UNSAT): 2322(1896/426)
May 27, 2018 5:31:30 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(10/451) took 14758 ms. Total solver calls (SAT/UNSAT): 3788(3086/702)
May 27, 2018 5:31:34 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(11/451) took 18670 ms. Total solver calls (SAT/UNSAT): 4161(3390/771)
May 27, 2018 5:31:37 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(15/451) took 21877 ms. Total solver calls (SAT/UNSAT): 5607(4563/1044)
May 27, 2018 5:31:41 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(16/451) took 25883 ms. Total solver calls (SAT/UNSAT): 5975(4863/1112)
May 27, 2018 5:31:44 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(20/451) took 29000 ms. Total solver calls (SAT/UNSAT): 7401(6019/1382)
May 27, 2018 5:31:49 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(21/451) took 33716 ms. Total solver calls (SAT/UNSAT): 7764(6315/1449)
May 27, 2018 5:31:52 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(25/451) took 36738 ms. Total solver calls (SAT/UNSAT): 9170(7454/1716)
May 27, 2018 5:31:56 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(26/451) took 40745 ms. Total solver calls (SAT/UNSAT): 9528(7746/1782)
May 27, 2018 5:32:00 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(30/451) took 44884 ms. Total solver calls (SAT/UNSAT): 10914(8868/2046)
May 27, 2018 5:32:05 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(32/451) took 49153 ms. Total solver calls (SAT/UNSAT): 11689(9112/2577)
May 27, 2018 5:32:08 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(33/451) took 52596 ms. Total solver calls (SAT/UNSAT): 12075(9355/2720)
May 27, 2018 5:32:12 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(35/451) took 56579 ms. Total solver calls (SAT/UNSAT): 12844(9838/3006)
May 27, 2018 5:32:16 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(38/451) took 60807 ms. Total solver calls (SAT/UNSAT): 13930(10287/3643)
May 27, 2018 5:32:19 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(39/451) took 63909 ms. Total solver calls (SAT/UNSAT): 14280(10495/3785)
May 27, 2018 5:32:25 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(41/451) took 69184 ms. Total solver calls (SAT/UNSAT): 14977(10908/4069)
SMT solver raised 'unknown', retrying with same input.
Skipping mayMatrices nes/nds SMT solver raised an error :unknown
java.lang.RuntimeException: SMT solver raised an error :unknown
at fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver.computeCoEnablingMatrix(NecessaryEnablingsolver.java:490)
at fr.lip6.move.gal.gal2pins.Gal2PinsTransformerNext.printLabels(Gal2PinsTransformerNext.java:530)
at fr.lip6.move.gal.gal2pins.Gal2PinsTransformerNext.printDependencyMatrix(Gal2PinsTransformerNext.java:209)
at fr.lip6.move.gal.gal2pins.Gal2PinsTransformerNext.buildBodyFile(Gal2PinsTransformerNext.java:85)
at fr.lip6.move.gal.gal2pins.Gal2PinsTransformerNext.transform(Gal2PinsTransformerNext.java:830)
at fr.lip6.move.gal.application.LTSminRunner$1.run(LTSminRunner.java:71)
at java.lang.Thread.run(Thread.java:748)
May 27, 2018 5:32:29 AM fr.lip6.move.gal.gal2pins.Gal2PinsTransformerNext transform
INFO: Built C files in 75110ms conformant to PINS in folder :/home/mcc/execution

Sequence of Actions to be Executed by the VM

This is useful if one wants to reexecute the tool in the VM from the submitted image disk.

set -x
# this is for BenchKit: configuration of major elements for the test
export BK_INPUT="SafeBus-COL-06"
export BK_EXAMINATION="ReachabilityDeadlock"
export BK_TOOL="itstoolsl"
export BK_RESULT_DIR="/tmp/BK_RESULTS/OUTPUTS"
export BK_TIME_CONFINEMENT="3600"
export BK_MEMORY_CONFINEMENT="16384"

# this is specific to your benchmark or test

export BIN_DIR="$HOME/BenchKit/bin"

# remove the execution directoty if it exists (to avoid increse of .vmdk images)
if [ -d execution ] ; then
rm -rf execution
fi

tar xzf /home/mcc/BenchKit/INPUTS/SafeBus-COL-06.tgz
mv SafeBus-COL-06 execution
cd execution
pwd
ls -lh

# this is for BenchKit: explicit launching of the test
echo "====================================================================="
echo " Generated by BenchKit 2-3637"
echo " Executing tool itstoolsl"
echo " Input is SafeBus-COL-06, examination is ReachabilityDeadlock"
echo " Time confinement is $BK_TIME_CONFINEMENT seconds"
echo " Memory confinement is 16384 MBytes"
echo " Number of cores is 4"
echo " Run identifier is r153-smll-152685551100188"
echo "====================================================================="
echo
echo "--------------------"
echo "content from stdout:"
echo
echo "=== Data for post analysis generated by BenchKit (invocation template)"
echo
if [ "ReachabilityDeadlock" = "UpperBounds" ] ; then
echo "The expected result is a vector of positive values"
echo NUM_VECTOR
elif [ "ReachabilityDeadlock" != "StateSpace" ] ; then
echo "The expected result is a vector of booleans"
echo BOOL_VECTOR
else
echo "no data necessary for post analysis"
fi
echo
if [ -f "ReachabilityDeadlock.txt" ] ; then
echo "here is the order used to build the result vector(from text file)"
for x in $(grep Property ReachabilityDeadlock.txt | cut -d ' ' -f 2 | sort -u) ; do
echo "FORMULA_NAME $x"
done
elif [ -f "ReachabilityDeadlock.xml" ] ; then # for cunf (txt files deleted;-)
echo echo "here is the order used to build the result vector(from xml file)"
for x in $(grep '' ReachabilityDeadlock.xml | cut -d '>' -f 2 | cut -d '<' -f 1 | sort -u) ; do
echo "FORMULA_NAME $x"
done
fi
echo
echo "=== Now, execution of the tool begins"
echo
echo -n "BK_START "
date -u +%s%3N
echo
timeout -s 9 $BK_TIME_CONFINEMENT bash -c "/home/mcc/BenchKit/BenchKit_head.sh 2> STDERR ; echo ; echo -n \"BK_STOP \" ; date -u +%s%3N"
if [ $? -eq 137 ] ; then
echo
echo "BK_TIME_CONFINEMENT_REACHED"
fi
echo
echo "--------------------"
echo "content from stderr:"
echo
cat STDERR ;