Execution Chart

We display below the execution chart for this examination (boot time has been removed).

Trace from the execution

Waiting for the VM to be ready (probing ssh)
...................
/home/mcc/execution
total 328K
-rw-r--r-- 1 mcc users 3.4K May 15 18:54 CTLCardinality.txt
-rw-r--r-- 1 mcc users 18K May 15 18:54 CTLCardinality.xml
-rw-r--r-- 1 mcc users 2.0K May 15 18:54 CTLFireability.txt
-rw-r--r-- 1 mcc users 10K May 15 18:54 CTLFireability.xml
-rw-r--r-- 1 mcc users 4.0K May 15 18:50 GenericPropertiesDefinition.xml
-rw-r--r-- 1 mcc users 6.1K May 15 18:50 GenericPropertiesVerdict.xml
-rw-r--r-- 1 mcc users 2.3K May 15 18:54 LTLCardinality.txt
-rw-r--r-- 1 mcc users 9.0K May 15 18:54 LTLCardinality.xml
-rw-r--r-- 1 mcc users 1.9K May 15 18:54 LTLFireability.txt
-rw-r--r-- 1 mcc users 9.7K May 15 18:54 LTLFireability.xml
-rw-r--r-- 1 mcc users 3.9K May 15 18:54 ReachabilityCardinality.txt
-rw-r--r-- 1 mcc users 20K May 15 18:54 ReachabilityCardinality.xml
-rw-r--r-- 1 mcc users 112 May 15 18:54 ReachabilityDeadlock.txt
-rw-r--r-- 1 mcc users 350 May 15 18:54 ReachabilityDeadlock.xml
-rw-r--r-- 1 mcc users 2.6K May 15 18:54 ReachabilityFireability.txt
-rw-r--r-- 1 mcc users 15K May 15 18:54 ReachabilityFireability.xml
-rw-r--r-- 1 mcc users 1.7K May 15 18:54 UpperBounds.txt
-rw-r--r-- 1 mcc users 3.7K May 15 18:54 UpperBounds.xml
-rw-r--r-- 1 mcc users 6 May 15 18:50 equiv_col
-rw-r--r-- 1 mcc users 11 May 15 18:50 instance
-rw-r--r-- 1 mcc users 6 May 15 18:50 iscolored
-rw-r--r-- 1 mcc users 172K May 15 18:50 model.pnml
=====================================================================
Generated by BenchKit 2-3637
Executing tool itstoolsl
Input is RwMutex-PT-r0010w0100, examination is ReachabilityCardinality
Time confinement is 3600 seconds
Memory confinement is 16384 MBytes
Number of cores is 4
Run identifier is r153-smll-152685551000117
=====================================================================

--------------------
content from stdout:

=== Data for post analysis generated by BenchKit (invocation template)

The expected result is a vector of booleans
BOOL_VECTOR

here is the order used to build the result vector(from text file)
FORMULA_NAME RwMutex-PT-r0010w0100-ReachabilityCardinality-00
FORMULA_NAME RwMutex-PT-r0010w0100-ReachabilityCardinality-01
FORMULA_NAME RwMutex-PT-r0010w0100-ReachabilityCardinality-02
FORMULA_NAME RwMutex-PT-r0010w0100-ReachabilityCardinality-03
FORMULA_NAME RwMutex-PT-r0010w0100-ReachabilityCardinality-04
FORMULA_NAME RwMutex-PT-r0010w0100-ReachabilityCardinality-05
FORMULA_NAME RwMutex-PT-r0010w0100-ReachabilityCardinality-06
FORMULA_NAME RwMutex-PT-r0010w0100-ReachabilityCardinality-07
FORMULA_NAME RwMutex-PT-r0010w0100-ReachabilityCardinality-08
FORMULA_NAME RwMutex-PT-r0010w0100-ReachabilityCardinality-09
FORMULA_NAME RwMutex-PT-r0010w0100-ReachabilityCardinality-10
FORMULA_NAME RwMutex-PT-r0010w0100-ReachabilityCardinality-11
FORMULA_NAME RwMutex-PT-r0010w0100-ReachabilityCardinality-12
FORMULA_NAME RwMutex-PT-r0010w0100-ReachabilityCardinality-13
FORMULA_NAME RwMutex-PT-r0010w0100-ReachabilityCardinality-14
FORMULA_NAME RwMutex-PT-r0010w0100-ReachabilityCardinality-15

=== Now, execution of the tool begins

BK_START 1527368691764

FORMULA RwMutex-PT-r0010w0100-ReachabilityCardinality-14 TRUE TECHNIQUES TOPOLOGICAL INITIAL_STATE
FORMULA RwMutex-PT-r0010w0100-ReachabilityCardinality-13 TRUE TECHNIQUES TOPOLOGICAL INITIAL_STATE
FORMULA RwMutex-PT-r0010w0100-ReachabilityCardinality-12 TRUE TECHNIQUES TOPOLOGICAL INITIAL_STATE
FORMULA RwMutex-PT-r0010w0100-ReachabilityCardinality-10 TRUE TECHNIQUES TOPOLOGICAL INITIAL_STATE
FORMULA RwMutex-PT-r0010w0100-ReachabilityCardinality-08 FALSE TECHNIQUES TOPOLOGICAL INITIAL_STATE
FORMULA RwMutex-PT-r0010w0100-ReachabilityCardinality-07 TRUE TECHNIQUES TOPOLOGICAL INITIAL_STATE
FORMULA RwMutex-PT-r0010w0100-ReachabilityCardinality-05 TRUE TECHNIQUES TOPOLOGICAL INITIAL_STATE
FORMULA RwMutex-PT-r0010w0100-ReachabilityCardinality-03 TRUE TECHNIQUES TOPOLOGICAL INITIAL_STATE
FORMULA RwMutex-PT-r0010w0100-ReachabilityCardinality-02 FALSE TECHNIQUES TOPOLOGICAL INITIAL_STATE
FORMULA RwMutex-PT-r0010w0100-ReachabilityCardinality-01 TRUE TECHNIQUES TOPOLOGICAL INITIAL_STATE
Using solver Z3 to compute partial order matrices.
Built C files in :
/home/mcc/execution
Invoking ITS tools like this :CommandLine [args=[/home/mcc/BenchKit/itstools/plugins/fr.lip6.move.gal.itstools.binaries_1.0.0.201805241334/bin/its-reach-linux64, --gc-threshold, 2000000, --quiet, -i, /home/mcc/execution/ReachabilityCardinality.pnml.gal, -t, CGAL, -reachable-file, ReachabilityCardinality.prop, --nowitness], workingDir=/home/mcc/execution]

its-reach command run as :

/home/mcc/BenchKit/itstools/plugins/fr.lip6.move.gal.itstools.binaries_1.0.0.201805241334/bin/its-reach-linux64 --gc-threshold 2000000 --quiet -i /home/mcc/execution/ReachabilityCardinality.pnml.gal -t CGAL -reachable-file ReachabilityCardinality.prop --nowitness
Loading property file ReachabilityCardinality.prop.
Read [reachable] property : RwMutex-PT-r0010w0100-ReachabilityCardinality-00 with value :(((p99>=3)||((p7<=p97)&&(p81<=p53)))&&((p84>=2)&&((p77>=1)||(p6>=1))))
Read [invariant] property : RwMutex-PT-r0010w0100-ReachabilityCardinality-04 with value :((((p100<=p96)||(p37>=2))&&((p26<=p65)||(p100>=1)))||(((p175<=p34)||(p83<=p161))||(p44>=3)))
Read [reachable] property : RwMutex-PT-r0010w0100-ReachabilityCardinality-06 with value :(((p133>=3)&&(p14>=2))&&(p114>=1))
Read [invariant] property : RwMutex-PT-r0010w0100-ReachabilityCardinality-09 with value :(p66>=1)
Read [reachable] property : RwMutex-PT-r0010w0100-ReachabilityCardinality-11 with value :((((p8>=3)&&(p40<=p9))||(p32<=p186))&&((!(p104>=1))||((p23>=3)&&(p203>=3))))
Read [reachable] property : RwMutex-PT-r0010w0100-ReachabilityCardinality-15 with value :(p21<=p117)
Presburger conditions satisfied. Using coverability to approximate state space in K-Induction.
// Phase 1: matrix 220 rows 230 cols
invariant :p105 + p225 = 1
invariant :p167 + p47 = 1
invariant :p183 + p63 = 1
invariant :p186 + p66 = 1
invariant :p188 + p68 = 1
invariant :p125 + -1'p129 + -1'p5 + p9 = 0
invariant :p184 + p64 = 1
invariant :p161 + p41 = 1
invariant :p170 + p50 = 1
invariant :p122 + -1'p129 + -1'p2 + p9 = 0
invariant :p174 + p54 = 1
invariant :p157 + p37 = 1
invariant :p191 + p71 = 1
invariant :p180 + p60 = 1
invariant :p121 + -1'p129 + p131 + p9 = 1
invariant :p193 + p73 = 1
invariant :p179 + p59 = 1
invariant :p165 + p45 = 1
invariant :p195 + p75 = 1
invariant :p127 + -1'p129 + -1'p7 + p9 = 0
invariant :p187 + p67 = 1
invariant :p120 + -1'p129 + p130 + p9 = 1
invariant :p209 + p89 = 1
invariant :p159 + p39 = 1
invariant :p168 + p48 = 1
invariant :p119 + p9 = 1
invariant :p158 + p38 = 1
invariant :p181 + p61 = 1
invariant :p163 + p43 = 1
invariant :p207 + p87 = 1
invariant :p11 + p129 + -1'p131 + -1'p9 = 0
invariant :p178 + p58 = 1
invariant :p1 + p129 + p132 + p133 + -1'p14 + -1'p15 + -1'p16 + -1'p17 + -1'p18 + -1'p19 + -1'p20 + -1'p21 + -1'p22 + p220 + p221 + p222 + p223 + p224 + p225 + p226 + p227 + p228 + p229 + -1'p23 + p230 + -1'p24 + -1'p25 + -1'p26 + -1'p27 + -1'p28 + -1'p29 + -1'p30 + -1'p31 + -1'p32 + -1'p33 + -1'p34 + -1'p35 + -1'p36 + -1'p37 + -1'p38 + -1'p39 + -1'p40 + -1'p41 + -1'p42 + -1'p43 + -1'p44 + -1'p45 + -1'p46 + -1'p47 + -1'p48 + -1'p49 + -1'p50 + -1'p51 + -1'p52 + -1'p53 + -1'p54 + -1'p55 + -1'p56 + -1'p57 + -1'p58 + -1'p59 + -1'p60 + -1'p61 + -1'p62 + -1'p63 + -1'p64 + -1'p65 + -1'p66 + -1'p67 + -1'p68 + -1'p69 + -1'p70 + -1'p71 + -1'p72 + -1'p73 + -1'p74 + -1'p75 + -1'p76 + -1'p77 + -1'p78 + -1'p79 + -1'p80 + -1'p81 + -1'p82 + -1'p83 + -1'p84 + -1'p85 + -1'p86 + -1'p87 + -1'p88 + -1'p89 + -1'p9 + -1'p90 + -1'p91 + -1'p92 + -1'p93 + -1'p94 + -1'p95 + -1'p96 + -1'p97 + -1'p98 + -1'p99 = -86
invariant :p148 + p28 = 1
invariant :p215 + p95 = 1
invariant :p101 + p221 = 1
invariant :p153 + p33 = 1
invariant :p203 + p83 = 1
invariant :p201 + p81 = 1
invariant :p204 + p84 = 1
invariant :p196 + p76 = 1
invariant :p198 + p78 = 1
invariant :p218 + p98 = 1
invariant :p104 + p224 = 1
invariant :p176 + p56 = 1
invariant :p169 + p49 = 1
invariant :p197 + p77 = 1
invariant :p111 + -1'p129 + -1'p132 + -1'p133 + p14 + p15 + p16 + p17 + p18 + p19 + p20 + p21 + p22 + -1'p220 + -1'p221 + -1'p222 + -1'p223 + -1'p224 + -1'p225 + -1'p226 + -1'p227 + -1'p228 + -1'p229 + p23 + -1'p230 + p24 + p25 + p26 + p27 + p28 + p29 + p30 + p31 + p32 + p33 + p34 + p35 + p36 + p37 + p38 + p39 + p40 + p41 + p42 + p43 + p44 + p45 + p46 + p47 + p48 + p49 + p50 + p51 + p52 + p53 + p54 + p55 + p56 + p57 + p58 + p59 + p60 + p61 + p62 + p63 + p64 + p65 + p66 + p67 + p68 + p69 + p70 + p71 + p72 + p73 + p74 + p75 + p76 + p77 + p78 + p79 + p80 + p81 + p82 + p83 + p84 + p85 + p86 + p87 + p88 + p89 + p9 + p90 + p91 + p92 + p93 + p94 + p95 + p96 + p97 + p98 + p99 = 87
invariant :p172 + p52 = 1
invariant :p217 + p97 = 1
invariant :p135 + p15 = 1
invariant :p175 + p55 = 1
invariant :p108 + p228 = 1
invariant :p112 + p2 = 1
invariant :p205 + p85 = 1
invariant :p145 + p25 = 1
invariant :p162 + p42 = 1
invariant :p206 + p86 = 1
invariant :p200 + p80 = 1
invariant :p214 + p94 = 1
invariant :p143 + p23 = 1
invariant :p100 + p220 = 1
invariant :p13 + p133 = 1
invariant :p216 + p96 = 1
invariant :p166 + p46 = 1
invariant :p192 + p72 = 1
invariant :p182 + p62 = 1
invariant :p124 + -1'p129 + -1'p4 + p9 = 0
invariant :p109 + p229 = 1
invariant :p194 + p74 = 1
invariant :p114 + p4 = 1
invariant :p152 + p32 = 1
invariant :p117 + p7 = 1
invariant :p164 + p44 = 1
invariant :p115 + p5 = 1
invariant :p149 + p29 = 1
invariant :p147 + p27 = 1
invariant :p118 + p8 = 1
invariant :p128 + -1'p129 + -1'p8 + p9 = 0
invariant :p126 + -1'p129 + -1'p6 + p9 = 0
invariant :p123 + -1'p129 + -1'p3 + p9 = 0
invariant :p146 + p26 = 1
invariant :p151 + p31 = 1
invariant :p138 + p18 = 1
invariant :p113 + p3 = 1
invariant :p106 + p226 = 1
invariant :p190 + p70 = 1
invariant :p208 + p88 = 1
invariant :p212 + p92 = 1
invariant :p110 + p230 = 1
invariant :p171 + p51 = 1
invariant :p102 + p222 = 1
invariant :p154 + p34 = 1
invariant :p140 + p20 = 1
invariant :p160 + p40 = 1
invariant :p107 + p227 = 1
invariant :p139 + p19 = 1
invariant :p185 + p65 = 1
invariant :p141 + p21 = 1
invariant :p210 + p90 = 1
invariant :p202 + p82 = 1
invariant :p116 + p6 = 1
invariant :p144 + p24 = 1
invariant :p150 + p30 = 1
invariant :p177 + p57 = 1
invariant :p137 + p17 = 1
invariant :p219 + p99 = 1
invariant :p103 + p223 = 1
invariant :p155 + p35 = 1
invariant :p12 + p132 = 1
invariant :p10 + p129 + -1'p130 + -1'p9 = 0
invariant :p199 + p79 = 1
invariant :p189 + p69 = 1
invariant :p173 + p53 = 1
invariant :p136 + p16 = 1
invariant :p142 + p22 = 1
invariant :p156 + p36 = 1
invariant :p134 + p14 = 1
invariant :p213 + p93 = 1
invariant :p211 + p91 = 1
Presburger conditions satisfied. Using coverability to approximate state space in K-Induction.
// Phase 1: matrix 220 rows 230 cols
invariant :p105 + p225 = 1
invariant :p167 + p47 = 1
invariant :p183 + p63 = 1
invariant :p186 + p66 = 1
invariant :p188 + p68 = 1
invariant :p125 + -1'p129 + -1'p5 + p9 = 0
invariant :p184 + p64 = 1
invariant :p161 + p41 = 1
invariant :p170 + p50 = 1
invariant :p122 + -1'p129 + -1'p2 + p9 = 0
invariant :p174 + p54 = 1
invariant :p157 + p37 = 1
invariant :p191 + p71 = 1
invariant :p180 + p60 = 1
invariant :p121 + -1'p129 + p131 + p9 = 1
invariant :p193 + p73 = 1
invariant :p179 + p59 = 1
invariant :p165 + p45 = 1
invariant :p195 + p75 = 1
invariant :p127 + -1'p129 + -1'p7 + p9 = 0
invariant :p187 + p67 = 1
invariant :p120 + -1'p129 + p130 + p9 = 1
invariant :p209 + p89 = 1
invariant :p159 + p39 = 1
invariant :p168 + p48 = 1
invariant :p119 + p9 = 1
invariant :p158 + p38 = 1
invariant :p181 + p61 = 1
invariant :p163 + p43 = 1
invariant :p207 + p87 = 1
invariant :p11 + p129 + -1'p131 + -1'p9 = 0
invariant :p178 + p58 = 1
invariant :p1 + p129 + p132 + p133 + -1'p14 + -1'p15 + -1'p16 + -1'p17 + -1'p18 + -1'p19 + -1'p20 + -1'p21 + -1'p22 + p220 + p221 + p222 + p223 + p224 + p225 + p226 + p227 + p228 + p229 + -1'p23 + p230 + -1'p24 + -1'p25 + -1'p26 + -1'p27 + -1'p28 + -1'p29 + -1'p30 + -1'p31 + -1'p32 + -1'p33 + -1'p34 + -1'p35 + -1'p36 + -1'p37 + -1'p38 + -1'p39 + -1'p40 + -1'p41 + -1'p42 + -1'p43 + -1'p44 + -1'p45 + -1'p46 + -1'p47 + -1'p48 + -1'p49 + -1'p50 + -1'p51 + -1'p52 + -1'p53 + -1'p54 + -1'p55 + -1'p56 + -1'p57 + -1'p58 + -1'p59 + -1'p60 + -1'p61 + -1'p62 + -1'p63 + -1'p64 + -1'p65 + -1'p66 + -1'p67 + -1'p68 + -1'p69 + -1'p70 + -1'p71 + -1'p72 + -1'p73 + -1'p74 + -1'p75 + -1'p76 + -1'p77 + -1'p78 + -1'p79 + -1'p80 + -1'p81 + -1'p82 + -1'p83 + -1'p84 + -1'p85 + -1'p86 + -1'p87 + -1'p88 + -1'p89 + -1'p9 + -1'p90 + -1'p91 + -1'p92 + -1'p93 + -1'p94 + -1'p95 + -1'p96 + -1'p97 + -1'p98 + -1'p99 = -86
invariant :p148 + p28 = 1
invariant :p215 + p95 = 1
invariant :p101 + p221 = 1
invariant :p153 + p33 = 1
invariant :p203 + p83 = 1
invariant :p201 + p81 = 1
invariant :p204 + p84 = 1
invariant :p196 + p76 = 1
invariant :p198 + p78 = 1
invariant :p218 + p98 = 1
invariant :p104 + p224 = 1
invariant :p176 + p56 = 1
invariant :p169 + p49 = 1
invariant :p197 + p77 = 1
invariant :p111 + -1'p129 + -1'p132 + -1'p133 + p14 + p15 + p16 + p17 + p18 + p19 + p20 + p21 + p22 + -1'p220 + -1'p221 + -1'p222 + -1'p223 + -1'p224 + -1'p225 + -1'p226 + -1'p227 + -1'p228 + -1'p229 + p23 + -1'p230 + p24 + p25 + p26 + p27 + p28 + p29 + p30 + p31 + p32 + p33 + p34 + p35 + p36 + p37 + p38 + p39 + p40 + p41 + p42 + p43 + p44 + p45 + p46 + p47 + p48 + p49 + p50 + p51 + p52 + p53 + p54 + p55 + p56 + p57 + p58 + p59 + p60 + p61 + p62 + p63 + p64 + p65 + p66 + p67 + p68 + p69 + p70 + p71 + p72 + p73 + p74 + p75 + p76 + p77 + p78 + p79 + p80 + p81 + p82 + p83 + p84 + p85 + p86 + p87 + p88 + p89 + p9 + p90 + p91 + p92 + p93 + p94 + p95 + p96 + p97 + p98 + p99 = 87
invariant :p172 + p52 = 1
invariant :p217 + p97 = 1
invariant :p135 + p15 = 1
invariant :p175 + p55 = 1
invariant :p108 + p228 = 1
invariant :p112 + p2 = 1
invariant :p205 + p85 = 1
invariant :p145 + p25 = 1
invariant :p162 + p42 = 1
invariant :p206 + p86 = 1
invariant :p200 + p80 = 1
invariant :p214 + p94 = 1
invariant :p143 + p23 = 1
invariant :p100 + p220 = 1
invariant :p13 + p133 = 1
invariant :p216 + p96 = 1
invariant :p166 + p46 = 1
invariant :p192 + p72 = 1
invariant :p182 + p62 = 1
invariant :p124 + -1'p129 + -1'p4 + p9 = 0
invariant :p109 + p229 = 1
invariant :p194 + p74 = 1
invariant :p114 + p4 = 1
invariant :p152 + p32 = 1
invariant :p117 + p7 = 1
invariant :p164 + p44 = 1
invariant :p115 + p5 = 1
invariant :p149 + p29 = 1
invariant :p147 + p27 = 1
invariant :p118 + p8 = 1
invariant :p128 + -1'p129 + -1'p8 + p9 = 0
invariant :p126 + -1'p129 + -1'p6 + p9 = 0
invariant :p123 + -1'p129 + -1'p3 + p9 = 0
invariant :p146 + p26 = 1
invariant :p151 + p31 = 1
invariant :p138 + p18 = 1
invariant :p113 + p3 = 1
invariant :p106 + p226 = 1
invariant :p190 + p70 = 1
invariant :p208 + p88 = 1
invariant :p212 + p92 = 1
invariant :p110 + p230 = 1
invariant :p171 + p51 = 1
invariant :p102 + p222 = 1
invariant :p154 + p34 = 1
invariant :p140 + p20 = 1
invariant :p160 + p40 = 1
invariant :p107 + p227 = 1
invariant :p139 + p19 = 1
invariant :p185 + p65 = 1
invariant :p141 + p21 = 1
invariant :p210 + p90 = 1
invariant :p202 + p82 = 1
invariant :p116 + p6 = 1
invariant :p144 + p24 = 1
invariant :p150 + p30 = 1
invariant :p177 + p57 = 1
invariant :p137 + p17 = 1
invariant :p219 + p99 = 1
invariant :p103 + p223 = 1
invariant :p155 + p35 = 1
invariant :p12 + p132 = 1
invariant :p10 + p129 + -1'p130 + -1'p9 = 0
invariant :p199 + p79 = 1
invariant :p189 + p69 = 1
invariant :p173 + p53 = 1
invariant :p136 + p16 = 1
invariant :p142 + p22 = 1
invariant :p156 + p36 = 1
invariant :p134 + p14 = 1
invariant :p213 + p93 = 1
invariant :p211 + p91 = 1
FORMULA RwMutex-PT-r0010w0100-ReachabilityCardinality-09 FALSE TECHNIQUES SAT_SMT BMC(1)
FORMULA RwMutex-PT-r0010w0100-ReachabilityCardinality-00 FALSE TECHNIQUES SAT_SMT K_INDUCTION(0)
FORMULA RwMutex-PT-r0010w0100-ReachabilityCardinality-04 TRUE TECHNIQUES SAT_SMT K_INDUCTION(0)
FORMULA RwMutex-PT-r0010w0100-ReachabilityCardinality-15 TRUE TECHNIQUES SAT_SMT BMC(1)
FORMULA RwMutex-PT-r0010w0100-ReachabilityCardinality-06 FALSE TECHNIQUES SAT_SMT K_INDUCTION(0)
Model ,|S| ,Time ,Mem(kb) ,fin. SDD ,fin. DDD ,peak SDD ,peak DDD ,SDD Hom ,SDD cache peak ,DDD Hom ,DDD cachepeak ,SHom cache
RwMutex\_PT\_r0010w0100\_flat\_flat,1124,5.85846,113620,2,101692,5,112033,6,0,1143,8691,0
Total reachable state count : 1124

Verifying 6 reachability properties.
Reachability property RwMutex-PT-r0010w0100-ReachabilityCardinality-00 does not hold.
No reachable states exhibit your property : RwMutex-PT-r0010w0100-ReachabilityCardinality-00

Model ,|S| ,Time ,Mem(kb) ,fin. SDD ,fin. DDD ,peak SDD ,peak DDD ,SDD Hom ,SDD cache peak ,DDD Hom ,DDD cachepeak ,SHom cache
RwMutex-PT-r0010w0100-ReachabilityCardinality-00,0,5.86877,113880,1,0,5,112033,7,0,1158,8691,0
Invariant property RwMutex-PT-r0010w0100-ReachabilityCardinality-04 is true.

Model ,|S| ,Time ,Mem(kb) ,fin. SDD ,fin. DDD ,peak SDD ,peak DDD ,SDD Hom ,SDD cache peak ,DDD Hom ,DDD cachepeak ,SHom cache
RwMutex-PT-r0010w0100-ReachabilityCardinality-04,0,5.89786,113928,1,0,5,112033,8,0,1173,8691,0
Reachability property RwMutex-PT-r0010w0100-ReachabilityCardinality-06 does not hold.
No reachable states exhibit your property : RwMutex-PT-r0010w0100-ReachabilityCardinality-06

Model ,|S| ,Time ,Mem(kb) ,fin. SDD ,fin. DDD ,peak SDD ,peak DDD ,SDD Hom ,SDD cache peak ,DDD Hom ,DDD cachepeak ,SHom cache
RwMutex-PT-r0010w0100-ReachabilityCardinality-06,0,5.9704,113992,1,0,5,112033,9,0,1176,8691,0
Invariant property RwMutex-PT-r0010w0100-ReachabilityCardinality-09 does not hold.

Model ,|S| ,Time ,Mem(kb) ,fin. SDD ,fin. DDD ,peak SDD ,peak DDD ,SDD Hom ,SDD cache peak ,DDD Hom ,DDD cachepeak ,SHom cache
RwMutex-PT-r0010w0100-ReachabilityCardinality-09,1,5.97125,113992,2,231,6,112033,10,0,1178,8691,0
Reachability property RwMutex-PT-r0010w0100-ReachabilityCardinality-11 does not hold.
FORMULA RwMutex-PT-r0010w0100-ReachabilityCardinality-11 FALSE TECHNIQUES DECISION_DIAGRAMS TOPOLOGICAL COLLATERAL_PROCESSING USE_NUPN
No reachable states exhibit your property : RwMutex-PT-r0010w0100-ReachabilityCardinality-11

Model ,|S| ,Time ,Mem(kb) ,fin. SDD ,fin. DDD ,peak SDD ,peak DDD ,SDD Hom ,SDD cache peak ,DDD Hom ,DDD cachepeak ,SHom cache
RwMutex-PT-r0010w0100-ReachabilityCardinality-11,0,6.05809,113992,1,0,6,112033,11,0,1194,8691,0
Reachability property RwMutex-PT-r0010w0100-ReachabilityCardinality-15 is true.

Model ,|S| ,Time ,Mem(kb) ,fin. SDD ,fin. DDD ,peak SDD ,peak DDD ,SDD Hom ,SDD cache peak ,DDD Hom ,DDD cachepeak ,SHom cache
RwMutex-PT-r0010w0100-ReachabilityCardinality-15,1,6.05944,113992,2,231,7,112033,12,0,1199,8691,0
Running compilation step : CommandLine [args=[gcc, -c, -I/home/mcc/BenchKit//lts_install_dir//include, -I., -std=c99, -fPIC, -O3, model.c], workingDir=/home/mcc/execution]
WARNING : LTS min runner thread was asked to interrupt. Dying gracefully.

BK_STOP 1527368703436

--------------------
content from stderr:

+ export BINDIR=/home/mcc/BenchKit/
+ BINDIR=/home/mcc/BenchKit/
++ pwd
+ export MODEL=/home/mcc/execution
+ MODEL=/home/mcc/execution
+ /home/mcc/BenchKit//runeclipse.sh /home/mcc/execution ReachabilityCardinality -its -ltsminpath /home/mcc/BenchKit//lts_install_dir/ -louvain -smt
+ ulimit -s 65536
+ [[ -z '' ]]
+ export LTSMIN_MEM_SIZE=8589934592
+ LTSMIN_MEM_SIZE=8589934592
+ /home/mcc/BenchKit//itstools/its-tools -consoleLog -data /home/mcc/execution/workspace -pnfolder /home/mcc/execution -examination ReachabilityCardinality -z3path /home/mcc/BenchKit//z3/bin/z3 -yices2path /home/mcc/BenchKit//yices/bin/yices -its -ltsminpath /home/mcc/BenchKit//lts_install_dir/ -louvain -smt -vmargs -Dosgi.locking=none -Declipse.stateSaveDelayInterval=-1 -Dosgi.configuration.area=/tmp/.eclipse -Xss8m -Xms40m -Xmx8192m -Dfile.encoding=UTF-8 -Dosgi.requiredJavaVersion=1.6
May 26, 2018 9:04:54 PM fr.lip6.move.gal.application.Application start
INFO: Running its-tools with arguments : [-pnfolder, /home/mcc/execution, -examination, ReachabilityCardinality, -z3path, /home/mcc/BenchKit//z3/bin/z3, -yices2path, /home/mcc/BenchKit//yices/bin/yices, -its, -ltsminpath, /home/mcc/BenchKit//lts_install_dir/, -louvain, -smt]
May 26, 2018 9:04:54 PM fr.lip6.move.gal.application.MccTranslator transformPNML
INFO: Parsing pnml file : /home/mcc/execution/model.pnml
May 26, 2018 9:04:54 PM fr.lip6.move.gal.nupn.PTNetReader loadFromXML
INFO: Load time of PNML (sax parser for PT used): 119 ms
May 26, 2018 9:04:54 PM fr.lip6.move.gal.pnml.togal.PTGALTransformer handlePage
INFO: Transformed 230 places.
May 26, 2018 9:04:54 PM fr.lip6.move.gal.pnml.togal.PTGALTransformer handlePage
INFO: Transformed 220 transitions.
May 26, 2018 9:04:54 PM fr.lip6.move.serialization.SerializationUtil systemToFile
INFO: Time to serialize gal into /home/mcc/execution/model.pnml.img.gal : 43 ms
May 26, 2018 9:04:55 PM fr.lip6.move.gal.instantiate.PropertySimplifier rewriteWithInitialState
INFO: Reachable property RwMutex-PT-r0010w0100-ReachabilityCardinality-01 is trivially true : it is verified in initial state.
May 26, 2018 9:04:55 PM fr.lip6.move.gal.instantiate.PropertySimplifier rewriteWithInitialState
INFO: Invariant property RwMutex-PT-r0010w0100-ReachabilityCardinality-02 is trivially false : it is not verified in initial state.
May 26, 2018 9:04:55 PM fr.lip6.move.gal.instantiate.PropertySimplifier rewriteWithInitialState
INFO: Reachable property RwMutex-PT-r0010w0100-ReachabilityCardinality-03 is trivially true : it is verified in initial state.
May 26, 2018 9:04:55 PM fr.lip6.move.gal.instantiate.PropertySimplifier rewriteWithInitialState
INFO: Reachable property RwMutex-PT-r0010w0100-ReachabilityCardinality-05 is trivially true : it is verified in initial state.
May 26, 2018 9:04:55 PM fr.lip6.move.gal.instantiate.PropertySimplifier rewriteWithInitialState
INFO: Reachable property RwMutex-PT-r0010w0100-ReachabilityCardinality-07 is trivially true : it is verified in initial state.
May 26, 2018 9:04:55 PM fr.lip6.move.gal.instantiate.PropertySimplifier rewriteWithInitialState
INFO: Invariant property RwMutex-PT-r0010w0100-ReachabilityCardinality-08 is trivially false : it is not verified in initial state.
May 26, 2018 9:04:55 PM fr.lip6.move.gal.instantiate.PropertySimplifier rewriteWithInitialState
INFO: Reachable property RwMutex-PT-r0010w0100-ReachabilityCardinality-10 is trivially true : it is verified in initial state.
May 26, 2018 9:04:55 PM fr.lip6.move.gal.instantiate.PropertySimplifier rewriteWithInitialState
INFO: Reachable property RwMutex-PT-r0010w0100-ReachabilityCardinality-12 is trivially true : it is verified in initial state.
May 26, 2018 9:04:55 PM fr.lip6.move.gal.instantiate.PropertySimplifier rewriteWithInitialState
INFO: Reachable property RwMutex-PT-r0010w0100-ReachabilityCardinality-13 is trivially true : it is verified in initial state.
May 26, 2018 9:04:55 PM fr.lip6.move.gal.instantiate.PropertySimplifier rewriteWithInitialState
INFO: Reachable property RwMutex-PT-r0010w0100-ReachabilityCardinality-14 is trivially true : it is verified in initial state.
May 26, 2018 9:04:55 PM fr.lip6.move.gal.instantiate.GALRewriter flatten
INFO: Flatten gal took : 273 ms
May 26, 2018 9:04:55 PM fr.lip6.move.gal.instantiate.GALRewriter flatten
INFO: Flatten gal took : 213 ms
May 26, 2018 9:04:55 PM fr.lip6.move.gal.instantiate.GALRewriter flatten
INFO: Flatten gal took : 213 ms
May 26, 2018 9:04:55 PM fr.lip6.move.serialization.SerializationUtil systemToFile
INFO: Time to serialize gal into /home/mcc/execution/ReachabilityCardinality.pnml.gal : 31 ms
May 26, 2018 9:04:55 PM fr.lip6.move.serialization.SerializationUtil serializePropertiesForITSTools
INFO: Time to serialize properties into /home/mcc/execution/ReachabilityCardinality.prop : 0 ms
May 26, 2018 9:04:55 PM fr.lip6.move.gal.semantics.DeterministicNextBuilder getDeterministicNext
INFO: Input system was already deterministic with 220 transitions.
May 26, 2018 9:04:55 PM fr.lip6.move.gal.semantics.DeterministicNextBuilder getDeterministicNext
INFO: Input system was already deterministic with 220 transitions.
May 26, 2018 9:04:56 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd checkProperties
INFO: Ran tautology test, simplified 0 / 6 in 669 ms.
May 26, 2018 9:04:56 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property RwMutex-PT-r0010w0100-ReachabilityCardinality-00(UNSAT) depth K=0 took 21 ms
May 26, 2018 9:04:56 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property RwMutex-PT-r0010w0100-ReachabilityCardinality-04(UNSAT) depth K=0 took 19 ms
May 26, 2018 9:04:56 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property RwMutex-PT-r0010w0100-ReachabilityCardinality-06(UNSAT) depth K=0 took 17 ms
May 26, 2018 9:04:56 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property RwMutex-PT-r0010w0100-ReachabilityCardinality-09(UNSAT) depth K=0 took 18 ms
May 26, 2018 9:04:56 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property RwMutex-PT-r0010w0100-ReachabilityCardinality-11(UNSAT) depth K=0 took 13 ms
May 26, 2018 9:04:56 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property RwMutex-PT-r0010w0100-ReachabilityCardinality-15(UNSAT) depth K=0 took 14 ms
May 26, 2018 9:04:56 PM fr.lip6.move.gal.gal2smt.bmc.KInductionSolver computeAndDeclareInvariants
INFO: Computed 120 place invariants in 225 ms
May 26, 2018 9:04:56 PM fr.lip6.move.gal.semantics.DeterministicNextBuilder getDeterministicNext
INFO: Input system was already deterministic with 220 transitions.
May 26, 2018 9:04:56 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property RwMutex-PT-r0010w0100-ReachabilityCardinality-00(UNSAT) depth K=1 took 159 ms
May 26, 2018 9:04:56 PM fr.lip6.move.gal.gal2smt.bmc.KInductionSolver computeAndDeclareInvariants
INFO: Computed 120 place invariants in 92 ms
May 26, 2018 9:04:56 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property RwMutex-PT-r0010w0100-ReachabilityCardinality-04(UNSAT) depth K=1 took 108 ms
May 26, 2018 9:04:56 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property RwMutex-PT-r0010w0100-ReachabilityCardinality-06(UNSAT) depth K=1 took 52 ms
May 26, 2018 9:04:59 PM fr.lip6.move.gal.gal2smt.bmc.KInductionSolver init
INFO: Proved 230 variables to be positive in 3928 ms
May 26, 2018 9:04:59 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver computeAblingMatrix
INFO: Computing symmetric may disable matrix : 220 transitions.
May 26, 2018 9:04:59 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of disable matrix completed :0/220 took 1 ms. Total solver calls (SAT/UNSAT): 0(0/0)
May 26, 2018 9:04:59 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of Complete disable matrix. took 99 ms. Total solver calls (SAT/UNSAT): 0(0/0)
May 26, 2018 9:04:59 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver computeAblingMatrix
INFO: Computing symmetric may enable matrix : 220 transitions.
May 26, 2018 9:05:00 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of Complete enable matrix. took 31 ms. Total solver calls (SAT/UNSAT): 0(0/0)
May 26, 2018 9:05:00 PM fr.lip6.move.gal.gal2smt.bmc.KInductionSolver init
INFO: Proved 230 variables to be positive in 4164 ms
May 26, 2018 9:05:00 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: Result is SAT, found a counter-example trace to a state that contradicts invariant/never predicate RwMutex-PT-r0010w0100-ReachabilityCardinality-09
May 26, 2018 9:05:00 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property RwMutex-PT-r0010w0100-ReachabilityCardinality-09(FALSE) depth K=1 took 4235 ms
May 26, 2018 9:05:00 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: Induction result is UNSAT, proved UNreachability of reachability predicate RwMutex-PT-r0010w0100-ReachabilityCardinality-00
May 26, 2018 9:05:00 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: Induction result is UNSAT, successfully proved induction at step 0 for RwMutex-PT-r0010w0100-ReachabilityCardinality-00
May 26, 2018 9:05:00 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: KInduction solution for property RwMutex-PT-r0010w0100-ReachabilityCardinality-00(FALSE) depth K=0 took 308 ms
May 26, 2018 9:05:00 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property RwMutex-PT-r0010w0100-ReachabilityCardinality-11(UNSAT) depth K=1 took 90 ms
May 26, 2018 9:05:01 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: Induction result is UNSAT, proved invariant RwMutex-PT-r0010w0100-ReachabilityCardinality-04
May 26, 2018 9:05:01 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: Induction result is UNSAT, successfully proved induction at step 0 for RwMutex-PT-r0010w0100-ReachabilityCardinality-04
May 26, 2018 9:05:01 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: KInduction solution for property RwMutex-PT-r0010w0100-ReachabilityCardinality-04(TRUE) depth K=0 took 492 ms
May 26, 2018 9:05:01 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: Result is SAT, found a trace to state matching reachability predicate RwMutex-PT-r0010w0100-ReachabilityCardinality-15
May 26, 2018 9:05:01 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property RwMutex-PT-r0010w0100-ReachabilityCardinality-15(TRUE) depth K=1 took 602 ms
May 26, 2018 9:05:01 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver computeCoEnablingMatrix
INFO: Computing symmetric co enabling matrix : 220 transitions.
May 26, 2018 9:05:01 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: Induction result is UNSAT, proved UNreachability of reachability predicate RwMutex-PT-r0010w0100-ReachabilityCardinality-06
May 26, 2018 9:05:01 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: Induction result is UNSAT, successfully proved induction at step 0 for RwMutex-PT-r0010w0100-ReachabilityCardinality-06
May 26, 2018 9:05:01 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: KInduction solution for property RwMutex-PT-r0010w0100-ReachabilityCardinality-06(FALSE) depth K=0 took 443 ms
May 26, 2018 9:05:02 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd checkProperties
WARNING: Interrupting SMT solver.
SMT solver raised 'unknown', retrying with same input.
May 26, 2018 9:05:02 PM fr.lip6.move.gal.gal2smt.bmc.NextBMCSolver checkSat
WARNING: SMT solver unexpectedly returned 'unknown' answer, retrying.
May 26, 2018 9:05:02 PM fr.lip6.move.gal.gal2smt.bmc.NextBMCSolver checkSat
WARNING: SMT solver unexpectedly returned 'unknown' answer, retrying.
Skipping mayMatrices nes/nds SMT solver raised an error :unknown
java.lang.RuntimeException: SMT solver raised an exception or timeout :(error "Failed to check-sat")
at fr.lip6.move.gal.gal2smt.bmc.NextBMCSolver.checkSat(NextBMCSolver.java:297)
at fr.lip6.move.gal.gal2smt.bmc.NextBMCSolver.checkSat(NextBMCSolver.java:305)
at fr.lip6.move.gal.gal2smt.bmc.NextBMCSolver.verifyAssertion(NextBMCSolver.java:452)
at fr.lip6.move.gal.gal2smt.bmc.NextBMCSolver.verify(NextBMCSolver.java:435)
at fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd.runBMC(Gal2SMTFrontEnd.java:378)
at fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd.access$0(Gal2SMTFrontEnd.java:350)
at fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd$1.run(Gal2SMTFrontEnd.java:159)
at java.lang.Thread.run(Thread.java:748)
java.lang.RuntimeException: SMT solver raised an exception or timeout :(error "Failed to check-sat")
at fr.lip6.move.gal.gal2smt.bmc.NextBMCSolver.checkSat(NextBMCSolver.java:297)
at fr.lip6.move.gal.gal2smt.bmc.NextBMCSolver.checkSat(NextBMCSolver.java:305)
at fr.lip6.move.gal.gal2smt.bmc.KInductionSolver.verify(KInductionSolver.java:573)
at fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd.runKInduction(Gal2SMTFrontEnd.java:301)
at fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd.access$1(Gal2SMTFrontEnd.java:274)
at fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd$2.run(Gal2SMTFrontEnd.java:166)
at java.lang.Thread.run(Thread.java:748)
java.lang.RuntimeException: SMT solver raised an error :unknown
at fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver.computeCoEnablingMatrix(NecessaryEnablingsolver.java:490)
at fr.lip6.move.gal.gal2pins.Gal2PinsTransformerNext.printLabels(Gal2PinsTransformerNext.java:530)
at fr.lip6.move.gal.gal2pins.Gal2PinsTransformerNext.printDependencyMatrix(Gal2PinsTransformerNext.java:209)
at fr.lip6.move.gal.gal2pins.Gal2PinsTransformerNext.buildBodyFile(Gal2PinsTransformerNext.java:85)
at fr.lip6.move.gal.gal2pins.Gal2PinsTransformerNext.transform(Gal2PinsTransformerNext.java:830)
at fr.lip6.move.gal.application.LTSminRunner$1.run(LTSminRunner.java:71)
at java.lang.Thread.run(Thread.java:748)
May 26, 2018 9:05:02 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
WARNING: Unexpected error occurred while running SMT. Was verifying RwMutex-PT-r0010w0100-ReachabilityCardinality-06 SMT depth 2
May 26, 2018 9:05:02 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
WARNING: Unexpected error occurred while running SMT. Was verifying RwMutex-PT-r0010w0100-ReachabilityCardinality-11 K-induction depth 0
java.lang.RuntimeException: java.lang.RuntimeException: SMT solver raised an exception or timeout :(error "Failed to check-sat")
at fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd.runBMC(Gal2SMTFrontEnd.java:404)
at fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd.access$0(Gal2SMTFrontEnd.java:350)
at fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd$1.run(Gal2SMTFrontEnd.java:159)
at java.lang.Thread.run(Thread.java:748)
Caused by: java.lang.RuntimeException: SMT solver raised an exception or timeout :(error "Failed to check-sat")
at fr.lip6.move.gal.gal2smt.bmc.NextBMCSolver.checkSat(NextBMCSolver.java:297)
at fr.lip6.move.gal.gal2smt.bmc.NextBMCSolver.checkSat(NextBMCSolver.java:305)
at fr.lip6.move.gal.gal2smt.bmc.NextBMCSolver.verifyAssertion(NextBMCSolver.java:452)
at fr.lip6.move.gal.gal2smt.bmc.NextBMCSolver.verify(NextBMCSolver.java:435)
at fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd.runBMC(Gal2SMTFrontEnd.java:378)
... 3 more
Exception in thread "Thread-8" java.lang.RuntimeException: java.lang.RuntimeException: SMT solver raised an exception or timeout :(error "Failed to check-sat")
at fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd.runKInduction(Gal2SMTFrontEnd.java:336)
at fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd.access$1(Gal2SMTFrontEnd.java:274)
at fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd$2.run(Gal2SMTFrontEnd.java:166)
at java.lang.Thread.run(Thread.java:748)
Caused by: java.lang.RuntimeException: SMT solver raised an exception or timeout :(error "Failed to check-sat")
at fr.lip6.move.gal.gal2smt.bmc.NextBMCSolver.checkSat(NextBMCSolver.java:297)
at fr.lip6.move.gal.gal2smt.bmc.NextBMCSolver.checkSat(NextBMCSolver.java:305)
at fr.lip6.move.gal.gal2smt.bmc.KInductionSolver.verify(KInductionSolver.java:573)
at fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd.runKInduction(Gal2SMTFrontEnd.java:301)
... 3 more
May 26, 2018 9:05:02 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: During BMC, SMT solver timed out at depth 2
May 26, 2018 9:05:02 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solving timed out (3600000 secs) at depth 2
May 26, 2018 9:05:02 PM fr.lip6.move.gal.application.SMTRunner$2 run
INFO: SMT solved 5/ 6 properties. Interrupting other analysis methods.
May 26, 2018 9:05:02 PM fr.lip6.move.gal.gal2pins.Gal2PinsTransformerNext transform
INFO: Built C files in 7053ms conformant to PINS in folder :/home/mcc/execution

Sequence of Actions to be Executed by the VM

This is useful if one wants to reexecute the tool in the VM from the submitted image disk.

set -x
# this is for BenchKit: configuration of major elements for the test
export BK_INPUT="RwMutex-PT-r0010w0100"
export BK_EXAMINATION="ReachabilityCardinality"
export BK_TOOL="itstoolsl"
export BK_RESULT_DIR="/tmp/BK_RESULTS/OUTPUTS"
export BK_TIME_CONFINEMENT="3600"
export BK_MEMORY_CONFINEMENT="16384"

# this is specific to your benchmark or test

export BIN_DIR="$HOME/BenchKit/bin"

# remove the execution directoty if it exists (to avoid increse of .vmdk images)
if [ -d execution ] ; then
rm -rf execution
fi

tar xzf /home/mcc/BenchKit/INPUTS/RwMutex-PT-r0010w0100.tgz
mv RwMutex-PT-r0010w0100 execution
cd execution
pwd
ls -lh

# this is for BenchKit: explicit launching of the test
echo "====================================================================="
echo " Generated by BenchKit 2-3637"
echo " Executing tool itstoolsl"
echo " Input is RwMutex-PT-r0010w0100, examination is ReachabilityCardinality"
echo " Time confinement is $BK_TIME_CONFINEMENT seconds"
echo " Memory confinement is 16384 MBytes"
echo " Number of cores is 4"
echo " Run identifier is r153-smll-152685551000117"
echo "====================================================================="
echo
echo "--------------------"
echo "content from stdout:"
echo
echo "=== Data for post analysis generated by BenchKit (invocation template)"
echo
if [ "ReachabilityCardinality" = "UpperBounds" ] ; then
echo "The expected result is a vector of positive values"
echo NUM_VECTOR
elif [ "ReachabilityCardinality" != "StateSpace" ] ; then
echo "The expected result is a vector of booleans"
echo BOOL_VECTOR
else
echo "no data necessary for post analysis"
fi
echo
if [ -f "ReachabilityCardinality.txt" ] ; then
echo "here is the order used to build the result vector(from text file)"
for x in $(grep Property ReachabilityCardinality.txt | cut -d ' ' -f 2 | sort -u) ; do
echo "FORMULA_NAME $x"
done
elif [ -f "ReachabilityCardinality.xml" ] ; then # for cunf (txt files deleted;-)
echo echo "here is the order used to build the result vector(from xml file)"
for x in $(grep '' ReachabilityCardinality.xml | cut -d '>' -f 2 | cut -d '<' -f 1 | sort -u) ; do
echo "FORMULA_NAME $x"
done
fi
echo
echo "=== Now, execution of the tool begins"
echo
echo -n "BK_START "
date -u +%s%3N
echo
timeout -s 9 $BK_TIME_CONFINEMENT bash -c "/home/mcc/BenchKit/BenchKit_head.sh 2> STDERR ; echo ; echo -n \"BK_STOP \" ; date -u +%s%3N"
if [ $? -eq 137 ] ; then
echo
echo "BK_TIME_CONFINEMENT_REACHED"
fi
echo
echo "--------------------"
echo "content from stderr:"
echo
cat STDERR ;