Execution Chart

We display below the execution chart for this examination (boot time has been removed).

Trace from the execution

Waiting for the VM to be ready (probing ssh)
......................
/home/mcc/execution
total 208K
-rw-r--r-- 1 mcc users 3.3K May 15 18:54 CTLCardinality.txt
-rw-r--r-- 1 mcc users 17K May 15 18:54 CTLCardinality.xml
-rw-r--r-- 1 mcc users 2.4K May 15 18:54 CTLFireability.txt
-rw-r--r-- 1 mcc users 16K May 15 18:54 CTLFireability.xml
-rw-r--r-- 1 mcc users 4.0K May 15 18:50 GenericPropertiesDefinition.xml
-rw-r--r-- 1 mcc users 6.0K May 15 18:50 GenericPropertiesVerdict.xml
-rw-r--r-- 1 mcc users 2.5K May 15 18:54 LTLCardinality.txt
-rw-r--r-- 1 mcc users 13K May 15 18:54 LTLCardinality.xml
-rw-r--r-- 1 mcc users 1.8K May 15 18:54 LTLFireability.txt
-rw-r--r-- 1 mcc users 8.4K May 15 18:54 LTLFireability.xml
-rw-r--r-- 1 mcc users 3.3K May 15 18:54 ReachabilityCardinality.txt
-rw-r--r-- 1 mcc users 17K May 15 18:54 ReachabilityCardinality.xml
-rw-r--r-- 1 mcc users 105 May 15 18:54 ReachabilityDeadlock.txt
-rw-r--r-- 1 mcc users 343 May 15 18:54 ReachabilityDeadlock.xml
-rw-r--r-- 1 mcc users 2.5K May 15 18:54 ReachabilityFireability.txt
-rw-r--r-- 1 mcc users 13K May 15 18:54 ReachabilityFireability.xml
-rw-r--r-- 1 mcc users 1.6K May 15 18:54 UpperBounds.txt
-rw-r--r-- 1 mcc users 3.6K May 15 18:54 UpperBounds.xml
-rw-r--r-- 1 mcc users 5 May 15 18:50 equiv_pt
-rw-r--r-- 1 mcc users 3 May 15 18:50 instance
-rw-r--r-- 1 mcc users 5 May 15 18:50 iscolored
-rw-r--r-- 1 mcc users 42K May 15 18:50 model.pnml
=====================================================================
Generated by BenchKit 2-3637
Executing tool itstools
Input is SafeBus-COL-10, examination is ReachabilityCardinality
Time confinement is 3600 seconds
Memory confinement is 16384 MBytes
Number of cores is 4
Run identifier is r152-smll-152685550400194
=====================================================================

--------------------
content from stdout:

=== Data for post analysis generated by BenchKit (invocation template)

The expected result is a vector of booleans
BOOL_VECTOR

here is the order used to build the result vector(from text file)
FORMULA_NAME SafeBus-COL-10-ReachabilityCardinality-00
FORMULA_NAME SafeBus-COL-10-ReachabilityCardinality-01
FORMULA_NAME SafeBus-COL-10-ReachabilityCardinality-02
FORMULA_NAME SafeBus-COL-10-ReachabilityCardinality-03
FORMULA_NAME SafeBus-COL-10-ReachabilityCardinality-04
FORMULA_NAME SafeBus-COL-10-ReachabilityCardinality-05
FORMULA_NAME SafeBus-COL-10-ReachabilityCardinality-06
FORMULA_NAME SafeBus-COL-10-ReachabilityCardinality-07
FORMULA_NAME SafeBus-COL-10-ReachabilityCardinality-08
FORMULA_NAME SafeBus-COL-10-ReachabilityCardinality-09
FORMULA_NAME SafeBus-COL-10-ReachabilityCardinality-10
FORMULA_NAME SafeBus-COL-10-ReachabilityCardinality-11
FORMULA_NAME SafeBus-COL-10-ReachabilityCardinality-12
FORMULA_NAME SafeBus-COL-10-ReachabilityCardinality-13
FORMULA_NAME SafeBus-COL-10-ReachabilityCardinality-14
FORMULA_NAME SafeBus-COL-10-ReachabilityCardinality-15

=== Now, execution of the tool begins

BK_START 1527029079025

22:44:41.817 [main] ERROR PNML validation - The rng grammar file can't be accessed : www.pnml.org
22:44:41.821 [main] ERROR import - Grammar file errors have been raised, the validation can't be done, process will continue without Grammar validation
FORMULA SafeBus-COL-10-ReachabilityCardinality-13 TRUE TECHNIQUES TOPOLOGICAL INITIAL_STATE
FORMULA SafeBus-COL-10-ReachabilityCardinality-05 FALSE TECHNIQUES TOPOLOGICAL INITIAL_STATE
Using solver Z3 to compute partial order matrices.
Built C files in :
/home/mcc/execution
Invoking ITS tools like this :CommandLine [args=[/home/mcc/BenchKit/itstools/plugins/fr.lip6.move.gal.itstools.binaries_1.0.0.201805151631/bin/its-reach-linux64, --gc-threshold, 2000000, --quiet, -i, /home/mcc/execution/ReachabilityCardinality.pnml.gal, -t, CGAL, -reachable-file, ReachabilityCardinality.prop, --nowitness], workingDir=/home/mcc/execution]

its-reach command run as :

/home/mcc/BenchKit/itstools/plugins/fr.lip6.move.gal.itstools.binaries_1.0.0.201805151631/bin/its-reach-linux64 --gc-threshold 2000000 --quiet -i /home/mcc/execution/ReachabilityCardinality.pnml.gal -t CGAL -reachable-file ReachabilityCardinality.prop --nowitness
Loading property file ReachabilityCardinality.prop.
Read [invariant] property : SafeBus-COL-10-ReachabilityCardinality-00 with value :((((((((((Cpt2_0+Cpt2_1)+Cpt2_2)+Cpt2_3)+Cpt2_4)+Cpt2_5)+Cpt2_6)+Cpt2_7)+Cpt2_8)+Cpt2_9)>=1)
Read [reachable] property : SafeBus-COL-10-ReachabilityCardinality-01 with value :(T_out_0>=2)
Read [reachable] property : SafeBus-COL-10-ReachabilityCardinality-02 with value :(((ACK_0>=3)&&((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((wait_ack_0+wait_ack_1)+wait_ack_2)+wait_ack_3)+wait_ack_4)+wait_ack_5)+wait_ack_6)+wait_ack_7)+wait_ack_8)+wait_ack_9)+wait_ack_10)+wait_ack_11)+wait_ack_12)+wait_ack_13)+wait_ack_14)+wait_ack_15)+wait_ack_16)+wait_ack_17)+wait_ack_18)+wait_ack_19)+wait_ack_20)+wait_ack_21)+wait_ack_22)+wait_ack_23)+wait_ack_24)+wait_ack_25)+wait_ack_26)+wait_ack_27)+wait_ack_28)+wait_ack_29)+wait_ack_30)+wait_ack_31)+wait_ack_32)+wait_ack_33)+wait_ack_34)+wait_ack_35)+wait_ack_36)+wait_ack_37)+wait_ack_38)+wait_ack_39)+wait_ack_40)+wait_ack_41)+wait_ack_42)+wait_ack_43)+wait_ack_44)+wait_ack_45)+wait_ack_46)+wait_ack_47)+wait_ack_48)+wait_ack_49)+wait_ack_50)+wait_ack_51)+wait_ack_52)+wait_ack_53)+wait_ack_54)+wait_ack_55)+wait_ack_56)+wait_ack_57)+wait_ack_58)+wait_ack_59)+wait_ack_60)+wait_ack_61)+wait_ack_62)+wait_ack_63)+wait_ack_64)+wait_ack_65)+wait_ack_66)+wait_ack_67)+wait_ack_68)+wait_ack_69)+wait_ack_70)+wait_ack_71)+wait_ack_72)+wait_ack_73)+wait_ack_74)+wait_ack_75)+wait_ack_76)+wait_ack_77)+wait_ack_78)+wait_ack_79)+wait_ack_80)+wait_ack_81)+wait_ack_82)+wait_ack_83)+wait_ack_84)+wait_ack_85)+wait_ack_86)+wait_ack_87)+wait_ack_88)+wait_ack_89)+wait_ack_90)+wait_ack_91)+wait_ack_92)+wait_ack_93)+wait_ack_94)+wait_ack_95)+wait_ack_96)+wait_ack_97)+wait_ack_98)+wait_ack_99)>=1))||(((((((((((loop_em_0+loop_em_1)+loop_em_2)+loop_em_3)+loop_em_4)+loop_em_5)+loop_em_6)+loop_em_7)+loop_em_8)+loop_em_9)>=1)&&((((((((((MSG_0+MSG_1)+MSG_2)+MSG_3)+MSG_4)+MSG_5)+MSG_6)+MSG_7)+MSG_8)+MSG_9)>=2)))
Read [reachable] property : SafeBus-COL-10-ReachabilityCardinality-03 with value :(((((((((((((Cpt2_0+Cpt2_1)+Cpt2_2)+Cpt2_3)+Cpt2_4)+Cpt2_5)+Cpt2_6)+Cpt2_7)+Cpt2_8)+Cpt2_9)<=ACK_0)||(S_tout_0>=10))&&((((((((((PMC_0+PMC_1)+PMC_2)+PMC_3)+PMC_4)+PMC_5)+PMC_6)+PMC_7)+PMC_8)+PMC_9)>=3))&&((((((((((((loop_em_0+loop_em_1)+loop_em_2)+loop_em_3)+loop_em_4)+loop_em_5)+loop_em_6)+loop_em_7)+loop_em_8)+loop_em_9)>=1)&&((((((((((loop_em_0+loop_em_1)+loop_em_2)+loop_em_3)+loop_em_4)+loop_em_5)+loop_em_6)+loop_em_7)+loop_em_8)+loop_em_9)<=(((((((((RMC_0+RMC_1)+RMC_2)+RMC_3)+RMC_4)+RMC_5)+RMC_6)+RMC_7)+RMC_8)+RMC_9)))&&(!(R_tout_0>=2))))
Read [reachable] property : SafeBus-COL-10-ReachabilityCardinality-04 with value :((ACK_0<=R_tout_0)&&((((((((((loop_em_0+loop_em_1)+loop_em_2)+loop_em_3)+loop_em_4)+loop_em_5)+loop_em_6)+loop_em_7)+loop_em_8)+loop_em_9)>=3))
Read [reachable] property : SafeBus-COL-10-ReachabilityCardinality-06 with value :(((((((((((listen_0+listen_1)+listen_2)+listen_3)+listen_4)+listen_5)+listen_6)+listen_7)+listen_8)+listen_9)>=3)&&((((((((((((Cpt2_0+Cpt2_1)+Cpt2_2)+Cpt2_3)+Cpt2_4)+Cpt2_5)+Cpt2_6)+Cpt2_7)+Cpt2_8)+Cpt2_9)>=2)&&((((((((((FMC_0+FMC_1)+FMC_2)+FMC_3)+FMC_4)+FMC_5)+FMC_6)+FMC_7)+FMC_8)+FMC_9)<=(((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((AMC_0+AMC_1)+AMC_2)+AMC_3)+AMC_4)+AMC_5)+AMC_6)+AMC_7)+AMC_8)+AMC_9)+AMC_10)+AMC_11)+AMC_12)+AMC_13)+AMC_14)+AMC_15)+AMC_16)+AMC_17)+AMC_18)+AMC_19)+AMC_20)+AMC_21)+AMC_22)+AMC_23)+AMC_24)+AMC_25)+AMC_26)+AMC_27)+AMC_28)+AMC_29)+AMC_30)+AMC_31)+AMC_32)+AMC_33)+AMC_34)+AMC_35)+AMC_36)+AMC_37)+AMC_38)+AMC_39)+AMC_40)+AMC_41)+AMC_42)+AMC_43)+AMC_44)+AMC_45)+AMC_46)+AMC_47)+AMC_48)+AMC_49)+AMC_50)+AMC_51)+AMC_52)+AMC_53)+AMC_54)+AMC_55)+AMC_56)+AMC_57)+AMC_58)+AMC_59)+AMC_60)+AMC_61)+AMC_62)+AMC_63)+AMC_64)+AMC_65)+AMC_66)+AMC_67)+AMC_68)+AMC_69)+AMC_70)+AMC_71)+AMC_72)+AMC_73)+AMC_74)+AMC_75)+AMC_76)+AMC_77)+AMC_78)+AMC_79)+AMC_80)+AMC_81)+AMC_82)+AMC_83)+AMC_84)+AMC_85)+AMC_86)+AMC_87)+AMC_88)+AMC_89)+AMC_90)+AMC_91)+AMC_92)+AMC_93)+AMC_94)+AMC_95)+AMC_96)+AMC_97)+AMC_98)+AMC_99)))&&((((((((((listen_0+listen_1)+listen_2)+listen_3)+listen_4)+listen_5)+listen_6)+listen_7)+listen_8)+listen_9)>=10)))
Read [reachable] property : SafeBus-COL-10-ReachabilityCardinality-07 with value :(cable_free_0>=3)
Read [invariant] property : SafeBus-COL-10-ReachabilityCardinality-08 with value :((((((((((((FMC_0+FMC_1)+FMC_2)+FMC_3)+FMC_4)+FMC_5)+FMC_6)+FMC_7)+FMC_8)+FMC_9)<=T_out_0)||(((((((((((cable_used_0+cable_used_1)+cable_used_2)+cable_used_3)+cable_used_4)+cable_used_5)+cable_used_6)+cable_used_7)+cable_used_8)+cable_used_9)<=S_tout_0)||((((((((((MSG_0+MSG_1)+MSG_2)+MSG_3)+MSG_4)+MSG_5)+MSG_6)+MSG_7)+MSG_8)+MSG_9)>=1)))||(!((((((((((RMC_0+RMC_1)+RMC_2)+RMC_3)+RMC_4)+RMC_5)+RMC_6)+RMC_7)+RMC_8)+RMC_9)<=(((((((((cable_used_0+cable_used_1)+cable_used_2)+cable_used_3)+cable_used_4)+cable_used_5)+cable_used_6)+cable_used_7)+cable_used_8)+cable_used_9))))
Read [invariant] property : SafeBus-COL-10-ReachabilityCardinality-09 with value :(!(((S_tout_0>=3)||((((((((((PMC_0+PMC_1)+PMC_2)+PMC_3)+PMC_4)+PMC_5)+PMC_6)+PMC_7)+PMC_8)+PMC_9)<=10))&&(!((((((((((loop_em_0+loop_em_1)+loop_em_2)+loop_em_3)+loop_em_4)+loop_em_5)+loop_em_6)+loop_em_7)+loop_em_8)+loop_em_9)<=ACK_0))))
Read [invariant] property : SafeBus-COL-10-ReachabilityCardinality-10 with value :((((((((((FMC_0+FMC_1)+FMC_2)+FMC_3)+FMC_4)+FMC_5)+FMC_6)+FMC_7)+FMC_8)+FMC_9)<=(((((((((cable_used_0+cable_used_1)+cable_used_2)+cable_used_3)+cable_used_4)+cable_used_5)+cable_used_6)+cable_used_7)+cable_used_8)+cable_used_9))
Read [reachable] property : SafeBus-COL-10-ReachabilityCardinality-11 with value :(S_tout_0>=2)
Read [invariant] property : SafeBus-COL-10-ReachabilityCardinality-12 with value :(!((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((wait_ack_0+wait_ack_1)+wait_ack_2)+wait_ack_3)+wait_ack_4)+wait_ack_5)+wait_ack_6)+wait_ack_7)+wait_ack_8)+wait_ack_9)+wait_ack_10)+wait_ack_11)+wait_ack_12)+wait_ack_13)+wait_ack_14)+wait_ack_15)+wait_ack_16)+wait_ack_17)+wait_ack_18)+wait_ack_19)+wait_ack_20)+wait_ack_21)+wait_ack_22)+wait_ack_23)+wait_ack_24)+wait_ack_25)+wait_ack_26)+wait_ack_27)+wait_ack_28)+wait_ack_29)+wait_ack_30)+wait_ack_31)+wait_ack_32)+wait_ack_33)+wait_ack_34)+wait_ack_35)+wait_ack_36)+wait_ack_37)+wait_ack_38)+wait_ack_39)+wait_ack_40)+wait_ack_41)+wait_ack_42)+wait_ack_43)+wait_ack_44)+wait_ack_45)+wait_ack_46)+wait_ack_47)+wait_ack_48)+wait_ack_49)+wait_ack_50)+wait_ack_51)+wait_ack_52)+wait_ack_53)+wait_ack_54)+wait_ack_55)+wait_ack_56)+wait_ack_57)+wait_ack_58)+wait_ack_59)+wait_ack_60)+wait_ack_61)+wait_ack_62)+wait_ack_63)+wait_ack_64)+wait_ack_65)+wait_ack_66)+wait_ack_67)+wait_ack_68)+wait_ack_69)+wait_ack_70)+wait_ack_71)+wait_ack_72)+wait_ack_73)+wait_ack_74)+wait_ack_75)+wait_ack_76)+wait_ack_77)+wait_ack_78)+wait_ack_79)+wait_ack_80)+wait_ack_81)+wait_ack_82)+wait_ack_83)+wait_ack_84)+wait_ack_85)+wait_ack_86)+wait_ack_87)+wait_ack_88)+wait_ack_89)+wait_ack_90)+wait_ack_91)+wait_ack_92)+wait_ack_93)+wait_ack_94)+wait_ack_95)+wait_ack_96)+wait_ack_97)+wait_ack_98)+wait_ack_99)>=2))
Read [reachable] property : SafeBus-COL-10-ReachabilityCardinality-14 with value :((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((wait_ack_0+wait_ack_1)+wait_ack_2)+wait_ack_3)+wait_ack_4)+wait_ack_5)+wait_ack_6)+wait_ack_7)+wait_ack_8)+wait_ack_9)+wait_ack_10)+wait_ack_11)+wait_ack_12)+wait_ack_13)+wait_ack_14)+wait_ack_15)+wait_ack_16)+wait_ack_17)+wait_ack_18)+wait_ack_19)+wait_ack_20)+wait_ack_21)+wait_ack_22)+wait_ack_23)+wait_ack_24)+wait_ack_25)+wait_ack_26)+wait_ack_27)+wait_ack_28)+wait_ack_29)+wait_ack_30)+wait_ack_31)+wait_ack_32)+wait_ack_33)+wait_ack_34)+wait_ack_35)+wait_ack_36)+wait_ack_37)+wait_ack_38)+wait_ack_39)+wait_ack_40)+wait_ack_41)+wait_ack_42)+wait_ack_43)+wait_ack_44)+wait_ack_45)+wait_ack_46)+wait_ack_47)+wait_ack_48)+wait_ack_49)+wait_ack_50)+wait_ack_51)+wait_ack_52)+wait_ack_53)+wait_ack_54)+wait_ack_55)+wait_ack_56)+wait_ack_57)+wait_ack_58)+wait_ack_59)+wait_ack_60)+wait_ack_61)+wait_ack_62)+wait_ack_63)+wait_ack_64)+wait_ack_65)+wait_ack_66)+wait_ack_67)+wait_ack_68)+wait_ack_69)+wait_ack_70)+wait_ack_71)+wait_ack_72)+wait_ack_73)+wait_ack_74)+wait_ack_75)+wait_ack_76)+wait_ack_77)+wait_ack_78)+wait_ack_79)+wait_ack_80)+wait_ack_81)+wait_ack_82)+wait_ack_83)+wait_ack_84)+wait_ack_85)+wait_ack_86)+wait_ack_87)+wait_ack_88)+wait_ack_89)+wait_ack_90)+wait_ack_91)+wait_ack_92)+wait_ack_93)+wait_ack_94)+wait_ack_95)+wait_ack_96)+wait_ack_97)+wait_ack_98)+wait_ack_99)>=2)
Read [reachable] property : SafeBus-COL-10-ReachabilityCardinality-15 with value :(((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((AMC_0+AMC_1)+AMC_2)+AMC_3)+AMC_4)+AMC_5)+AMC_6)+AMC_7)+AMC_8)+AMC_9)+AMC_10)+AMC_11)+AMC_12)+AMC_13)+AMC_14)+AMC_15)+AMC_16)+AMC_17)+AMC_18)+AMC_19)+AMC_20)+AMC_21)+AMC_22)+AMC_23)+AMC_24)+AMC_25)+AMC_26)+AMC_27)+AMC_28)+AMC_29)+AMC_30)+AMC_31)+AMC_32)+AMC_33)+AMC_34)+AMC_35)+AMC_36)+AMC_37)+AMC_38)+AMC_39)+AMC_40)+AMC_41)+AMC_42)+AMC_43)+AMC_44)+AMC_45)+AMC_46)+AMC_47)+AMC_48)+AMC_49)+AMC_50)+AMC_51)+AMC_52)+AMC_53)+AMC_54)+AMC_55)+AMC_56)+AMC_57)+AMC_58)+AMC_59)+AMC_60)+AMC_61)+AMC_62)+AMC_63)+AMC_64)+AMC_65)+AMC_66)+AMC_67)+AMC_68)+AMC_69)+AMC_70)+AMC_71)+AMC_72)+AMC_73)+AMC_74)+AMC_75)+AMC_76)+AMC_77)+AMC_78)+AMC_79)+AMC_80)+AMC_81)+AMC_82)+AMC_83)+AMC_84)+AMC_85)+AMC_86)+AMC_87)+AMC_88)+AMC_89)+AMC_90)+AMC_91)+AMC_92)+AMC_93)+AMC_94)+AMC_95)+AMC_96)+AMC_97)+AMC_98)+AMC_99)<=ACK_0)&&((!(S_tout_0<=(((((((((Cpt1_0+Cpt1_1)+Cpt1_2)+Cpt1_3)+Cpt1_4)+Cpt1_5)+Cpt1_6)+Cpt1_7)+Cpt1_8)+Cpt1_9)))&&((T_out_0>=2)||((((((((((MSG_0+MSG_1)+MSG_2)+MSG_3)+MSG_4)+MSG_5)+MSG_6)+MSG_7)+MSG_8)+MSG_9)<=(((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((wait_ack_0+wait_ack_1)+wait_ack_2)+wait_ack_3)+wait_ack_4)+wait_ack_5)+wait_ack_6)+wait_ack_7)+wait_ack_8)+wait_ack_9)+wait_ack_10)+wait_ack_11)+wait_ack_12)+wait_ack_13)+wait_ack_14)+wait_ack_15)+wait_ack_16)+wait_ack_17)+wait_ack_18)+wait_ack_19)+wait_ack_20)+wait_ack_21)+wait_ack_22)+wait_ack_23)+wait_ack_24)+wait_ack_25)+wait_ack_26)+wait_ack_27)+wait_ack_28)+wait_ack_29)+wait_ack_30)+wait_ack_31)+wait_ack_32)+wait_ack_33)+wait_ack_34)+wait_ack_35)+wait_ack_36)+wait_ack_37)+wait_ack_38)+wait_ack_39)+wait_ack_40)+wait_ack_41)+wait_ack_42)+wait_ack_43)+wait_ack_44)+wait_ack_45)+wait_ack_46)+wait_ack_47)+wait_ack_48)+wait_ack_49)+wait_ack_50)+wait_ack_51)+wait_ack_52)+wait_ack_53)+wait_ack_54)+wait_ack_55)+wait_ack_56)+wait_ack_57)+wait_ack_58)+wait_ack_59)+wait_ack_60)+wait_ack_61)+wait_ack_62)+wait_ack_63)+wait_ack_64)+wait_ack_65)+wait_ack_66)+wait_ack_67)+wait_ack_68)+wait_ack_69)+wait_ack_70)+wait_ack_71)+wait_ack_72)+wait_ack_73)+wait_ack_74)+wait_ack_75)+wait_ack_76)+wait_ack_77)+wait_ack_78)+wait_ack_79)+wait_ack_80)+wait_ack_81)+wait_ack_82)+wait_ack_83)+wait_ack_84)+wait_ack_85)+wait_ack_86)+wait_ack_87)+wait_ack_88)+wait_ack_89)+wait_ack_90)+wait_ack_91)+wait_ack_92)+wait_ack_93)+wait_ack_94)+wait_ack_95)+wait_ack_96)+wait_ack_97)+wait_ack_98)+wait_ack_99)))))
Running compilation step : CommandLine [args=[gcc, -c, -I/home/mcc/BenchKit//lts_install_dir//include, -I., -std=c99, -fPIC, -O3, model.c], workingDir=/home/mcc/execution]
Presburger conditions satisfied. Using coverability to approximate state space in K-Induction.
Normalized transition count is 652
// Phase 1: matrix 652 rows 316 cols
invariant :AMC_70 + AMC_71 + AMC_72 + AMC_73 + AMC_74 + AMC_75 + AMC_76 + AMC_77 + AMC_78 + AMC_79 + wait_ack_70 + wait_ack_71 + wait_ack_72 + wait_ack_73 + wait_ack_74 + wait_ack_75 + wait_ack_76 + wait_ack_77 + wait_ack_78 + wait_ack_79 + listen_7 + RMC_7 + PMC_7 + wait_msg_7 + loop_em_7 = 1
invariant :-1'AMC_10 + -1'AMC_11 + -1'AMC_12 + -1'AMC_13 + -1'AMC_14 + -1'AMC_15 + -1'AMC_16 + -1'AMC_17 + -1'AMC_18 + -1'AMC_19 + wait_cable_1 + -1'RMC_1 + -1'PMC_1 = 0
invariant :Cpt2_8 + -1'Cpt1_8 + AMC_7 + -1'AMC_8 + AMC_17 + -1'AMC_18 + AMC_27 + -1'AMC_28 + AMC_37 + -1'AMC_38 + AMC_47 + -1'AMC_48 + AMC_57 + -1'AMC_58 + AMC_67 + -1'AMC_68 + AMC_77 + -1'AMC_78 + AMC_87 + -1'AMC_88 + AMC_97 + -1'AMC_98 = 0
invariant :Cpt2_7 + -1'Cpt1_7 + AMC_6 + -1'AMC_7 + AMC_16 + -1'AMC_17 + AMC_26 + -1'AMC_27 + AMC_36 + -1'AMC_37 + AMC_46 + -1'AMC_47 + AMC_56 + -1'AMC_57 + AMC_66 + -1'AMC_67 + AMC_76 + -1'AMC_77 + AMC_86 + -1'AMC_87 + AMC_96 + -1'AMC_97 = 0
invariant :AMC_90 + AMC_91 + AMC_92 + AMC_93 + AMC_94 + AMC_95 + AMC_96 + AMC_97 + AMC_98 + AMC_99 + wait_ack_90 + wait_ack_91 + wait_ack_92 + wait_ack_93 + wait_ack_94 + wait_ack_95 + wait_ack_96 + wait_ack_97 + wait_ack_98 + wait_ack_99 + listen_9 + RMC_9 + PMC_9 + wait_msg_9 + loop_em_9 = 1
invariant :-1'AMC_60 + -1'AMC_61 + -1'AMC_62 + -1'AMC_63 + -1'AMC_64 + -1'AMC_65 + -1'AMC_66 + -1'AMC_67 + -1'AMC_68 + -1'AMC_69 + wait_cable_6 + -1'RMC_6 + -1'PMC_6 = 0
invariant :AMC_20 + AMC_21 + AMC_22 + AMC_23 + AMC_24 + AMC_25 + AMC_26 + AMC_27 + AMC_28 + AMC_29 + wait_ack_20 + wait_ack_21 + wait_ack_22 + wait_ack_23 + wait_ack_24 + wait_ack_25 + wait_ack_26 + wait_ack_27 + wait_ack_28 + wait_ack_29 + listen_2 + RMC_2 + PMC_2 + wait_msg_2 + loop_em_2 = 1
invariant :Cpt2_3 + -1'Cpt1_3 + AMC_2 + -1'AMC_3 + AMC_12 + -1'AMC_13 + AMC_22 + -1'AMC_23 + AMC_32 + -1'AMC_33 + AMC_42 + -1'AMC_43 + AMC_52 + -1'AMC_53 + AMC_62 + -1'AMC_63 + AMC_72 + -1'AMC_73 + AMC_82 + -1'AMC_83 + AMC_92 + -1'AMC_93 = 0
invariant :Cpt2_5 + -1'Cpt1_5 + AMC_4 + -1'AMC_5 + AMC_14 + -1'AMC_15 + AMC_24 + -1'AMC_25 + AMC_34 + -1'AMC_35 + AMC_44 + -1'AMC_45 + AMC_54 + -1'AMC_55 + AMC_64 + -1'AMC_65 + AMC_74 + -1'AMC_75 + AMC_84 + -1'AMC_85 + AMC_94 + -1'AMC_95 = 0
invariant :AMC_80 + AMC_81 + AMC_82 + AMC_83 + AMC_84 + AMC_85 + AMC_86 + AMC_87 + AMC_88 + AMC_89 + wait_ack_80 + wait_ack_81 + wait_ack_82 + wait_ack_83 + wait_ack_84 + wait_ack_85 + wait_ack_86 + wait_ack_87 + wait_ack_88 + wait_ack_89 + listen_8 + RMC_8 + PMC_8 + wait_msg_8 + loop_em_8 = 1
invariant :Cpt2_6 + -1'Cpt1_6 + AMC_5 + -1'AMC_6 + AMC_15 + -1'AMC_16 + AMC_25 + -1'AMC_26 + AMC_35 + -1'AMC_36 + AMC_45 + -1'AMC_46 + AMC_55 + -1'AMC_56 + AMC_65 + -1'AMC_66 + AMC_75 + -1'AMC_76 + AMC_85 + -1'AMC_86 + AMC_95 + -1'AMC_96 = 0
invariant :cable_used_8 + -1'FMC_8 + -1'wait_ack_80 + -1'wait_ack_81 + -1'wait_ack_82 + -1'wait_ack_83 + -1'wait_ack_84 + -1'wait_ack_85 + -1'wait_ack_86 + -1'wait_ack_87 + -1'wait_ack_88 + -1'wait_ack_89 + -1'PMC_8 = 0
invariant :FMC_0 + FMC_1 + FMC_2 + FMC_3 + FMC_4 + FMC_5 + FMC_6 + FMC_7 + FMC_8 + FMC_9 + FMCb_0 = 1
invariant :-1'AMC_0 + -1'AMC_1 + -1'AMC_2 + -1'AMC_3 + -1'AMC_4 + -1'AMC_5 + -1'AMC_6 + -1'AMC_7 + -1'AMC_8 + -1'AMC_9 + wait_cable_0 + -1'RMC_0 + -1'PMC_0 = 0
invariant :cable_free_0 + wait_ack_0 + wait_ack_1 + wait_ack_2 + wait_ack_3 + wait_ack_4 + wait_ack_5 + wait_ack_6 + wait_ack_7 + wait_ack_8 + wait_ack_9 + wait_ack_10 + wait_ack_11 + wait_ack_12 + wait_ack_13 + wait_ack_14 + wait_ack_15 + wait_ack_16 + wait_ack_17 + wait_ack_18 + wait_ack_19 + wait_ack_20 + wait_ack_21 + wait_ack_22 + wait_ack_23 + wait_ack_24 + wait_ack_25 + wait_ack_26 + wait_ack_27 + wait_ack_28 + wait_ack_29 + wait_ack_30 + wait_ack_31 + wait_ack_32 + wait_ack_33 + wait_ack_34 + wait_ack_35 + wait_ack_36 + wait_ack_37 + wait_ack_38 + wait_ack_39 + wait_ack_40 + wait_ack_41 + wait_ack_42 + wait_ack_43 + wait_ack_44 + wait_ack_45 + wait_ack_46 + wait_ack_47 + wait_ack_48 + wait_ack_49 + wait_ack_50 + wait_ack_51 + wait_ack_52 + wait_ack_53 + wait_ack_54 + wait_ack_55 + wait_ack_56 + wait_ack_57 + wait_ack_58 + wait_ack_59 + wait_ack_60 + wait_ack_61 + wait_ack_62 + wait_ack_63 + wait_ack_64 + wait_ack_65 + wait_ack_66 + wait_ack_67 + wait_ack_68 + wait_ack_69 + wait_ack_70 + wait_ack_71 + wait_ack_72 + wait_ack_73 + wait_ack_74 + wait_ack_75 + wait_ack_76 + wait_ack_77 + wait_ack_78 + wait_ack_79 + wait_ack_80 + wait_ack_81 + wait_ack_82 + wait_ack_83 + wait_ack_84 + wait_ack_85 + wait_ack_86 + wait_ack_87 + wait_ack_88 + wait_ack_89 + wait_ack_90 + wait_ack_91 + wait_ack_92 + wait_ack_93 + wait_ack_94 + wait_ack_95 + wait_ack_96 + wait_ack_97 + wait_ack_98 + wait_ack_99 + PMC_0 + PMC_1 + PMC_2 + PMC_3 + PMC_4 + PMC_5 + PMC_6 + PMC_7 + PMC_8 + PMC_9 + -1'FMCb_0 = 0
invariant :cable_used_7 + -1'FMC_7 + -1'wait_ack_70 + -1'wait_ack_71 + -1'wait_ack_72 + -1'wait_ack_73 + -1'wait_ack_74 + -1'wait_ack_75 + -1'wait_ack_76 + -1'wait_ack_77 + -1'wait_ack_78 + -1'wait_ack_79 + -1'PMC_7 = 0
invariant :Cpt2_1 + -1'Cpt1_1 + AMC_0 + -1'AMC_1 + AMC_10 + -1'AMC_11 + AMC_20 + -1'AMC_21 + AMC_30 + -1'AMC_31 + AMC_40 + -1'AMC_41 + AMC_50 + -1'AMC_51 + AMC_60 + -1'AMC_61 + AMC_70 + -1'AMC_71 + AMC_80 + -1'AMC_81 + AMC_90 + -1'AMC_91 = 0
invariant :Cpt2_2 + -1'Cpt1_2 + AMC_1 + -1'AMC_2 + AMC_11 + -1'AMC_12 + AMC_21 + -1'AMC_22 + AMC_31 + -1'AMC_32 + AMC_41 + -1'AMC_42 + AMC_51 + -1'AMC_52 + AMC_61 + -1'AMC_62 + AMC_71 + -1'AMC_72 + AMC_81 + -1'AMC_82 + AMC_91 + -1'AMC_92 = 0
invariant :AMC_60 + AMC_61 + AMC_62 + AMC_63 + AMC_64 + AMC_65 + AMC_66 + AMC_67 + AMC_68 + AMC_69 + wait_ack_60 + wait_ack_61 + wait_ack_62 + wait_ack_63 + wait_ack_64 + wait_ack_65 + wait_ack_66 + wait_ack_67 + wait_ack_68 + wait_ack_69 + listen_6 + RMC_6 + PMC_6 + wait_msg_6 + loop_em_6 = 1
invariant :cable_used_4 + -1'FMC_4 + -1'wait_ack_40 + -1'wait_ack_41 + -1'wait_ack_42 + -1'wait_ack_43 + -1'wait_ack_44 + -1'wait_ack_45 + -1'wait_ack_46 + -1'wait_ack_47 + -1'wait_ack_48 + -1'wait_ack_49 + -1'PMC_4 = 0
invariant :cable_used_6 + -1'FMC_6 + -1'wait_ack_60 + -1'wait_ack_61 + -1'wait_ack_62 + -1'wait_ack_63 + -1'wait_ack_64 + -1'wait_ack_65 + -1'wait_ack_66 + -1'wait_ack_67 + -1'wait_ack_68 + -1'wait_ack_69 + -1'PMC_6 = 0
invariant :wait_ack_20 + wait_ack_21 + wait_ack_22 + wait_ack_23 + wait_ack_24 + wait_ack_25 + wait_ack_26 + wait_ack_27 + wait_ack_28 + wait_ack_29 + wait_cable_2 + listen_2 + wait_msg_2 + loop_em_2 = 1
invariant :Cpt2_4 + -1'Cpt1_4 + AMC_3 + -1'AMC_4 + AMC_13 + -1'AMC_14 + AMC_23 + -1'AMC_24 + AMC_33 + -1'AMC_34 + AMC_43 + -1'AMC_44 + AMC_53 + -1'AMC_54 + AMC_63 + -1'AMC_64 + AMC_73 + -1'AMC_74 + AMC_83 + -1'AMC_84 + AMC_93 + -1'AMC_94 = 0
invariant :AMC_10 + AMC_11 + AMC_12 + AMC_13 + AMC_14 + AMC_15 + AMC_16 + AMC_17 + AMC_18 + AMC_19 + wait_ack_10 + wait_ack_11 + wait_ack_12 + wait_ack_13 + wait_ack_14 + wait_ack_15 + wait_ack_16 + wait_ack_17 + wait_ack_18 + wait_ack_19 + listen_1 + RMC_1 + PMC_1 + wait_msg_1 + loop_em_1 = 1
invariant :-1'AMC_80 + -1'AMC_81 + -1'AMC_82 + -1'AMC_83 + -1'AMC_84 + -1'AMC_85 + -1'AMC_86 + -1'AMC_87 + -1'AMC_88 + -1'AMC_89 + wait_cable_8 + -1'RMC_8 + -1'PMC_8 = 0
invariant :cable_used_2 + -1'FMC_2 + -1'wait_ack_20 + -1'wait_ack_21 + -1'wait_ack_22 + -1'wait_ack_23 + -1'wait_ack_24 + -1'wait_ack_25 + -1'wait_ack_26 + -1'wait_ack_27 + -1'wait_ack_28 + -1'wait_ack_29 + -1'PMC_2 = 0
invariant :AMC_0 + AMC_1 + AMC_2 + AMC_3 + AMC_4 + AMC_5 + AMC_6 + AMC_7 + AMC_8 + AMC_9 + wait_ack_0 + wait_ack_1 + wait_ack_2 + wait_ack_3 + wait_ack_4 + wait_ack_5 + wait_ack_6 + wait_ack_7 + wait_ack_8 + wait_ack_9 + listen_0 + RMC_0 + PMC_0 + wait_msg_0 + loop_em_0 = 1
invariant :Cpt2_0 + Cpt1_1 + Cpt1_2 + Cpt1_3 + Cpt1_4 + Cpt1_5 + Cpt1_6 + Cpt1_7 + Cpt1_8 + Cpt1_9 + -1'AMC_0 + AMC_9 + -1'AMC_10 + AMC_19 + -1'AMC_20 + AMC_29 + -1'AMC_30 + AMC_39 + -1'AMC_40 + AMC_49 + -1'AMC_50 + AMC_59 + -1'AMC_60 + AMC_69 + -1'AMC_70 + AMC_79 + -1'AMC_80 + AMC_89 + -1'AMC_90 + AMC_99 = 1
invariant :cable_used_1 + -1'FMC_1 + -1'wait_ack_10 + -1'wait_ack_11 + -1'wait_ack_12 + -1'wait_ack_13 + -1'wait_ack_14 + -1'wait_ack_15 + -1'wait_ack_16 + -1'wait_ack_17 + -1'wait_ack_18 + -1'wait_ack_19 + -1'PMC_1 = 0
invariant :AMC_30 + AMC_31 + AMC_32 + AMC_33 + AMC_34 + AMC_35 + AMC_36 + AMC_37 + AMC_38 + AMC_39 + wait_ack_30 + wait_ack_31 + wait_ack_32 + wait_ack_33 + wait_ack_34 + wait_ack_35 + wait_ack_36 + wait_ack_37 + wait_ack_38 + wait_ack_39 + listen_3 + RMC_3 + PMC_3 + wait_msg_3 + loop_em_3 = 1
invariant :-1'wait_ack_0 + -1'wait_ack_1 + -1'wait_ack_2 + -1'wait_ack_3 + -1'wait_ack_4 + -1'wait_ack_5 + -1'wait_ack_6 + -1'wait_ack_7 + -1'wait_ack_8 + -1'wait_ack_9 + -1'wait_ack_10 + -1'wait_ack_11 + -1'wait_ack_12 + -1'wait_ack_13 + -1'wait_ack_14 + -1'wait_ack_15 + -1'wait_ack_16 + -1'wait_ack_17 + -1'wait_ack_18 + -1'wait_ack_19 + -1'wait_ack_20 + -1'wait_ack_21 + -1'wait_ack_22 + -1'wait_ack_23 + -1'wait_ack_24 + -1'wait_ack_25 + -1'wait_ack_26 + -1'wait_ack_27 + -1'wait_ack_28 + -1'wait_ack_29 + -1'wait_ack_30 + -1'wait_ack_31 + -1'wait_ack_32 + -1'wait_ack_33 + -1'wait_ack_34 + -1'wait_ack_35 + -1'wait_ack_36 + -1'wait_ack_37 + -1'wait_ack_38 + -1'wait_ack_39 + -1'wait_ack_40 + -1'wait_ack_41 + -1'wait_ack_42 + -1'wait_ack_43 + -1'wait_ack_44 + -1'wait_ack_45 + -1'wait_ack_46 + -1'wait_ack_47 + -1'wait_ack_48 + -1'wait_ack_49 + -1'wait_ack_50 + -1'wait_ack_51 + -1'wait_ack_52 + -1'wait_ack_53 + -1'wait_ack_54 + -1'wait_ack_55 + -1'wait_ack_56 + -1'wait_ack_57 + -1'wait_ack_58 + -1'wait_ack_59 + -1'wait_ack_60 + -1'wait_ack_61 + -1'wait_ack_62 + -1'wait_ack_63 + -1'wait_ack_64 + -1'wait_ack_65 + -1'wait_ack_66 + -1'wait_ack_67 + -1'wait_ack_68 + -1'wait_ack_69 + -1'wait_ack_70 + -1'wait_ack_71 + -1'wait_ack_72 + -1'wait_ack_73 + -1'wait_ack_74 + -1'wait_ack_75 + -1'wait_ack_76 + -1'wait_ack_77 + -1'wait_ack_78 + -1'wait_ack_79 + -1'wait_ack_80 + -1'wait_ack_81 + -1'wait_ack_82 + -1'wait_ack_83 + -1'wait_ack_84 + -1'wait_ack_85 + -1'wait_ack_86 + -1'wait_ack_87 + -1'wait_ack_88 + -1'wait_ack_89 + -1'wait_ack_90 + -1'wait_ack_91 + -1'wait_ack_92 + -1'wait_ack_93 + -1'wait_ack_94 + -1'wait_ack_95 + -1'wait_ack_96 + -1'wait_ack_97 + -1'wait_ack_98 + -1'wait_ack_99 + ACK_0 + MSG_0 + MSG_1 + MSG_2 + MSG_3 + MSG_4 + MSG_5 + MSG_6 + MSG_7 + MSG_8 + MSG_9 + T_out_0 = 0
invariant :cable_used_5 + -1'FMC_5 + -1'wait_ack_50 + -1'wait_ack_51 + -1'wait_ack_52 + -1'wait_ack_53 + -1'wait_ack_54 + -1'wait_ack_55 + -1'wait_ack_56 + -1'wait_ack_57 + -1'wait_ack_58 + -1'wait_ack_59 + -1'PMC_5 = 0
invariant :-1'AMC_90 + -1'AMC_91 + -1'AMC_92 + -1'AMC_93 + -1'AMC_94 + -1'AMC_95 + -1'AMC_96 + -1'AMC_97 + -1'AMC_98 + -1'AMC_99 + wait_cable_9 + -1'RMC_9 + -1'PMC_9 = 0
invariant :AMC_50 + AMC_51 + AMC_52 + AMC_53 + AMC_54 + AMC_55 + AMC_56 + AMC_57 + AMC_58 + AMC_59 + wait_ack_50 + wait_ack_51 + wait_ack_52 + wait_ack_53 + wait_ack_54 + wait_ack_55 + wait_ack_56 + wait_ack_57 + wait_ack_58 + wait_ack_59 + listen_5 + RMC_5 + PMC_5 + wait_msg_5 + loop_em_5 = 1
invariant :Cpt2_9 + -1'Cpt1_9 + AMC_8 + -1'AMC_9 + AMC_18 + -1'AMC_19 + AMC_28 + -1'AMC_29 + AMC_38 + -1'AMC_39 + AMC_48 + -1'AMC_49 + AMC_58 + -1'AMC_59 + AMC_68 + -1'AMC_69 + AMC_78 + -1'AMC_79 + AMC_88 + -1'AMC_89 + AMC_98 + -1'AMC_99 = 0
invariant :-1'AMC_40 + -1'AMC_41 + -1'AMC_42 + -1'AMC_43 + -1'AMC_44 + -1'AMC_45 + -1'AMC_46 + -1'AMC_47 + -1'AMC_48 + -1'AMC_49 + wait_cable_4 + -1'RMC_4 + -1'PMC_4 = 0
invariant :-1'AMC_70 + -1'AMC_71 + -1'AMC_72 + -1'AMC_73 + -1'AMC_74 + -1'AMC_75 + -1'AMC_76 + -1'AMC_77 + -1'AMC_78 + -1'AMC_79 + wait_cable_7 + -1'RMC_7 + -1'PMC_7 = 0
invariant :Cpt1_0 + Cpt1_1 + Cpt1_2 + Cpt1_3 + Cpt1_4 + Cpt1_5 + Cpt1_6 + Cpt1_7 + Cpt1_8 + Cpt1_9 = 1
invariant :wait_ack_30 + wait_ack_31 + wait_ack_32 + wait_ack_33 + wait_ack_34 + wait_ack_35 + wait_ack_36 + wait_ack_37 + wait_ack_38 + wait_ack_39 + wait_cable_3 + listen_3 + wait_msg_3 + loop_em_3 = 1
invariant :cable_used_0 + FMC_1 + FMC_2 + FMC_3 + FMC_4 + FMC_5 + FMC_6 + FMC_7 + FMC_8 + FMC_9 + -1'wait_ack_0 + -1'wait_ack_1 + -1'wait_ack_2 + -1'wait_ack_3 + -1'wait_ack_4 + -1'wait_ack_5 + -1'wait_ack_6 + -1'wait_ack_7 + -1'wait_ack_8 + -1'wait_ack_9 + -1'PMC_0 + FMCb_0 = 1
invariant :AMC_40 + AMC_41 + AMC_42 + AMC_43 + AMC_44 + AMC_45 + AMC_46 + AMC_47 + AMC_48 + AMC_49 + wait_ack_40 + wait_ack_41 + wait_ack_42 + wait_ack_43 + wait_ack_44 + wait_ack_45 + wait_ack_46 + wait_ack_47 + wait_ack_48 + wait_ack_49 + listen_4 + RMC_4 + PMC_4 + wait_msg_4 + loop_em_4 = 1
invariant :cable_used_9 + -1'FMC_9 + -1'wait_ack_90 + -1'wait_ack_91 + -1'wait_ack_92 + -1'wait_ack_93 + -1'wait_ack_94 + -1'wait_ack_95 + -1'wait_ack_96 + -1'wait_ack_97 + -1'wait_ack_98 + -1'wait_ack_99 + -1'PMC_9 = 0
invariant :cable_used_3 + -1'FMC_3 + -1'wait_ack_30 + -1'wait_ack_31 + -1'wait_ack_32 + -1'wait_ack_33 + -1'wait_ack_34 + -1'wait_ack_35 + -1'wait_ack_36 + -1'wait_ack_37 + -1'wait_ack_38 + -1'wait_ack_39 + -1'PMC_3 = 0
invariant :R_tout_0 + S_tout_0 = 1
invariant :-1'AMC_50 + -1'AMC_51 + -1'AMC_52 + -1'AMC_53 + -1'AMC_54 + -1'AMC_55 + -1'AMC_56 + -1'AMC_57 + -1'AMC_58 + -1'AMC_59 + wait_cable_5 + -1'RMC_5 + -1'PMC_5 = 0
Compilation finished in 20217 ms.
Running link step : CommandLine [args=[gcc, -shared, -o, gal.so, model.o], workingDir=/home/mcc/execution]
Link finished in 61 ms.
Running LTSmin : CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=1, -p, --pins-guards, --when, -i, SafeBusCOL10ReachabilityCardinality00==true], workingDir=/home/mcc/execution]
FORMULA SafeBus-COL-10-ReachabilityCardinality-00 TRUE TECHNIQUES SAT_SMT K_INDUCTION(0)
FORMULA SafeBus-COL-10-ReachabilityCardinality-01 FALSE TECHNIQUES SAT_SMT K_INDUCTION(0)
FORMULA SafeBus-COL-10-ReachabilityCardinality-02 FALSE TECHNIQUES SAT_SMT K_INDUCTION(0)
FORMULA SafeBus-COL-10-ReachabilityCardinality-03 FALSE TECHNIQUES SAT_SMT K_INDUCTION(0)
FORMULA SafeBus-COL-10-ReachabilityCardinality-06 FALSE TECHNIQUES SAT_SMT K_INDUCTION(0)
FORMULA SafeBus-COL-10-ReachabilityCardinality-07 FALSE TECHNIQUES SAT_SMT K_INDUCTION(0)
FORMULA SafeBus-COL-10-ReachabilityCardinality-10 TRUE TECHNIQUES SAT_SMT K_INDUCTION(0)
FORMULA SafeBus-COL-10-ReachabilityCardinality-11 FALSE TECHNIQUES SAT_SMT K_INDUCTION(0)
WARNING : LTSmin timed out (>257 s) on command CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=1, -p, --pins-guards, --when, -i, SafeBusCOL10ReachabilityCardinality00==true], workingDir=/home/mcc/execution]
Running LTSmin : CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=1, -p, --pins-guards, --when, -i, SafeBusCOL10ReachabilityCardinality04==true], workingDir=/home/mcc/execution]
FORMULA SafeBus-COL-10-ReachabilityCardinality-12 TRUE TECHNIQUES SAT_SMT K_INDUCTION(0)
WARNING : LTSmin timed out (>257 s) on command CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=1, -p, --pins-guards, --when, -i, SafeBusCOL10ReachabilityCardinality04==true], workingDir=/home/mcc/execution]
Running LTSmin : CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=1, -p, --pins-guards, --when, -i, SafeBusCOL10ReachabilityCardinality08==true], workingDir=/home/mcc/execution]
LTSmin run took 79903 ms.
Found Violation
FORMULA SafeBus-COL-10-ReachabilityCardinality-08 FALSE TECHNIQUES PARTIAL_ORDER EXPLICIT LTSMIN SAT_SMT
Running LTSmin : CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=1, -p, --pins-guards, --when, -i, SafeBusCOL10ReachabilityCardinality09==true], workingDir=/home/mcc/execution]
FORMULA SafeBus-COL-10-ReachabilityCardinality-14 FALSE TECHNIQUES SAT_SMT K_INDUCTION(0)
WARNING : LTSmin timed out (>257 s) on command CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=1, -p, --pins-guards, --when, -i, SafeBusCOL10ReachabilityCardinality09==true], workingDir=/home/mcc/execution]
Running LTSmin : CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=1, -p, --pins-guards, --when, -i, SafeBusCOL10ReachabilityCardinality15==true], workingDir=/home/mcc/execution]
WARNING : LTS min runner thread failed on error :java.lang.RuntimeException: Unexpected exception when executing ltsmin :CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=1, -p, --pins-guards, --when, -i, SafeBusCOL10ReachabilityCardinality15==true], workingDir=/home/mcc/execution]
255
FORMULA SafeBus-COL-10-ReachabilityCardinality-15 FALSE TECHNIQUES SAT_SMT K_INDUCTION(0)
*
Cache Stats : size=0 --- Peak size=0
Cache hit ratio : 0% (0/0)
*
GSHom Stats : size unicity table = 8
sizeof(_GShom):16
sizeof(SIdentity):16
Current/Peak number of SDD nodes in unicity table :4/4
sizeof(_GSDD):48
*
Cache Stats : size=39011477

Cache hit ratio : 0%
*
GHom Stats : size unicity table = 5389
sizeof(_GHom):24
sizeof(Identity):24
Peak number of DDD nodes in unicity table :67108862
sizeof(_GDDD):8
sizeof(DDD::edge_t):8
sizeof(DDD::val_t):2

BK_TIME_CONFINEMENT_REACHED

--------------------
content from stderr:

+ export BINDIR=/home/mcc/BenchKit/
+ BINDIR=/home/mcc/BenchKit/
++ pwd
+ export MODEL=/home/mcc/execution
+ MODEL=/home/mcc/execution
+ /home/mcc/BenchKit//runeclipse.sh /home/mcc/execution ReachabilityCardinality -its -ltsminpath /home/mcc/BenchKit//lts_install_dir/ -smt
+ ulimit -s 65536
+ [[ -z '' ]]
+ export LTSMIN_MEM_SIZE=8589934592
+ LTSMIN_MEM_SIZE=8589934592
+ /home/mcc/BenchKit//itstools/its-tools -consoleLog -data /home/mcc/execution/workspace -pnfolder /home/mcc/execution -examination ReachabilityCardinality -z3path /home/mcc/BenchKit//z3/bin/z3 -yices2path /home/mcc/BenchKit//yices/bin/yices -its -ltsminpath /home/mcc/BenchKit//lts_install_dir/ -smt -vmargs -Dosgi.locking=none -Declipse.stateSaveDelayInterval=-1 -Dosgi.configuration.area=/tmp/.eclipse -Xss8m -Xms40m -Xmx8192m -Dfile.encoding=UTF-8 -Dosgi.requiredJavaVersion=1.6
May 22, 2018 10:44:41 PM fr.lip6.move.gal.application.Application start
INFO: Running its-tools with arguments : [-pnfolder, /home/mcc/execution, -examination, ReachabilityCardinality, -z3path, /home/mcc/BenchKit//z3/bin/z3, -yices2path, /home/mcc/BenchKit//yices/bin/yices, -its, -ltsminpath, /home/mcc/BenchKit//lts_install_dir/, -smt]
May 22, 2018 10:44:41 PM fr.lip6.move.gal.application.MccTranslator transformPNML
INFO: Parsing pnml file : /home/mcc/execution/model.pnml
May 22, 2018 10:44:41 PM fr.lip6.move.gal.pnml.togal.PnmlToGalTransformer transform
INFO: Detected file is not PT type :http://www.pnml.org/version-2009/grammar/symmetricnet
May 22, 2018 10:44:42 PM fr.lip6.move.gal.pnml.togal.PnmlToGalTransformer transform
INFO: Load time of PNML (colored model parsed with PNMLFW) : 923 ms
May 22, 2018 10:44:42 PM fr.lip6.move.gal.pnml.togal.HLGALTransformer handlePage
INFO: Transformed 20 places.
May 22, 2018 10:44:42 PM fr.lip6.move.gal.pnml.togal.HLGALTransformer handlePage
INFO: Computed order using colors.
May 22, 2018 10:44:42 PM fr.lip6.move.gal.pnml.togal.HLGALTransformer handlePage
INFO: sort/places :Dom->AMC,wait_ack,
Dot->cable_free,ACK,T_out,R_tout,S_tout,FMCb,
It->Cpt2,Cpt1,msgl,cable_used,FMC,wait_cable,listen,RMC,PMC,MSG,wait_msg,loop_em,

May 22, 2018 10:44:42 PM fr.lip6.move.gal.pnml.togal.HLGALTransformer handlePage
INFO: Transformed 14 transitions.
May 22, 2018 10:44:42 PM fr.lip6.move.gal.pnml.togal.PnmlToGalTransformer transform
INFO: Computed order based on color domains.
May 22, 2018 10:44:42 PM fr.lip6.move.serialization.SerializationUtil systemToFile
INFO: Time to serialize gal into /home/mcc/execution/model.pnml.img.gal : 8 ms
May 22, 2018 10:44:42 PM fr.lip6.move.gal.instantiate.Instantiator fuseEqualParameters
INFO: Fused parameters : $x and $y of transition C_refuse
May 22, 2018 10:44:42 PM fr.lip6.move.gal.instantiate.Instantiator fuseEqualParameters
INFO: Fused parameters : $i and $j of transition C_free
May 22, 2018 10:44:42 PM fr.lip6.move.gal.instantiate.Instantiator fuseEqualParameters
INFO: Fused parameters : $x and $y of transition C_provide
May 22, 2018 10:44:42 PM fr.lip6.move.gal.instantiate.Instantiator fuseEqualParameters
INFO: Fused parameters : $r and $i of transition I_rec1
May 22, 2018 10:44:42 PM fr.lip6.move.gal.instantiate.Instantiator fuseEqualParameters
INFO: Fused parameters : $i and $j of transition I_emit
May 22, 2018 10:44:42 PM fr.lip6.move.gal.instantiate.Instantiator fuseEqualParameters
INFO: Fused parameters : $i and $j of transition I_refused
May 22, 2018 10:44:42 PM fr.lip6.move.gal.instantiate.Instantiator fuseEqualParameters
INFO: Fused parameters : $r and $i of transition I_rec2
May 22, 2018 10:44:42 PM fr.lip6.move.gal.instantiate.DomainAnalyzer computeVariableDomains
INFO: Found a total of 1 fixed domain variables (out of 326 variables) in GAL type Document
May 22, 2018 10:44:42 PM fr.lip6.move.gal.instantiate.Simplifier printConstantVars
INFO: Found a total of 10 constant array cells/variables (out of 326 variables) in type Document
May 22, 2018 10:44:42 PM fr.lip6.move.gal.instantiate.Simplifier printConstantVars
INFO: msgl[0-9],
May 22, 2018 10:44:42 PM fr.lip6.move.gal.instantiate.Instantiator instantiateParameters
INFO: On-the-fly reduction of False transitions avoided exploring 10.0 instantiations of transitions. Total transitions/syncs built is 840
May 22, 2018 10:44:42 PM fr.lip6.move.gal.instantiate.DomainAnalyzer computeVariableDomains
INFO: Found a total of 1 fixed domain variables (out of 326 variables) in GAL type Document
May 22, 2018 10:44:42 PM fr.lip6.move.gal.instantiate.Simplifier printConstantVars
INFO: Found a total of 10 constant array cells/variables (out of 326 variables) in type Document
May 22, 2018 10:44:42 PM fr.lip6.move.gal.instantiate.Simplifier printConstantVars
INFO: msgl[0-9],
May 22, 2018 10:44:42 PM fr.lip6.move.gal.instantiate.Simplifier simplifyConstantVariables
INFO: Removed constant array :msgl[]
May 22, 2018 10:44:42 PM fr.lip6.move.gal.instantiate.Simplifier simplifyConstantVariables
INFO: Simplified 70 expressions due to constant valuations.
May 22, 2018 10:44:42 PM fr.lip6.move.gal.instantiate.GALRewriter flatten
INFO: Flatten gal took : 237 ms
May 22, 2018 10:44:44 PM fr.lip6.move.gal.instantiate.GALRewriter flatten
INFO: Flatten gal took : 168 ms
May 22, 2018 10:44:44 PM fr.lip6.move.serialization.SerializationUtil systemToFile
INFO: Time to serialize gal into /home/mcc/execution/ReachabilityCardinality.pnml.gal : 23 ms
May 22, 2018 10:44:44 PM fr.lip6.move.serialization.SerializationUtil serializePropertiesForITSTools
INFO: Time to serialize properties into /home/mcc/execution/ReachabilityCardinality.prop : 3 ms
May 22, 2018 10:44:44 PM fr.lip6.move.gal.instantiate.GALRewriter flatten
INFO: Flatten gal took : 202 ms
May 22, 2018 10:44:44 PM fr.lip6.move.gal.semantics.DeterministicNextBuilder getDeterministicNext
INFO: Input system was not deterministic with 50 transitions. Expanding to a total of 1930 deterministic transitions.
May 22, 2018 10:44:44 PM fr.lip6.move.gal.semantics.DeterministicNextBuilder getDeterministicNext
INFO: Input system was not deterministic with 50 transitions. Expanding to a total of 1930 deterministic transitions.
May 22, 2018 10:44:44 PM fr.lip6.move.gal.semantics.DeterministicNextBuilder getDeterministicNext
INFO: Determinization took 3 ms.
May 22, 2018 10:44:44 PM fr.lip6.move.gal.semantics.DeterministicNextBuilder getDeterministicNext
INFO: Determinization took 19 ms.
May 22, 2018 10:44:44 PM fr.lip6.move.gal.gal2pins.Gal2PinsTransformerNext transform
INFO: Too many transitions (1651) to apply POR reductions. Disabling POR matrices.
May 22, 2018 10:44:44 PM fr.lip6.move.gal.gal2pins.Gal2PinsTransformerNext transform
INFO: Built C files in 916ms conformant to PINS in folder :/home/mcc/execution
May 22, 2018 10:44:45 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd checkProperties
INFO: Ran tautology test, simplified 0 / 14 in 1627 ms.
May 22, 2018 10:44:45 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property SafeBus-COL-10-ReachabilityCardinality-00(UNSAT) depth K=0 took 40 ms
May 22, 2018 10:44:45 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property SafeBus-COL-10-ReachabilityCardinality-01(UNSAT) depth K=0 took 19 ms
May 22, 2018 10:44:45 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property SafeBus-COL-10-ReachabilityCardinality-02(UNSAT) depth K=0 took 10 ms
May 22, 2018 10:44:45 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property SafeBus-COL-10-ReachabilityCardinality-03(UNSAT) depth K=0 took 16 ms
May 22, 2018 10:44:45 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property SafeBus-COL-10-ReachabilityCardinality-04(UNSAT) depth K=0 took 9 ms
May 22, 2018 10:44:45 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property SafeBus-COL-10-ReachabilityCardinality-06(UNSAT) depth K=0 took 15 ms
May 22, 2018 10:44:45 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property SafeBus-COL-10-ReachabilityCardinality-07(UNSAT) depth K=0 took 8 ms
May 22, 2018 10:44:45 PM fr.lip6.move.gal.semantics.DeterministicNextBuilder getDeterministicNext
INFO: Input system was not deterministic with 50 transitions. Expanding to a total of 1930 deterministic transitions.
May 22, 2018 10:44:45 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property SafeBus-COL-10-ReachabilityCardinality-08(UNSAT) depth K=0 took 9 ms
May 22, 2018 10:44:45 PM fr.lip6.move.gal.semantics.DeterministicNextBuilder getDeterministicNext
INFO: Determinization took 5 ms.
May 22, 2018 10:44:45 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property SafeBus-COL-10-ReachabilityCardinality-09(UNSAT) depth K=0 took 11 ms
May 22, 2018 10:44:46 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property SafeBus-COL-10-ReachabilityCardinality-10(UNSAT) depth K=0 took 16 ms
May 22, 2018 10:44:46 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property SafeBus-COL-10-ReachabilityCardinality-11(UNSAT) depth K=0 took 16 ms
May 22, 2018 10:44:46 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property SafeBus-COL-10-ReachabilityCardinality-12(UNSAT) depth K=0 took 16 ms
May 22, 2018 10:44:46 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property SafeBus-COL-10-ReachabilityCardinality-14(UNSAT) depth K=0 took 16 ms
May 22, 2018 10:44:46 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property SafeBus-COL-10-ReachabilityCardinality-15(UNSAT) depth K=0 took 8 ms
May 22, 2018 10:44:46 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property SafeBus-COL-10-ReachabilityCardinality-00(UNSAT) depth K=1 took 12 ms
May 22, 2018 10:44:46 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property SafeBus-COL-10-ReachabilityCardinality-01(UNSAT) depth K=1 took 20 ms
May 22, 2018 10:44:46 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property SafeBus-COL-10-ReachabilityCardinality-02(UNSAT) depth K=1 took 119 ms
May 22, 2018 10:44:46 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property SafeBus-COL-10-ReachabilityCardinality-03(UNSAT) depth K=1 took 19 ms
May 22, 2018 10:44:46 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property SafeBus-COL-10-ReachabilityCardinality-04(UNSAT) depth K=1 took 15 ms
May 22, 2018 10:44:46 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property SafeBus-COL-10-ReachabilityCardinality-06(UNSAT) depth K=1 took 85 ms
May 22, 2018 10:44:46 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property SafeBus-COL-10-ReachabilityCardinality-07(UNSAT) depth K=1 took 15 ms
May 22, 2018 10:44:46 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property SafeBus-COL-10-ReachabilityCardinality-08(UNSAT) depth K=1 took 28 ms
May 22, 2018 10:44:46 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property SafeBus-COL-10-ReachabilityCardinality-09(UNSAT) depth K=1 took 15 ms
May 22, 2018 10:44:46 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property SafeBus-COL-10-ReachabilityCardinality-10(UNSAT) depth K=1 took 16 ms
May 22, 2018 10:44:46 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property SafeBus-COL-10-ReachabilityCardinality-11(UNSAT) depth K=1 took 16 ms
May 22, 2018 10:44:46 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property SafeBus-COL-10-ReachabilityCardinality-12(UNSAT) depth K=1 took 65 ms
May 22, 2018 10:44:46 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property SafeBus-COL-10-ReachabilityCardinality-14(UNSAT) depth K=1 took 52 ms
May 22, 2018 10:44:46 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property SafeBus-COL-10-ReachabilityCardinality-15(UNSAT) depth K=1 took 51 ms
May 22, 2018 10:44:47 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property SafeBus-COL-10-ReachabilityCardinality-00(UNSAT) depth K=2 took 715 ms
May 22, 2018 10:44:47 PM fr.lip6.move.gal.gal2smt.bmc.KInductionSolver computeAndDeclareInvariants
INFO: Computed 45 place invariants in 477 ms
May 22, 2018 10:44:48 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property SafeBus-COL-10-ReachabilityCardinality-01(UNSAT) depth K=2 took 1450 ms
May 22, 2018 10:44:49 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property SafeBus-COL-10-ReachabilityCardinality-02(UNSAT) depth K=2 took 1154 ms
May 22, 2018 10:44:50 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property SafeBus-COL-10-ReachabilityCardinality-03(UNSAT) depth K=2 took 736 ms
May 22, 2018 10:44:50 PM fr.lip6.move.gal.gal2smt.bmc.KInductionSolver init
INFO: Proved 316 variables to be positive in 3780 ms
May 22, 2018 10:44:51 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property SafeBus-COL-10-ReachabilityCardinality-04(UNSAT) depth K=2 took 616 ms
May 22, 2018 10:44:54 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property SafeBus-COL-10-ReachabilityCardinality-06(UNSAT) depth K=2 took 3045 ms
May 22, 2018 10:44:55 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property SafeBus-COL-10-ReachabilityCardinality-07(UNSAT) depth K=2 took 671 ms
May 22, 2018 10:45:00 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property SafeBus-COL-10-ReachabilityCardinality-08(UNSAT) depth K=2 took 5706 ms
May 22, 2018 10:45:01 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property SafeBus-COL-10-ReachabilityCardinality-09(UNSAT) depth K=2 took 1227 ms
May 22, 2018 10:45:02 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property SafeBus-COL-10-ReachabilityCardinality-10(UNSAT) depth K=2 took 747 ms
May 22, 2018 10:45:04 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property SafeBus-COL-10-ReachabilityCardinality-11(UNSAT) depth K=2 took 2094 ms
May 22, 2018 10:45:05 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property SafeBus-COL-10-ReachabilityCardinality-12(UNSAT) depth K=2 took 910 ms
May 22, 2018 10:45:06 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property SafeBus-COL-10-ReachabilityCardinality-14(UNSAT) depth K=2 took 1089 ms
May 22, 2018 10:45:06 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: Induction result is UNSAT, proved invariant SafeBus-COL-10-ReachabilityCardinality-00
May 22, 2018 10:45:06 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: Induction result is UNSAT, successfully proved induction at step 0 for SafeBus-COL-10-ReachabilityCardinality-00
May 22, 2018 10:45:06 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: KInduction solution for property SafeBus-COL-10-ReachabilityCardinality-00(TRUE) depth K=0 took 16290 ms
May 22, 2018 10:45:07 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property SafeBus-COL-10-ReachabilityCardinality-15(UNSAT) depth K=2 took 837 ms
May 22, 2018 10:45:08 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: Induction result is UNSAT, proved UNreachability of reachability predicate SafeBus-COL-10-ReachabilityCardinality-01
May 22, 2018 10:45:08 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: Induction result is UNSAT, successfully proved induction at step 0 for SafeBus-COL-10-ReachabilityCardinality-01
May 22, 2018 10:45:08 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: KInduction solution for property SafeBus-COL-10-ReachabilityCardinality-01(FALSE) depth K=0 took 1949 ms
May 22, 2018 10:45:19 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property SafeBus-COL-10-ReachabilityCardinality-01(UNSAT) depth K=3 took 11486 ms
May 22, 2018 10:45:27 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: Induction result is UNSAT, proved UNreachability of reachability predicate SafeBus-COL-10-ReachabilityCardinality-02
May 22, 2018 10:45:27 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: Induction result is UNSAT, successfully proved induction at step 0 for SafeBus-COL-10-ReachabilityCardinality-02
May 22, 2018 10:45:27 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: KInduction solution for property SafeBus-COL-10-ReachabilityCardinality-02(FALSE) depth K=0 took 18352 ms
May 22, 2018 10:45:47 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: Induction result is UNSAT, proved UNreachability of reachability predicate SafeBus-COL-10-ReachabilityCardinality-03
May 22, 2018 10:45:47 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: Induction result is UNSAT, successfully proved induction at step 0 for SafeBus-COL-10-ReachabilityCardinality-03
May 22, 2018 10:45:47 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: KInduction solution for property SafeBus-COL-10-ReachabilityCardinality-03(FALSE) depth K=0 took 20197 ms
May 22, 2018 10:45:50 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: Induction result is SAT, non conclusive we might be starting from unreachable statesSafeBus-COL-10-ReachabilityCardinality-04
May 22, 2018 10:45:51 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: KInduction solution for property SafeBus-COL-10-ReachabilityCardinality-04(SAT) depth K=0 took 3527 ms
May 22, 2018 10:46:39 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: Induction result is UNSAT, proved UNreachability of reachability predicate SafeBus-COL-10-ReachabilityCardinality-06
May 22, 2018 10:46:39 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: Induction result is UNSAT, successfully proved induction at step 0 for SafeBus-COL-10-ReachabilityCardinality-06
May 22, 2018 10:46:39 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: KInduction solution for property SafeBus-COL-10-ReachabilityCardinality-06(FALSE) depth K=0 took 48397 ms
May 22, 2018 10:46:41 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: Induction result is UNSAT, proved UNreachability of reachability predicate SafeBus-COL-10-ReachabilityCardinality-07
May 22, 2018 10:46:41 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: Induction result is UNSAT, successfully proved induction at step 0 for SafeBus-COL-10-ReachabilityCardinality-07
May 22, 2018 10:46:41 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: KInduction solution for property SafeBus-COL-10-ReachabilityCardinality-07(FALSE) depth K=0 took 1828 ms
May 22, 2018 10:46:42 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property SafeBus-COL-10-ReachabilityCardinality-02(UNSAT) depth K=3 took 83520 ms
May 22, 2018 10:46:45 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: Induction result is SAT, non conclusive we might be starting from unreachable statesSafeBus-COL-10-ReachabilityCardinality-08
May 22, 2018 10:46:45 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: KInduction solution for property SafeBus-COL-10-ReachabilityCardinality-08(SAT) depth K=0 took 4433 ms
May 22, 2018 10:46:54 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: Induction result is SAT, non conclusive we might be starting from unreachable statesSafeBus-COL-10-ReachabilityCardinality-09
May 22, 2018 10:46:54 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: KInduction solution for property SafeBus-COL-10-ReachabilityCardinality-09(SAT) depth K=0 took 8798 ms
May 22, 2018 10:47:30 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: Induction result is UNSAT, proved invariant SafeBus-COL-10-ReachabilityCardinality-10
May 22, 2018 10:47:30 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: Induction result is UNSAT, successfully proved induction at step 0 for SafeBus-COL-10-ReachabilityCardinality-10
May 22, 2018 10:47:30 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: KInduction solution for property SafeBus-COL-10-ReachabilityCardinality-10(TRUE) depth K=0 took 35866 ms
May 22, 2018 10:47:33 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: Induction result is UNSAT, proved UNreachability of reachability predicate SafeBus-COL-10-ReachabilityCardinality-11
May 22, 2018 10:47:33 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: Induction result is UNSAT, successfully proved induction at step 0 for SafeBus-COL-10-ReachabilityCardinality-11
May 22, 2018 10:47:33 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: KInduction solution for property SafeBus-COL-10-ReachabilityCardinality-11(FALSE) depth K=0 took 3028 ms
May 22, 2018 10:47:56 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property SafeBus-COL-10-ReachabilityCardinality-03(UNSAT) depth K=3 took 74040 ms
May 22, 2018 10:49:23 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property SafeBus-COL-10-ReachabilityCardinality-04(UNSAT) depth K=3 took 86765 ms
May 22, 2018 10:51:01 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property SafeBus-COL-10-ReachabilityCardinality-06(UNSAT) depth K=3 took 98535 ms
May 22, 2018 10:51:15 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property SafeBus-COL-10-ReachabilityCardinality-07(UNSAT) depth K=3 took 13962 ms
May 22, 2018 10:51:56 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property SafeBus-COL-10-ReachabilityCardinality-08(UNSAT) depth K=3 took 40143 ms
May 22, 2018 10:52:29 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: Induction result is UNSAT, proved invariant SafeBus-COL-10-ReachabilityCardinality-12
May 22, 2018 10:52:29 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: Induction result is UNSAT, successfully proved induction at step 0 for SafeBus-COL-10-ReachabilityCardinality-12
May 22, 2018 10:52:29 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: KInduction solution for property SafeBus-COL-10-ReachabilityCardinality-12(TRUE) depth K=0 took 296215 ms
May 22, 2018 10:52:48 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property SafeBus-COL-10-ReachabilityCardinality-09(UNSAT) depth K=3 took 52776 ms
May 22, 2018 10:53:57 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property SafeBus-COL-10-ReachabilityCardinality-10(UNSAT) depth K=3 took 69007 ms
May 22, 2018 10:54:26 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property SafeBus-COL-10-ReachabilityCardinality-11(UNSAT) depth K=3 took 28401 ms
May 22, 2018 10:55:42 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property SafeBus-COL-10-ReachabilityCardinality-12(UNSAT) depth K=3 took 76322 ms
May 22, 2018 10:56:50 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property SafeBus-COL-10-ReachabilityCardinality-14(UNSAT) depth K=3 took 67591 ms
May 22, 2018 10:57:26 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: Induction result is UNSAT, proved UNreachability of reachability predicate SafeBus-COL-10-ReachabilityCardinality-14
May 22, 2018 10:57:26 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: Induction result is UNSAT, successfully proved induction at step 0 for SafeBus-COL-10-ReachabilityCardinality-14
May 22, 2018 10:57:26 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: KInduction solution for property SafeBus-COL-10-ReachabilityCardinality-14(FALSE) depth K=0 took 297341 ms
May 22, 2018 10:58:21 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property SafeBus-COL-10-ReachabilityCardinality-15(UNSAT) depth K=3 took 91149 ms
pins2lts-mc, 0.000: Registering PINS so language module
pins2lts-mc, 0.000, ** error **: out of memory trying to get 4294967296
java.lang.RuntimeException: Unexpected exception when executing ltsmin :CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=1, -p, --pins-guards, --when, -i, SafeBusCOL10ReachabilityCardinality15==true], workingDir=/home/mcc/execution]
255
at fr.lip6.move.gal.application.LTSminRunner.checkProperty(LTSminRunner.java:167)
at fr.lip6.move.gal.application.LTSminRunner.access$9(LTSminRunner.java:122)
at fr.lip6.move.gal.application.LTSminRunner$1.run(LTSminRunner.java:91)
at java.lang.Thread.run(Thread.java:748)
May 22, 2018 11:00:21 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: Induction result is UNSAT, proved UNreachability of reachability predicate SafeBus-COL-10-ReachabilityCardinality-15
May 22, 2018 11:00:21 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: Induction result is UNSAT, successfully proved induction at step 0 for SafeBus-COL-10-ReachabilityCardinality-15
May 22, 2018 11:00:21 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: KInduction solution for property SafeBus-COL-10-ReachabilityCardinality-15(FALSE) depth K=0 took 174711 ms
May 22, 2018 11:00:58 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: Induction result is SAT, non conclusive we might be starting from unreachable statesSafeBus-COL-10-ReachabilityCardinality-04
May 22, 2018 11:00:58 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: KInduction solution for property SafeBus-COL-10-ReachabilityCardinality-04(SAT) depth K=1 took 36636 ms
May 22, 2018 11:01:17 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property SafeBus-COL-10-ReachabilityCardinality-04(UNSAT) depth K=4 took 175710 ms
May 22, 2018 11:01:34 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: Induction result is SAT, non conclusive we might be starting from unreachable statesSafeBus-COL-10-ReachabilityCardinality-09
May 22, 2018 11:01:34 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: KInduction solution for property SafeBus-COL-10-ReachabilityCardinality-09(SAT) depth K=1 took 36094 ms
May 22, 2018 11:06:28 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property SafeBus-COL-10-ReachabilityCardinality-09(UNSAT) depth K=4 took 311330 ms
May 22, 2018 11:11:23 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property SafeBus-COL-10-ReachabilityCardinality-15(UNSAT) depth K=4 took 295505 ms
May 22, 2018 11:15:16 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: Induction result is SAT, non conclusive we might be starting from unreachable statesSafeBus-COL-10-ReachabilityCardinality-04
May 22, 2018 11:15:16 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: KInduction solution for property SafeBus-COL-10-ReachabilityCardinality-04(SAT) depth K=2 took 822061 ms
May 22, 2018 11:24:55 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property SafeBus-COL-10-ReachabilityCardinality-04(UNSAT) depth K=5 took 811993 ms
May 22, 2018 11:27:12 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: Induction result is SAT, non conclusive we might be starting from unreachable statesSafeBus-COL-10-ReachabilityCardinality-09
May 22, 2018 11:27:12 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: KInduction solution for property SafeBus-COL-10-ReachabilityCardinality-09(SAT) depth K=2 took 716168 ms
May 22, 2018 11:39:28 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property SafeBus-COL-10-ReachabilityCardinality-09(UNSAT) depth K=5 took 872431 ms

Sequence of Actions to be Executed by the VM

This is useful if one wants to reexecute the tool in the VM from the submitted image disk.

set -x
# this is for BenchKit: configuration of major elements for the test
export BK_INPUT="SafeBus-COL-10"
export BK_EXAMINATION="ReachabilityCardinality"
export BK_TOOL="itstools"
export BK_RESULT_DIR="/tmp/BK_RESULTS/OUTPUTS"
export BK_TIME_CONFINEMENT="3600"
export BK_MEMORY_CONFINEMENT="16384"

# this is specific to your benchmark or test

export BIN_DIR="$HOME/BenchKit/bin"

# remove the execution directoty if it exists (to avoid increse of .vmdk images)
if [ -d execution ] ; then
rm -rf execution
fi

tar xzf /home/mcc/BenchKit/INPUTS/SafeBus-COL-10.tgz
mv SafeBus-COL-10 execution
cd execution
pwd
ls -lh

# this is for BenchKit: explicit launching of the test
echo "====================================================================="
echo " Generated by BenchKit 2-3637"
echo " Executing tool itstools"
echo " Input is SafeBus-COL-10, examination is ReachabilityCardinality"
echo " Time confinement is $BK_TIME_CONFINEMENT seconds"
echo " Memory confinement is 16384 MBytes"
echo " Number of cores is 4"
echo " Run identifier is r152-smll-152685550400194"
echo "====================================================================="
echo
echo "--------------------"
echo "content from stdout:"
echo
echo "=== Data for post analysis generated by BenchKit (invocation template)"
echo
if [ "ReachabilityCardinality" = "UpperBounds" ] ; then
echo "The expected result is a vector of positive values"
echo NUM_VECTOR
elif [ "ReachabilityCardinality" != "StateSpace" ] ; then
echo "The expected result is a vector of booleans"
echo BOOL_VECTOR
else
echo "no data necessary for post analysis"
fi
echo
if [ -f "ReachabilityCardinality.txt" ] ; then
echo "here is the order used to build the result vector(from text file)"
for x in $(grep Property ReachabilityCardinality.txt | cut -d ' ' -f 2 | sort -u) ; do
echo "FORMULA_NAME $x"
done
elif [ -f "ReachabilityCardinality.xml" ] ; then # for cunf (txt files deleted;-)
echo echo "here is the order used to build the result vector(from xml file)"
for x in $(grep '' ReachabilityCardinality.xml | cut -d '>' -f 2 | cut -d '<' -f 1 | sort -u) ; do
echo "FORMULA_NAME $x"
done
fi
echo
echo "=== Now, execution of the tool begins"
echo
echo -n "BK_START "
date -u +%s%3N
echo
timeout -s 9 $BK_TIME_CONFINEMENT bash -c "/home/mcc/BenchKit/BenchKit_head.sh 2> STDERR ; echo ; echo -n \"BK_STOP \" ; date -u +%s%3N"
if [ $? -eq 137 ] ; then
echo
echo "BK_TIME_CONFINEMENT_REACHED"
fi
echo
echo "--------------------"
echo "content from stderr:"
echo
cat STDERR ;