Execution Chart

We display below the execution chart for this examination (boot time has been removed).

Trace from the execution

Waiting for the VM to be ready (probing ssh)
...................
/home/mcc/execution
total 216K
-rw-r--r-- 1 mcc users 4.0K May 15 18:54 CTLCardinality.txt
-rw-r--r-- 1 mcc users 22K May 15 18:54 CTLCardinality.xml
-rw-r--r-- 1 mcc users 2.7K May 15 18:54 CTLFireability.txt
-rw-r--r-- 1 mcc users 19K May 15 18:54 CTLFireability.xml
-rw-r--r-- 1 mcc users 4.0K May 15 18:50 GenericPropertiesDefinition.xml
-rw-r--r-- 1 mcc users 6.0K May 15 18:50 GenericPropertiesVerdict.xml
-rw-r--r-- 1 mcc users 2.3K May 15 18:54 LTLCardinality.txt
-rw-r--r-- 1 mcc users 11K May 15 18:54 LTLCardinality.xml
-rw-r--r-- 1 mcc users 1.9K May 15 18:54 LTLFireability.txt
-rw-r--r-- 1 mcc users 9.6K May 15 18:54 LTLFireability.xml
-rw-r--r-- 1 mcc users 3.8K May 15 18:54 ReachabilityCardinality.txt
-rw-r--r-- 1 mcc users 20K May 15 18:54 ReachabilityCardinality.xml
-rw-r--r-- 1 mcc users 105 May 15 18:54 ReachabilityDeadlock.txt
-rw-r--r-- 1 mcc users 343 May 15 18:54 ReachabilityDeadlock.xml
-rw-r--r-- 1 mcc users 3.2K May 15 18:54 ReachabilityFireability.txt
-rw-r--r-- 1 mcc users 20K May 15 18:54 ReachabilityFireability.xml
-rw-r--r-- 1 mcc users 1.6K May 15 18:54 UpperBounds.txt
-rw-r--r-- 1 mcc users 3.6K May 15 18:54 UpperBounds.xml
-rw-r--r-- 1 mcc users 5 May 15 18:50 equiv_pt
-rw-r--r-- 1 mcc users 3 May 15 18:50 instance
-rw-r--r-- 1 mcc users 5 May 15 18:50 iscolored
-rw-r--r-- 1 mcc users 42K May 15 18:50 model.pnml
=====================================================================
Generated by BenchKit 2-3637
Executing tool itstools
Input is SafeBus-COL-06, examination is ReachabilityCardinality
Time confinement is 3600 seconds
Memory confinement is 16384 MBytes
Number of cores is 4
Run identifier is r152-smll-152685550300187
=====================================================================

--------------------
content from stdout:

=== Data for post analysis generated by BenchKit (invocation template)

The expected result is a vector of booleans
BOOL_VECTOR

here is the order used to build the result vector(from text file)
FORMULA_NAME SafeBus-COL-06-ReachabilityCardinality-00
FORMULA_NAME SafeBus-COL-06-ReachabilityCardinality-01
FORMULA_NAME SafeBus-COL-06-ReachabilityCardinality-02
FORMULA_NAME SafeBus-COL-06-ReachabilityCardinality-03
FORMULA_NAME SafeBus-COL-06-ReachabilityCardinality-04
FORMULA_NAME SafeBus-COL-06-ReachabilityCardinality-05
FORMULA_NAME SafeBus-COL-06-ReachabilityCardinality-06
FORMULA_NAME SafeBus-COL-06-ReachabilityCardinality-07
FORMULA_NAME SafeBus-COL-06-ReachabilityCardinality-08
FORMULA_NAME SafeBus-COL-06-ReachabilityCardinality-09
FORMULA_NAME SafeBus-COL-06-ReachabilityCardinality-10
FORMULA_NAME SafeBus-COL-06-ReachabilityCardinality-11
FORMULA_NAME SafeBus-COL-06-ReachabilityCardinality-12
FORMULA_NAME SafeBus-COL-06-ReachabilityCardinality-13
FORMULA_NAME SafeBus-COL-06-ReachabilityCardinality-14
FORMULA_NAME SafeBus-COL-06-ReachabilityCardinality-15

=== Now, execution of the tool begins

BK_START 1527026563517

22:02:46.429 [main] ERROR PNML validation - The rng grammar file can't be accessed : www.pnml.org
22:02:46.432 [main] ERROR import - Grammar file errors have been raised, the validation can't be done, process will continue without Grammar validation
FORMULA SafeBus-COL-06-ReachabilityCardinality-09 FALSE TECHNIQUES TOPOLOGICAL INITIAL_STATE
FORMULA SafeBus-COL-06-ReachabilityCardinality-07 TRUE TECHNIQUES TOPOLOGICAL INITIAL_STATE
Using solver Z3 to compute partial order matrices.
Built C files in :
/home/mcc/execution
Invoking ITS tools like this :CommandLine [args=[/home/mcc/BenchKit/itstools/plugins/fr.lip6.move.gal.itstools.binaries_1.0.0.201805151631/bin/its-reach-linux64, --gc-threshold, 2000000, --quiet, -i, /home/mcc/execution/ReachabilityCardinality.pnml.gal, -t, CGAL, -reachable-file, ReachabilityCardinality.prop, --nowitness], workingDir=/home/mcc/execution]

its-reach command run as :

/home/mcc/BenchKit/itstools/plugins/fr.lip6.move.gal.itstools.binaries_1.0.0.201805151631/bin/its-reach-linux64 --gc-threshold 2000000 --quiet -i /home/mcc/execution/ReachabilityCardinality.pnml.gal -t CGAL -reachable-file ReachabilityCardinality.prop --nowitness
Loading property file ReachabilityCardinality.prop.
Read [reachable] property : SafeBus-COL-06-ReachabilityCardinality-00 with value :(!((((((wait_msg_0+wait_msg_1)+wait_msg_2)+wait_msg_3)+wait_msg_4)+wait_msg_5)<=(((((Cpt1_0+Cpt1_1)+Cpt1_2)+Cpt1_3)+Cpt1_4)+Cpt1_5)))
Read [reachable] property : SafeBus-COL-06-ReachabilityCardinality-01 with value :(((((((((Cpt1_0+Cpt1_1)+Cpt1_2)+Cpt1_3)+Cpt1_4)+Cpt1_5)<=(((((wait_msg_0+wait_msg_1)+wait_msg_2)+wait_msg_3)+wait_msg_4)+wait_msg_5))&&((((((wait_msg_0+wait_msg_1)+wait_msg_2)+wait_msg_3)+wait_msg_4)+wait_msg_5)>=1))||((((((RMC_0+RMC_1)+RMC_2)+RMC_3)+RMC_4)+RMC_5)>=1))&&(((FMCb_0<=(((((MSG_0+MSG_1)+MSG_2)+MSG_3)+MSG_4)+MSG_5))&&((((((listen_0+listen_1)+listen_2)+listen_3)+listen_4)+listen_5)<=(((((FMC_0+FMC_1)+FMC_2)+FMC_3)+FMC_4)+FMC_5)))&&((S_tout_0>=2)&&((((((loop_em_0+loop_em_1)+loop_em_2)+loop_em_3)+loop_em_4)+loop_em_5)<=cable_free_0))))
Read [invariant] property : SafeBus-COL-06-ReachabilityCardinality-02 with value :(T_out_0<=(((((((((((((((((((((((((((((((((((wait_ack_0+wait_ack_1)+wait_ack_2)+wait_ack_3)+wait_ack_4)+wait_ack_5)+wait_ack_6)+wait_ack_7)+wait_ack_8)+wait_ack_9)+wait_ack_10)+wait_ack_11)+wait_ack_12)+wait_ack_13)+wait_ack_14)+wait_ack_15)+wait_ack_16)+wait_ack_17)+wait_ack_18)+wait_ack_19)+wait_ack_20)+wait_ack_21)+wait_ack_22)+wait_ack_23)+wait_ack_24)+wait_ack_25)+wait_ack_26)+wait_ack_27)+wait_ack_28)+wait_ack_29)+wait_ack_30)+wait_ack_31)+wait_ack_32)+wait_ack_33)+wait_ack_34)+wait_ack_35))
Read [reachable] property : SafeBus-COL-06-ReachabilityCardinality-03 with value :((ACK_0<=(((((wait_msg_0+wait_msg_1)+wait_msg_2)+wait_msg_3)+wait_msg_4)+wait_msg_5))&&((((((((Cpt2_0+Cpt2_1)+Cpt2_2)+Cpt2_3)+Cpt2_4)+Cpt2_5)>=6)||(FMCb_0>=1))&&((((((FMC_0+FMC_1)+FMC_2)+FMC_3)+FMC_4)+FMC_5)>=3)))
Read [reachable] property : SafeBus-COL-06-ReachabilityCardinality-04 with value :((((((((((((((((((((((((((((((((((((wait_ack_0+wait_ack_1)+wait_ack_2)+wait_ack_3)+wait_ack_4)+wait_ack_5)+wait_ack_6)+wait_ack_7)+wait_ack_8)+wait_ack_9)+wait_ack_10)+wait_ack_11)+wait_ack_12)+wait_ack_13)+wait_ack_14)+wait_ack_15)+wait_ack_16)+wait_ack_17)+wait_ack_18)+wait_ack_19)+wait_ack_20)+wait_ack_21)+wait_ack_22)+wait_ack_23)+wait_ack_24)+wait_ack_25)+wait_ack_26)+wait_ack_27)+wait_ack_28)+wait_ack_29)+wait_ack_30)+wait_ack_31)+wait_ack_32)+wait_ack_33)+wait_ack_34)+wait_ack_35)>=2)
Read [reachable] property : SafeBus-COL-06-ReachabilityCardinality-05 with value :(((((((((((((((((((((((((((((((((((((((wait_ack_0+wait_ack_1)+wait_ack_2)+wait_ack_3)+wait_ack_4)+wait_ack_5)+wait_ack_6)+wait_ack_7)+wait_ack_8)+wait_ack_9)+wait_ack_10)+wait_ack_11)+wait_ack_12)+wait_ack_13)+wait_ack_14)+wait_ack_15)+wait_ack_16)+wait_ack_17)+wait_ack_18)+wait_ack_19)+wait_ack_20)+wait_ack_21)+wait_ack_22)+wait_ack_23)+wait_ack_24)+wait_ack_25)+wait_ack_26)+wait_ack_27)+wait_ack_28)+wait_ack_29)+wait_ack_30)+wait_ack_31)+wait_ack_32)+wait_ack_33)+wait_ack_34)+wait_ack_35)<=(((((FMC_0+FMC_1)+FMC_2)+FMC_3)+FMC_4)+FMC_5))||(T_out_0<=(((((wait_msg_0+wait_msg_1)+wait_msg_2)+wait_msg_3)+wait_msg_4)+wait_msg_5)))||(((((((wait_cable_0+wait_cable_1)+wait_cable_2)+wait_cable_3)+wait_cable_4)+wait_cable_5)>=3)&&((((((loop_em_0+loop_em_1)+loop_em_2)+loop_em_3)+loop_em_4)+loop_em_5)<=(((((cable_used_0+cable_used_1)+cable_used_2)+cable_used_3)+cable_used_4)+cable_used_5))))&&((!((((((FMC_0+FMC_1)+FMC_2)+FMC_3)+FMC_4)+FMC_5)>=2))&&(((((((loop_em_0+loop_em_1)+loop_em_2)+loop_em_3)+loop_em_4)+loop_em_5)>=2)&&((((((listen_0+listen_1)+listen_2)+listen_3)+listen_4)+listen_5)>=3))))
Read [reachable] property : SafeBus-COL-06-ReachabilityCardinality-06 with value :(((((((loop_em_0+loop_em_1)+loop_em_2)+loop_em_3)+loop_em_4)+loop_em_5)<=R_tout_0)&&((((((((RMC_0+RMC_1)+RMC_2)+RMC_3)+RMC_4)+RMC_5)>=3)||(FMCb_0>=3))||(((((((wait_msg_0+wait_msg_1)+wait_msg_2)+wait_msg_3)+wait_msg_4)+wait_msg_5)<=T_out_0)&&((((((((((((((((((((((((((((((((((((wait_ack_0+wait_ack_1)+wait_ack_2)+wait_ack_3)+wait_ack_4)+wait_ack_5)+wait_ack_6)+wait_ack_7)+wait_ack_8)+wait_ack_9)+wait_ack_10)+wait_ack_11)+wait_ack_12)+wait_ack_13)+wait_ack_14)+wait_ack_15)+wait_ack_16)+wait_ack_17)+wait_ack_18)+wait_ack_19)+wait_ack_20)+wait_ack_21)+wait_ack_22)+wait_ack_23)+wait_ack_24)+wait_ack_25)+wait_ack_26)+wait_ack_27)+wait_ack_28)+wait_ack_29)+wait_ack_30)+wait_ack_31)+wait_ack_32)+wait_ack_33)+wait_ack_34)+wait_ack_35)>=2))))
Read [invariant] property : SafeBus-COL-06-ReachabilityCardinality-08 with value :((((ACK_0>=3)||((((((((((((((((((((((((((((((((((((wait_ack_0+wait_ack_1)+wait_ack_2)+wait_ack_3)+wait_ack_4)+wait_ack_5)+wait_ack_6)+wait_ack_7)+wait_ack_8)+wait_ack_9)+wait_ack_10)+wait_ack_11)+wait_ack_12)+wait_ack_13)+wait_ack_14)+wait_ack_15)+wait_ack_16)+wait_ack_17)+wait_ack_18)+wait_ack_19)+wait_ack_20)+wait_ack_21)+wait_ack_22)+wait_ack_23)+wait_ack_24)+wait_ack_25)+wait_ack_26)+wait_ack_27)+wait_ack_28)+wait_ack_29)+wait_ack_30)+wait_ack_31)+wait_ack_32)+wait_ack_33)+wait_ack_34)+wait_ack_35)>=1))||((((((Cpt2_0+Cpt2_1)+Cpt2_2)+Cpt2_3)+Cpt2_4)+Cpt2_5)>=2))||((((((((PMC_0+PMC_1)+PMC_2)+PMC_3)+PMC_4)+PMC_5)<=(((((((((((((((((((((((((((((((((((AMC_0+AMC_1)+AMC_2)+AMC_3)+AMC_4)+AMC_5)+AMC_6)+AMC_7)+AMC_8)+AMC_9)+AMC_10)+AMC_11)+AMC_12)+AMC_13)+AMC_14)+AMC_15)+AMC_16)+AMC_17)+AMC_18)+AMC_19)+AMC_20)+AMC_21)+AMC_22)+AMC_23)+AMC_24)+AMC_25)+AMC_26)+AMC_27)+AMC_28)+AMC_29)+AMC_30)+AMC_31)+AMC_32)+AMC_33)+AMC_34)+AMC_35))||((((((listen_0+listen_1)+listen_2)+listen_3)+listen_4)+listen_5)>=3))||(!((((((wait_msg_0+wait_msg_1)+wait_msg_2)+wait_msg_3)+wait_msg_4)+wait_msg_5)>=2))))
Read [reachable] property : SafeBus-COL-06-ReachabilityCardinality-10 with value :(cable_free_0>=2)
Read [reachable] property : SafeBus-COL-06-ReachabilityCardinality-11 with value :((!(((((((cable_used_0+cable_used_1)+cable_used_2)+cable_used_3)+cable_used_4)+cable_used_5)<=(((((Cpt1_0+Cpt1_1)+Cpt1_2)+Cpt1_3)+Cpt1_4)+Cpt1_5))||(cable_free_0>=3)))&&((((((MSG_0+MSG_1)+MSG_2)+MSG_3)+MSG_4)+MSG_5)>=2))
Read [invariant] property : SafeBus-COL-06-ReachabilityCardinality-12 with value :((((S_tout_0<=FMCb_0)||(cable_free_0>=2))||((((((((((((((((((((((((((((((((((((AMC_0+AMC_1)+AMC_2)+AMC_3)+AMC_4)+AMC_5)+AMC_6)+AMC_7)+AMC_8)+AMC_9)+AMC_10)+AMC_11)+AMC_12)+AMC_13)+AMC_14)+AMC_15)+AMC_16)+AMC_17)+AMC_18)+AMC_19)+AMC_20)+AMC_21)+AMC_22)+AMC_23)+AMC_24)+AMC_25)+AMC_26)+AMC_27)+AMC_28)+AMC_29)+AMC_30)+AMC_31)+AMC_32)+AMC_33)+AMC_34)+AMC_35)<=(((((((((((((((((((((((((((((((((((wait_ack_0+wait_ack_1)+wait_ack_2)+wait_ack_3)+wait_ack_4)+wait_ack_5)+wait_ack_6)+wait_ack_7)+wait_ack_8)+wait_ack_9)+wait_ack_10)+wait_ack_11)+wait_ack_12)+wait_ack_13)+wait_ack_14)+wait_ack_15)+wait_ack_16)+wait_ack_17)+wait_ack_18)+wait_ack_19)+wait_ack_20)+wait_ack_21)+wait_ack_22)+wait_ack_23)+wait_ack_24)+wait_ack_25)+wait_ack_26)+wait_ack_27)+wait_ack_28)+wait_ack_29)+wait_ack_30)+wait_ack_31)+wait_ack_32)+wait_ack_33)+wait_ack_34)+wait_ack_35)))||(((((((wait_cable_0+wait_cable_1)+wait_cable_2)+wait_cable_3)+wait_cable_4)+wait_cable_5)<=(((((loop_em_0+loop_em_1)+loop_em_2)+loop_em_3)+loop_em_4)+loop_em_5))||(!(T_out_0<=S_tout_0))))
Read [reachable] property : SafeBus-COL-06-ReachabilityCardinality-13 with value :((((((FMC_0+FMC_1)+FMC_2)+FMC_3)+FMC_4)+FMC_5)>=3)
Read [reachable] property : SafeBus-COL-06-ReachabilityCardinality-14 with value :(((((((MSG_0+MSG_1)+MSG_2)+MSG_3)+MSG_4)+MSG_5)>=1)&&(((R_tout_0<=(((((Cpt2_0+Cpt2_1)+Cpt2_2)+Cpt2_3)+Cpt2_4)+Cpt2_5))&&((((((((((((((((((((((((((((((((((((AMC_0+AMC_1)+AMC_2)+AMC_3)+AMC_4)+AMC_5)+AMC_6)+AMC_7)+AMC_8)+AMC_9)+AMC_10)+AMC_11)+AMC_12)+AMC_13)+AMC_14)+AMC_15)+AMC_16)+AMC_17)+AMC_18)+AMC_19)+AMC_20)+AMC_21)+AMC_22)+AMC_23)+AMC_24)+AMC_25)+AMC_26)+AMC_27)+AMC_28)+AMC_29)+AMC_30)+AMC_31)+AMC_32)+AMC_33)+AMC_34)+AMC_35)<=(((((RMC_0+RMC_1)+RMC_2)+RMC_3)+RMC_4)+RMC_5)))&&((S_tout_0>=2)&&(FMCb_0<=(((((cable_used_0+cable_used_1)+cable_used_2)+cable_used_3)+cable_used_4)+cable_used_5)))))
Read [reachable] property : SafeBus-COL-06-ReachabilityCardinality-15 with value :((((((FMC_0+FMC_1)+FMC_2)+FMC_3)+FMC_4)+FMC_5)>=3)
Presburger conditions satisfied. Using coverability to approximate state space in K-Induction.
Normalized transition count is 248
// Phase 1: matrix 248 rows 144 cols
invariant :cable_used_2 + -1'FMC_2 + -1'wait_ack_12 + -1'wait_ack_13 + -1'wait_ack_14 + -1'wait_ack_15 + -1'wait_ack_16 + -1'wait_ack_17 + -1'PMC_2 = 0
invariant :Cpt2_3 + -1'Cpt1_3 + AMC_2 + -1'AMC_3 + AMC_8 + -1'AMC_9 + AMC_14 + -1'AMC_15 + AMC_20 + -1'AMC_21 + AMC_26 + -1'AMC_27 + AMC_32 + -1'AMC_33 = 0
invariant :cable_used_0 + FMC_1 + FMC_2 + FMC_3 + FMC_4 + FMC_5 + -1'wait_ack_0 + -1'wait_ack_1 + -1'wait_ack_2 + -1'wait_ack_3 + -1'wait_ack_4 + -1'wait_ack_5 + -1'PMC_0 + FMCb_0 = 1
invariant :wait_ack_18 + wait_ack_19 + wait_ack_20 + wait_ack_21 + wait_ack_22 + wait_ack_23 + wait_cable_3 + listen_3 + wait_msg_3 + loop_em_3 = 1
invariant :AMC_18 + AMC_19 + AMC_20 + AMC_21 + AMC_22 + AMC_23 + wait_ack_18 + wait_ack_19 + wait_ack_20 + wait_ack_21 + wait_ack_22 + wait_ack_23 + listen_3 + RMC_3 + PMC_3 + wait_msg_3 + loop_em_3 = 1
invariant :-1'AMC_6 + -1'AMC_7 + -1'AMC_8 + -1'AMC_9 + -1'AMC_10 + -1'AMC_11 + wait_cable_1 + -1'RMC_1 + -1'PMC_1 = 0
invariant :FMC_0 + FMC_1 + FMC_2 + FMC_3 + FMC_4 + FMC_5 + FMCb_0 = 1
invariant :Cpt2_2 + Cpt1_0 + Cpt1_1 + Cpt1_3 + Cpt1_4 + Cpt1_5 + AMC_1 + -1'AMC_2 + AMC_7 + -1'AMC_8 + AMC_13 + -1'AMC_14 + AMC_19 + -1'AMC_20 + AMC_25 + -1'AMC_26 + AMC_31 + -1'AMC_32 = 1
invariant :-1'wait_ack_0 + -1'wait_ack_1 + -1'wait_ack_2 + -1'wait_ack_3 + -1'wait_ack_4 + -1'wait_ack_5 + -1'wait_ack_6 + -1'wait_ack_7 + -1'wait_ack_8 + -1'wait_ack_9 + -1'wait_ack_10 + -1'wait_ack_11 + -1'wait_ack_12 + -1'wait_ack_13 + -1'wait_ack_14 + -1'wait_ack_15 + -1'wait_ack_16 + -1'wait_ack_17 + -1'wait_ack_18 + -1'wait_ack_19 + -1'wait_ack_20 + -1'wait_ack_21 + -1'wait_ack_22 + -1'wait_ack_23 + -1'wait_ack_24 + -1'wait_ack_25 + -1'wait_ack_26 + -1'wait_ack_27 + -1'wait_ack_28 + -1'wait_ack_29 + -1'wait_ack_30 + -1'wait_ack_31 + -1'wait_ack_32 + -1'wait_ack_33 + -1'wait_ack_34 + -1'wait_ack_35 + ACK_0 + MSG_0 + MSG_1 + MSG_2 + MSG_3 + MSG_4 + MSG_5 + T_out_0 = 0
invariant :wait_ack_30 + wait_ack_31 + wait_ack_32 + wait_ack_33 + wait_ack_34 + wait_ack_35 + wait_cable_5 + listen_5 + wait_msg_5 + loop_em_5 = 1
invariant :Cpt1_0 + Cpt1_1 + Cpt1_2 + Cpt1_3 + Cpt1_4 + Cpt1_5 = 1
invariant :AMC_0 + AMC_1 + AMC_2 + AMC_3 + AMC_4 + AMC_5 + wait_ack_0 + wait_ack_1 + wait_ack_2 + wait_ack_3 + wait_ack_4 + wait_ack_5 + listen_0 + RMC_0 + PMC_0 + wait_msg_0 + loop_em_0 = 1
invariant :Cpt2_0 + -1'Cpt1_0 + -1'AMC_0 + AMC_5 + -1'AMC_6 + AMC_11 + -1'AMC_12 + AMC_17 + -1'AMC_18 + AMC_23 + -1'AMC_24 + AMC_29 + -1'AMC_30 + AMC_35 = 0
invariant :wait_ack_0 + wait_ack_1 + wait_ack_2 + wait_ack_3 + wait_ack_4 + wait_ack_5 + wait_cable_0 + listen_0 + wait_msg_0 + loop_em_0 = 1
invariant :cable_used_5 + -1'FMC_5 + -1'wait_ack_30 + -1'wait_ack_31 + -1'wait_ack_32 + -1'wait_ack_33 + -1'wait_ack_34 + -1'wait_ack_35 + -1'PMC_5 = 0
invariant :Cpt2_4 + -1'Cpt1_4 + AMC_3 + -1'AMC_4 + AMC_9 + -1'AMC_10 + AMC_15 + -1'AMC_16 + AMC_21 + -1'AMC_22 + AMC_27 + -1'AMC_28 + AMC_33 + -1'AMC_34 = 0
invariant :cable_used_1 + -1'FMC_1 + -1'wait_ack_6 + -1'wait_ack_7 + -1'wait_ack_8 + -1'wait_ack_9 + -1'wait_ack_10 + -1'wait_ack_11 + -1'PMC_1 = 0
invariant :R_tout_0 + S_tout_0 = 1
invariant :cable_free_0 + wait_ack_0 + wait_ack_1 + wait_ack_2 + wait_ack_3 + wait_ack_4 + wait_ack_5 + wait_ack_6 + wait_ack_7 + wait_ack_8 + wait_ack_9 + wait_ack_10 + wait_ack_11 + wait_ack_12 + wait_ack_13 + wait_ack_14 + wait_ack_15 + wait_ack_16 + wait_ack_17 + wait_ack_18 + wait_ack_19 + wait_ack_20 + wait_ack_21 + wait_ack_22 + wait_ack_23 + wait_ack_24 + wait_ack_25 + wait_ack_26 + wait_ack_27 + wait_ack_28 + wait_ack_29 + wait_ack_30 + wait_ack_31 + wait_ack_32 + wait_ack_33 + wait_ack_34 + wait_ack_35 + PMC_0 + PMC_1 + PMC_2 + PMC_3 + PMC_4 + PMC_5 + -1'FMCb_0 = 0
invariant :AMC_12 + AMC_13 + AMC_14 + AMC_15 + AMC_16 + AMC_17 + wait_ack_12 + wait_ack_13 + wait_ack_14 + wait_ack_15 + wait_ack_16 + wait_ack_17 + listen_2 + RMC_2 + PMC_2 + wait_msg_2 + loop_em_2 = 1
invariant :cable_used_4 + -1'FMC_4 + -1'wait_ack_24 + -1'wait_ack_25 + -1'wait_ack_26 + -1'wait_ack_27 + -1'wait_ack_28 + -1'wait_ack_29 + -1'PMC_4 = 0
invariant :-1'AMC_24 + -1'AMC_25 + -1'AMC_26 + -1'AMC_27 + -1'AMC_28 + -1'AMC_29 + wait_cable_4 + -1'RMC_4 + -1'PMC_4 = 0
invariant :-1'AMC_12 + -1'AMC_13 + -1'AMC_14 + -1'AMC_15 + -1'AMC_16 + -1'AMC_17 + wait_cable_2 + -1'RMC_2 + -1'PMC_2 = 0
invariant :Cpt2_5 + -1'Cpt1_5 + AMC_4 + -1'AMC_5 + AMC_10 + -1'AMC_11 + AMC_16 + -1'AMC_17 + AMC_22 + -1'AMC_23 + AMC_28 + -1'AMC_29 + AMC_34 + -1'AMC_35 = 0
invariant :AMC_24 + AMC_25 + AMC_26 + AMC_27 + AMC_28 + AMC_29 + wait_ack_24 + wait_ack_25 + wait_ack_26 + wait_ack_27 + wait_ack_28 + wait_ack_29 + listen_4 + RMC_4 + PMC_4 + wait_msg_4 + loop_em_4 = 1
invariant :Cpt2_1 + -1'Cpt1_1 + AMC_0 + -1'AMC_1 + AMC_6 + -1'AMC_7 + AMC_12 + -1'AMC_13 + AMC_18 + -1'AMC_19 + AMC_24 + -1'AMC_25 + AMC_30 + -1'AMC_31 = 0
invariant :AMC_6 + AMC_7 + AMC_8 + AMC_9 + AMC_10 + AMC_11 + wait_ack_6 + wait_ack_7 + wait_ack_8 + wait_ack_9 + wait_ack_10 + wait_ack_11 + listen_1 + RMC_1 + PMC_1 + wait_msg_1 + loop_em_1 = 1
invariant :AMC_30 + AMC_31 + AMC_32 + AMC_33 + AMC_34 + AMC_35 + wait_ack_30 + wait_ack_31 + wait_ack_32 + wait_ack_33 + wait_ack_34 + wait_ack_35 + listen_5 + RMC_5 + PMC_5 + wait_msg_5 + loop_em_5 = 1
invariant :cable_used_3 + -1'FMC_3 + -1'wait_ack_18 + -1'wait_ack_19 + -1'wait_ack_20 + -1'wait_ack_21 + -1'wait_ack_22 + -1'wait_ack_23 + -1'PMC_3 = 0
Presburger conditions satisfied. Using coverability to approximate state space in K-Induction.
Normalized transition count is 248
// Phase 1: matrix 248 rows 144 cols
invariant :cable_used_2 + -1'FMC_2 + -1'wait_ack_12 + -1'wait_ack_13 + -1'wait_ack_14 + -1'wait_ack_15 + -1'wait_ack_16 + -1'wait_ack_17 + -1'PMC_2 = 0
invariant :Cpt2_3 + -1'Cpt1_3 + AMC_2 + -1'AMC_3 + AMC_8 + -1'AMC_9 + AMC_14 + -1'AMC_15 + AMC_20 + -1'AMC_21 + AMC_26 + -1'AMC_27 + AMC_32 + -1'AMC_33 = 0
invariant :cable_used_0 + FMC_1 + FMC_2 + FMC_3 + FMC_4 + FMC_5 + -1'wait_ack_0 + -1'wait_ack_1 + -1'wait_ack_2 + -1'wait_ack_3 + -1'wait_ack_4 + -1'wait_ack_5 + -1'PMC_0 + FMCb_0 = 1
invariant :wait_ack_18 + wait_ack_19 + wait_ack_20 + wait_ack_21 + wait_ack_22 + wait_ack_23 + wait_cable_3 + listen_3 + wait_msg_3 + loop_em_3 = 1
invariant :AMC_18 + AMC_19 + AMC_20 + AMC_21 + AMC_22 + AMC_23 + wait_ack_18 + wait_ack_19 + wait_ack_20 + wait_ack_21 + wait_ack_22 + wait_ack_23 + listen_3 + RMC_3 + PMC_3 + wait_msg_3 + loop_em_3 = 1
invariant :-1'AMC_6 + -1'AMC_7 + -1'AMC_8 + -1'AMC_9 + -1'AMC_10 + -1'AMC_11 + wait_cable_1 + -1'RMC_1 + -1'PMC_1 = 0
invariant :FMC_0 + FMC_1 + FMC_2 + FMC_3 + FMC_4 + FMC_5 + FMCb_0 = 1
invariant :Cpt2_2 + Cpt1_0 + Cpt1_1 + Cpt1_3 + Cpt1_4 + Cpt1_5 + AMC_1 + -1'AMC_2 + AMC_7 + -1'AMC_8 + AMC_13 + -1'AMC_14 + AMC_19 + -1'AMC_20 + AMC_25 + -1'AMC_26 + AMC_31 + -1'AMC_32 = 1
invariant :-1'wait_ack_0 + -1'wait_ack_1 + -1'wait_ack_2 + -1'wait_ack_3 + -1'wait_ack_4 + -1'wait_ack_5 + -1'wait_ack_6 + -1'wait_ack_7 + -1'wait_ack_8 + -1'wait_ack_9 + -1'wait_ack_10 + -1'wait_ack_11 + -1'wait_ack_12 + -1'wait_ack_13 + -1'wait_ack_14 + -1'wait_ack_15 + -1'wait_ack_16 + -1'wait_ack_17 + -1'wait_ack_18 + -1'wait_ack_19 + -1'wait_ack_20 + -1'wait_ack_21 + -1'wait_ack_22 + -1'wait_ack_23 + -1'wait_ack_24 + -1'wait_ack_25 + -1'wait_ack_26 + -1'wait_ack_27 + -1'wait_ack_28 + -1'wait_ack_29 + -1'wait_ack_30 + -1'wait_ack_31 + -1'wait_ack_32 + -1'wait_ack_33 + -1'wait_ack_34 + -1'wait_ack_35 + ACK_0 + MSG_0 + MSG_1 + MSG_2 + MSG_3 + MSG_4 + MSG_5 + T_out_0 = 0
invariant :wait_ack_30 + wait_ack_31 + wait_ack_32 + wait_ack_33 + wait_ack_34 + wait_ack_35 + wait_cable_5 + listen_5 + wait_msg_5 + loop_em_5 = 1
invariant :Cpt1_0 + Cpt1_1 + Cpt1_2 + Cpt1_3 + Cpt1_4 + Cpt1_5 = 1
invariant :AMC_0 + AMC_1 + AMC_2 + AMC_3 + AMC_4 + AMC_5 + wait_ack_0 + wait_ack_1 + wait_ack_2 + wait_ack_3 + wait_ack_4 + wait_ack_5 + listen_0 + RMC_0 + PMC_0 + wait_msg_0 + loop_em_0 = 1
invariant :Cpt2_0 + -1'Cpt1_0 + -1'AMC_0 + AMC_5 + -1'AMC_6 + AMC_11 + -1'AMC_12 + AMC_17 + -1'AMC_18 + AMC_23 + -1'AMC_24 + AMC_29 + -1'AMC_30 + AMC_35 = 0
invariant :wait_ack_0 + wait_ack_1 + wait_ack_2 + wait_ack_3 + wait_ack_4 + wait_ack_5 + wait_cable_0 + listen_0 + wait_msg_0 + loop_em_0 = 1
invariant :cable_used_5 + -1'FMC_5 + -1'wait_ack_30 + -1'wait_ack_31 + -1'wait_ack_32 + -1'wait_ack_33 + -1'wait_ack_34 + -1'wait_ack_35 + -1'PMC_5 = 0
invariant :Cpt2_4 + -1'Cpt1_4 + AMC_3 + -1'AMC_4 + AMC_9 + -1'AMC_10 + AMC_15 + -1'AMC_16 + AMC_21 + -1'AMC_22 + AMC_27 + -1'AMC_28 + AMC_33 + -1'AMC_34 = 0
invariant :cable_used_1 + -1'FMC_1 + -1'wait_ack_6 + -1'wait_ack_7 + -1'wait_ack_8 + -1'wait_ack_9 + -1'wait_ack_10 + -1'wait_ack_11 + -1'PMC_1 = 0
invariant :R_tout_0 + S_tout_0 = 1
invariant :cable_free_0 + wait_ack_0 + wait_ack_1 + wait_ack_2 + wait_ack_3 + wait_ack_4 + wait_ack_5 + wait_ack_6 + wait_ack_7 + wait_ack_8 + wait_ack_9 + wait_ack_10 + wait_ack_11 + wait_ack_12 + wait_ack_13 + wait_ack_14 + wait_ack_15 + wait_ack_16 + wait_ack_17 + wait_ack_18 + wait_ack_19 + wait_ack_20 + wait_ack_21 + wait_ack_22 + wait_ack_23 + wait_ack_24 + wait_ack_25 + wait_ack_26 + wait_ack_27 + wait_ack_28 + wait_ack_29 + wait_ack_30 + wait_ack_31 + wait_ack_32 + wait_ack_33 + wait_ack_34 + wait_ack_35 + PMC_0 + PMC_1 + PMC_2 + PMC_3 + PMC_4 + PMC_5 + -1'FMCb_0 = 0
invariant :AMC_12 + AMC_13 + AMC_14 + AMC_15 + AMC_16 + AMC_17 + wait_ack_12 + wait_ack_13 + wait_ack_14 + wait_ack_15 + wait_ack_16 + wait_ack_17 + listen_2 + RMC_2 + PMC_2 + wait_msg_2 + loop_em_2 = 1
invariant :cable_used_4 + -1'FMC_4 + -1'wait_ack_24 + -1'wait_ack_25 + -1'wait_ack_26 + -1'wait_ack_27 + -1'wait_ack_28 + -1'wait_ack_29 + -1'PMC_4 = 0
invariant :-1'AMC_24 + -1'AMC_25 + -1'AMC_26 + -1'AMC_27 + -1'AMC_28 + -1'AMC_29 + wait_cable_4 + -1'RMC_4 + -1'PMC_4 = 0
invariant :-1'AMC_12 + -1'AMC_13 + -1'AMC_14 + -1'AMC_15 + -1'AMC_16 + -1'AMC_17 + wait_cable_2 + -1'RMC_2 + -1'PMC_2 = 0
invariant :Cpt2_5 + -1'Cpt1_5 + AMC_4 + -1'AMC_5 + AMC_10 + -1'AMC_11 + AMC_16 + -1'AMC_17 + AMC_22 + -1'AMC_23 + AMC_28 + -1'AMC_29 + AMC_34 + -1'AMC_35 = 0
invariant :AMC_24 + AMC_25 + AMC_26 + AMC_27 + AMC_28 + AMC_29 + wait_ack_24 + wait_ack_25 + wait_ack_26 + wait_ack_27 + wait_ack_28 + wait_ack_29 + listen_4 + RMC_4 + PMC_4 + wait_msg_4 + loop_em_4 = 1
invariant :Cpt2_1 + -1'Cpt1_1 + AMC_0 + -1'AMC_1 + AMC_6 + -1'AMC_7 + AMC_12 + -1'AMC_13 + AMC_18 + -1'AMC_19 + AMC_24 + -1'AMC_25 + AMC_30 + -1'AMC_31 = 0
invariant :AMC_6 + AMC_7 + AMC_8 + AMC_9 + AMC_10 + AMC_11 + wait_ack_6 + wait_ack_7 + wait_ack_8 + wait_ack_9 + wait_ack_10 + wait_ack_11 + listen_1 + RMC_1 + PMC_1 + wait_msg_1 + loop_em_1 = 1
invariant :AMC_30 + AMC_31 + AMC_32 + AMC_33 + AMC_34 + AMC_35 + wait_ack_30 + wait_ack_31 + wait_ack_32 + wait_ack_33 + wait_ack_34 + wait_ack_35 + listen_5 + RMC_5 + PMC_5 + wait_msg_5 + loop_em_5 = 1
invariant :cable_used_3 + -1'FMC_3 + -1'wait_ack_18 + -1'wait_ack_19 + -1'wait_ack_20 + -1'wait_ack_21 + -1'wait_ack_22 + -1'wait_ack_23 + -1'PMC_3 = 0
FORMULA SafeBus-COL-06-ReachabilityCardinality-01 FALSE TECHNIQUES SAT_SMT K_INDUCTION(0)
FORMULA SafeBus-COL-06-ReachabilityCardinality-02 TRUE TECHNIQUES SAT_SMT K_INDUCTION(0)
FORMULA SafeBus-COL-06-ReachabilityCardinality-03 FALSE TECHNIQUES SAT_SMT K_INDUCTION(0)
FORMULA SafeBus-COL-06-ReachabilityCardinality-04 FALSE TECHNIQUES SAT_SMT K_INDUCTION(0)
FORMULA SafeBus-COL-06-ReachabilityCardinality-10 FALSE TECHNIQUES SAT_SMT K_INDUCTION(0)
FORMULA SafeBus-COL-06-ReachabilityCardinality-11 FALSE TECHNIQUES SAT_SMT K_INDUCTION(0)
FORMULA SafeBus-COL-06-ReachabilityCardinality-13 FALSE TECHNIQUES SAT_SMT K_INDUCTION(0)
FORMULA SafeBus-COL-06-ReachabilityCardinality-14 FALSE TECHNIQUES SAT_SMT K_INDUCTION(0)
FORMULA SafeBus-COL-06-ReachabilityCardinality-15 FALSE TECHNIQUES SAT_SMT K_INDUCTION(0)
Model ,|S| ,Time ,Mem(kb) ,fin. SDD ,fin. DDD ,peak SDD ,peak DDD ,SDD Hom ,SDD cache peak ,DDD Hom ,DDD cachepeak ,SHom cache
Document\_flat\_flat,6.81676e+06,459.896,4045456,2,94621,5,2.32228e+07,6,0,815,1.35145e+07,0
Total reachable state count : 6816756

Verifying 14 reachability properties.
Reachability property SafeBus-COL-06-ReachabilityCardinality-00 is true.
FORMULA SafeBus-COL-06-ReachabilityCardinality-00 TRUE TECHNIQUES DECISION_DIAGRAMS TOPOLOGICAL COLLATERAL_PROCESSING USE_NUPN

Model ,|S| ,Time ,Mem(kb) ,fin. SDD ,fin. DDD ,peak SDD ,peak DDD ,SDD Hom ,SDD cache peak ,DDD Hom ,DDD cachepeak ,SHom cache
SafeBus-COL-06-ReachabilityCardinality-00,3,459.911,4045484,2,148,6,2.32228e+07,7,0,829,1.35145e+07,0
Reachability property SafeBus-COL-06-ReachabilityCardinality-01 does not hold.
No reachable states exhibit your property : SafeBus-COL-06-ReachabilityCardinality-01

Model ,|S| ,Time ,Mem(kb) ,fin. SDD ,fin. DDD ,peak SDD ,peak DDD ,SDD Hom ,SDD cache peak ,DDD Hom ,DDD cachepeak ,SHom cache
SafeBus-COL-06-ReachabilityCardinality-01,0,460.047,4045540,1,0,6,2.32228e+07,8,0,839,1.35145e+07,0
Invariant property SafeBus-COL-06-ReachabilityCardinality-02 is true.

Model ,|S| ,Time ,Mem(kb) ,fin. SDD ,fin. DDD ,peak SDD ,peak DDD ,SDD Hom ,SDD cache peak ,DDD Hom ,DDD cachepeak ,SHom cache
SafeBus-COL-06-ReachabilityCardinality-02,0,460.272,4045540,1,0,6,2.32228e+07,9,0,1052,1.35145e+07,0
Reachability property SafeBus-COL-06-ReachabilityCardinality-03 does not hold.
No reachable states exhibit your property : SafeBus-COL-06-ReachabilityCardinality-03

Model ,|S| ,Time ,Mem(kb) ,fin. SDD ,fin. DDD ,peak SDD ,peak DDD ,SDD Hom ,SDD cache peak ,DDD Hom ,DDD cachepeak ,SHom cache
SafeBus-COL-06-ReachabilityCardinality-03,0,460.434,4045604,1,0,6,2.32228e+07,10,0,1067,1.35145e+07,0
Reachability property SafeBus-COL-06-ReachabilityCardinality-04 does not hold.
No reachable states exhibit your property : SafeBus-COL-06-ReachabilityCardinality-04

Model ,|S| ,Time ,Mem(kb) ,fin. SDD ,fin. DDD ,peak SDD ,peak DDD ,SDD Hom ,SDD cache peak ,DDD Hom ,DDD cachepeak ,SHom cache
SafeBus-COL-06-ReachabilityCardinality-04,0,460.649,4045604,1,0,6,2.32228e+07,11,0,1277,1.35145e+07,0
Reachability property SafeBus-COL-06-ReachabilityCardinality-05 is true.
FORMULA SafeBus-COL-06-ReachabilityCardinality-05 TRUE TECHNIQUES DECISION_DIAGRAMS TOPOLOGICAL COLLATERAL_PROCESSING USE_NUPN

Model ,|S| ,Time ,Mem(kb) ,fin. SDD ,fin. DDD ,peak SDD ,peak DDD ,SDD Hom ,SDD cache peak ,DDD Hom ,DDD cachepeak ,SHom cache
SafeBus-COL-06-ReachabilityCardinality-05,19140,461.314,4045604,2,13646,7,2.32228e+07,12,0,1640,1.35145e+07,0
Reachability property SafeBus-COL-06-ReachabilityCardinality-06 is true.
FORMULA SafeBus-COL-06-ReachabilityCardinality-06 TRUE TECHNIQUES DECISION_DIAGRAMS TOPOLOGICAL COLLATERAL_PROCESSING USE_NUPN

Model ,|S| ,Time ,Mem(kb) ,fin. SDD ,fin. DDD ,peak SDD ,peak DDD ,SDD Hom ,SDD cache peak ,DDD Hom ,DDD cachepeak ,SHom cache
SafeBus-COL-06-ReachabilityCardinality-06,180960,462.813,4045604,2,80111,8,2.32228e+07,13,0,1728,1.35145e+07,0
Invariant property SafeBus-COL-06-ReachabilityCardinality-08 does not hold.
FORMULA SafeBus-COL-06-ReachabilityCardinality-08 FALSE TECHNIQUES DECISION_DIAGRAMS TOPOLOGICAL COLLATERAL_PROCESSING USE_NUPN

Model ,|S| ,Time ,Mem(kb) ,fin. SDD ,fin. DDD ,peak SDD ,peak DDD ,SDD Hom ,SDD cache peak ,DDD Hom ,DDD cachepeak ,SHom cache
SafeBus-COL-06-ReachabilityCardinality-08,26352,463.996,4045604,2,2190,9,2.32228e+07,14,0,4131,1.35145e+07,0
Reachability property SafeBus-COL-06-ReachabilityCardinality-10 does not hold.
No reachable states exhibit your property : SafeBus-COL-06-ReachabilityCardinality-10

Model ,|S| ,Time ,Mem(kb) ,fin. SDD ,fin. DDD ,peak SDD ,peak DDD ,SDD Hom ,SDD cache peak ,DDD Hom ,DDD cachepeak ,SHom cache
SafeBus-COL-06-ReachabilityCardinality-10,0,464.125,4045604,1,0,9,2.32228e+07,15,0,4132,1.35145e+07,0
Reachability property SafeBus-COL-06-ReachabilityCardinality-11 does not hold.
No reachable states exhibit your property : SafeBus-COL-06-ReachabilityCardinality-11

Model ,|S| ,Time ,Mem(kb) ,fin. SDD ,fin. DDD ,peak SDD ,peak DDD ,SDD Hom ,SDD cache peak ,DDD Hom ,DDD cachepeak ,SHom cache
SafeBus-COL-06-ReachabilityCardinality-11,0,464.29,4045604,1,0,9,2.32228e+07,16,0,4170,1.35145e+07,0
Invariant property SafeBus-COL-06-ReachabilityCardinality-12 does not hold.
FORMULA SafeBus-COL-06-ReachabilityCardinality-12 FALSE TECHNIQUES DECISION_DIAGRAMS TOPOLOGICAL COLLATERAL_PROCESSING USE_NUPN

Model ,|S| ,Time ,Mem(kb) ,fin. SDD ,fin. DDD ,peak SDD ,peak DDD ,SDD Hom ,SDD cache peak ,DDD Hom ,DDD cachepeak ,SHom cache
SafeBus-COL-06-ReachabilityCardinality-12,1,464.335,4045604,2,145,10,2.32228e+07,17,0,4265,1.35145e+07,0
Reachability property SafeBus-COL-06-ReachabilityCardinality-13 does not hold.
No reachable states exhibit your property : SafeBus-COL-06-ReachabilityCardinality-13

Model ,|S| ,Time ,Mem(kb) ,fin. SDD ,fin. DDD ,peak SDD ,peak DDD ,SDD Hom ,SDD cache peak ,DDD Hom ,DDD cachepeak ,SHom cache
SafeBus-COL-06-ReachabilityCardinality-13,0,464.336,4045604,1,0,10,2.32228e+07,18,0,4266,1.35145e+07,0
Reachability property SafeBus-COL-06-ReachabilityCardinality-14 does not hold.
No reachable states exhibit your property : SafeBus-COL-06-ReachabilityCardinality-14

Model ,|S| ,Time ,Mem(kb) ,fin. SDD ,fin. DDD ,peak SDD ,peak DDD ,SDD Hom ,SDD cache peak ,DDD Hom ,DDD cachepeak ,SHom cache
SafeBus-COL-06-ReachabilityCardinality-14,0,464.374,4045604,1,0,10,2.32228e+07,19,0,4355,1.35145e+07,0
Reachability property SafeBus-COL-06-ReachabilityCardinality-15 does not hold.
No reachable states exhibit your property : SafeBus-COL-06-ReachabilityCardinality-15

Model ,|S| ,Time ,Mem(kb) ,fin. SDD ,fin. DDD ,peak SDD ,peak DDD ,SDD Hom ,SDD cache peak ,DDD Hom ,DDD cachepeak ,SHom cache
SafeBus-COL-06-ReachabilityCardinality-15,0,464.375,4045604,1,0,10,2.32228e+07,19,0,4355,1.35145e+07,0
Running compilation step : CommandLine [args=[gcc, -c, -I/home/mcc/BenchKit//lts_install_dir//include, -I., -std=c99, -fPIC, -O3, model.c], workingDir=/home/mcc/execution]
WARNING : LTS min runner thread was asked to interrupt. Dying gracefully.

BK_STOP 1527027037275

--------------------
content from stderr:

+ export BINDIR=/home/mcc/BenchKit/
+ BINDIR=/home/mcc/BenchKit/
++ pwd
+ export MODEL=/home/mcc/execution
+ MODEL=/home/mcc/execution
+ /home/mcc/BenchKit//runeclipse.sh /home/mcc/execution ReachabilityCardinality -its -ltsminpath /home/mcc/BenchKit//lts_install_dir/ -smt
+ ulimit -s 65536
+ [[ -z '' ]]
+ export LTSMIN_MEM_SIZE=8589934592
+ LTSMIN_MEM_SIZE=8589934592
+ /home/mcc/BenchKit//itstools/its-tools -consoleLog -data /home/mcc/execution/workspace -pnfolder /home/mcc/execution -examination ReachabilityCardinality -z3path /home/mcc/BenchKit//z3/bin/z3 -yices2path /home/mcc/BenchKit//yices/bin/yices -its -ltsminpath /home/mcc/BenchKit//lts_install_dir/ -smt -vmargs -Dosgi.locking=none -Declipse.stateSaveDelayInterval=-1 -Dosgi.configuration.area=/tmp/.eclipse -Xss8m -Xms40m -Xmx8192m -Dfile.encoding=UTF-8 -Dosgi.requiredJavaVersion=1.6
May 22, 2018 10:02:45 PM fr.lip6.move.gal.application.Application start
INFO: Running its-tools with arguments : [-pnfolder, /home/mcc/execution, -examination, ReachabilityCardinality, -z3path, /home/mcc/BenchKit//z3/bin/z3, -yices2path, /home/mcc/BenchKit//yices/bin/yices, -its, -ltsminpath, /home/mcc/BenchKit//lts_install_dir/, -smt]
May 22, 2018 10:02:45 PM fr.lip6.move.gal.application.MccTranslator transformPNML
INFO: Parsing pnml file : /home/mcc/execution/model.pnml
May 22, 2018 10:02:45 PM fr.lip6.move.gal.pnml.togal.PnmlToGalTransformer transform
INFO: Detected file is not PT type :http://www.pnml.org/version-2009/grammar/symmetricnet
May 22, 2018 10:02:46 PM fr.lip6.move.gal.pnml.togal.PnmlToGalTransformer transform
INFO: Load time of PNML (colored model parsed with PNMLFW) : 999 ms
May 22, 2018 10:02:46 PM fr.lip6.move.gal.pnml.togal.HLGALTransformer handlePage
INFO: Transformed 20 places.
May 22, 2018 10:02:46 PM fr.lip6.move.gal.pnml.togal.HLGALTransformer handlePage
INFO: Computed order using colors.
May 22, 2018 10:02:46 PM fr.lip6.move.gal.pnml.togal.HLGALTransformer handlePage
INFO: sort/places :Dom->AMC,wait_ack,
Dot->cable_free,ACK,T_out,R_tout,S_tout,FMCb,
It->Cpt2,Cpt1,msgl,cable_used,FMC,wait_cable,listen,RMC,PMC,MSG,wait_msg,loop_em,

May 22, 2018 10:02:46 PM fr.lip6.move.gal.pnml.togal.HLGALTransformer handlePage
INFO: Transformed 14 transitions.
May 22, 2018 10:02:46 PM fr.lip6.move.gal.pnml.togal.PnmlToGalTransformer transform
INFO: Computed order based on color domains.
May 22, 2018 10:02:46 PM fr.lip6.move.serialization.SerializationUtil systemToFile
INFO: Time to serialize gal into /home/mcc/execution/model.pnml.img.gal : 7 ms
May 22, 2018 10:02:47 PM fr.lip6.move.gal.instantiate.Instantiator fuseEqualParameters
INFO: Fused parameters : $x and $y of transition C_refuse
May 22, 2018 10:02:47 PM fr.lip6.move.gal.instantiate.Instantiator fuseEqualParameters
INFO: Fused parameters : $i and $j of transition C_free
May 22, 2018 10:02:47 PM fr.lip6.move.gal.instantiate.Instantiator fuseEqualParameters
INFO: Fused parameters : $x and $y of transition C_provide
May 22, 2018 10:02:47 PM fr.lip6.move.gal.instantiate.Instantiator fuseEqualParameters
INFO: Fused parameters : $r and $i of transition I_rec1
May 22, 2018 10:02:47 PM fr.lip6.move.gal.instantiate.Instantiator fuseEqualParameters
INFO: Fused parameters : $i and $j of transition I_emit
May 22, 2018 10:02:47 PM fr.lip6.move.gal.instantiate.Instantiator fuseEqualParameters
INFO: Fused parameters : $i and $j of transition I_refused
May 22, 2018 10:02:47 PM fr.lip6.move.gal.instantiate.Instantiator fuseEqualParameters
INFO: Fused parameters : $r and $i of transition I_rec2
May 22, 2018 10:02:47 PM fr.lip6.move.gal.instantiate.DomainAnalyzer computeVariableDomains
INFO: Found a total of 1 fixed domain variables (out of 150 variables) in GAL type Document
May 22, 2018 10:02:47 PM fr.lip6.move.gal.instantiate.Simplifier printConstantVars
INFO: Found a total of 6 constant array cells/variables (out of 150 variables) in type Document
May 22, 2018 10:02:47 PM fr.lip6.move.gal.instantiate.Simplifier printConstantVars
INFO: msgl[0-5],
May 22, 2018 10:02:47 PM fr.lip6.move.gal.instantiate.Instantiator instantiateParameters
INFO: On-the-fly reduction of False transitions avoided exploring 6.0 instantiations of transitions. Total transitions/syncs built is 340
May 22, 2018 10:02:47 PM fr.lip6.move.gal.instantiate.DomainAnalyzer computeVariableDomains
INFO: Found a total of 1 fixed domain variables (out of 150 variables) in GAL type Document
May 22, 2018 10:02:47 PM fr.lip6.move.gal.instantiate.Simplifier printConstantVars
INFO: Found a total of 6 constant array cells/variables (out of 150 variables) in type Document
May 22, 2018 10:02:47 PM fr.lip6.move.gal.instantiate.Simplifier printConstantVars
INFO: msgl[0-5],
May 22, 2018 10:02:47 PM fr.lip6.move.gal.instantiate.Simplifier simplifyConstantVariables
INFO: Removed constant array :msgl[]
May 22, 2018 10:02:47 PM fr.lip6.move.gal.instantiate.Simplifier simplifyConstantVariables
INFO: Simplified 18 expressions due to constant valuations.
May 22, 2018 10:02:47 PM fr.lip6.move.gal.instantiate.GALRewriter flatten
INFO: Flatten gal took : 156 ms
May 22, 2018 10:02:48 PM fr.lip6.move.gal.instantiate.GALRewriter flatten
INFO: Flatten gal took : 79 ms
May 22, 2018 10:02:48 PM fr.lip6.move.gal.instantiate.GALRewriter flatten
INFO: Flatten gal took : 114 ms
May 22, 2018 10:02:48 PM fr.lip6.move.serialization.SerializationUtil systemToFile
INFO: Time to serialize gal into /home/mcc/execution/ReachabilityCardinality.pnml.gal : 15 ms
May 22, 2018 10:02:48 PM fr.lip6.move.serialization.SerializationUtil serializePropertiesForITSTools
INFO: Time to serialize properties into /home/mcc/execution/ReachabilityCardinality.prop : 2 ms
May 22, 2018 10:02:48 PM fr.lip6.move.gal.semantics.DeterministicNextBuilder getDeterministicNext
INFO: Input system was not deterministic with 34 transitions. Expanding to a total of 586 deterministic transitions.
May 22, 2018 10:02:48 PM fr.lip6.move.gal.semantics.DeterministicNextBuilder getDeterministicNext
INFO: Determinization took 7 ms.
May 22, 2018 10:02:48 PM fr.lip6.move.gal.semantics.DeterministicNextBuilder getDeterministicNext
INFO: Input system was not deterministic with 34 transitions. Expanding to a total of 586 deterministic transitions.
May 22, 2018 10:02:48 PM fr.lip6.move.gal.semantics.DeterministicNextBuilder getDeterministicNext
INFO: Determinization took 2 ms.
May 22, 2018 10:02:49 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd checkProperties
INFO: Ran tautology test, simplified 0 / 14 in 880 ms.
May 22, 2018 10:02:49 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property SafeBus-COL-06-ReachabilityCardinality-00(UNSAT) depth K=0 took 20 ms
May 22, 2018 10:02:49 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property SafeBus-COL-06-ReachabilityCardinality-01(UNSAT) depth K=0 took 19 ms
May 22, 2018 10:02:49 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property SafeBus-COL-06-ReachabilityCardinality-02(UNSAT) depth K=0 took 7 ms
May 22, 2018 10:02:49 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property SafeBus-COL-06-ReachabilityCardinality-03(UNSAT) depth K=0 took 15 ms
May 22, 2018 10:02:49 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property SafeBus-COL-06-ReachabilityCardinality-04(UNSAT) depth K=0 took 1 ms
May 22, 2018 10:02:49 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property SafeBus-COL-06-ReachabilityCardinality-05(UNSAT) depth K=0 took 12 ms
May 22, 2018 10:02:49 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property SafeBus-COL-06-ReachabilityCardinality-06(UNSAT) depth K=0 took 12 ms
May 22, 2018 10:02:49 PM fr.lip6.move.gal.semantics.DeterministicNextBuilder getDeterministicNext
INFO: Input system was not deterministic with 34 transitions. Expanding to a total of 586 deterministic transitions.
May 22, 2018 10:02:49 PM fr.lip6.move.gal.semantics.DeterministicNextBuilder getDeterministicNext
INFO: Determinization took 1 ms.
May 22, 2018 10:02:49 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property SafeBus-COL-06-ReachabilityCardinality-08(UNSAT) depth K=0 took 11 ms
May 22, 2018 10:02:49 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property SafeBus-COL-06-ReachabilityCardinality-10(UNSAT) depth K=0 took 16 ms
May 22, 2018 10:02:49 PM fr.lip6.move.gal.gal2smt.bmc.KInductionSolver computeAndDeclareInvariants
INFO: Computed 29 place invariants in 166 ms
May 22, 2018 10:02:49 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property SafeBus-COL-06-ReachabilityCardinality-11(UNSAT) depth K=0 took 10 ms
May 22, 2018 10:02:49 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property SafeBus-COL-06-ReachabilityCardinality-12(UNSAT) depth K=0 took 15 ms
May 22, 2018 10:02:49 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property SafeBus-COL-06-ReachabilityCardinality-13(UNSAT) depth K=0 took 11 ms
May 22, 2018 10:02:49 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property SafeBus-COL-06-ReachabilityCardinality-14(UNSAT) depth K=0 took 19 ms
May 22, 2018 10:02:49 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property SafeBus-COL-06-ReachabilityCardinality-15(UNSAT) depth K=0 took 16 ms
May 22, 2018 10:02:49 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property SafeBus-COL-06-ReachabilityCardinality-00(UNSAT) depth K=1 took 14 ms
May 22, 2018 10:02:49 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property SafeBus-COL-06-ReachabilityCardinality-01(UNSAT) depth K=1 took 13 ms
May 22, 2018 10:02:49 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property SafeBus-COL-06-ReachabilityCardinality-02(UNSAT) depth K=1 took 16 ms
May 22, 2018 10:02:49 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property SafeBus-COL-06-ReachabilityCardinality-03(UNSAT) depth K=1 took 14 ms
May 22, 2018 10:02:49 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property SafeBus-COL-06-ReachabilityCardinality-04(UNSAT) depth K=1 took 15 ms
May 22, 2018 10:02:49 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property SafeBus-COL-06-ReachabilityCardinality-05(UNSAT) depth K=1 took 15 ms
May 22, 2018 10:02:49 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property SafeBus-COL-06-ReachabilityCardinality-06(UNSAT) depth K=1 took 29 ms
May 22, 2018 10:02:49 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property SafeBus-COL-06-ReachabilityCardinality-08(UNSAT) depth K=1 took 38 ms
May 22, 2018 10:02:49 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property SafeBus-COL-06-ReachabilityCardinality-10(UNSAT) depth K=1 took 15 ms
May 22, 2018 10:02:49 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property SafeBus-COL-06-ReachabilityCardinality-11(UNSAT) depth K=1 took 12 ms
May 22, 2018 10:02:49 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property SafeBus-COL-06-ReachabilityCardinality-12(UNSAT) depth K=1 took 52 ms
May 22, 2018 10:02:49 PM fr.lip6.move.gal.gal2smt.bmc.KInductionSolver computeAndDeclareInvariants
INFO: Computed 29 place invariants in 47 ms
May 22, 2018 10:02:49 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property SafeBus-COL-06-ReachabilityCardinality-13(UNSAT) depth K=1 took 14 ms
May 22, 2018 10:02:49 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property SafeBus-COL-06-ReachabilityCardinality-14(UNSAT) depth K=1 took 24 ms
May 22, 2018 10:02:49 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property SafeBus-COL-06-ReachabilityCardinality-15(UNSAT) depth K=1 took 4 ms
May 22, 2018 10:02:49 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property SafeBus-COL-06-ReachabilityCardinality-00(UNSAT) depth K=2 took 198 ms
May 22, 2018 10:02:49 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property SafeBus-COL-06-ReachabilityCardinality-01(UNSAT) depth K=2 took 139 ms
May 22, 2018 10:02:49 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property SafeBus-COL-06-ReachabilityCardinality-02(UNSAT) depth K=2 took 116 ms
May 22, 2018 10:02:50 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property SafeBus-COL-06-ReachabilityCardinality-03(UNSAT) depth K=2 took 178 ms
May 22, 2018 10:02:50 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property SafeBus-COL-06-ReachabilityCardinality-04(UNSAT) depth K=2 took 163 ms
May 22, 2018 10:02:50 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property SafeBus-COL-06-ReachabilityCardinality-05(UNSAT) depth K=2 took 155 ms
May 22, 2018 10:02:50 PM fr.lip6.move.gal.gal2smt.bmc.KInductionSolver init
INFO: Proved 144 variables to be positive in 1867 ms
May 22, 2018 10:02:50 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver computeAblingMatrix
INFO: Computing symmetric may disable matrix : 463 transitions.
May 22, 2018 10:02:50 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of disable matrix completed :0/463 took 0 ms. Total solver calls (SAT/UNSAT): 0(0/0)
May 22, 2018 10:02:50 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of Complete disable matrix. took 79 ms. Total solver calls (SAT/UNSAT): 0(0/0)
May 22, 2018 10:02:50 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver computeAblingMatrix
INFO: Computing symmetric may enable matrix : 463 transitions.
May 22, 2018 10:02:50 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of Complete enable matrix. took 34 ms. Total solver calls (SAT/UNSAT): 0(0/0)
May 22, 2018 10:02:51 PM fr.lip6.move.gal.gal2smt.bmc.KInductionSolver init
INFO: Proved 144 variables to be positive in 1588 ms
May 22, 2018 10:02:51 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property SafeBus-COL-06-ReachabilityCardinality-06(UNSAT) depth K=2 took 730 ms
May 22, 2018 10:02:51 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property SafeBus-COL-06-ReachabilityCardinality-08(UNSAT) depth K=2 took 226 ms
May 22, 2018 10:02:51 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property SafeBus-COL-06-ReachabilityCardinality-10(UNSAT) depth K=2 took 84 ms
May 22, 2018 10:02:51 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property SafeBus-COL-06-ReachabilityCardinality-11(UNSAT) depth K=2 took 106 ms
May 22, 2018 10:02:51 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property SafeBus-COL-06-ReachabilityCardinality-12(UNSAT) depth K=2 took 156 ms
May 22, 2018 10:02:51 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: Induction result is SAT, non conclusive we might be starting from unreachable statesSafeBus-COL-06-ReachabilityCardinality-00
May 22, 2018 10:02:51 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: KInduction solution for property SafeBus-COL-06-ReachabilityCardinality-00(SAT) depth K=0 took 796 ms
May 22, 2018 10:02:51 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property SafeBus-COL-06-ReachabilityCardinality-13(UNSAT) depth K=2 took 153 ms
May 22, 2018 10:02:52 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: Induction result is UNSAT, proved UNreachability of reachability predicate SafeBus-COL-06-ReachabilityCardinality-01
May 22, 2018 10:02:52 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: Induction result is UNSAT, successfully proved induction at step 0 for SafeBus-COL-06-ReachabilityCardinality-01
May 22, 2018 10:02:52 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: KInduction solution for property SafeBus-COL-06-ReachabilityCardinality-01(FALSE) depth K=0 took 718 ms
May 22, 2018 10:02:53 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property SafeBus-COL-06-ReachabilityCardinality-14(UNSAT) depth K=2 took 1710 ms
May 22, 2018 10:02:53 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property SafeBus-COL-06-ReachabilityCardinality-15(UNSAT) depth K=2 took 161 ms
May 22, 2018 10:02:58 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property SafeBus-COL-06-ReachabilityCardinality-00(UNSAT) depth K=3 took 4507 ms
May 22, 2018 10:03:02 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property SafeBus-COL-06-ReachabilityCardinality-02(UNSAT) depth K=3 took 4532 ms
May 22, 2018 10:03:03 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: Induction result is UNSAT, proved invariant SafeBus-COL-06-ReachabilityCardinality-02
May 22, 2018 10:03:03 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: Induction result is UNSAT, successfully proved induction at step 0 for SafeBus-COL-06-ReachabilityCardinality-02
May 22, 2018 10:03:03 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: KInduction solution for property SafeBus-COL-06-ReachabilityCardinality-02(TRUE) depth K=0 took 10893 ms
May 22, 2018 10:03:05 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: Induction result is UNSAT, proved UNreachability of reachability predicate SafeBus-COL-06-ReachabilityCardinality-03
May 22, 2018 10:03:05 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: Induction result is UNSAT, successfully proved induction at step 0 for SafeBus-COL-06-ReachabilityCardinality-03
May 22, 2018 10:03:05 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: KInduction solution for property SafeBus-COL-06-ReachabilityCardinality-03(FALSE) depth K=0 took 1925 ms
May 22, 2018 10:03:07 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property SafeBus-COL-06-ReachabilityCardinality-03(UNSAT) depth K=3 took 4301 ms
May 22, 2018 10:03:09 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: Induction result is UNSAT, proved UNreachability of reachability predicate SafeBus-COL-06-ReachabilityCardinality-04
May 22, 2018 10:03:09 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: Induction result is UNSAT, successfully proved induction at step 0 for SafeBus-COL-06-ReachabilityCardinality-04
May 22, 2018 10:03:09 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: KInduction solution for property SafeBus-COL-06-ReachabilityCardinality-04(FALSE) depth K=0 took 4125 ms
May 22, 2018 10:03:10 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: Induction result is SAT, non conclusive we might be starting from unreachable statesSafeBus-COL-06-ReachabilityCardinality-05
May 22, 2018 10:03:10 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: KInduction solution for property SafeBus-COL-06-ReachabilityCardinality-05(SAT) depth K=0 took 611 ms
May 22, 2018 10:03:10 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: Induction result is SAT, non conclusive we might be starting from unreachable statesSafeBus-COL-06-ReachabilityCardinality-06
May 22, 2018 10:03:10 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: KInduction solution for property SafeBus-COL-06-ReachabilityCardinality-06(SAT) depth K=0 took 707 ms
May 22, 2018 10:03:11 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: Induction result is SAT, non conclusive we might be starting from unreachable statesSafeBus-COL-06-ReachabilityCardinality-08
May 22, 2018 10:03:11 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: KInduction solution for property SafeBus-COL-06-ReachabilityCardinality-08(SAT) depth K=0 took 812 ms
May 22, 2018 10:03:11 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: Induction result is UNSAT, proved UNreachability of reachability predicate SafeBus-COL-06-ReachabilityCardinality-10
May 22, 2018 10:03:11 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: Induction result is UNSAT, successfully proved induction at step 0 for SafeBus-COL-06-ReachabilityCardinality-10
May 22, 2018 10:03:11 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: KInduction solution for property SafeBus-COL-06-ReachabilityCardinality-10(FALSE) depth K=0 took 198 ms
May 22, 2018 10:03:11 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property SafeBus-COL-06-ReachabilityCardinality-04(UNSAT) depth K=3 took 4747 ms
May 22, 2018 10:03:13 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: Induction result is UNSAT, proved UNreachability of reachability predicate SafeBus-COL-06-ReachabilityCardinality-11
May 22, 2018 10:03:13 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: Induction result is UNSAT, successfully proved induction at step 0 for SafeBus-COL-06-ReachabilityCardinality-11
May 22, 2018 10:03:13 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: KInduction solution for property SafeBus-COL-06-ReachabilityCardinality-11(FALSE) depth K=0 took 1430 ms
May 22, 2018 10:03:14 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: Induction result is SAT, non conclusive we might be starting from unreachable statesSafeBus-COL-06-ReachabilityCardinality-12
May 22, 2018 10:03:14 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: KInduction solution for property SafeBus-COL-06-ReachabilityCardinality-12(SAT) depth K=0 took 1369 ms
May 22, 2018 10:03:15 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: Induction result is UNSAT, proved UNreachability of reachability predicate SafeBus-COL-06-ReachabilityCardinality-13
May 22, 2018 10:03:15 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: Induction result is UNSAT, successfully proved induction at step 0 for SafeBus-COL-06-ReachabilityCardinality-13
May 22, 2018 10:03:15 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: KInduction solution for property SafeBus-COL-06-ReachabilityCardinality-13(FALSE) depth K=0 took 913 ms
May 22, 2018 10:03:16 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property SafeBus-COL-06-ReachabilityCardinality-05(UNSAT) depth K=3 took 4262 ms
May 22, 2018 10:03:16 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: Induction result is UNSAT, proved UNreachability of reachability predicate SafeBus-COL-06-ReachabilityCardinality-14
May 22, 2018 10:03:16 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: Induction result is UNSAT, successfully proved induction at step 0 for SafeBus-COL-06-ReachabilityCardinality-14
May 22, 2018 10:03:16 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: KInduction solution for property SafeBus-COL-06-ReachabilityCardinality-14(FALSE) depth K=0 took 1461 ms
May 22, 2018 10:03:18 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: Induction result is UNSAT, proved UNreachability of reachability predicate SafeBus-COL-06-ReachabilityCardinality-15
May 22, 2018 10:03:18 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: Induction result is UNSAT, successfully proved induction at step 0 for SafeBus-COL-06-ReachabilityCardinality-15
May 22, 2018 10:03:18 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: KInduction solution for property SafeBus-COL-06-ReachabilityCardinality-15(FALSE) depth K=0 took 1059 ms
May 22, 2018 10:03:21 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: Induction result is SAT, non conclusive we might be starting from unreachable statesSafeBus-COL-06-ReachabilityCardinality-00
May 22, 2018 10:03:21 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: KInduction solution for property SafeBus-COL-06-ReachabilityCardinality-00(SAT) depth K=1 took 3369 ms
May 22, 2018 10:03:23 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property SafeBus-COL-06-ReachabilityCardinality-06(UNSAT) depth K=3 took 7597 ms
May 22, 2018 10:03:37 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: Induction result is SAT, non conclusive we might be starting from unreachable statesSafeBus-COL-06-ReachabilityCardinality-05
May 22, 2018 10:03:37 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: KInduction solution for property SafeBus-COL-06-ReachabilityCardinality-05(SAT) depth K=1 took 15586 ms
May 22, 2018 10:03:41 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property SafeBus-COL-06-ReachabilityCardinality-08(UNSAT) depth K=3 took 17279 ms
May 22, 2018 10:03:42 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property SafeBus-COL-06-ReachabilityCardinality-10(UNSAT) depth K=3 took 1435 ms
May 22, 2018 10:03:47 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property SafeBus-COL-06-ReachabilityCardinality-11(UNSAT) depth K=3 took 4931 ms
May 22, 2018 10:03:51 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property SafeBus-COL-06-ReachabilityCardinality-12(UNSAT) depth K=3 took 3794 ms
May 22, 2018 10:03:53 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property SafeBus-COL-06-ReachabilityCardinality-13(UNSAT) depth K=3 took 2289 ms
May 22, 2018 10:03:53 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver computeCoEnablingMatrix
INFO: Computing symmetric co enabling matrix : 463 transitions.
May 22, 2018 10:03:54 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(0/463) took 884 ms. Total solver calls (SAT/UNSAT): 96(90/6)
May 22, 2018 10:03:57 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property SafeBus-COL-06-ReachabilityCardinality-14(UNSAT) depth K=3 took 4408 ms
May 22, 2018 10:03:58 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: Induction result is SAT, non conclusive we might be starting from unreachable statesSafeBus-COL-06-ReachabilityCardinality-06
May 22, 2018 10:03:58 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: KInduction solution for property SafeBus-COL-06-ReachabilityCardinality-06(SAT) depth K=1 took 21886 ms
May 22, 2018 10:03:59 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(1/463) took 5596 ms. Total solver calls (SAT/UNSAT): 491(413/78)
May 22, 2018 10:04:01 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property SafeBus-COL-06-ReachabilityCardinality-15(UNSAT) depth K=3 took 3128 ms
May 22, 2018 10:04:05 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(2/463) took 11291 ms. Total solver calls (SAT/UNSAT): 885(736/149)
May 22, 2018 10:04:10 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(3/463) took 16935 ms. Total solver calls (SAT/UNSAT): 1278(1059/219)
May 22, 2018 10:04:13 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: Induction result is SAT, non conclusive we might be starting from unreachable statesSafeBus-COL-06-ReachabilityCardinality-08
May 22, 2018 10:04:13 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: KInduction solution for property SafeBus-COL-06-ReachabilityCardinality-08(SAT) depth K=1 took 14436 ms
May 22, 2018 10:04:16 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(4/463) took 22631 ms. Total solver calls (SAT/UNSAT): 1670(1382/288)
May 22, 2018 10:04:18 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: Induction result is SAT, non conclusive we might be starting from unreachable statesSafeBus-COL-06-ReachabilityCardinality-12
May 22, 2018 10:04:18 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: KInduction solution for property SafeBus-COL-06-ReachabilityCardinality-12(SAT) depth K=1 took 5107 ms
May 22, 2018 10:04:20 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: Induction result is SAT, non conclusive we might be starting from unreachable statesSafeBus-COL-06-ReachabilityCardinality-00
May 22, 2018 10:04:20 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: KInduction solution for property SafeBus-COL-06-ReachabilityCardinality-00(SAT) depth K=2 took 2007 ms
May 22, 2018 10:04:22 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(5/463) took 28371 ms. Total solver calls (SAT/UNSAT): 2061(1705/356)
May 22, 2018 10:04:27 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(6/463) took 34127 ms. Total solver calls (SAT/UNSAT): 2451(2028/423)
May 22, 2018 10:04:30 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property SafeBus-COL-06-ReachabilityCardinality-00(UNSAT) depth K=4 took 29817 ms
May 22, 2018 10:04:31 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(7/463) took 37743 ms. Total solver calls (SAT/UNSAT): 2831(2336/495)
May 22, 2018 10:04:35 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(8/463) took 41272 ms. Total solver calls (SAT/UNSAT): 3210(2644/566)
May 22, 2018 10:04:38 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(9/463) took 44736 ms. Total solver calls (SAT/UNSAT): 3588(2952/636)
May 22, 2018 10:04:41 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(10/463) took 48163 ms. Total solver calls (SAT/UNSAT): 3965(3260/705)
May 22, 2018 10:04:45 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(11/463) took 51559 ms. Total solver calls (SAT/UNSAT): 4341(3568/773)
May 22, 2018 10:04:48 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(12/463) took 54983 ms. Total solver calls (SAT/UNSAT): 4716(3876/840)
May 22, 2018 10:04:51 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: Induction result is SAT, non conclusive we might be starting from unreachable statesSafeBus-COL-06-ReachabilityCardinality-05
May 22, 2018 10:04:51 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: KInduction solution for property SafeBus-COL-06-ReachabilityCardinality-05(SAT) depth K=2 took 30595 ms
May 22, 2018 10:04:52 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(13/463) took 58395 ms. Total solver calls (SAT/UNSAT): 5090(4178/912)
May 22, 2018 10:04:55 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(14/463) took 61896 ms. Total solver calls (SAT/UNSAT): 5463(4480/983)
May 22, 2018 10:04:58 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property SafeBus-COL-06-ReachabilityCardinality-05(UNSAT) depth K=4 took 27518 ms
May 22, 2018 10:04:58 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(15/463) took 65194 ms. Total solver calls (SAT/UNSAT): 5835(4782/1053)
May 22, 2018 10:05:02 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(16/463) took 68460 ms. Total solver calls (SAT/UNSAT): 6206(5084/1122)
May 22, 2018 10:05:05 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(17/463) took 71702 ms. Total solver calls (SAT/UNSAT): 6576(5386/1190)
May 22, 2018 10:05:08 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(18/463) took 74938 ms. Total solver calls (SAT/UNSAT): 6945(5688/1257)
May 22, 2018 10:05:10 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: Induction result is SAT, non conclusive we might be starting from unreachable statesSafeBus-COL-06-ReachabilityCardinality-06
May 22, 2018 10:05:10 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: KInduction solution for property SafeBus-COL-06-ReachabilityCardinality-06(SAT) depth K=2 took 19192 ms
May 22, 2018 10:05:11 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(19/463) took 78236 ms. Total solver calls (SAT/UNSAT): 7313(5984/1329)
May 22, 2018 10:05:15 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(20/463) took 81430 ms. Total solver calls (SAT/UNSAT): 7680(6280/1400)
May 22, 2018 10:05:18 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(21/463) took 84727 ms. Total solver calls (SAT/UNSAT): 8046(6576/1470)
May 22, 2018 10:05:21 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(22/463) took 87980 ms. Total solver calls (SAT/UNSAT): 8411(6872/1539)
May 22, 2018 10:05:25 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(23/463) took 91406 ms. Total solver calls (SAT/UNSAT): 8775(7168/1607)
May 22, 2018 10:05:28 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(24/463) took 94867 ms. Total solver calls (SAT/UNSAT): 9138(7464/1674)
May 22, 2018 10:05:32 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(25/463) took 98279 ms. Total solver calls (SAT/UNSAT): 9500(7754/1746)
May 22, 2018 10:05:33 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property SafeBus-COL-06-ReachabilityCardinality-06(UNSAT) depth K=4 took 35577 ms
May 22, 2018 10:05:35 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(26/463) took 101695 ms. Total solver calls (SAT/UNSAT): 9861(8044/1817)
May 22, 2018 10:05:38 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(27/463) took 105115 ms. Total solver calls (SAT/UNSAT): 10221(8334/1887)
May 22, 2018 10:05:42 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(28/463) took 108428 ms. Total solver calls (SAT/UNSAT): 10580(8624/1956)
May 22, 2018 10:05:45 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(29/463) took 111656 ms. Total solver calls (SAT/UNSAT): 10938(8914/2024)
May 22, 2018 10:05:48 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(30/463) took 114828 ms. Total solver calls (SAT/UNSAT): 11295(9204/2091)
May 22, 2018 10:05:51 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(31/463) took 118003 ms. Total solver calls (SAT/UNSAT): 11651(9488/2163)
May 22, 2018 10:05:53 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: Induction result is SAT, non conclusive we might be starting from unreachable statesSafeBus-COL-06-ReachabilityCardinality-08
May 22, 2018 10:05:53 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: KInduction solution for property SafeBus-COL-06-ReachabilityCardinality-08(SAT) depth K=2 took 43542 ms
May 22, 2018 10:05:55 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(32/463) took 121373 ms. Total solver calls (SAT/UNSAT): 12006(9772/2234)
May 22, 2018 10:05:58 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(33/463) took 124755 ms. Total solver calls (SAT/UNSAT): 12360(10056/2304)
May 22, 2018 10:06:01 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(34/463) took 127920 ms. Total solver calls (SAT/UNSAT): 12713(10340/2373)
May 22, 2018 10:06:04 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(35/463) took 131173 ms. Total solver calls (SAT/UNSAT): 13065(10624/2441)
May 22, 2018 10:06:08 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(36/463) took 134371 ms. Total solver calls (SAT/UNSAT): 13416(10908/2508)
May 22, 2018 10:06:09 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property SafeBus-COL-06-ReachabilityCardinality-08(UNSAT) depth K=4 took 35354 ms
May 22, 2018 10:06:09 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: Induction result is SAT, non conclusive we might be starting from unreachable statesSafeBus-COL-06-ReachabilityCardinality-12
May 22, 2018 10:06:09 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: KInduction solution for property SafeBus-COL-06-ReachabilityCardinality-12(SAT) depth K=2 took 15663 ms
May 22, 2018 10:06:11 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(37/463) took 137552 ms. Total solver calls (SAT/UNSAT): 13780(10908/2872)
May 22, 2018 10:06:14 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(38/463) took 140808 ms. Total solver calls (SAT/UNSAT): 14143(11093/3050)
May 22, 2018 10:06:17 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(39/463) took 144061 ms. Total solver calls (SAT/UNSAT): 14505(11277/3228)
May 22, 2018 10:06:20 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(40/463) took 147235 ms. Total solver calls (SAT/UNSAT): 14866(11460/3406)
May 22, 2018 10:06:24 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(41/463) took 150457 ms. Total solver calls (SAT/UNSAT): 15226(11642/3584)
May 22, 2018 10:06:27 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(42/463) took 153667 ms. Total solver calls (SAT/UNSAT): 15585(11823/3762)
May 22, 2018 10:06:29 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property SafeBus-COL-06-ReachabilityCardinality-12(UNSAT) depth K=4 took 20008 ms
May 22, 2018 10:06:30 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(43/463) took 157024 ms. Total solver calls (SAT/UNSAT): 15973(11823/4150)
May 22, 2018 10:06:34 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(44/463) took 160308 ms. Total solver calls (SAT/UNSAT): 16360(12038/4322)
May 22, 2018 10:06:37 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(45/463) took 163741 ms. Total solver calls (SAT/UNSAT): 16746(12252/4494)
May 22, 2018 10:06:40 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(46/463) took 167228 ms. Total solver calls (SAT/UNSAT): 17131(12465/4666)
May 22, 2018 10:06:44 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(47/463) took 170697 ms. Total solver calls (SAT/UNSAT): 17515(12677/4838)
May 22, 2018 10:06:48 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(48/463) took 174373 ms. Total solver calls (SAT/UNSAT): 17898(12888/5010)
May 22, 2018 10:06:51 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: Induction result is SAT, non conclusive we might be starting from unreachable statesSafeBus-COL-06-ReachabilityCardinality-00
May 22, 2018 10:06:51 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: KInduction solution for property SafeBus-COL-06-ReachabilityCardinality-00(SAT) depth K=3 took 41766 ms
May 22, 2018 10:06:51 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(49/463) took 177912 ms. Total solver calls (SAT/UNSAT): 18280(12888/5392)
May 22, 2018 10:06:55 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(50/463) took 181369 ms. Total solver calls (SAT/UNSAT): 18661(13103/5558)
May 22, 2018 10:06:58 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(51/463) took 184776 ms. Total solver calls (SAT/UNSAT): 19041(13317/5724)
May 22, 2018 10:07:02 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(52/463) took 188341 ms. Total solver calls (SAT/UNSAT): 19420(13530/5890)
May 22, 2018 10:07:05 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(53/463) took 191791 ms. Total solver calls (SAT/UNSAT): 19798(13742/6056)
May 22, 2018 10:07:08 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(54/463) took 195123 ms. Total solver calls (SAT/UNSAT): 20175(13953/6222)
May 22, 2018 10:07:14 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(56/463) took 201209 ms. Total solver calls (SAT/UNSAT): 20866(14138/6728)
May 22, 2018 10:07:18 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(57/463) took 204268 ms. Total solver calls (SAT/UNSAT): 21210(14322/6888)
May 22, 2018 10:07:21 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(58/463) took 207483 ms. Total solver calls (SAT/UNSAT): 21553(14505/7048)
May 22, 2018 10:07:27 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(60/463) took 213639 ms. Total solver calls (SAT/UNSAT): 22236(14868/7368)
May 22, 2018 10:07:30 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(61/463) took 216864 ms. Total solver calls (SAT/UNSAT): 22576(14868/7708)
May 22, 2018 10:07:33 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(62/463) took 219937 ms. Total solver calls (SAT/UNSAT): 22915(15053/7862)
May 22, 2018 10:07:36 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(63/463) took 223047 ms. Total solver calls (SAT/UNSAT): 23253(15237/8016)
May 22, 2018 10:07:39 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(64/463) took 226051 ms. Total solver calls (SAT/UNSAT): 23590(15420/8170)
May 22, 2018 10:07:42 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(65/463) took 229149 ms. Total solver calls (SAT/UNSAT): 23926(15602/8324)
May 22, 2018 10:07:46 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(66/463) took 232371 ms. Total solver calls (SAT/UNSAT): 24261(15783/8478)
May 22, 2018 10:07:49 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(67/463) took 235402 ms. Total solver calls (SAT/UNSAT): 24595(15783/8812)
May 22, 2018 10:07:55 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(69/463) took 241301 ms. Total solver calls (SAT/UNSAT): 25260(16152/9108)
May 22, 2018 10:07:58 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(70/463) took 244305 ms. Total solver calls (SAT/UNSAT): 25591(16335/9256)
May 22, 2018 10:08:04 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(72/463) took 250348 ms. Total solver calls (SAT/UNSAT): 26250(16698/9552)
May 22, 2018 10:08:09 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(74/463) took 256164 ms. Total solver calls (SAT/UNSAT): 26905(16878/10027)
May 22, 2018 10:08:13 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(75/463) took 259518 ms. Total solver calls (SAT/UNSAT): 27231(17032/10199)
May 22, 2018 10:08:14 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property SafeBus-COL-06-ReachabilityCardinality-00(UNSAT) depth K=5 took 105342 ms
May 22, 2018 10:08:16 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(76/463) took 262754 ms. Total solver calls (SAT/UNSAT): 27556(17185/10371)
May 22, 2018 10:08:22 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(78/463) took 268598 ms. Total solver calls (SAT/UNSAT): 28203(17488/10715)
May 22, 2018 10:08:25 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(79/463) took 271663 ms. Total solver calls (SAT/UNSAT): 28555(17698/10857)
May 22, 2018 10:08:28 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(80/463) took 274914 ms. Total solver calls (SAT/UNSAT): 28906(17698/11208)
May 22, 2018 10:08:31 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(81/463) took 278017 ms. Total solver calls (SAT/UNSAT): 29256(17882/11374)
May 22, 2018 10:08:34 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(82/463) took 281173 ms. Total solver calls (SAT/UNSAT): 29605(18065/11540)
May 22, 2018 10:08:38 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(83/463) took 284322 ms. Total solver calls (SAT/UNSAT): 29953(18247/11706)
May 22, 2018 10:08:41 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(84/463) took 287388 ms. Total solver calls (SAT/UNSAT): 30300(18428/11872)
May 22, 2018 10:08:44 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(85/463) took 290451 ms. Total solver calls (SAT/UNSAT): 30646(18638/12008)
May 22, 2018 10:08:50 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(87/463) took 296517 ms. Total solver calls (SAT/UNSAT): 31335(18822/12513)
May 22, 2018 10:08:53 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(88/463) took 299622 ms. Total solver calls (SAT/UNSAT): 31678(19005/12673)
May 22, 2018 10:08:56 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(89/463) took 302665 ms. Total solver calls (SAT/UNSAT): 32020(19187/12833)
May 22, 2018 10:08:59 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(90/463) took 305774 ms. Total solver calls (SAT/UNSAT): 32361(19368/12993)
May 22, 2018 10:09:04 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(92/463) took 311234 ms. Total solver calls (SAT/UNSAT): 32980(19548/13432)
May 22, 2018 10:09:05 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: Induction result is SAT, non conclusive we might be starting from unreachable statesSafeBus-COL-06-ReachabilityCardinality-05
May 22, 2018 10:09:05 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: KInduction solution for property SafeBus-COL-06-ReachabilityCardinality-05(SAT) depth K=3 took 134471 ms
May 22, 2018 10:09:10 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(94/463) took 316700 ms. Total solver calls (SAT/UNSAT): 33595(19855/13740)
May 22, 2018 10:09:16 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(96/463) took 322341 ms. Total solver calls (SAT/UNSAT): 34206(20158/14048)
May 22, 2018 10:09:21 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(98/463) took 327746 ms. Total solver calls (SAT/UNSAT): 34813(20338/14475)
May 22, 2018 10:09:26 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(100/463) took 332928 ms. Total solver calls (SAT/UNSAT): 35416(20645/14771)
May 22, 2018 10:09:32 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(102/463) took 338369 ms. Total solver calls (SAT/UNSAT): 36015(20948/15067)
May 22, 2018 10:09:33 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property SafeBus-COL-06-ReachabilityCardinality-05(UNSAT) depth K=5 took 78422 ms
May 22, 2018 10:09:37 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(104/463) took 343792 ms. Total solver calls (SAT/UNSAT): 36610(21128/15482)
May 22, 2018 10:09:42 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(106/463) took 348948 ms. Total solver calls (SAT/UNSAT): 37201(21435/15766)
May 22, 2018 10:09:48 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(108/463) took 354595 ms. Total solver calls (SAT/UNSAT): 37788(21738/16050)
May 22, 2018 10:09:53 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(110/463) took 359819 ms. Total solver calls (SAT/UNSAT): 38371(22007/16364)
May 22, 2018 10:09:58 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(112/463) took 364961 ms. Total solver calls (SAT/UNSAT): 38950(22130/16820)
May 22, 2018 10:10:03 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(114/463) took 370085 ms. Total solver calls (SAT/UNSAT): 39525(22373/17152)
May 22, 2018 10:10:09 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(116/463) took 375817 ms. Total solver calls (SAT/UNSAT): 40156(22702/17454)
May 22, 2018 10:10:15 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(118/463) took 381321 ms. Total solver calls (SAT/UNSAT): 40783(22855/17928)
May 22, 2018 10:10:20 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(120/463) took 386980 ms. Total solver calls (SAT/UNSAT): 41406(23158/18248)
May 22, 2018 10:10:26 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(122/463) took 392753 ms. Total solver calls (SAT/UNSAT): 42025(23487/18538)
May 22, 2018 10:10:32 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(124/463) took 398581 ms. Total solver calls (SAT/UNSAT): 42640(23640/19000)
May 22, 2018 10:10:35 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd checkProperties
WARNING: Interrupting SMT solver.
May 22, 2018 10:10:35 PM org.smtlib.impl.Script execute
WARNING: Script execution failed on command (assert (and (>= (select s0 137) 1) (and (>= (select s0 57) 1) (>= (select s0 2) 1)) (>= (select s0 14) 1))) with error (error "Failed to assert expression: java.io.IOException: Broken pipe (and (>= (select s0 137) 1) (and (>= (select s0 57) 1) (>= (select s0 2) 1)) (>= (select s0 14) 1))")
[(assert (and (>= (select s0 137) 1) (and (>= (select s0 57) 1) (>= (select s0 2) 1)) (>= (select s0 14) 1)))]
Skipping mayMatrices nes/nds SMT solver raised an exception.
May 22, 2018 10:10:35 PM fr.lip6.move.gal.gal2smt.bmc.NextBMCSolver checkSat
WARNING: SMT solver unexpectedly returned 'unknown' answer, retrying.
java.lang.RuntimeException: SMT solver raised an exception.
at fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver.computeCoEnablingMatrix(NecessaryEnablingsolver.java:475)
at fr.lip6.move.gal.gal2pins.Gal2PinsTransformerNext.printLabels(Gal2PinsTransformerNext.java:530)
at fr.lip6.move.gal.gal2pins.Gal2PinsTransformerNext.printDependencyMatrix(Gal2PinsTransformerNext.java:209)
at fr.lip6.move.gal.gal2pins.Gal2PinsTransformerNext.buildBodyFile(Gal2PinsTransformerNext.java:85)
at fr.lip6.move.gal.gal2pins.Gal2PinsTransformerNext.transform(Gal2PinsTransformerNext.java:830)
at fr.lip6.move.gal.application.LTSminRunner$1.run(LTSminRunner.java:71)
at java.lang.Thread.run(Thread.java:748)
java.lang.RuntimeException: SMT solver raised an error :unknown
at fr.lip6.move.gal.gal2smt.bmc.NextBMCSolver.checkSat(NextBMCSolver.java:318)
at fr.lip6.move.gal.gal2smt.bmc.NextBMCSolver.checkSat(NextBMCSolver.java:305)
at fr.lip6.move.gal.gal2smt.bmc.NextBMCSolver.verifyAssertion(NextBMCSolver.java:452)
at fr.lip6.move.gal.gal2smt.bmc.NextBMCSolver.verify(NextBMCSolver.java:435)
at fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd.runBMC(Gal2SMTFrontEnd.java:378)
at fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd.access$0(Gal2SMTFrontEnd.java:350)
at fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd$1.run(Gal2SMTFrontEnd.java:159)
at java.lang.Thread.run(Thread.java:748)
May 22, 2018 10:10:35 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
WARNING: Unexpected error occurred while running SMT. Was verifying SafeBus-COL-06-ReachabilityCardinality-06 SMT depth 5
java.lang.RuntimeException: java.lang.RuntimeException: SMT solver raised an error :unknown
at fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd.runBMC(Gal2SMTFrontEnd.java:404)
at fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd.access$0(Gal2SMTFrontEnd.java:350)
at fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd$1.run(Gal2SMTFrontEnd.java:159)
at java.lang.Thread.run(Thread.java:748)
Caused by: java.lang.RuntimeException: SMT solver raised an error :unknown
at fr.lip6.move.gal.gal2smt.bmc.NextBMCSolver.checkSat(NextBMCSolver.java:318)
at fr.lip6.move.gal.gal2smt.bmc.NextBMCSolver.checkSat(NextBMCSolver.java:305)
at fr.lip6.move.gal.gal2smt.bmc.NextBMCSolver.verifyAssertion(NextBMCSolver.java:452)
at fr.lip6.move.gal.gal2smt.bmc.NextBMCSolver.verify(NextBMCSolver.java:435)
at fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd.runBMC(Gal2SMTFrontEnd.java:378)
... 3 more
May 22, 2018 10:10:35 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: During BMC, SMT solver timed out at depth 5
May 22, 2018 10:10:35 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solving timed out (3600000 secs) at depth 5
May 22, 2018 10:10:35 PM fr.lip6.move.gal.gal2smt.bmc.NextBMCSolver checkSat
WARNING: SMT solver unexpectedly returned 'unknown' answer, retrying.
java.lang.RuntimeException: SMT solver raised an exception or timeout :(error "Failed to check-sat")
at fr.lip6.move.gal.gal2smt.bmc.NextBMCSolver.checkSat(NextBMCSolver.java:297)
at fr.lip6.move.gal.gal2smt.bmc.NextBMCSolver.checkSat(NextBMCSolver.java:305)
at fr.lip6.move.gal.gal2smt.bmc.KInductionSolver.verify(KInductionSolver.java:573)
at fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd.runKInduction(Gal2SMTFrontEnd.java:301)
at fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd.access$1(Gal2SMTFrontEnd.java:274)
at fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd$2.run(Gal2SMTFrontEnd.java:166)
at java.lang.Thread.run(Thread.java:748)
May 22, 2018 10:10:35 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
WARNING: Unexpected error occurred while running SMT. Was verifying SafeBus-COL-06-ReachabilityCardinality-06 K-induction depth 3
Exception in thread "Thread-8" java.lang.RuntimeException: java.lang.RuntimeException: SMT solver raised an exception or timeout :(error "Failed to check-sat")
at fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd.runKInduction(Gal2SMTFrontEnd.java:336)
at fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd.access$1(Gal2SMTFrontEnd.java:274)
at fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd$2.run(Gal2SMTFrontEnd.java:166)
at java.lang.Thread.run(Thread.java:748)
Caused by: java.lang.RuntimeException: SMT solver raised an exception or timeout :(error "Failed to check-sat")
at fr.lip6.move.gal.gal2smt.bmc.NextBMCSolver.checkSat(NextBMCSolver.java:297)
at fr.lip6.move.gal.gal2smt.bmc.NextBMCSolver.checkSat(NextBMCSolver.java:305)
at fr.lip6.move.gal.gal2smt.bmc.KInductionSolver.verify(KInductionSolver.java:573)
at fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd.runKInduction(Gal2SMTFrontEnd.java:301)
... 3 more
May 22, 2018 10:10:36 PM fr.lip6.move.gal.application.SMTRunner$2 run
INFO: SMT solved 9/ 14 properties. Interrupting other analysis methods.
May 22, 2018 10:10:36 PM fr.lip6.move.gal.gal2pins.Gal2PinsTransformerNext transform
INFO: Built C files in 467839ms conformant to PINS in folder :/home/mcc/execution

Sequence of Actions to be Executed by the VM

This is useful if one wants to reexecute the tool in the VM from the submitted image disk.

set -x
# this is for BenchKit: configuration of major elements for the test
export BK_INPUT="SafeBus-COL-06"
export BK_EXAMINATION="ReachabilityCardinality"
export BK_TOOL="itstools"
export BK_RESULT_DIR="/tmp/BK_RESULTS/OUTPUTS"
export BK_TIME_CONFINEMENT="3600"
export BK_MEMORY_CONFINEMENT="16384"

# this is specific to your benchmark or test

export BIN_DIR="$HOME/BenchKit/bin"

# remove the execution directoty if it exists (to avoid increse of .vmdk images)
if [ -d execution ] ; then
rm -rf execution
fi

tar xzf /home/mcc/BenchKit/INPUTS/SafeBus-COL-06.tgz
mv SafeBus-COL-06 execution
cd execution
pwd
ls -lh

# this is for BenchKit: explicit launching of the test
echo "====================================================================="
echo " Generated by BenchKit 2-3637"
echo " Executing tool itstools"
echo " Input is SafeBus-COL-06, examination is ReachabilityCardinality"
echo " Time confinement is $BK_TIME_CONFINEMENT seconds"
echo " Memory confinement is 16384 MBytes"
echo " Number of cores is 4"
echo " Run identifier is r152-smll-152685550300187"
echo "====================================================================="
echo
echo "--------------------"
echo "content from stdout:"
echo
echo "=== Data for post analysis generated by BenchKit (invocation template)"
echo
if [ "ReachabilityCardinality" = "UpperBounds" ] ; then
echo "The expected result is a vector of positive values"
echo NUM_VECTOR
elif [ "ReachabilityCardinality" != "StateSpace" ] ; then
echo "The expected result is a vector of booleans"
echo BOOL_VECTOR
else
echo "no data necessary for post analysis"
fi
echo
if [ -f "ReachabilityCardinality.txt" ] ; then
echo "here is the order used to build the result vector(from text file)"
for x in $(grep Property ReachabilityCardinality.txt | cut -d ' ' -f 2 | sort -u) ; do
echo "FORMULA_NAME $x"
done
elif [ -f "ReachabilityCardinality.xml" ] ; then # for cunf (txt files deleted;-)
echo echo "here is the order used to build the result vector(from xml file)"
for x in $(grep '' ReachabilityCardinality.xml | cut -d '>' -f 2 | cut -d '<' -f 1 | sort -u) ; do
echo "FORMULA_NAME $x"
done
fi
echo
echo "=== Now, execution of the tool begins"
echo
echo -n "BK_START "
date -u +%s%3N
echo
timeout -s 9 $BK_TIME_CONFINEMENT bash -c "/home/mcc/BenchKit/BenchKit_head.sh 2> STDERR ; echo ; echo -n \"BK_STOP \" ; date -u +%s%3N"
if [ $? -eq 137 ] ; then
echo
echo "BK_TIME_CONFINEMENT_REACHED"
fi
echo
echo "--------------------"
echo "content from stderr:"
echo
cat STDERR ;